Method for adjusting phase margin and control device

Abstract

The application relates to a phase margin adjustment method and a control device. The adjustment method comprises periodically acquiring a voltage range of the target voltage signal. When the voltage range is greater than a voltage fluctuation threshold, a voltage phase margin of the control loop is adjusted according to a first preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold; the voltage phase margin is used to adjust a loop coefficient of the control loop. In the process of voltage conversion by the voltage conversion circuit controlled by the control loop, the controlled voltage such as an input voltage or an output voltage in the voltage regulation circuit is collected, the phase margin is constantly updated based on the comparison between the controlled voltage and the voltage fluctuation threshold and voltage tracking time, so that the most suitable phase margin of the voltage conversion circuit can be determined, and the stability of the voltage conversion circuit is ensured.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power supply systems, and particularly relates to a phase margin adjustment method and a control device. BACKGROUND

[0002] A voltage conversion circuit is an important topology in power supply technology. Taking a solar power supply system as an example, a solar panel is connected to a power grid through an inverter or connected to a load through other voltage conversion circuits for power supply, which is an important component in the solar power supply system. Since the voltage output by the solar panel is not stable or is not working at the voltage corresponding to the maximum power point, the voltage conversion circuit is needed to convert the power output by the solar panel into a voltage meeting the requirements.

[0003] The voltage conversion circuit usually adopts closed-loop feedback control, such as proportional-integral (PI) closed-loop control, proportional (P) closed-loop control, and proportional-integral-differential (PID) closed-loop control. Among them, the phase margin is an important parameter affecting the stability of the closed-loop control. The greater the phase margin, the more stable the closed-loop control loop, and the stronger the system anti-disturbance, but the system tracking performance will be poor. The phase margin in the related technology is usually manually set by a developer, and it is difficult to determine the appropriate phase margin and takes a long time. SUMMARY

[0004] The application aims to provide a phase margin adjustment method and a control device, and aims to solve the problem that it is difficult to determine the appropriate phase margin and takes a long time in the traditional closed-loop feedback control.

[0005] The first aspect of the application embodiment provides a phase margin adjustment method applied to a controller of an electronic device. The electronic device includes a voltage conversion circuit and the controller. The controller is configured to output a control signal of the voltage conversion circuit according to a target electrical signal corresponding to the voltage conversion circuit and a preset loop control model. The target electrical signal includes a target voltage signal, and the loop control model includes a control loop. The adjustment method includes periodically acquiring a voltage range of the target voltage signal, adjusting a voltage phase margin of the control loop according to a first preset strategy when the voltage range is greater than a voltage fluctuation threshold, and stopping the adjustment until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold. The voltage phase margin is used to adjust the loop coefficient of the control loop.

[0006] In one embodiment, the method further comprises: obtaining a voltage tracking time of the target voltage signal when a voltage difference of the target voltage signal is less than or equal to the voltage fluctuation threshold; increasing the voltage fluctuation threshold when the voltage tracking time is greater than a tracking threshold; and adjusting the voltage phase margin according to a second preset strategy until the voltage difference of the target voltage signal is less than or equal to the voltage fluctuation threshold and the voltage tracking time is less than or equal to the tracking threshold.

[0007] In one embodiment, the loop control model further comprises a current control loop, the target electrical signal further comprises a target current signal, and the adjusting method further comprises: periodically obtaining a current difference of the target current signal, and updating a current phase margin of the current control loop according to a third preset strategy when the current difference is greater than a current fluctuation threshold until the current difference of the target current signal is less than or equal to the current fluctuation threshold.

[0008] In one embodiment, the periodically obtaining the current difference of the target current signal and updating the current phase margin of the current control loop according to the third preset strategy when the current difference is greater than the current fluctuation threshold comprises: periodically collecting current values of the target current signal; calculating a current difference of a first preset number of the current values every time the first preset number of the current values are collected; and increasing the current phase margin by a first preset step when the current difference is greater than the current fluctuation threshold.

[0009] In one embodiment, the periodically obtaining the voltage difference of the target voltage signal comprises: periodically collecting voltage values of the target voltage signal; and calculating a voltage difference of a second preset number of the voltage values every time the second preset number of the voltage values are collected.

[0010] In one embodiment, the adjusting the voltage phase margin of the control loop according to the first preset strategy when the voltage difference is greater than the voltage fluctuation threshold comprises: increasing the voltage phase margin by a second preset step and returning to execute the periodically obtaining the voltage difference of the target voltage signal when the voltage difference is greater than the voltage fluctuation threshold.

[0011] In one embodiment, the adjusting method further comprises: maintaining the voltage phase margin when the voltage difference is less than the voltage fluctuation threshold.

[0012] In one embodiment, when the voltage tracking time is greater than the tracking threshold, the voltage fluctuation threshold is increased, and the voltage phase margin is adjusted according to a second preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, and the voltage tracking time is less than or equal to the tracking threshold, which includes: when the voltage tracking time is greater than the tracking threshold, the voltage fluctuation threshold is increased by a third preset step; the voltage phase margin is reduced by a fourth preset step until the voltage tracking time is less than the tracking threshold, or the voltage range is greater than the voltage fluctuation threshold; when the voltage range is greater than the voltage fluctuation threshold, the step of increasing the voltage fluctuation threshold by the third preset step is returned to be executed.

[0013] In one embodiment, the adjustment method further includes: when the voltage tracking time is less than the tracking threshold, the voltage phase margin and the voltage fluctuation threshold are maintained.

[0014] A second aspect of an embodiment of the present application provides a control device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the steps of the phase margin adjustment method as described above when executing the computer program.

[0015] Compared with the prior art, the beneficial effects of the embodiments of the present application are: in the process of controlling the voltage conversion circuit to perform voltage conversion through the control loop, by collecting the controlled voltage such as the input voltage or the output voltage in the voltage regulation circuit, and based on the comparison between the controlled voltage and the voltage fluctuation threshold, and the voltage tracking time, the phase margin is constantly updated, so that the most suitable phase margin for the voltage conversion circuit can be determined, and the stability of the voltage conversion circuit is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A flowchart of the adjustment method provided by an embodiment of the present application;

[0017] Figure 2 A structural schematic diagram of an electronic device provided by an embodiment of the present application;

[0018] Figure 3 A principle schematic diagram of a control loop;

[0019] Figure 4 A specific schematic diagram of a control loop;

[0020] Figure 5 A flowchart of the adjustment method including step S300 and step S400;

[0021] Figure 6 A flowchart of the adjustment method including step S500;

[0022] Figure 7 As shown in the specific flowchart of step S500. Figure 6

[0023] Figure 8 As shown in the specific flowchart of step S100. Figure 1

[0024] Figure 9 As shown in the specific flowchart of step S400. Figure 5

[0025] The flowchart of the control device provided by an embodiment of the present application. Figure 10 DETAILED DESCRIPTION

[0026] In order to make the technical problems to be solved by the present application, technical solutions and beneficial effects clearer, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0027] In addition, the terms "first", "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly and specifically limited.

[0028] Figure 1 The flowchart of the adjustment method provided by an embodiment of the present application is shown, only the part related to the present embodiment is shown for the convenience of description, and the details are as follows:

[0029] The phase margin adjustment method provided by the present embodiment is applied to the controller 11 of the electronic device 10 as shown in Figure 2 The electronic device 10 includes a voltage conversion circuit 12 and the controller 11, and the controller 11 is used to output the control signal of the voltage conversion circuit 12 according to the target electrical signal corresponding to the voltage conversion circuit 12 and the preset loop control model.

[0030] The target electrical signal includes a target voltage signal. Exemplarily, the loop control model includes a control loop as shown in Figure 3 The control loop specifically includes an input voltage loop 13, an output voltage loop 14 and a current loop 15.

[0031] The voltage conversion circuit 12 can be a direct current conversion circuit such as a buck circuit, a boost circuit, a buck-boost circuit, etc., and the present application does not limit this.​​​

[0032] Exemplarily, when the voltage conversion circuit 12 is a Maximum Power Point Trackin (MPPT) circuit, a specific schematic diagram of the control loop is as shown in Figure 4 As shown, the input voltage ring 13 can calculate a first input voltage given value U inref and an input voltage feedback value U in After the difference is calculated, a first current given value of the current ring is calculated by a Proportional-Integral-Differential (PID) controller. The output voltage ring 14 can calculate a second output voltage given value U outref and an output voltage feedback value U out (the output voltage is also the bus voltage). After the difference is calculated, a second current given value of the current ring is calculated by the PID controller. The smaller one of the first current given value and the second current given value is input to the current ring, and the inductor current I L After the difference is calculated, the output current I out is calculated by the PID controller. The output current I out is used to control the output of the voltage conversion circuit 12.

[0033] It should be noted that, Figure 4 the control loop shown in is only an example, and in actual applications, other combinations of loops can also be used, and the present application does not limit the specific combination of control loops. For example, a combination of an output voltage ring and a current ring, a combination of an input voltage ring and a current ring, or only a single voltage ring is used to control the voltage conversion circuit 12.

[0034] Continuing to refer to Figure 1 , the phase margin adjustment method provided by the embodiment of the present application includes steps S100-S200.

[0035] Step S100: periodically obtain a voltage range of a target voltage signal.

[0036] Specifically, the target voltage signal refers to the controlled voltage of the voltage conversion circuit 12. The target voltage signal can be a voltage signal received by the input end of the voltage conversion circuit 12, that is, the input voltage of the voltage conversion circuit 12. Alternatively, the target voltage signal can also be a voltage signal output by the output end of the voltage conversion circuit 12, that is, the output voltage of the voltage conversion circuit 12. The input voltage ring 13 is used to control the input voltage, so when the phase margin of the input voltage ring 13 is adjusted, the target voltage signal is the input voltage of the voltage conversion circuit 12. Similarly, the output voltage ring 14 is used to control the input voltage, so when the phase margin of the output voltage ring 14 is adjusted, the target voltage signal is the output voltage of the voltage conversion circuit 12.

[0037] When the voltage conversion circuit 12 is working, the voltage value of the target voltage signal can be collected every fixed time interval. After a certain number of voltage values of the target voltage signal are collected, the maximum value is subtracted from the minimum value, so as to obtain the voltage range of the target voltage signal.

[0038] Step S200: When the voltage range is greater than the voltage fluctuation threshold, the voltage phase margin of the control loop is adjusted according to the first preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold. The voltage phase margin is used to adjust the loop coefficient of the control loop.

[0039] It should be noted that when the voltage range is greater than the voltage fluctuation threshold, it means that the voltage conversion circuit 12 is relatively unstable. By adjusting the voltage phase margin to change the loop coefficient of the control loop, the voltage stability of the voltage conversion circuit 12 can be improved. The voltage fluctuation threshold and the first preset strategy can be adaptively configured according to actual needs and actual conditions.

[0040] It can be understood that when the voltage range is less than or equal to the voltage fluctuation threshold, the voltage phase margin is maintained.

[0041] When the voltage range is less than or equal to the voltage fluctuation threshold, it means that the current target voltage signal is relatively stable. Without considering other characteristics of the voltage conversion circuit 13, such as the tracking of the voltage conversion circuit 13, the voltage phase margin does not need to be adjusted to improve the stability of the voltage conversion circuit 12 at the moment.

[0042] In the process of controlling the voltage conversion of the voltage conversion circuit 12 through the control loop, by collecting the controlled voltage in the voltage regulation circuit, such as the input voltage or the output voltage, and comparing the controlled voltage with the voltage fluctuation threshold, the phase margin is constantly updated, so that the most suitable phase margin for the voltage conversion circuit 12 can be determined, and the stability of the voltage conversion circuit 12 is ensured.

[0043] In an embodiment, as shown in Figure 5 The phase margin adjustment method further includes steps S300 and S400.

[0044] Step S300: When the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, the voltage tracking time of the target voltage signal is obtained.

[0045] It should be noted that after obtaining the voltage range of the target voltage signal, when the voltage range of the target voltage signal is greater than the voltage fluctuation threshold, step S200 is performed, and when the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, step S300 is performed.

[0046] It should be noted that the voltage tracking time represents the time required for the target voltage signal to change from the actual voltage value to the given value, and in step S300, the specific method of obtaining the voltage tracking time of the target voltage signal is to first set the given value corresponding to the target voltage signal in the control loop to a first preset value, and then perturb the given value corresponding to the target voltage signal in the control loop to a second preset value after the target voltage signal is equal to the first preset value. The time taken for the target voltage signal to change from the first preset value to the second preset value is the voltage tracking time. The specific size of the first preset value and the second preset value can be set according to actual needs.

[0047] For example, in the input voltage loop 13 in Figure 4 , the target voltage signal is the input voltage. First, set the input voltage given value U inref to a first preset value Ux, and then perturb the input voltage given value U inref to a second preset value Uy after the target voltage signal is equal to the first preset value Ux. The time Tu taken for the target voltage signal to change from the first preset value Ux to the second preset value Uy is the voltage tracking time.

[0048] It should be noted that in this application, the target voltage signal is equal to the first preset value or the target voltage signal is equal to the second preset value, which means that the target voltage signal fluctuates around the first preset value or the second preset value with a certain deviation. The deviation is much smaller than the voltage fluctuation threshold and can be set according to actual needs. For example, if the first preset value is Ux and the deviation is 0.1V, the target voltage signal fluctuates within [Ux-0.1, Ux+0.1], which is considered as the target voltage signal being equal to the first preset value.

[0049] Step S400: When the voltage tracking time is greater than the tracking threshold, increase the voltage fluctuation threshold, and adjust the voltage phase margin according to the second preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold and the voltage tracking time is less than or equal to the tracking threshold.

[0050] The tracking threshold is the maximum voltage tracking time allowed, and the tracking threshold and the second preset strategy can be set according to actual needs. By increasing the voltage fluctuation threshold, the voltage phase margin is adjusted according to the increased voltage fluctuation threshold to improve the tracking of the voltage conversion circuit 12 at the expense of the stability of the voltage conversion circuit 12.

[0051] It should be noted that when the voltage tracking time is less than the tracking threshold, it indicates that the voltage tracking of the voltage conversion circuit 12 is good. At this time, if the voltage phase margin meets the requirements, the current voltage phase margin can be directly maintained and used to adjust the loop coefficient of the control loop without modification.

[0052] In an embodiment, the loop control model further comprises a current control loop, and the target electrical signal further comprises a target current signal, as shown in Figure 6 As shown in FIG. 5, the adjusting method further comprises step S500.

[0053] Step S500: periodically acquire a current range of the target current signal, and update a current phase margin of the current control loop according to a third preset strategy when the current range is greater than a current fluctuation threshold, until the current range of the target current signal is less than or equal to the current fluctuation threshold.

[0054] It can be understood that the adjustment of the current phase margin can be performed simultaneously or sequentially with the adjustment of the voltage phase margin, and the application does not limit the adjustment sequence of the current phase margin and the voltage phase margin.

[0055] Specifically, the target current signal can be an input side current or an output side current of the voltage conversion circuit. For example, when the voltage conversion circuit 12 is a BOOS circuit, the target current signal can be an inductor current on the input side. When the voltage conversion circuit 12 is a buck circuit, the target current signal can be an inductor current on the output side.

[0056] It should be noted that when the current range is greater than the current fluctuation threshold, it means that the voltage conversion circuit 12 is relatively unstable, and adjusting the current phase margin to change the loop coefficient of the current control loop can improve the current stability of the voltage conversion circuit 12. The current fluctuation threshold and the first preset strategy can be adaptively configured according to actual needs and actual conditions. When the current range is less than or equal to the current fluctuation threshold, the current phase margin is maintained.

[0057] In an embodiment, as shown in Figure 7 Step S500 comprises steps S510-S530.

[0058] Step S510: periodically acquire a current value of the target current signal.

[0059] When the voltage conversion circuit is working, the current value of the target current signal can be acquired every fixed time interval.

[0060] Step S520: calculate a current range of the first preset number of current values after acquiring the first preset number of current values.

[0061] The first preset number can be set according to actual needs. After acquiring the first preset number of current values of the target current signal, the maximum value is subtracted from the minimum value, so as to obtain the current range of the target current signal.

[0062] Step S530: When the current difference is greater than the current fluctuation threshold, the current phase margin is increased by a first preset step, and the step S510 is executed again.

[0063] It is obvious that the current phase margin is increased only once cannot ensure that the current difference is less than or equal to the current fluctuation threshold, so the steps S510-S530 need to be executed repeatedly until the current difference of the target current signal is less than or equal to the current fluctuation threshold.

[0064] Taking the voltage loop 15 of the control loop as shown in Figure 4 , the initial current phase margin is PMi0, and when the current difference obtained by the steps S510 and S520 is greater than the current fluctuation threshold, the current phase margin PMi0 is increased by a first preset step to obtain the current phase margin PMi1, and the PID parameters of the PID controller in the current loop 15 are updated according to the current phase margin PMi1, and the output current I Figure 4 corresponding to the updated PID parameters is generated by the PID controller, and the target current signal is adjusted according to the output current I out . Then the current difference of the adjusted target current signal is obtained by the steps S510 and S520, and if the current difference is less than or equal to the current fluctuation threshold, the adjustment of the current phase margin is stopped, and the current phase margin PMi1 is taken as the final effective current phase margin. If the current difference is still greater than the current fluctuation threshold, the current phase margin PMi1 is increased by a first preset step to obtain the current phase margin PMi2, and so on, until a current phase margin PMiN is obtained, so that the current difference is less than or equal to the current fluctuation threshold, and the current phase margin PMiN is the final effective current phase margin.

[0065] It should be noted that the first preset step is the change amount of the current phase margin per unit time. By setting different first preset steps, the total time and the adjustment accuracy of the current phase margin can be controlled. The smaller the value of the first preset step, the more times the current phase margin needs to be adjusted to make the current difference less than or equal to the current fluctuation threshold, that is, the more times the step S500 is executed, and the smaller the difference between the final current phase margin and the most ideal current phase margin, but the total time is longer. Correspondingly, the larger the value of the first preset step, the less times the current phase margin needs to be adjusted to make the current difference less than or equal to the current fluctuation threshold, that is, the less times the step S500 is executed, and the larger the difference between the final current phase margin and the most ideal current phase margin, but the total time is shorter.

[0066] In an embodiment, as shown in Figure 8 , the step S100 includes steps S110-S120:

[0067] Step S110: Periodically collect the voltage value of the target voltage signal.

[0068] When the voltage conversion circuit 12 is working, it can collect the voltage value of the target voltage signal at fixed intervals.

[0069] Step S120: After collecting the voltage value for the second preset number of times, calculate the voltage range of the second preset number of voltage values.

[0070] After collecting the voltage values ​​of the target voltage signal a second preset number of times, the maximum value is subtracted from the minimum value to obtain the voltage range of the target voltage signal.

[0071] The second preset number of attempts can be set according to actual needs. The second preset number of attempts can be equal to the first preset number of attempts.

[0072] In one embodiment, step S200, when the voltage range is greater than the voltage fluctuation threshold, adjusting the voltage phase margin of the control loop according to the first preset strategy includes:

[0073] When the voltage range is greater than the voltage fluctuation threshold, the voltage phase margin is increased by a second preset step and the process returns to step S100.

[0074] That is, after each increase of the voltage phase margin by a second preset step size, it is determined whether the newly acquired voltage range is less than or equal to the voltage fluctuation threshold. If the voltage range is still greater than the voltage fluctuation threshold, the voltage phase margin is increased by the second preset step size again to achieve the effect of gradually increasing the voltage phase margin.

[0075] Obviously, simply increasing the voltage phase margin by the second preset step size once may not be sufficient to obtain a voltage phase margin that makes the voltage range less than or equal to the voltage fluctuation threshold. Steps S100 and S200 can be continuously cyclically executed during the phase margin adjustment process to adjust the voltage phase margin multiple times according to the first preset strategy until the voltage range is less than or equal to the voltage fluctuation threshold.

[0076] For example Figure 4 Taking the input voltage loop 13 of the control loop as an example, let the initial voltage phase margin be PMv0. When the voltage range obtained through step S100 is greater than the voltage fluctuation threshold, the voltage phase margin PMv0 is increased by a second preset step size to obtain the voltage phase margin PMv1. The voltage phase margin is then updated according to PMv1. Figure 4The PID parameters of the PID controller in the voltage loop 15 are updated to generate a corresponding first current setpoint, which is used to adjust the voltage conversion circuit 12. Then, in step S100, the voltage range of the adjusted target voltage signal is obtained. If the voltage range is less than or equal to the voltage fluctuation threshold, the voltage phase margin PMv1 is taken as the final effective voltage phase margin. If the voltage range is still greater than the voltage fluctuation threshold, the voltage phase margin PMv1 is increased by a second preset step size to obtain a voltage phase margin PMv2, and so on, until a voltage phase margin PMvN is obtained, such that the voltage range is less than or equal to the voltage fluctuation threshold. This voltage phase margin PMvN is the final effective voltage phase margin.

[0077] It should be noted that the second preset step size is the change in voltage phase margin per unit time. By setting different second preset step sizes, the total time and adjustment accuracy of adjusting the voltage phase margin can be controlled. The smaller the value of the second preset step size, the more times the voltage phase margin needs to be adjusted to make the voltage range less than or equal to the voltage fluctuation threshold, i.e., the more times steps S100 and S200 are executed. The final voltage phase margin is less different from the ideal voltage phase margin, but the total time spent is greater. Conversely, the larger the value of the second preset step size, the fewer times the voltage phase margin needs to be adjusted to make the voltage range less than or equal to the voltage fluctuation threshold, i.e., the fewer times steps S100 and S200 are executed. The final voltage phase margin is more different from the ideal voltage phase margin, but the total time spent is smaller.

[0078] In one embodiment, such as Figure 9 As shown, step S400 includes steps S410 to S430.

[0079] Step S410: When the voltage tracking time is greater than the tracking threshold, increase the voltage fluctuation threshold by a third preset step.

[0080] The third preset step size can be set according to actual needs by increasing the voltage fluctuation threshold. When the voltage phase margin decreases, the voltage stability of the voltage conversion circuit 12 will also decrease, but the tracking performance will improve. If the tracking performance cannot meet the requirements, the voltage fluctuation threshold can be increased in step S400, which can sacrifice some voltage stability to improve the tracking performance.

[0081] Step S420: Reduce the voltage phase margin by a fourth preset step size until the voltage tracking time is less than the tracking threshold or the voltage range is greater than the voltage fluctuation threshold.

[0082] The second preset strategy is to reduce the voltage phase margin by a fourth preset step size. The voltage phase margin can be reduced by multiple times of reducing the fourth preset step size. The fourth preset step size can be set according to actual requirements.

[0083] Step S430: When the voltage difference is greater than the voltage fluctuation threshold, return to the step of increasing the voltage fluctuation threshold by a third preset step size, that is, return to step S410.

[0084] Taking the input voltage loop 13 of the control loop as an example, Figure 4 The voltage phase margin obtained by step S200 is PMv0, the initial voltage fluctuation threshold is U1, and the tracking threshold is T1. When the voltage tracking time obtained by step S300 is greater than the tracking threshold T1, the voltage fluctuation threshold U1 is increased by a third preset step size to obtain a voltage fluctuation threshold U2, the voltage phase margin PMv0 is reduced by a fourth preset step size to obtain a voltage phase margin PMv1, the PID parameters of the input voltage loop 13 of the control loop are updated according to the voltage phase margin PMv1, and the voltage tracking time is obtained again. If the voltage tracking time is less than or equal to the tracking threshold T1, the voltage phase margin PMv1 is the final effective voltage phase margin. If the voltage tracking time is still greater than the tracking threshold T1, the voltage phase margin PMv1 is reduced by a fourth preset step size to obtain a voltage phase margin PMv2, and so on, until a voltage phase margin PMvN is obtained, so that the voltage tracking time is less than or equal to the tracking threshold T1.

[0085] If the voltage difference of the target voltage signal is greater than the voltage fluctuation threshold U2, and the voltage tracking time is still greater than the tracking threshold, the voltage fluctuation threshold U2 is increased by a third preset step size to obtain a voltage fluctuation threshold U3, and a suitable voltage phase margin is continued to be found by step S420.

[0086] It should be noted that the smaller the third preset step size, the closer the value of the voltage phase margin found to the theoretical optimal solution. At the same time, the voltage fluctuation threshold can be set to a certain upper limit according to the weight of the disturbance rejection and the tracking (i.e. the ratio of the range change degree of the disturbance rejection and the tracking), for example, the maximum value of the voltage fluctuation threshold is twice the initial voltage fluctuation threshold in step S200, so as to avoid too low disturbance rejection due to tracking.

[0087] In an embodiment, step S400 further includes: when the voltage tracking time is less than the tracking threshold, maintaining the voltage phase margin and the voltage fluctuation threshold.

[0088] When the voltage tracking time is less than the tracking threshold, it means that the voltage fluctuation threshold is reasonable, the tracking requirement can be met without sacrificing stability, and the current voltage phase margin can make the voltage conversion circuit 12 work stably without further adjusting the voltage phase margin.

[0089] In an embodiment, the loop coefficient of the control loop includes a proportional coefficient and an integral coefficient.

[0090] The calculation formula of the proportional coefficient is Kp = 2 * k1 * π * L * (Pm / (360 * ts * dlycoef)), wherein Kp is the proportional coefficient, L is the inductance value of the voltage conversion circuit, Pm is the voltage phase margin or the current phase margin, ts is the control period of the voltage conversion circuit, dlycoef is the delay coefficient, k1 is the first preset coefficient, and dlycoef and k1 can be determined according to the actual topology and device selection of the voltage conversion circuit.

[0091] The calculation formula of the integral coefficient is Ki = k2 * Kp2 / L, wherein Ki is the integral coefficient, and k2 is the second preset coefficient, which can be determined according to the actual topology and device selection of the voltage conversion circuit.

[0092] By substituting the voltage phase margin or the current phase margin into the above formula, the proportional coefficient and the integral coefficient of the PID controller for the control loop can be obtained, so as to adjust and control the voltage conversion circuit 12.

[0093] It should be understood that the size of the serial number of each step in the above embodiment does not mean the order of execution, and the execution order of each process should be obtained according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0094] Figure 10 A flowchart of the control device provided by an embodiment of the present application is shown, only the part related to the present embodiment is shown for the convenience of description, and the details are as follows:

[0095] A control device 20 includes a memory 21, a processor 22, and a computer program 23 stored in the memory 21 and executable on the processor 22, and the processor 22 implements the steps of the phase margin adjustment method of any of the above embodiments when executing the computer program 23.

[0096] It should be noted that the control device 20 can be an independent control device independent of the device where the voltage conversion circuit 12 is located, or can be integrated into the device where the voltage conversion circuit 12 is located, and the present application does not limit this.

[0097] The memory 21 can include any entity or device, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, software distribution medium, etc. capable of carrying computer program 23 code. It should be noted that the contents contained in the memory 21 can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, computer readable media do not include electrical carrier signals and telecommunication signals.

[0098] The processor 22 can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0099] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit and module is exemplified, and in actual application, the above-mentioned functions can be completed by different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be realized in the form of hardware or in the form of software functional unit. In addition, the specific names of each functional unit and module are only for easy distinction, and do not limit the protection scope of the present application. The specific working process of the unit and module in the above system can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

[0100] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0101] The above examples are only used to illustrate the technical solutions of the present application, but not limit the same; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced by equivalent ones; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A method of adjusting phase margin, characterized by, A controller applied to an electronic device, the electronic device comprising a voltage conversion circuit and the controller, the controller being configured to output a control signal of the voltage conversion circuit according to a target electrical signal corresponding to the voltage conversion circuit and a preset loop control model; The target electrical signal comprises a target voltage signal, and the loop control model comprises a control loop, and the adjusting method comprises: periodically acquiring a voltage range of the target voltage signal; when the voltage range is greater than a voltage fluctuation threshold, adjusting a voltage phase margin of the control loop according to a first preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold; the voltage phase margin is used to adjust a loop coefficient of the control loop; when the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, acquiring a voltage tracking time of the target voltage signal; when the voltage tracking time is greater than a tracking threshold, increasing the voltage fluctuation threshold, and adjusting the voltage phase margin according to a second preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, and the voltage tracking time is less than or equal to the tracking threshold.

2. The conditioning method of claim 1, wherein, The loop control model further comprises a current control loop, the target electrical signal further comprises a target current signal, and the adjusting method further comprises: periodically acquiring a current range of the target current signal, and when the current range is greater than a current fluctuation threshold, updating a current phase margin of the current control loop according to a third preset strategy until the current range of the target current signal is less than or equal to the current fluctuation threshold.

3. The conditioning method of claim 2, wherein, The periodically acquiring the current range of the target current signal and the updating the current phase margin of the current control loop according to the third preset strategy when the current range is greater than the current fluctuation threshold, comprises: periodically collecting current values of the target current signal; acquiring a current range of a first preset number of the current values every time the first preset number of the current values are collected; when the current range is greater than the current fluctuation threshold, increasing the current phase margin by a first preset step.

4. The conditioning method of claim 1, wherein, The periodically acquiring the voltage range of the target voltage signal, comprises: periodically collecting voltage values of the target voltage signal; acquiring a voltage range of a second preset number of the voltage values every time the second preset number of the voltage values are collected.

5. The conditioning method of claim 1, wherein, The adjusting the voltage phase margin of the control loop according to the first preset strategy when the voltage range is greater than the voltage fluctuation threshold, comprises: when the voltage range is greater than the voltage fluctuation threshold, increasing the voltage phase margin by a second preset step and returning to execute the periodically acquiring the voltage range of the target voltage signal.

6. The conditioning method of claim 1, wherein, The increasing the voltage fluctuation threshold when the voltage tracking time is greater than the tracking threshold, and adjusting the voltage phase margin according to the second preset strategy until the voltage range of the target voltage signal is less than or equal to the voltage fluctuation threshold, and the voltage tracking time is less than or equal to the tracking threshold, comprises: when the voltage tracking time is greater than the tracking threshold, increasing the voltage fluctuation threshold by a third preset step; decreasing the voltage phase margin by a fourth preset step until the voltage tracking time is less than the tracking threshold, or the voltage range is greater than the voltage fluctuation threshold; when the voltage range is greater than the voltage fluctuation threshold, returning to execute the step of increasing the voltage fluctuation threshold by the third preset step.

7. The adjustment method of claim 1 or 6, wherein, The adjustment method further comprises: when the voltage tracking time is less than the tracking threshold, maintaining the voltage phase margin and the voltage fluctuation threshold.

8. A control device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, The processor, when executing the computer program, implements the steps of the phase margin adjustment method according to any one of claims 1 to 7.

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