Vertical in-situ magnification electron probe and electron probe device

Abstract

The application provides a vertical in-situ amplification electron detector and an electron detection device, and the electron detector comprises a first semiconductor layer, source and drain regions which are arranged at the surface layer of the first surface of the first semiconductor layer, a bottom doped region which is formed at the surface layer of the second surface of the first semiconductor layer, a dielectric layer which is arranged on the first surface of the first semiconductor layer, a second semiconductor layer which is arranged on the dielectric layer, the second surface of the second semiconductor layer is connected with the dielectric layer, a first doped region which is arranged at the surface layer of the second surface of the second semiconductor layer, and a second doped region which is arranged at the surface layer of the first surface of the second semiconductor layer, and the second doped region and the first doped region have opposite conductive types. The P-i-N type absorption region and the transistor structure for amplifying the electronic signal are integrated, a novel electron detector with an in-situ amplification function is realized, and the response speed and the sensitivity of the electron detector can be greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit design and manufacturing, and in particular relates to a vertical in-situ amplified electronic detector and electronic detection device. Background Technology

[0002] An electron detector is a digital imaging system fabricated using complementary metal-oxide-semiconductor (CMOS) technology. Unlike indirect detection methods that rely on phosphors to convert electron signals into photons before coupling, it directly detects electron signals. Electrons of various energies are directly incident into the electron detector, where their own energy causes collisional ionization, altering the conductivity of the incident material and creating electron-hole pairs. Compared to indirect electron detectors, this method improves the spatial resolution and detection efficiency of cryo-electron microscopy in resolving biological sample structures. It is commonly used in electron detection-based characterization tests, such as scanning electron microscopy (SEM), transmission electron microscopy (TEM), scanning transmission electron microscopy (STEM), and cryo-electron microscopy, to collect electron signals.

[0003] High response speed and low dark current are fundamental requirements for achieving high-quality image signal-to-noise ratios, which are essential for high-performance electronic detectors. However, existing electronic detectors mostly employ PIN structures to collect electronic signals. PIN structures only detect signals and do not amplify them, resulting in low sensitivity. Furthermore, typical electronic detectors require absorption layer thicknesses of several hundred micrometers, such as 300μm to 600μm, to achieve the smallest possible device capacitance under full depletion conditions, thereby increasing the detector's response speed. However, a thicker absorption layer increases the distance carriers travel under the electric field, which in turn reduces the detector's response speed. It should be noted that the above background description is provided solely for the purpose of clearly and completely explaining the technical solutions of this application and facilitating understanding by those skilled in the art. The fact that these solutions are described in the background section of this application should not be construed as meaning that they are known to those skilled in the art. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a vertical in-situ amplified electronic detector and electronic detection device to solve the problems of insufficient response speed and sensitivity of electronic detectors in the prior art.

[0005] To achieve the above and other related objectives, the present invention provides a vertical in-situ amplified electron detector, the electron detector comprising: a first semiconductor layer having opposing first and second surfaces; a source region and a drain region spaced apart on the surface of the first surface of the first semiconductor layer; a bottom doped region formed on the surface of the second surface of the first semiconductor layer; a dielectric layer disposed on the first surface of the first semiconductor layer; a second semiconductor layer disposed on the dielectric layer having opposing first and second surfaces, the second surface of the second semiconductor layer being in contact with the dielectric layer; a first doped region spaced apart on the surface of the second surface of the second semiconductor layer; and a second doped region disposed on the surface of the first surface of the second semiconductor layer, the second doped region and the first doped region having opposite conductivity types.

[0006] Optionally, the first doped region, the second semiconductor layer, and the second doped region form a PiN-type absorption region. Under the action of an applied voltage, the PiN-type absorption region forms a stable electric field distribution. The PiN-type absorption region absorbs electrons. At the instant when the electrons collide with the PiN-type absorption region and generate electron-hole pairs, free carriers (free electrons or holes) drift under the action of the applied voltage, causing a change in the electric field distribution of the PiN-type absorption region. When the electric field of the PiN-type absorption region above the dielectric layer changes, the current between the source region and the drain region changes accordingly, thereby realizing the detection of electrons.

[0007] Optionally, the first doped region has a first lead-out structure, and the second doped region has a second lead-out structure. The first and second lead-out structures are used to extract the free carriers (free electrons or holes) after detection. The drain region has a third lead-out structure, and the source region has a fourth lead-out structure. The third and fourth lead-out structures are used to apply a voltage between the source and drain regions. The bottom doped region has a fifth lead-out structure for adjusting the voltage of the first semiconductor layer.

[0008] Optionally, the thickness of the second semiconductor layer is positively correlated with the highest energy of the detected electron, and the value of the applied voltage is positively correlated with the thickness of the second semiconductor layer.

[0009] Optionally, the applied voltage to the first doped region and the second doped region completely depletes the second semiconductor layer of the PiN-type absorption region.

[0010] Optionally, the absolute value of the applied voltage difference between the first doped region and the second doped region is between 0.5V and 200V.

[0011] Optionally, the magnitude of the current change between the source and drain regions depends on the number of electron-hole pairs generated by the collisional ionization of the detected electrons, and the relative position of the incident point of the detected electrons to the channel region between the source and drain regions.

[0012] Optionally, the sensitivity of the current change between the source and drain regions is negatively correlated with the thickness of the dielectric layer, which is between 1 nanometer and 20 micrometers, to improve the sensitivity.

[0013] Optionally, an asymmetric doped region is further formed in the second semiconductor layer. The asymmetric doped region is used to form a higher potential change than the region outside the asymmetric doped region when electron-hole pairs are generated, so as to improve the response sensitivity of the electron detector.

[0014] Optionally, the asymmetric doped region is disposed in the second semiconductor layer region corresponding to the channel region between the source region and the drain region.

[0015] Optionally, the first semiconductor layer and the second semiconductor layer are made of silicon, germanium, germanium-silicon, group III-V compounds, or silicon carbide, and the dielectric layer is made of silicon dioxide or silicon nitride.

[0016] Optionally, the first semiconductor layer is P-type conductive, the source and drain regions are N-type conductive, the first doped region is N-type conductive, the second doped region is P-type conductive, and the second semiconductor layer is an intrinsic semiconductor layer.

[0017] Optionally, the first semiconductor layer is N-type conductive, the source and drain regions are P-type conductive, the first doped region is P-type conductive, the second doped region is N-type conductive, and the second semiconductor layer is an intrinsic semiconductor layer.

[0018] Optionally, the top view arrangement of the source region and the drain region is an interdigitated shape with opposite orientations.

[0019] Optionally, the top view arrangement of the source region and the drain region is a vortex shape arranged opposite each other, and the vortex shapes of the source region and the drain region are in opposite clockwise directions.

[0020] The present invention also provides an electron detection device, comprising: a vertical in-situ amplified electron detector as described in any of the above embodiments, for absorbing electrons to generate a current change between the source region and the drain region; a preamplifier connected to the vertical in-situ amplified electron detector for amplifying the current change; a pulse shaper connected to the preamplifier for shaping the amplified current signal into a voltage signal; a comparator connected to the pulse shaper for comparing the voltage signal with a threshold voltage to filter out noise interference and extract the effective voltage signal; a counter for distinguishing and counting incident electrons of different energies and positions for the effective voltage change signal; a parallel sequential multiplexer for transmitting the effective voltage change signal; and an image processor for performing image processing on the effective voltage signal.

[0021] Optionally, the comparator is provided with multiple parallel threshold voltages, and the corresponding threshold voltage is selected for comparison according to the strength of the voltage signal.

[0022] As described above, the vertical in-situ amplified electronic detector and electronic detection device of the present invention have the following beneficial effects:

[0023] This invention integrates a PiN-type absorption region and a transistor structure for amplifying electronic signals, realizing a novel electronic detector with in-situ amplification function, which can greatly improve the response speed and sensitivity of the electronic detector.

[0024] This invention achieves electron detection by creating a stable electric field distribution in the PiN-type absorption region under an applied voltage. The PiN-type absorption region absorbs electrons, and at the instant the electrons collide with and ionize to generate electron-hole pairs, free carriers (free electrons or holes) drift under the applied voltage, causing a change in the electric field distribution of the PiN-type absorption region. When the electric field of the PiN-type absorption region above the dielectric layer changes, the current between the source and drain regions changes accordingly. The response speed of the electron detector in this invention depends on the channel length, electron mobility, and the voltage applied to the drain region. Furthermore, it does not require transferring electrons from the absorption region to achieve detection. In fact, this invention can achieve detection instantaneously upon the generation of electron-hole pairs, exhibiting a very high response speed.

[0025] Furthermore, the present invention can effectively improve the sensitivity of the electronic detector by setting a dielectric layer with a smaller thickness.

[0026] This invention can amplify the corresponding signal in situ while detecting electrons, which can effectively improve the accuracy of the electron detector. Attached Figure Description

[0027] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the embodiments of this application and to illustrate the implementation of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application.

[0028] Figures 1-9 The diagram shows the structural schematics of each step in the fabrication method of the vertical in-situ amplified electron detector according to Embodiment 1 of the present invention. Figure 6 The diagram shown is a structural schematic of the vertical in-situ amplified electron detector of Embodiment 1 of the present invention.

[0029] Figure 10 The diagram shown is a structural schematic of the vertical in-situ amplified electron detector of Embodiment 3 of the present invention.

[0030] Figures 11-12 The diagram shows the structural schematics of each step in the fabrication method of the vertical in-situ amplified electron detector according to Embodiment 2 of the present invention.

[0031] Figure 13 The diagram shows the overall potential distribution of the vertical in-situ amplified electron detector of Embodiment 1 of the present invention when multiple electrons are continuously incident.

[0032] Figure 14 The diagram shows the potential and current distribution in the channel region of the vertical in-situ amplified electron detector according to Embodiment 1 of the present invention during continuous multi-electron incidence.

[0033] Figure 15 The results are shown as the response curves of incident light intensity and output signal current intensity obtained by replacing incident electrons with visible light in the simulation.

[0034] Figure 16 The curves show the drain current and the potential difference Vds between the source and drain regions under the conditions of incident light and no incident light.

[0035] Figure 17 The graph shown is a curve of drain current versus electrode current in the first doped region of the vertical in-situ amplified electron detector of Embodiment 1 of the present invention under pulsed light intensity.

[0036] Figure 18 The diagram shown is a structural schematic of the electronic detection device according to Embodiment 4 of the present invention.

[0037] Component designation explanation

[0038] 101 First Semiconductor Layer

[0039] 102 Bottom Doped Region

[0040] 103 Source Region

[0041] 104 Leakage Zone

[0042] 105 Dielectric Layer

[0043] 106 First Doped Region

[0044] 107 Second Semiconductor Layer

[0045] 108 Second Doped Region

[0046] 110 Asymmetric Doped Region

[0047] 10 Electronic detectors

[0048] 20 Preamplifier

[0049] 30-pulse shaper

[0050] 40 comparators

[0051] 50 counter

[0052] 60 Parallel Sequential Multiplexer

[0053] 70 Image Processor Detailed Implementation

[0054] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0055] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.

[0056] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0057] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0058] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0059] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0060] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0061] Example 1

[0062] like Figures 1-10 As shown, this invention provides a method for fabricating a vertical in-situ amplified electron detector, the method comprising the following steps:

[0063] like Figure 1 As shown, step 1) is performed first, providing a first semiconductor layer 101, which includes opposing first and second surfaces.

[0064] In one embodiment, the material of the semiconductor layer can be silicon, germanium, germanium-silicon, group III-V compound, silicon carbide, etc. In this embodiment, the material of the first semiconductor layer 101 is silicon.

[0065] In one embodiment, the method further includes the step of forming a bottom doped region 102 and a fifth lead-out structure on the second side of the first semiconductor layer 101 for adjusting the voltage of the first semiconductor layer 101.

[0066] like Figure 2 As shown, then step 2) is performed, in which a source region 103 and a drain region 104 are formed at intervals on the surface of the first side of the first semiconductor layer 101.

[0067] In one embodiment, after ion implantation, the source region 103 and the drain region 104 can be formed by annealing to activate the ions.

[0068] like Figure 3 As shown, then step 3) is performed to form a dielectric layer 105 on the first surface of the first semiconductor layer 101.

[0069] In one embodiment, a dielectric layer 105 can be formed on the first surface of the first semiconductor layer 101 by a thermal oxidation process. In this embodiment, the dielectric layer 105 is made of a highly dielectric material such as silicon dioxide or silicon nitride. The growth thickness of the silicon dioxide can be controlled by controlling the annealing temperature, the oxygen content in the atmosphere, and the annealing time. In this embodiment, the thickness of the dielectric layer 105 is 1 nanometer to 20 micrometers.

[0070] In one embodiment, the method further includes the step of forming a third lead-out structure and a fourth lead-out structure on the sidewalls of the source region 103 and the drain region 104, wherein the material of the lead-out structure may be a metal, such as aluminum.

[0071] like Figure 4 As shown, then step 4) is performed to form a first doped region 106 spaced apart on the dielectric layer 105.

[0072] In one embodiment, first doped regions 106 can be formed on the dielectric layer 105 using a masking process and an epitaxial process. The material of the first doped regions 106 can be silicon. The first doped regions 106 can be doped simultaneously with epitaxy, or undoped silicon can be formed first, followed by ion implantation and annealing processes to achieve doping.

[0073] like Figure 5 As shown, then step 5) is performed to form a second semiconductor layer 107 on the dielectric layer 105, which includes a first side and a second side opposite to each other, and the second side of the second semiconductor layer 107 is in contact with the dielectric layer 105.

[0074] In one embodiment, a second semiconductor layer 107 is formed on the dielectric layer 105 by an epitaxial process. The material of the second semiconductor layer 107 can be one of silicon, germanium, germanium silicon, group III-V compound, and silicon carbide.

[0075] like Figure 6 As shown, then step 6) is performed, forming a second doped region 108 on the surface of the first side of the second semiconductor layer 107. The second doped region 108 and the first doped region 106 have opposite conductivity types.

[0076] In one embodiment, ion implantation can be performed using an ion implantation process, followed by annealing to activate the ions and form the second doped region 108.

[0077] In one embodiment, the method further includes forming a first lead-out structure in the first doped region 106 and a second lead-out structure in the second doped region 108. The first lead-out structure and the second lead-out structure are used to extract the free carriers (free electrons or holes) after detection. The extraction rate of the free carriers depends on the thickness of the PiN-type absorption region, the applied electric field, and the series resistance of the circuit. For example, the thinner the PiN-type absorption region, the larger the applied electric field, and the lower the series resistance, the faster the free carriers are extracted from the PiN-type absorption region.

[0078] like Figure 7 As shown, in one embodiment, when the vertical in-situ amplified electron detector is working, the first doped region 106, the second semiconductor layer 107, and the second doped region 108 form a PiN-type absorption region. Under the action of an applied voltage, the PiN-type absorption region forms a stable electric field distribution. The PiN-type absorption region absorbs electrons. At the instant when the electrons collide with the PiN-type absorption region and generate electron-hole pairs, free carriers (free electrons or holes) drift under the action of the applied voltage, causing the electric field distribution of the PiN-type absorption region to change. When the electric field of the PiN-type absorption region above the dielectric layer 105 changes, the current between the source region 103 and the drain region 104 changes accordingly, thereby realizing the detection of electrons.

[0079] In one embodiment, the thickness of the second semiconductor layer 107 is positively correlated with the highest energy of the detected electron, and the value of the applied voltage is positively correlated with the thickness of the second semiconductor layer 107.

[0080] In one embodiment, the applied voltage of the first doped region 106 and the second doped region 108 completely depletes the second semiconductor layer 107 of the PiN type absorption region, and the absolute value of the applied voltage difference between the first doped region 106 and the second doped region 108 is between 0.5V and 200V, preferably 1V-100V, and more preferably 10V-60V.

[0081] In one embodiment, the magnitude of the current change between the source region 103 and the drain region 104 depends on the number of electron-hole pairs generated by the collisional ionization of the detected electron, and the relative position of the incident point of the detected electron to the channel region between the source region 103 and the drain region 104. The sensitivity of the current change between the source region 103 and the drain region 104 is negatively correlated with the thickness of the dielectric layer 105, which is between 1 nanometer and 20 micrometers, preferably between 1 nanometer and 500 nanometers, and more preferably between 1 nanometer and 50 nanometers, to improve the sensitivity.

[0082] In one embodiment, the first semiconductor layer 101 is P-type conductive, the source region 103 and the drain region 104 are N-type conductive, the first doped region 106 is N-type conductive, the second doped region 108 is P-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0083] In another embodiment, the first semiconductor layer 101 is N-type conductive, the source region 103 and the drain region 104 are P-type conductive, the first doped region 106 is P-type conductive, the second doped region 108 is N-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0084] like Figure 8 and Figure 9 As shown, in one embodiment, the top view arrangement of the source region 103 and the drain region 104 is an interdigitated shape with opposite orientations, such as... Figure 8 As shown. Alternatively, the source region 103 and the drain region 104 can be arranged in a top view as opposing spiral shapes, and the spiral shapes of the source region 103 and the drain region 104 can be in opposite clockwise directions, such as... Figure 9 As shown. The source region 103 and drain region 104 of the above structure can make more effective use of the area of ​​the semiconductor layer, greatly increasing the effective sensing area of ​​the source region 103 and drain region 104, thereby effectively improving the sensitivity of the vertical in-situ amplified electronic detector.

[0085] like Figure 6 As shown, this embodiment also provides a vertical in-situ amplified electron detector. The structure of the electron detector can also be referred to the above-described fabrication method of the vertical in-situ amplified electron detector. The vertical in-situ amplified electron detector includes: a first semiconductor layer 101, which includes a first surface and a second surface facing each other; a source region 103 and a drain region 104, which are disposed at intervals on the surface of the first surface of the first semiconductor layer 101; a dielectric layer 105, which is disposed on the first surface of the first semiconductor layer 101; a second semiconductor layer 107, which is disposed on the dielectric layer 105, and includes a first surface and a second surface facing each other, wherein the second surface of the second semiconductor layer 107 is in contact with the dielectric layer 105; a first doped region 106, which is disposed at intervals on the surface of the second surface of the second semiconductor layer 107; and a second doped region 108, which is disposed on the surface of the first surface of the second semiconductor layer 107, wherein the second doped region 108 and the first doped region 106 have opposite conductivity types.

[0086] In one embodiment, the first doped region 106, the second semiconductor layer 107, and the second doped region 108 form a PiN-type absorption region. Under the action of an applied voltage, the PiN-type absorption region forms a stable electric field distribution. The PiN-type absorption region absorbs electrons. At the instant when the electrons collide with the PiN-type absorption region and generate electron-hole pairs, free carriers (free electrons or holes) drift under the action of the applied voltage, causing the electric field distribution of the PiN-type absorption region to change. When the electric field of the PiN-type absorption region above the dielectric layer 105 changes, the current between the source region 103 and the drain region 104 changes accordingly, thereby realizing the detection of electrons.

[0087] In one embodiment, the first doped region 106 has a first lead-out structure, and the second doped region 108 has a second lead-out structure. The first lead-out structure and the second lead-out structure are used to extract the free carriers (free electrons or holes) after the detection is completed.

[0088] In one embodiment, the thickness of the second semiconductor layer 107 is positively correlated with the highest energy of the detected electron, and the value of the applied voltage is positively correlated with the thickness of the second semiconductor layer 107.

[0089] In one embodiment, the applied voltage to the first doped region 106 and the second doped region 108 completely depletes the second semiconductor layer 107 of the PiN-type absorption region.

[0090] In one embodiment, the absolute value of the applied voltage difference between the first doped region 106 and the second doped region 108 is between 0.5V and 200V.

[0091] In one embodiment, the magnitude of the current change between the source region 103 and the drain region 104 depends on the number of electron-hole pairs generated by the collisional ionization of the detected electron, and the relative position of the incident point of the detected electron to the channel region between the source region 103 and the drain region 104.

[0092] In one embodiment, the sensitivity of the current change between the source region 103 and the drain region 104 is negatively correlated with the thickness of the dielectric layer 105, which is between 1 nanometer and 20 micrometers, in order to improve the sensitivity.

[0093] In one embodiment, the first semiconductor layer 101 and the second semiconductor layer 107 are made of silicon, and the dielectric layer 105 is made of silicon dioxide, silicon nitride, or a high dielectric material.

[0094] In one embodiment, the first semiconductor layer 101 is P-type conductive, the source region 103 and the drain region 104 are N-type conductive, the first doped region 106 is N-type conductive, the second doped region 108 is P-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0095] In one embodiment, the first semiconductor layer 101 is N-type conductive, the source region 103 and the drain region 104 are P-type conductive, the first doped region 106 is P-type conductive, the second doped region 108 is N-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0096] In one embodiment, the top view arrangement of the source region 103 and the drain region 104 is an interdigitated shape with opposite orientation.

[0097] In one embodiment, the top view arrangement of the source region 103 and the drain region 104 is a vortex shape arranged opposite each other, and the vortex shapes of the source region 103 and the drain region 104 are in opposite clockwise directions.

[0098] In one embodiment, the second semiconductor layer 107 is n-type doped with a doping concentration of 1E10 to 1E15 cm⁻¹. -3 The thickness of the second semiconductor layer 107 is 1–100 micrometers, and the second doped region 108 is p-type doped with a doping concentration of 1E17–1E22 cm⁻¹. -3 The first doped region 106 is n-type doped with a doping concentration of 1E17 to 1E22 cm⁻¹. -3 The voltage applied to the second doped region 108 is -10 to -60V, and the voltage applied to the first doped region 106 is 0V, which can be grounded. The first semiconductor layer 101 is p-type doped with a doping concentration of 1E15 to 1E21 cm⁻¹. -3 The applied voltage is 0V, the thickness of the dielectric layer 105 is 5-50 nanometers, and the source region 103 is n-type doped with a doping concentration of 1E17-1E22 cm⁻¹. -3 The applied voltage is 0V, and the drain region 104 is n-type doped with a doping concentration of 1E17~1E22cm⁻¹. -3 The applied voltage is 0.5–5V, and the length of the channel region between the source region 103 and the drain region 104 is 300 nanometers. In one specific implementation, the second semiconductor layer 107 is n-type doped with a doping concentration of 2E11cm⁻¹. -3 The second semiconductor layer 107 has a thickness of 30 micrometers, and the second doped region 108 is p-type doped with a doping concentration of 1E20cm⁻¹. -3 The first doped region 106 is n-type doped with a doping concentration of 1E20cm⁻¹. -3The voltage applied to the second doped region 108 is -20V, and the voltage applied to the first doped region 106 is 0V, which can be grounded. The first semiconductor layer 101 is p-type doped with a doping concentration of 1E18cm⁻¹. -3 The applied voltage is 0V, the thickness of the dielectric layer 105 is 5 nanometers, the source region 103 is n-type doped with a doping concentration of 1E20cm⁻³, the applied voltage is 0V, and the drain region 104 is n-type doped with a doping concentration of 1E20cm⁻³. -3 A voltage of 1.5V was applied, and the length of the channel region between the source region 103 and the drain region 104 was 300 nanometers. A simulation of a vertical in-situ amplified electron detector with the above parameters was performed. The overall potential distribution of the device under continuous multi-electron incidence is shown in the figure. Figure 13 As shown, the potential and current distribution in the channel region during continuous multi-electron injection is as follows: Figure 14 As shown in the figure. In the simulation, visible light is used instead of incident electrons, and the response curves of incident light intensity and output signal current intensity are obtained as follows. Figure 15 It can be seen that the stronger the incident energy, the stronger the output signal. The drain current and the potential difference Vds between the source and drain regions under incident and non-incident light conditions are shown in the curves. Figure 16 As Vds increases, the carrier drift velocity increases, and the current intensity increases. Compared to the case without incident light, the drain current is larger in the presence of incident light, demonstrating the detector's response to light. The drain current and the current curve of the 106 electrode in the first doped region of the vertical in-situ amplified electron detector under pulsed light intensity are shown below. Figure 17 As shown, the entire process can be summarized as follows: when light is absorbed by the PiN-type absorption region, additional electron-hole pairs are generated within the PiN-type absorption region, causing a change in potential and generating gate modulation, which is ultimately reflected in the change of current at electrode 104 in the MOSFET drain region. It can be seen that the novel PIN-MOSFET structure detector (vertical in-situ amplified electron detector) of this invention has a higher cutoff frequency, and comparatively, the effective detection area is within 50 mm². 2 The cutoff frequency of detectors on the left and right is typically around 10MHz; furthermore, the novel PIN-MOSFET structure detector of this invention provides a higher signal strength, which is beneficial for the rapid and accurate detection of signals such as photons, electrons, and alpha particles. Calculated according to empirical formulas:

[0099]

[0100] Where t rFor the signal rise time, the current response frequency between the source region 103 and the drain region 104 of the vertical in-situ amplified electron detector of the present invention is about 365 MHz, and the current intensity is about 3.5E-4 A. The response frequency of the electrode current of the first doped region 106 is about 249 MHz, and the current signal intensity is about 1.6E-7 A.

[0101] Example 2

[0102] like Figures 11-12 As shown, this embodiment provides a method for fabricating a vertical in-situ amplified electron detector. The basic method and steps are as described in Embodiment 1. Specifically, the fabrication method includes the following steps: 1) providing a first semiconductor layer 101, which includes a first surface and a second surface opposite to each other; 2) forming a source region 103 and a drain region 104 spaced apart on the surface of the first surface of the first semiconductor layer 101; 3) forming a bottom doped region 102 on the surface of the second surface of the first semiconductor layer; 4) forming a dielectric layer 105 on the first surface of the first semiconductor layer 101; 5) providing a second semiconductor layer 107, which includes a first surface and a second surface opposite to each other, and forming a first doped region 106 spaced apart on the surface of the second surface of the semiconductor layer; 6) forming a second doped region 108 on the surface of the first surface of the second semiconductor layer 107, wherein the second doped region 108 and the first doped region 106 have opposite conductivity types; 7) bonding the dielectric layer 105 and the second surface of the second semiconductor layer 107. In this embodiment, by fabricating corresponding device structures on the first semiconductor layer 101 and the second semiconductor layer 107 respectively, and then connecting the first semiconductor layer 101 and the second semiconductor layer 107 through a bonding process, the process difficulty in the vertical direction of the device can be effectively simplified, thereby effectively reducing the process cost of the device.

[0103] In one embodiment, the method further includes forming a first lead-out structure in the first doped region 106 and a second lead-out structure in the second doped region 108. The first lead-out structure and the second lead-out structure are used to extract the free carriers (free electrons or holes) after detection. The extraction rate of the free carriers (free electrons or holes) depends on the thickness of the PiN-type absorption region, the applied electric field, and the series resistance of the circuit. For example, the thinner the PiN-type absorption region, the larger the applied electric field, and the lower the series resistance, the faster the free carriers (free electrons or holes) are extracted from the PiN-type absorption region.

[0104] like Figure 7As shown, in one embodiment, when the vertical in-situ amplified electron detector is working, the first doped region 106, the second semiconductor layer 107, and the second doped region 108 form a PiN-type absorption region. Under the action of an applied voltage, the PiN-type absorption region forms a stable electric field distribution. The PiN-type absorption region absorbs electrons. At the instant when the electrons collide with the PiN-type absorption region and generate electron-hole pairs, free carriers (free electrons or holes) drift under the action of the applied voltage, causing the electric field distribution of the PiN-type absorption region to change. When the electric field of the PiN-type absorption region above the dielectric layer 105 changes, the current between the source region 103 and the drain region 104 changes accordingly, thereby realizing the detection of electrons.

[0105] In one embodiment, the thickness of the second semiconductor layer 107 is positively correlated with the highest energy of the detected electron, and the value of the applied voltage is positively correlated with the thickness of the second semiconductor layer 107.

[0106] In one embodiment, the applied voltage to the first doped region 106 and the second doped region 108 completely depletes the second semiconductor layer 107 of the PiN-type absorption region, and the absolute value of the applied voltage difference between the first doped region 106 and the second doped region 108 is between 0.5V and 200V.

[0107] In one embodiment, the magnitude of the current change between the source region 103 and the drain region 104 depends on the number of electron-hole pairs generated by the collisional ionization of the detected electron, and the relative position of the incident point of the detected electron to the channel region between the source region 103 and the drain region 104. The sensitivity of the current change between the source region 103 and the drain region 104 is negatively correlated with the thickness of the dielectric layer 105, which is between 1 nanometer and 20 micrometers thick, in order to improve the sensitivity.

[0108] In one embodiment, the first semiconductor layer 101 is P-type conductive, the source region 103 and the drain region 104 are N-type conductive, the first doped region 106 is N-type conductive, the second doped region 108 is P-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0109] In another embodiment, the first semiconductor layer 101 is N-type conductive, the source region 103 and the drain region 104 are P-type conductive, the first doped region 106 is P-type conductive, the second doped region 108 is N-type conductive, and the second semiconductor layer 107 is an intrinsic semiconductor layer.

[0110] like Figure 8 and Figure 9As shown, in one embodiment, the top view arrangement of the source region 103 and the drain region 104 is an interdigitated shape with opposite orientations, such as... Figure 8 As shown. Alternatively, the source region 103 and the drain region 104 can be arranged in a top view as opposing spiral shapes, and the spiral shapes of the source region 103 and the drain region 104 can be in opposite clockwise directions, such as... Figure 9 As shown. The source region 103 and drain region 104 of the above structure can make more effective use of the area of ​​the semiconductor layer, greatly increasing the effective sensing area of ​​the source region 103 and drain region 104, thereby effectively improving the sensitivity of the vertical in-situ amplified electronic detector.

[0111] Example 3

[0112] like Figure 10 As shown, this embodiment provides a vertical in-situ amplified electron detector and its fabrication method. The basic method steps and basic structure are as described in Embodiment 1 or Embodiment 2. However, the difference from Embodiment 1 or Embodiment 2 is that the fabrication method further includes: forming an asymmetric doped region 110 in the second semiconductor layer 107. The asymmetric doped region 110 is used to form a higher potential change than the region outside the asymmetric doped region 110 when electron-hole pairs are generated, thereby improving the response sensitivity of the electron detector. The asymmetric doped region 110 is disposed in the region of the second semiconductor layer 107 corresponding to the channel region between the source region 103 and the drain region 104.

[0113] Example 4

[0114] like Figure 18 As shown, this embodiment provides an electron detection device, which includes: a vertical in-situ amplified electron detector 10 as described in embodiments 1, 2, or 3, used to absorb electrons to generate a current change between the source region 103 and the drain region 104; a preamplifier 20 connected to the vertical in-situ amplified electron detector 10, used to amplify the current change; a pulse shaper 30 connected to the preamplifier 20, used to shape the amplified current signal into a voltage signal; a comparator 40 connected to the pulse shaper 30, used to compare the voltage signal with a threshold voltage to filter out noise interference and extract the effective voltage signal; a counter 50 connected to the comparator 40, used to distinguish and count incident electrons of different energies and positions for the effective voltage change signal; a parallel sequential multiplexer 60, used to transmit the effective voltage change signal; and an image processor 70 connected to the parallel sequential multiplexer 60, used to perform image processing on the effective voltage signal.

[0115] In one embodiment, the comparison 40 is configured with multiple parallel threshold voltages, and the appropriate threshold voltage is selected for comparison based on the strength of the voltage signal. For example... Figure 18 As shown, the values ​​of threshold voltages Vth1, Vth2, and Vth3 can be adjusted according to specific circumstances to distinguish and count incident electrons with different energies and positions.

[0116] As described above, the method for fabricating the vertical in-situ amplified electron detector of the present invention has the following beneficial effects:

[0117] This invention integrates a PiN-type absorption region and a transistor structure for amplifying electronic signals, realizing a novel electronic detector with in-situ amplification function, which can greatly improve the response speed and sensitivity of the electronic detector.

[0118] This invention achieves electron detection by creating a stable electric field distribution in the PiN-type absorption region under an applied voltage. The PiN-type absorption region absorbs electrons, and at the instant the electrons collide with and ionize to generate electron-hole pairs, free carriers (free electrons or holes) drift under the applied voltage, causing a change in the electric field distribution of the PiN-type absorption region. When the electric field of the PiN-type absorption region above the dielectric layer 105 changes, the current between the source region 103 and the drain region 104 changes accordingly. The response speed of the electron detector in this invention depends on the channel length, electron mobility, and the voltage applied to the drain region 104. Furthermore, it does not require transferring electrons from the absorption region to achieve detection. In fact, this invention can achieve detection instantaneously upon the generation of electron-hole pairs, exhibiting a very high response speed.

[0119] The present invention can further improve the sensitivity of the electronic detector by setting a dielectric layer 105 with a smaller thickness.

[0120] This invention can amplify the corresponding signal in situ while detecting electrons, which can effectively improve the accuracy of the electron detector.

[0121] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0122] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A vertical in-situ amplified electronic detector, characterized in that, The electronic detector includes: A first semiconductor layer, comprising opposing first and second surfaces; The source region and the drain region are disposed at intervals on the surface of the first side of the first semiconductor layer; The bottom doped region is formed on the surface of the second side of the first semiconductor layer; A dielectric layer is disposed on the first surface of the first semiconductor layer; A second semiconductor layer is disposed on the dielectric layer, and includes a first side and a second side facing each other, wherein the second side of the second semiconductor layer is in contact with the dielectric layer; The first doped region is disposed at intervals on the surface of the second side of the second semiconductor layer; The second doped region is disposed on the surface of the first side of the second semiconductor layer, and the second doped region and the first doped region have opposite conductivity types. The first doped region, the second semiconductor layer, and the second doped region form a PiN-type absorption region. Under the action of an applied voltage, the PiN-type absorption region forms a stable electric field distribution. The PiN-type absorption region absorbs electrons. When the electrons collide with the PiN-type absorption region and generate electron-hole pairs, free carriers drift under the action of the applied voltage, causing the electric field distribution of the PiN-type absorption region to change. When the electric field of the PiN-type absorption region above the dielectric layer changes, the current between the source region and the drain region changes accordingly, thereby realizing the detection of electrons. The second semiconductor layer also contains an asymmetric doped region, which is used to generate a higher potential change than the region outside the asymmetric doped region when electron-hole pairs are generated, thereby improving the response sensitivity of the electron detector.

2. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The first doped region has a first lead-out structure, the second doped region has a second lead-out structure, the first lead-out structure and the second lead-out structure are used to extract the free carriers after detection, the drain region has a third lead-out structure, the source region has a fourth lead-out structure, the third lead-out structure and the fourth lead-out structure are used to apply a voltage between the source region and the drain region; the bottom doped region has a fifth lead-out structure.

3. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The thickness of the second semiconductor layer is positively correlated with the highest energy of the detected electron, and the value of the applied voltage is positively correlated with the thickness of the second semiconductor layer.

4. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The applied voltage to the first doped region and the second doped region completely depletes the second semiconductor layer of the PiN-type absorption region.

5. The vertical in-situ amplified electronic detector according to claim 4, characterized in that: The absolute value of the applied voltage difference between the first doped region and the second doped region is between 0.5V and 200V.

6. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The magnitude of the current change between the source and drain regions depends on the number of electron-hole pairs generated by the collisional ionization of the detected electrons, and the relative position of the incident point of the detected electrons to the channel region between the source and drain regions.

7. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The sensitivity of the current change between the source and drain regions is negatively correlated with the thickness of the dielectric layer, which is between 1 nanometer and 20 micrometers, in order to improve the sensitivity.

8. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The asymmetric doped region is disposed in the second semiconductor layer region corresponding to the channel region between the source region and the drain region.

9. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The first semiconductor layer and the second semiconductor layer are made of silicon, germanium, germanium-silicon, group III-V compound, or silicon carbide, and the dielectric layer is made of a high dielectric material.

10. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The first semiconductor layer is P-type conductive, the source and drain regions are N-type conductive, the first doped region is N-type conductive, the second doped region is P-type conductive, and the second semiconductor layer is an intrinsic semiconductor layer.

11. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The first semiconductor layer is N-type conductive, the source and drain regions are P-type conductive, the first doped region is P-type conductive, the second doped region is N-type conductive, and the second semiconductor layer is an intrinsic semiconductor layer.

12. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The source region and the drain region are arranged in a finger-like shape when viewed from above.

13. The vertical in-situ amplified electronic detector according to claim 1, characterized in that: The top view arrangement of the source region and the drain region is a vortex shape arranged opposite each other, and the vortex shapes of the source region and the drain region are in opposite clockwise or opposite directions.

14. An electronic detection device, characterized in that, The electronic detection device includes: The vertical in-situ amplified electron detector as described in any one of claims 1 to 13 is used to absorb electrons to generate a current change between the source region and the drain region; A preamplifier, connected to the vertical in-situ amplified electronic detector, is used to amplify the current change; A pulse shaper, connected to the preamplifier, is used to shape the amplified current signal into a voltage signal; A comparator, connected to the pulse shaper, is used to compare the voltage signal with a threshold voltage to filter out noise interference and extract the effective voltage signal; A counter is used to distinguish and count incident electrons of different energies and positions in response to the effective voltage change signal. A parallel sequential multiplexer is used to transmit the effective voltage change signal; An image processor is used to perform image processing on the effective voltage signal.

15. The electronic detection device according to claim 14, characterized in that: The comparator is equipped with multiple parallel threshold voltages, and the appropriate threshold voltage is selected for comparison based on the strength of the voltage signal.

Images