Video coding method and corresponding apparatus

By using reduced-precision floating-point multiplication and lookup table techniques in video encoding and decoding, the high computational complexity of affine CPMV and ALF fine-tuning is solved, achieving a more efficient encoding and decoding process.

CN116996678BActive Publication Date: 2026-06-02MEDIATEK INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MEDIATEK INC
Filing Date
2022-09-14
Publication Date
2026-06-02

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Abstract

A video coding method and related apparatus are provided. The video coding method of the present disclosure includes receiving input data associated with a picture region in a current picture, collecting statistics related to affine CPMV fine tuning or ALF fine tuning on the picture region, and deriving updated parameters for the affine CPMV fine tuning or the ALF fine tuning based on the statistics collected on the picture region, wherein the statistics are represented in a floating-point format having a mantissa portion of a first precision, and deriving the updated parameters includes performing multiplication with the statistics using a reduced-precision multiplier, and wherein the reduced-precision multiplier truncates at least one bit of the mantissa portion. The video coding method and related apparatus of the present disclosure can reduce video encoder complexity.
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Description

[Technical Field]

[0001] This invention relates to video encoding and decoding systems. More specifically, it relates to the problem of large data range in optimizing parameters used for affine CPMV refinement or ALF refinement during encoding and decoding. [Background Technology]

[0002] Versatile video coding (VVC) is the latest international video coding standard jointly developed by the ITU-T Video Coding Experts Group (VCEG) and the Joint Video Experts Group (JVET) of the ISO / IEC Moving Picture Experts Group (MPEG). This standard has been published as an ISO standard: ISO / IEC 23090-3:2021, Information technology—Coded representation of immersive media—Part 3: Versatile video coding, published in February 2021. VVC is based on its predecessor, HEVC (High-Efficiency Video Coding), and improves coding efficiency by adding more coding and decoding tools. It can also handle various video sources, including 3D video signals.

[0003] Figure 1 The illustration shows an exemplary adaptive inter-frame / intra-frame video codec system incorporating loop processing. For intra-frame prediction, the prediction data is derived from previously encoded video data in the current frame. For inter-frame prediction 112, motion estimation (ME) is performed on the encoder side, and motion compensation (MC) is performed based on the results of ME to provide prediction data derived from other frames and motion data. Switch 114 selects either intra-frame prediction 110 or inter-frame prediction 112, and the selected prediction data is provided to adder 116 to form a prediction error, also known as a residual. The prediction error is then processed by transform (T) 118 and subsequently quantization (Q) 120. The residuals from the transform and quantization are then encoded by entropy encoder 122 to be included in the video bitstream corresponding to the compressed video data. The bitstream associated with the transform coefficients is then packaged with side information such as motion and encoding / decoding modes associated with intra-frame and inter-frame prediction, as well as other side information such as parameters associated with loop filters applied to the underlying image regions. Figure 1As shown, auxiliary information associated with intra-frame prediction 110, inter-frame prediction 112, and loop filter 130 is provided to entropy encoder 122. When using inter-frame prediction mode, one or more reference images must also be reconstructed at the encoder end. Therefore, the residuals from transform and quantization are processed by inverse quantization (IQ) 124 and inverse transform (IT) 126 to recover the residuals. Then, in reconstruction (REC) 128, the residuals are added back to the prediction data 136 to reconstruct the video data. The reconstructed video data can be stored in reference image buffer 134 and used for prediction of other frames.

[0004] like Figure 1 As shown, the input video data undergoes a series of processing steps in the encoding system. Due to these processing steps, the reconstructed video data from REC 128 may suffer various forms of degradation. Therefore, before storing the reconstructed video data in the reference picture buffer 134, a loop filter 130 is often applied to the reconstructed video data to improve video quality. For example, a deblocking filter (DF), sample adaptive offset (SAO), and adaptive loop filter (ALF) can be used. It may be necessary to incorporate the loop filter information into the bitstream so that the decoder can correctly recover the required information. Therefore, the loop filter information is also provided to the entropy encoder 122 to be incorporated into the bitstream. Figure 1 In the process, before storing the reconstructed sample in the reference image buffer 134, the loop filter 130 is applied to the reconstructed video. Figure 1 The system described herein is intended to illustrate an exemplary architecture of a typical video encoder. It may correspond to a High Efficiency Video Codec (HEVC) system, VP8, VP9, ​​H.264, or VVC.

[0005] The decoder can use function blocks similar to or partially identical to the encoder, except for transform 118 and quantization 120, because the decoder only needs inverse quantization 124 and inverse transform 126. The decoder uses an entropy decoder instead of entropy encoder 122 to decode the video bitstream into quantized transform coefficients and the required encoding / decoding information. Furthermore, the decoder only needs to perform motion compensation instead of motion estimation / motion compensation.

[0006] According to VVC, similar to HEVC, the input image is divided into non-overlapping square block regions called CTUs (Code-Decoder Tree Units). Each CTU can be further subdivided into one or more smaller Code-Decoder Units (CUs). The resulting CU partitions can be squares or rectangles. Furthermore, VVC divides the CTUs into Prediction Units (PUs) as a unit to apply prediction processes such as inter-frame prediction, intra-frame prediction, etc.

[0007] Compared to the HEVC standard, the VVC standard incorporates various new encoding and decoding tools to further improve encoding and decoding efficiency. For example, affine motion estimation is adopted by the VVC standard. A brief review of affine motion estimation and ALF is as follows.

[0008] Affine model

[0009] Motion that occurs across an image along the time axis can be described by many different models. Suppose A(x,y) is the original pixel at position (x,y), and A'(x',y') is the corresponding pixel at position (x',y') in the reference image of the current pixel A(x,y). The affine motion model is described as follows.

[0010] Affine models can describe the rotation and deformation of two-dimensional blocks to transform a square (or rectangle) into a parallelogram. This model can be described as follows:

[0011] x'=Ax+By+C (1a)

[0012] y'=Dx+Ey+F. (1b)

[0013] Furthermore, a four-parameter affine prediction method is disclosed, which includes an affine merging mode. When an affine moving block is in motion, the motion vector field of the block can be described by either two control point motion vectors or four parameters, where (vx, vy) represents the motion vector.

[0014]

[0015] The motion vector field of each point in the moving block can be described by the following equation:

[0016]

[0017] In the above formula, (v 0x ,v 0y ) is the motion vector of the control point at the top left corner of the block (i.e., v0), (v 1x ,v 1y ) is the motion vector of another control point (i.e., v1) in the upper right corner of the block.

[0018] Figure 2 This demonstrates the use of 3 control points ( and A six-parameter affine model. For example... Figure 2 As shown, the six-parameter affine model uses three control points ( and ), where block 210 corresponds to the current PU. The six-parameter affine motion model can transform a rectangle into a parallelogram 220. When the affine motion block moves, the block's motion vector field can be described by three control point motion vectors or six parameters as follows, where (vx, vy) represents the motion vector.

[0019] When decoding the MV (v0 and v1) of the two control points, the MV of each 4x4 block of the block can be determined according to the above formula. In other words, the affine motion model of the block can be specified by the two motion vectors at the two control points. Furthermore, although the top left and top right corners of the block are used as the two control points, other two control points can also be used.

[0020] When decoding the MV (v0, v1, and v2) of three control points, the MV of each 4x4 block can be derived according to the following equation:

[0021]

[0022] For the six-parameter affine model in equations (1a) and (1b), the encoder may need to adjust the parameters to improve performance by reducing distortion. For example, if the parameters are changed to (A+a, B+b, C+c, D+d, E+e, F+f) respectively, the new affine model becomes:

[0023] x”=(A+a)x+(B+b)y+(C+c)=x’+ax+by+c (5a)

[0024] y”=(D+d)x+(E+e)y+(F+f)=y’+dx+ey+f. (5b)

[0025] To improve performance, the encoder can fine-tune model parameters by adjusting (a, b, c, d, e, f) to achieve smaller distortion, such as MSE (mean squared error):

[0026]

[0027] In the above equation, B represents the current block, Org represents the original signal, and I represents the prediction. In the equation above, I(x'+ax+by+c,y'+dx+ey+f) can be approximated from I(x',y') using a Taylor expansion:

[0028]

[0029] In the above formula, I′ x It is the partial derivative of I with respect to x, I′ y It is the partial derivative of I with respect to y, E = Org(x,y) - I(x',y').

[0030] Affine CPMV (Control Point Motion Vector) Fine-tuning Process

[0031] The following section describes an example of the affine model fine-tuning process using a 6-parameter affine model.

[0032] set up

[0033]

[0034] To find the optimal parameter tuning that leads to the lowest MSE Take MSE relative to gradient:

[0035]

[0036] Therefore, in the encoding algorithm, we first set the current predictor I′ x and I′ y The current distortion E and gradient information are collected in a block B.

[0037] Therefore, minimizing MSE becomes solving equations In this equation, It is a 6x6 matrix. and It is a 6-entry vector, and E is a scalar.

[0038] To estimate the data range required for fine-tuning the affine model, the data range for relevant data in MSE minimization is evaluated as follows:

[0039] • Predict sub-image gradient I′ x and I′ y It is derived by calculating the differences between pixels, which are at most 12 bits (assuming a pixel value is 10 bits).

[0040] • The pixel position x and y can be up to 7 bits (assuming a maximum PU of 128x128).

[0041] Vector A single sample requires a maximum of 12 + 7 = 19 bits.

[0042] ·matrix A single sample requires a maximum of 19 + 19 = 38 bits.

[0043] • Statistics should be collected on a single unit (PU): A maximum of 38 + 14 = 52 bits are needed (assuming the largest PU is 128 x 128 = 2). 14 )

[0044] Assume the gradient is 0; in this extreme case, the collected statistics are also 0. Therefore, the data range is from 0 to 2. 52The left and right sides are very large. Therefore, it is necessary to develop operations with lower accuracy requirements for affine CPMV.

[0045] In VVC, an adaptive loop filter (ALF) with block-based filter adaptation is applied. For the luminance component, one of 25 filters is selected for each 4×4 block based on the direction and activity of the local gradient. Figure 3 Two rhombus filter shapes are shown. A 7×7 rhombus (310) is used for the luminance component, and a 5×5 rhombus (310) is used for the chrominance component. The VVC standard also supports the Cross-Component Adaptive Loop Filter (CCALF), which uses luminance sample values ​​to fine-tune each chrominance component by applying an adaptive approach.

[0046] ALF reconstruction follows the following equation:

[0047]

[0048] Where c is the number of coefficients (luminance: 12, chroma: 6, CCALF: 7), n c It is the neighborhood information and its neighborhood samples obtained from rec before ALF, f c These are the ALF filter coefficients.

[0049] Distortion is defined as ssd = (org - (rec + ∑) c (n c f c ))) 2 The total distortion is:

[0050]

[0051] In the above formula, pixAcc is the original distortion, y[c] is the cross-correlation matrix, and E[ci][cj] is the auto-correlation matrix.

[0052] These three types of statistics are summed over all samples (i.e., p) and collected in advance. In other words, the following ALF statistics will be calculated:

[0053] pixAcc=∑ p (org p -rec p ) 2 Original distortion

[0054] y[c]=∑ p (org p -rec p )npc Cross-correlation matrix

[0055] e[ci][cj]=∑ p n pci n pcj Autocorrelation matrix

[0056] The bit depth required for ALF coefficient adjustment is analyzed as follows:

[0057] org p and rec p Pixel value: 10 bits

[0058] n pc It is neighborhood information derived by calculating the differences between pixels: 12 bits.

[0059] pixAcc, y[c], and E[ci][cj] require 12 + 12 = 24 bits.

[0060] For ALF CTU (code tree unit) mode decision, we need to collect ALF statistics for the entire CTU: 24 + 14 = 38 bits (assuming the CTU size is 128x128).

[0061] For ALF slicing mode decision, we need to collect the entire image: 38 + 9 = 47 bits (assuming a 4K sequence is used, each image contains approximately 5^10 ≈ 2^37 bits). 9 (CTU)

[0062] Assume the neighborhood difference is 0; in this extreme case, the collected statistics are also 0. Therefore, the data range is from 0 to 2. 47 The range is very large. Therefore, it is necessary to develop operations with lower precision requirements for ALF. [Summary of the Invention]

[0063] In view of the above, the present invention provides the following technical solution:

[0064] The present invention provides a video encoding / decoding method, comprising: receiving input data associated with an image region in a current image; collecting statistical data related to affine CPMV fine-tuning or ALF fine-tuning on the image region; and deriving updated parameters for affine CPMV fine-tuning or ALF fine-tuning based on the statistical data collected on the image region, wherein the statistical data is represented in a floating-point format with a mantissa portion having a first precision, and deriving the updated parameters includes performing multiplication with the statistical data using a reduced-precision multiplier, wherein the reduced-precision multiplier truncates at least one bit of the mantissa portion.

[0065] The present invention also provides a video encoding / decoding apparatus, comprising one or more electronic circuits or processors for receiving input data associated with a picture region in a current picture; collecting statistical data related to affine CPMV fine-tuning or ALF fine-tuning on the picture region; and deriving updated parameters for affine CPMV fine-tuning or ALF fine-tuning based on the statistical data collected on the picture region, wherein the statistical data is represented in a floating-point format with a mantissa portion having a first precision, and deriving the updated parameters includes performing multiplication with the statistical data using a multiplier with reduced precision, wherein the multiplier with reduced precision truncates at least one bit of the mantissa portion.

[0066] The present invention also provides a video encoding / decoding method, comprising: receiving input data associated with an image region in a current image; collecting statistical data related to affine CPMV (Control Point Motion Vector) fine-tuning or ALF (Adaptive Loop Filter) fine-tuning on the image region; and deriving updated parameters for affine CPMV fine-tuning or ALF fine-tuning based on the statistical data collected on the image region, wherein the statistical data is represented in a floating-point format with an m-bit mantissa, and deriving the updated parameters includes performing a reciprocal on the statistical data using a lookup table with (mk)-bit input by truncating k bits from the m-bit mantissa, the contents of the lookup table including an m-bit output, where m and k are positive integers.

[0067] The present invention also provides a video encoding / decoding apparatus, comprising one or more electronic circuits or processors for receiving input data associated with a picture region in a current image; collecting statistical data related to affine CPMV (Control Point Motion Vector) fine-tuning or ALF (Adaptive Loop Filter) fine-tuning on the picture region; and deriving updated parameters for affine CPMV fine-tuning or ALF fine-tuning based on the statistical data collected on the picture region, wherein the statistical data is represented in a floating-point format having an m-bit mantissa, and deriving the updated parameters includes performing a reciprocal on the statistical data using a lookup table with (mk)-bit input by truncating k bits from the m-bit mantissa, the contents of the lookup table including an m-bit output, where m and k are positive integers.

[0068] The video encoding / decoding method and related apparatus of the present invention can reduce the complexity of video encoders. [Attached Image Description]

[0069] Embodiments of the invention are illustrated in conjunction with the accompanying drawings, which are included and form part of this specification, and together with the description, serve to explain the principles of the invention:

[0070] Figure 1 The illustration shows an exemplary adaptive inter-frame / intra-frame video codec system incorporating loop processing.

[0071] Figure 2This demonstrates the use of 3 control points ( and The six-parameter affine model.

[0072] Figure 3 Two diamond-shaped filter shapes are shown.

[0073] Figure 4 A flowchart of an exemplary video coding system utilizing reduced-precision floating-point multiplication according to an embodiment of the present invention is shown.

[0074] Figure 5 A flowchart of an exemplary video encoding system utilizing a reduced-precision floating-point reciprocal is shown according to an embodiment of the present invention.

Detailed Implementation Methods

[0075] Numerous specific details are set forth in the following description. However, it should be understood that embodiments of the invention can be practiced without these specific details. In other instances, well-known circuits, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification. However, those skilled in the art will understand that the invention can be practiced without such specific details. Those skilled in the art with the included description will be able to implement appropriate functionality without excessive experimentation.

[0076] The following description is the best intended mode for carrying out the invention. This description is intended to illustrate the general principles of the invention and should not be construed as limiting. The scope of the invention is best determined by referring to the appended claims.

[0077] Floating-point (FP) arithmetic uses formulas of real numbers as approximations to support a trade-off between range and precision. Floating-point calculations are widely used in computing systems and signal processing systems, such as video and audio encoders / decoders. According to floating-point arithmetic, a number is approximated by a fixed number of significant digits (called significantands or mantissas) and scaled using an exponent of a fixed base. Additionally, a sign bit is used to represent the sign part of the number, such as a plus or minus sign. While the scaling base can be 2 or 10, base 2 is commonly used in computing and signal processing systems. Numbers that can be represented have the following forms:

[0078]

[0079] The mantissa is represented by m digits and the exponent by e digits.

[0080] Given two floating-point numbers with m-bit mantissas, computing the multiplication of these two numbers will require an (m+1)-bit × (m+1)-bit multiplier for the mantissa portion.

[0081] The multiplication of two floating-point numbers a and b can be performed as follows:

[0082] c = a * b

[0083] sign c =sign a XOR sign b

[0084] prod=(1< <m+mantissa a )*(1< <m+mantissa b )

[0085] carry-in = (prod >> (2m + 1))

[0086] exponent c =exponent a +exponent b +carry-in-(2 e-1 -1)

[0087] mantissa c =carry-in? prod[2m:m+1]:prod[2m-1:m]

[0088] In the above equation, `prod[2m:m+1]` represents the position of `prod` from the (2m)th bit to the (m+1)th bit (inclusive), and `prod[2m-1:m]` represents the position of `prod` from the (2m-1)th bit to the mth bit (inclusive). Another computationally intensive floating-point operation is the reciprocal. The reciprocal of a floating-point number `a` can be calculated as:

[0089] c = 1 / a

[0090] sign c =sign a

[0091] exponent c -(2 e-1 -1)=1–(exponent a -(2 e-1 -1)

[0092] mantissa c=(1<<(2m+1)) / ((1< <m)+mantissa a )–(1< <m))

[0093] Special case:mantissa a =0

[0094] In fact, the reciprocal part can be implemented using a lookup table, where m digits are input to the table and the table outputs m digits of data.

[0095] Dividing a floating-point number a by another floating-point number b can be calculated as:

[0096] c = a / b

[0097] Step 1: Use reciprocal operations to derive 1 / b

[0098] Step 2: Use multiplication to derive a*(1 / b)

[0099] Low-precision floating-point operations

[0100] Low-precision floating-point multiplication

[0101] This application discloses a method for low-precision floating-point multiplication. According to an embodiment of the invention, the multiplication of the mantissa portions of floating-point numbers a and b uses reduced precision by truncating k bits from the mantissa portion, where k is an integer greater than 0. In other words, reduced-precision floating-point multiplication requires only a (m-k+1) bit x (m-k+1) bit multiplier.

[0102] The multiplication process according to the present invention is described as follows:

[0103] ·c=a*b

[0104] ·sign c =sign a XOR sign b

[0105] ·prod=(1< <m+mantissa a )">>k"*(1< <m+mantissa b )">>k"

[0106] ·carry-in=(prod>>(2m“–2k”+1))

[0107] ·exponent c =exponent a +exponent b +carry-in-(2 e-1 -1)

[0108] ·mantissa c =carry-in? prod[2m“–2k”:m“–2k”+1]:prod[2m“–2k”-1:m”–2k”]

[0109] • If k > m / 2, then it is mantissa c Fill with 0 (the prod bit will be insufficient)

[0110] The low-precision floating-point multiplication procedure is modified from the multiplication procedure with the regular full-precision floating-point multiplication procedure. The difference is indicated by a pair of quotation marks (i.e., "") to indicate the inserted text.

[0111] For example, if a full-precision floating-point number uses a 6-bit mantissa, then the full-precision floating-point multiplier will use a (6+1)-bit x (6+1)-bit multiplier, i.e., a 7-bit x 7-bit multiplier. The multiplier of the full-precision floating-point multiplier will calculate the 13-bit or 14-bit product p of the mantissa of input a (i.e., 1a5a4a3a2a1a0) and the mantissa of input b (i.e., 1b5b4b3b2b1b0). 13 p 12 p 11 p 10 p9p8p7p6p5p4p3p2p1p0. However, the multiplier will output a value corresponding to p. 13 p 12 p 11 p 10 The result of p9p8p7 is 7 bits. If k=2 (i.e., truncate 2 bits) is chosen for the low-precision floating-point multiplier, that is, a (4+1) bit x (4+1) bit multiplier. The low-precision floating-point multiplier will only use the 4 bits of the mantissa. In other words, the 2 bits of the mantissa of a and b (k=2) will be truncated. Therefore, 1a5a4a3a200 and 1b5b4b3b200 will be used by the low-precision floating-point multiplier. The conversion from 6-bit precision to 4-bit precision can be any truncation function, such as floor(), round(), or ceil(). The low-precision floating-point multiplier will produce a 9-bit or 10-bit result p. 13 p 12 p 11 p 10 p9p8p7p6p5p40000. Similarly, the multiplier will output the value corresponding to p. 13 p 12 p 11 p 10 The 7-bit result of p9p8p7.

[0112] Low-precision floating-point reciprocal (division)

[0113] This application discloses a method for low-precision floating-point reciprocal. According to embodiments of the invention, the low-precision floating-point reciprocal uses a mantissa with reduced precision. For example, if the mantissa is reduced by k bits (k>0), the low-precision floating-point reciprocal operation becomes:

[0114] c = 1 / a

[0115] sign c =sign a

[0116] exponent c -(2 e-1 -1)=1–(exponent a -(2 e-1 -1)

[0117] mantissa c =(1<<(2m“-k”+1)) / ((1< <m)+mantissa a )">>k"–(1< <m))

[0118] Special case:mantissa a =0

[0119] The low-precision floating-point reciprocal procedure is modified from the reciprocal procedure that has a regular full-precision floating-point reciprocal procedure. The difference is indicated by a pair of quotation marks (i.e., "") to indicate the text inserted in the above equation.

[0120] In practice, we can use a simplified lookup table that takes (mk) bits as input and returns m bits as the result.

[0121] For example, if full-precision floating-point numbers use a 6-bit mantissa, then full-precision floating-point reciprocals will use a 6-bit table for input and each table entry will store a 6-bit output. For input 'a', the 6-bit mantissa (i.e., a5a4a3a2a1a0) is used to access the lookup table. Each table entry stores a corresponding reciprocal output c5c4c3c2c1c0. If k=2 is chosen for low-precision floating-point reciprocals, then low-precision floating-point reciprocals will use a 4-bit lookup table to access the table contents based on a5a4a3a2, with each table entry storing a corresponding reciprocal output, c5c4c3c2c1c0.

[0122] The low-precision floating-point division of a / b can be implemented in two steps. First, the reciprocal (1 / b) is calculated using a smaller lookup table to obtain the full-precision mantissa output value. Then, we use low-precision floating-point multiplication and a multiplier with reduced precision to calculate the multiplication of a and (1 / b).

[0123] This invention can significantly reduce the complexity of the video encoder for optimization during affine CPMV or ALF fine-tuning. In an example of bit depth estimation with 10-bit pixel data and a 128x128 PU size during affine CPMV fine-tuning, statistical data was collected... The data range can be from 0 to 2 52 Between. Solve the final equation as follows: Derivation of the optimal parameters for affine CPMV fine-tuning requires performing floating-point multiplication, reciprocals, or division with such high precision. However, this invention allows the use of multipliers or lookup tables with reduced mantissa precision to perform floating-point multiplication, reciprocals, or division. For example, instead of a (52+1) bit x (52+1) bit multiplier, a (24+1) bit x (24+1) bit multiplier with reduced precision can be used for affine CPMV fine-tuning. In the example of bit depth estimation of 10-bit pixel data and 4k images during ALF fine-tuning, the collected statistics can range from 0 to 2. 47 Similarly, this invention allows the use of multipliers or lookup tables with reduced precision in the mantissa portion to perform floating-point multiplication, reciprocal, or division operations. For example, instead of a (47+1) bit x (47+1) bit multiplier, a (24+1) bit x (24+1) bit reduced precision multiplier can be used for ALF fine-tuning.

[0124] The encoder according to embodiments of the present invention can use low-precision floating-point multiplication / division for affine CPMV, wherein low-precision floating-point multiplication / division is used to collect statistical data and derive affine model parameters, as described above. The affine CPMV encoding process according to an embodiment of the present invention can be incorporated into inter-frame prediction 112 to reduce the required complexity. The encoder according to embodiments of the present invention can use low-precision floating-point multiplication / division for ALF, wherein low-precision floating-point multiplication / division is used to collect statistical data and derive parameters for ALF, as described above. The ALF encoding process according to an embodiment of the present invention can be incorporated into ILPF 130 to reduce the required complexity.

[0125] Figure 4A flowchart of an exemplary video coding system utilizing reduced-precision floating-point multiplication according to an embodiment of the present invention is shown. According to the method, in step 410, input data associated with a picture region in the current picture is received. In step 420, statistical data related to affine CPMV (Control Point Motion Vector) fine-tuning or ALF (Adaptive Loop Filter) fine-tuning is collected on the picture region. In the case of affine CPMV fine-tuning, the picture region may correspond to the PU, while in the case of ALF fine-tuning, the picture region may correspond to the CTU or the entire picture. Then, in step 430, updated parameters for affine CPMV fine-tuning or ALF fine-tuning are derived based on the statistical data collected on the picture region, wherein the statistical data is represented in floating-point format with a mantissa having a first precision, and the process of deriving the updated parameters includes performing multiplication on the statistical data using a reduced-precision multiplier. The reduced-precision multiplier truncates at least one bit of the mantissa.

[0126] Figure 5 A flowchart of an exemplary video coding system utilizing reduced-precision floating-point reciprocals according to an embodiment of the present invention is shown. According to the method, in step 510, input data associated with a picture region in the current picture is received. In step 520, statistics related to affine CPMV (Control Point Motion Vector) fine-tuning or ALF (Adaptive Loop Filter) fine-tuning are collected on the picture region. In the case of affine CPMV fine-tuning, the picture region may correspond to the PU, while in the case of ALF fine-tuning, the picture region may correspond to the CTU or the entire picture. Then, in step 530, updated parameters for affine CPMV fine-tuning or ALF fine-tuning are derived based on the statistics collected on the picture region, wherein the statistics are represented in floating-point format with an m-bit mantissa, and the process of deriving the updated parameters includes performing a reciprocal on the statistics using a lookup table with (mk)-bit input, wherein the (mk)-bit input is obtained by truncating k bits from the m-bit mantissa, and the contents of the lookup table include an m-bit output. Here, m and k are positive integers.

[0127] The flowchart shown is intended to illustrate examples of video encoding and decoding according to the present invention. Those skilled in the art can modify each step, rearrange the steps, split the steps, or combine the steps to implement the invention without departing from the spirit of the invention. Specific syntax and semantics have been used in this disclosure to illustrate examples of implementing embodiments of the invention. Those skilled in the art can practice the invention by substituting equivalent syntax and semantics for the existing syntax and semantics without departing from the spirit of the invention.

[0128] The above description is presented to enable those skilled in the art to practice the invention provided in the context of a particular application and its requirements. Various modifications to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments. Therefore, the invention is not intended to be limited to the specific embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. In the above detailed description, various specific details have been set forth in order to provide a thorough understanding of the invention. However, those skilled in the art will understand that the invention can be practiced.

[0129] The embodiments of the invention described above can be implemented in various hardware, software code, or combinations thereof. For example, one embodiment of the invention may be one or more circuits integrated into a video compression chip or program code integrated into video compression software to perform the processes described herein. Embodiments of the invention may also be program code to be executed on a digital signal processor (DSP) to perform the processes described herein. The invention may also relate to numerous functions performed by a computer processor, digital signal processor, microprocessor, or field-programmable gate array (FPGA). These processors may be configured to perform specific tasks according to the invention by executing machine-readable software code or firmware code that defines the specific methods embodied in the invention. The software code or firmware code may be developed in different programming languages ​​and in different formats or styles. The software code may also be compiled for different target platforms. However, different code formats, styles, and languages ​​of the software code, as well as other ways of configuring the code to perform the tasks according to the invention, will not depart from the spirit and scope of the invention.

[0130] This invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described examples are to be considered illustrative rather than restrictive in all respects. Therefore, the scope of the invention is indicated by the appended claims rather than by the foregoing description. All variations within the equivalent meaning and scope of the claims should be included within their scope.

Claims

1. A video encoding / decoding method, the method comprising: Receive input data associated with a region of the image in the current image; Collect statistics related to affine CPMV or ALF fine-tuning on this image region; as well as Based on the statistical data collected on the image region, updated parameters for the affine CPMV fine-tuning or the ALF fine-tuning are derived, wherein the statistical data is represented in floating-point format with a mantissa portion having a first precision, and the derived updated parameters include performing multiplication with the statistical data using a multiplier with reduced precision, wherein the multiplier with reduced precision truncates at least one bit of the mantissa portion.

2. The video encoding / decoding method as described in claim 1, wherein, The reduced-precision multiplier truncates at least one bit of the mantissa based on the base function, rounding function, or top function.

3. The video encoding / decoding method as described in claim 1, wherein, The statistical data is used as the first multiplicand of the reduced-precision multiplier, and the reduced-precision multiplier truncates at least one bit of the mantissa portion for at least the first multiplicand of the reduced-precision multiplier.

4. A video encoding / decoding apparatus, the apparatus comprising one or more electronic circuits or processors, for: Receive input data associated with a region of the image in the current image; Collect statistics related to affine CPMV or ALF fine-tuning on this image region; as well as Based on the statistical data collected on the image region, updated parameters for the affine CPMV fine-tuning or the ALF fine-tuning are derived, wherein the statistical data is represented in floating-point format with a mantissa portion having a first precision, and the derived updated parameters include performing multiplication with the statistical data using a multiplier with reduced precision, wherein the multiplier with reduced precision truncates at least one bit of the mantissa portion.

5. A video encoding / decoding method, the method comprising: Receive input data associated with a region of the image in the current image; Collect statistics related to affine CPMV or ALF fine-tuning on this image region; as well as Based on the statistical data collected on the image region, updated parameters for the affine CPMV fine-tuning or the ALF fine-tuning are derived, wherein the statistical data is represented in floating-point format with an m-bit mantissa, and the updated parameters are derived by performing a reciprocal on the statistical data using a lookup table with (mk)-bit inputs by truncating k bits from the m-bit mantissa, the contents of which include an m-bit output, where m and k are positive integers.

6. The video encoding / decoding method as described in claim 5, wherein, The m-digit mantissa is truncated according to the base function, rounding function, or top function.

7. The video encoding / decoding method as described in claim 5, wherein, The process of deriving the updated parameters involves multiplying the statistical data using a reduced-precision multiplier, wherein the reduced-precision multiplier truncates at least one bit of the m-bit mantissa.

8. A video encoding / decoding apparatus, comprising one or more electronic circuits or processors, for: Receive input data associated with a region of the image in the current image; Collect statistical data related to affine CPMV or ALF fine-tuning on this image region; and Based on the statistical data collected on the image region, updated parameters for the affine CPMV fine-tuning or the ALF fine-tuning are derived, wherein the statistical data is represented in floating-point format with an m-bit mantissa, and the updated parameters are derived by performing a reciprocal on the statistical data using a lookup table with (mk)-bit inputs by truncating k bits from the m-bit mantissa, the contents of which include an m-bit output, where m and k are positive integers.