Method for detecting single event upsets in storage devices in airborne equipment

Abstract

The application discloses a single event upset detection method for a storage device in an airborne device. Before detection starts, switching to a debugging mode, entering a man-machine interactive interface to perform a write operation on the NVRAM, writing configuration information into a configuration information address, clearing error information and result information; the storage device starts radiation test, switches to a system mode, runs a single event upset detection algorithm for the storage device, performs single event upset detection according to the configuration information, records error information and result information after detection ends; after detection ends, switching to the debugging mode again, reading the error information and the result information recorded in the NVRAM through the man-machine interactive interface. The application guarantees the reliability of the detected single event upset quantity; the detection method can be applied to different airborne devices, can be quickly transplanted into different systems, and has the characteristics of friendly use, accurate and reliable result.

Description

Technical Field

[0001] This invention relates to the technical field of single event upset (SEU) detection methods for storage devices in civil aviation equipment, and more specifically to a single event upset detection method for storage devices. Background Technology

[0002] Civil aircraft often fly in harsh environments, especially at high altitudes, where they are more susceptible to radiation. In such adverse conditions, single-event upsets (SETs) may occur in storage devices.

[0003] As a critical system in civil aircraft, avionics systems have a significant impact on flight safety. Aviation equipment often incorporates specific protective measures against single-event upsets (SWEs) in its hardware and software design to reduce the probability of SWEs.

[0004] As a computer system, avionics systems typically store their code and data in SDRAM (synchronous dynamic random-access memory). If a single-event upset (SE) occurs in the SDRAM during flight, it can have unpredictable consequences, such as sudden changes in airspeed or altitude, interfering with pilot performance. However, current SE detection technologies do not specifically target the storage devices.

[0005] Single-event upset (SEI) detection technology for storage devices will be an important technical component of SEI detection technology. It will be used to evaluate the number of SEIs under different radiation conditions, or to evaluate the degree to which software and hardware design schemes mitigate SEIs. Summary of the Invention

[0006] The purpose of this invention is to provide a single-event upset (SET) detection method for storage devices in airborne equipment. A complete detection process is designed and can be used to statistically analyze the number of SETs in storage devices under different radiation conditions in aviation equipment. This method comprehensively considers various possible scenarios during the detection process, enabling accurate statistical analysis of the number of SETs in storage devices.

[0007] The objective of this invention is achieved through the following technical solution:

[0008] A single-event upset detection method for storage devices in airborne equipment, comprising computer software on the airborne equipment to be tested, having two operating modes: debug mode and system mode, and the detection process includes the following steps:

[0009] Before the detection begins in step (1), switch to debug mode, enter the human-machine interface to perform a write operation on NVRAM, write the configuration information to the configuration information address, and clear the error information and result information; where: the configuration information includes the start address and end address of the storage device to be tested and the test time, the error information includes the configuration valid flag, the hardware valid flag and the test valid flag, and the result information is the number of single particle flips;

[0010] Step (2) Start radiation testing on the storage device, switch to system mode, and run the single-event upset detection algorithm of the storage device in system mode. Automatically perform single-event upset detection according to the configuration information in step (1). After the specified test time is reached, the detection will automatically stop and record error information and result information.

[0011] After step (3) is completed, you need to switch back to debug mode and read the error information and result information recorded in NVRAM through the human-machine interface; determine whether the test is valid based on the test validity flag in the error information. If the test is valid, record the result information; if the test is invalid, locate the cause of the error based on the error information, fix the error and start the test again.

[0012] Ideally, the two operating modes, debug mode and system mode, can be switched by configuring the hardware.

[0013] Ideally, the configured detection time should allow for a complete address traversal between the time the airborne equipment is powered off and the time between the detection time and the power failure time.

[0014] Preferably, the single-event upset detection algorithm for storage devices in step (2) consists of the following steps:

[0015] Step (21) Initialize the hardware environment of the airborne equipment. After initialization is complete, continue to the next step.

[0016] Step (22) Test all the hardware required for the detection process. If the hardware test passes, set the hardware valid flag to valid and then continue to the next step. If the hardware test fails, end the test, locate the cause of the error and fix the error, and then restart the detection process.

[0017] Step (23) Set the configuration valid flag to invalid, read the configuration information to perform configuration check. If the configuration check passes, set the configuration valid flag to valid and proceed to the next step. If the configuration check fails, end the test, locate the cause of the error and fix the error, and then restart the test process.

[0018] Step (24) Zero out the storage device to be tested and clear the number of single particle flips; then traverse according to the start address and end address of the configured storage device, continuously detect the number of single particle flips until the detection time ends, complete the detection, write the result information, set the detection valid flag to valid, and stop the detection.

[0019] Preferably, in step (23), if the hardware device has ECC functionality, then its ECC functionality is disabled.

[0020] Preferably, in step (24), a lookup table algorithm is used to detect the number of single-particle flips. The lookup table is an array of different values ​​and the number of single-particle flips corresponding to each value, calculated in advance. The lookup table algorithm is an algorithm that uses the read value as an index to quickly obtain the number of single-particle flips corresponding to the value through the lookup table. The process ends after the address space of the storage device to be detected configured in the configuration information has been traversed once.

[0021] The software code runs in FLASH, and the stack required for its operation is set in the CPU's on-chip L1 Data Cache. The MMU permissions of the storage device to be detected need to be set to Cache-inhibited mode to prevent the CPU from reading data from the cache.

[0022] The beneficial effects of this invention are as follows:

[0023] This invention provides a method for detecting single-event upsets (SEIs) in storage devices of civil aviation equipment. This method has a complete detection process and error troubleshooting process, taking into account and eliminating various possible situations that may affect the SEI detection results, including:

[0024] 1. Perform equipment BIT testing before single-event inversion testing to avoid the equipment's condition affecting the test results;

[0025] 2. Disable the cache to avoid its impact on the detection results;

[0026] 3. Avoid storing data on the device under test, such as the C stack or variables, to prevent the operation of the testing program from being affected;

[0027] 4. Set a fixed detection time to prevent incomplete recording of detection results when the program is recording results at the moment the detection ends.

[0028] This invention ensures the reliability of the detected number of single-particle flips; the detection algorithm is applicable to different aerospace equipment, can be quickly ported to different systems, and is user-friendly, accurate, and reliable. Attached Figure Description

[0029] Figure 1 This is a flowchart of the testing operation process;

[0030] Figure 2 This is a flowchart of the single-event upset detection algorithm for storage devices;

[0031] Figure 3 This is a flowchart of the loop detection part in the single-event upset detection algorithm for storage devices. Detailed Implementation

[0032] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0033] To address the lack of single-event upset (SOME) detection for storage devices in existing technologies, this embodiment proposes a method for SOME detection of storage devices in airborne equipment. The method involves the computer software on the airborne equipment under test. Before the software executes, a detection environment needs to be prepared, where only the storage device in the airborne equipment under test is exposed to radiation, while other devices such as the CPU (central processing unit), NVRAM (Non-Volatile Random Access Memory), and FLASH memory are not exposed to radiation. The airborne equipment under test needs to have an NVRAM storage device for storing configuration information, error information, and result information.

[0034] See Figure 1 As shown, the software has two operating modes: debug mode and system mode, which can be switched by configuring hardware, such as DIP switches. The software can run different code branches depending on the hardware configuration. In debug mode, a human-machine interface is run, allowing reading and writing of NVRAM. In system mode, the single-event upset detection algorithm for storage devices is run. This embodiment requires three operating mode switches, and the detection process includes the following steps:

[0035] Before starting the test in step (1), switch to debug mode. The purpose is to enter the human-machine interface to perform write operations on NVRAM, write the configuration information to the configuration information address, and clear the error information and result information.

[0036] Configuration information, error information, and result information are data structures stored in NVRAM. Configuration information includes the start and end addresses of the storage device to be tested and the test time, which are stored at fixed addresses in NVRAM. The testing software reads this configuration information during runtime. Error information includes configuration valid flags, hardware valid flags, and test valid flags, which are stored at fixed addresses in NVRAM. The testing software modifies these flags during runtime. Result information is the number of single-particle flips, which is stored at fixed addresses in NVRAM. The testing software modifies this data during runtime.

[0037] Before starting the test, we need to configure the environment required for the software to run in debug mode and clear error and result information. The configuration information needs to specify the start and end addresses of the storage device to be tested. During the test, all storage cells within this address range will be traversed to check for single-event flips. The configuration information also needs to specify the test time, because the test results will also be written to NVRAM. The device is often powered off when the test ends. To prevent the device from being powered off while writing results and affecting the writing of results, a test time is agreed upon. After the test time ends, the test will stop and no more reading or writing to NVRAM will be performed to ensure the validity of the data in NVRAM. Error and result information needs to be cleared in advance to prevent incorrect judgments caused by the test software failing to run completely due to a fault and reading previously cleared results when collecting results.

[0038] Step (2) Initiate radiation testing on the storage device, switch to system mode, and run the single-event upset detection algorithm for the storage device in system mode. The single-event upset detection will be performed automatically according to the configuration information in step (1). The detection will automatically stop after the specified test time, and error and result information will be recorded. Note that the user needs to wait for one full address traversal time on top of the configured detection time before powering off the onboard device.

[0039] After step (3) is completed, you need to switch back to debug mode and read the error information and result information recorded in NVRAM through the human-machine interface; determine whether the test is valid based on the test validity flag in the error information. If the test is valid, record the result information; if the test is invalid, locate the cause of the error based on the error information, fix the error and start the test again.

[0040] like Figure 2 As shown, the single-event upset detection algorithm for storage devices in step (2) can be divided into the following processes:

[0041] Step (21) Initialize the basic operating environment; Before the software is executed, the basic hardware environment of the onboard equipment, such as the CPU and peripherals, needs to be initialized first. The initialization code may vary depending on the processor architecture. After the initialization is completed, continue to the next step.

[0042] Step (22) Hardware Status Check: After the basic operating environment is initialized, we need to test all the hardware required for the detection process, such as CPU, NVRAM, FLASH, SDRAM, etc., to ensure that all hardware devices are working properly, because the validity of the test results depends on whether these hardware devices are working properly. If the NVRAM is not working properly, the configuration information in it is also unreliable; if the SDRAM is not working properly, its single-event flip detection is also invalid. If the hardware test passes, the hardware valid flag is set to valid. If the storage device under test has ECC (Error Correcting Code) function, its ECC function also needs to be turned off, and then continue to the next step; if the hardware test fails, the test ends, the cause of the error is located and the error is fixed, and the test process is restarted.

[0043] Step (23) Configuration check; The storage device single-event flip detection algorithm needs to read the configuration information at runtime for checking. The configuration check needs to check whether the configuration information configured by the user is valid, such as checking the validity of the address range and the validity of the detection time, to prevent incorrect configuration by the user; Before the configuration check, the configuration valid flag is set to invalid. If the configuration check passes, the configuration valid flag is set to valid and the next step is performed; If the configuration check fails, the detection ends, the cause of the error is located and the error is fixed, and the detection process is restarted.

[0044] Step (24) Single-event flip count loop detection: After the hardware status check and configuration check pass, the single-event flip count will be detected. Before detection, the storage device to be tested is cleared first, and the single-event flip count is cleared to zero. Then, according to the start address and end address of the configured storage device, the single-event flip count is continuously detected in a loop until the detection time ends, the detection is completed, the result information is written, the detection valid flag is set to valid, and the detection is stopped.

[0045] See Figure 3 The flowchart shown is for the loop detection part of the single-event upset (SET) detection algorithm for storage devices. This process describes traversing the address space of the storage device under test and detecting the number of SETs that have occurred. When detecting the number of SETs, a lookup table algorithm is used to speed up the detection. The lookup table is an array of pre-calculated distinct values ​​and their corresponding SET counts. The lookup table algorithm directly uses the read value as an index to quickly obtain the corresponding SET count. This algorithm reduces runtime computational overhead and improves detection speed. The process ends after the address space of all devices under test configured in the configuration information has been traversed once.

[0046] All the above code runs in FLASH. The stack required for C program execution is set in the CPU's on-chip L1 DataCache. The MMU permissions of the storage device to be detected need to be set to cache-inhibited mode to prevent the CPU from reading data from the cache.

[0047] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.

Claims

1. A method for detecting single event upset of a storage device in an on-board device, for computer software on the on-board device to be detected, having two operation modes of a debug mode and a system mode, characterized in that The testing process includes the following steps: Step (1) Before the test begins, switch to debug mode, enter the human-machine interface to write to NVRAM, write the configuration information to the configuration information address, and clear the error information and result information; where: the configuration information includes the start address and end address of the storage device to be tested and the test time, the error information includes the configuration valid flag, the hardware valid flag and the test valid flag, and the result information is the number of single particle flips; Step (2) Start radiation testing on the storage device, switch to system mode, and run the single-event upset detection algorithm for the storage device in system mode. The single-event upset detection will be performed automatically according to the configuration information in step (1). After the specified test time is reached, the detection will stop automatically and the error information and result information will be recorded. The single-event upset detection algorithm for the storage device is divided into the following processes: Step (21) Initialize the hardware environment of the airborne equipment. After initialization is complete, continue to the next step. Step (22) Test all the hardware required for the testing process. If the hardware test passes, set the hardware valid flag to valid and then continue to the next step. If the hardware test fails, end the test, locate the cause of the error and fix the error, and then restart the testing process. Step (23) Set the configuration valid flag to invalid, read the configuration information to perform configuration check. If the configuration check passes, set the configuration valid flag to valid and proceed to the next step. If the configuration check fails, end the test, locate the cause of the error and fix the error, and then restart the test process. Step (24) Clear the storage device to be tested and clear the number of single particle flips to zero; then traverse according to the start address and end address of the configured storage device, continuously detect the number of single particle flips until the detection time ends, complete the detection, write the result information, set the detection valid flag to valid, and stop the detection. After step (3) is completed, you need to switch back to debug mode and read the error information and result information recorded in NVRAM through the human-machine interface; determine whether the test is valid based on the test validity flag in the error information. If the test is valid, record the result information; if the test is invalid, locate the cause of the error based on the error information, fix the error and start the test again.

2. The method for detecting single event upsets in a storage device in an on-board device according to claim 1, wherein The two operating modes, debug mode and system mode, can be switched by configuring the hardware.

3. The method of claim 1, wherein the method is used in a memory device in an airborne device. The configured detection time must allow for a complete address traversal between the time the airborne equipment is powered off and the time between the detection time and the power failure time.

4. The method of claim 1, wherein In step (23), if the hardware device has ECC function, then its ECC function is turned off.

5. The method of claim 1, wherein In step (24), the number of single-particle flips is detected using a lookup table algorithm. The lookup table is an array of different values ​​and the number of single-particle flips corresponding to each value, calculated in advance. The lookup table algorithm is an algorithm that uses the read value as an index to quickly obtain the number of single-particle flips corresponding to the value through the lookup table. The process ends after the address space of the storage device to be detected configured in the configuration information has been traversed once.

6. The method of claim 1, wherein The software code runs in FLASH, and a stack required for running is set in an on-chip L1 Data Cache of the CPU. The MMU permission of the storage device to be detected needs to be set in a Cache-inhibited mode to prevent the CPU from reading data from the Cache.

Images