A vertical cavity surface-emitting laser and its fabrication method

By controlling the difference in dielectric layer thickness in a vertical cavity surface-emitting laser, the problems of difficult etching depth control and material oxidation are solved, achieving VCSEL performance with a Gaussian circular far-field spot and small divergence angle, thus improving the stability and versatility of the device.

CN117039616BActive Publication Date: 2025-10-28MINDU INNOVATION LAB
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Patent Information

Application Number
CN202310979701.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-04
Publication Date
2025-10-28
Estimated Expiration
2043-08-04

AI Technical Summary

Technical Problem

In the fabrication of vertical cavity surface-emitting lasers, existing technologies suffer from difficulties in controlling the precision of surface etching, resulting in large fluctuations in the etching depth of the GaAs layer, which makes mass production difficult. Furthermore, the high surface roughness of GaAs after etching leads to scattering losses, and the easy oxidation of the Al layer affects the reliability of the device, resulting in insufficient versatility.

Method used

By employing a method that eliminates the need for epitaxial wafer surface etching, and by controlling the thickness of the dielectric layer in different regions, using silicon nitride or silicon dioxide as the dielectric layer, a thickness difference is formed between the central region and the annular region of the photoelectric aperture. This allows for the regulation of the lasing mode, avoids exposure of the surface Al layer, and improves the robustness and versatility of the process.

Benefits of technology

This achievement enables VCSEL performance with a Gaussian circular far-field spot and small divergence angle, improving device stability and mass production capability, reducing material loss, and expanding the applicability of the process.

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Abstract

This invention relates to a vertical-cavity surface-emitting laser (VCSEL) and its fabrication method. The VCSEL comprises, from bottom to top, a substrate, an n-DBR, an active layer, a p-DBR, and a p-Cap. An annular contact electrode is disposed on the p-Cap, and a central region for light emission is disposed inside the contact electrode. The region between the contact electrode and the central region for light emission is an annular region. A first dielectric layer covers the p-Cap and the contact electrode, but the central region or the annular region is not covered by the first dielectric layer. A second dielectric layer covers the first dielectric layer, and the second dielectric layer covers both the central region and the annular region. The first and second dielectric layers are made of the same material. This invention eliminates the need for etching on the surface of the epitaxial wafer, thus preserving the overall structure of the epitaxial wafer. The surface layer containing the Al layer has no exposure risk, making the device fabrication process more robust and possessing greater versatility.
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Description

Technical Field

[0001] This invention relates to a vertical cavity surface-emitting laser and its fabrication method, belonging to the technical field of vertical cavity surface-emitting lasers. Background Technology

[0002] Vertical-cavity surface-emitting lasers (VCSELs) possess numerous advantages, including low threshold voltage, high speed, small wavelength drift coefficient, high coupling efficiency, ease of two-dimensional integration, and low manufacturing cost, leading to their widespread application in optical communication, 3D sensing, and lidar. Typical VCSELs emit multimode light with a donut-shaped far-field beam. However, with the continuous upgrading of application scenarios, the market demands higher performance from VCSELs, with Gaussian circular far-field beams and small divergence angles being important performance indicators.

[0003] In the research on achieving a Gaussian circular far-field spot in VCSELs, surface etching (Surface Relief) is an effective method. Currently, a commonly used method for surface etching is to etch the GaAs layer on the surface, creating a difference in GaAs layer thickness between the central region and the outer annular region of the aperture. This increases the loss of higher-order modes in the VCSEL, ultimately allowing the VCSEL to operate stably in the lasing state of the base film, achieving a Gaussian circular far-field spot and a small divergence angle. However, this method has some shortcomings, as follows:

[0004] 1. The etching depth of surface GaAs is difficult to control precisely and fluctuates greatly with process conditions, which is not conducive to mass production of products.

[0005] 2. The surface roughness of etched GaAs is not as good as that of epitaxially grown surfaces, and the etching scheme at the center of the light-emitting hole will produce a large scattering loss.

[0006] 3. The DBR layer contains AlxGa1-xAs. Once the etching process exposes the Al-containing layer, the surface is prone to oxidation and blackening, which will adversely affect the appearance and reliability of the VCSEL. This method has certain requirements for the surface material and its applicability is generally limited. Summary of the Invention

[0007] To overcome the above problems, the present invention provides a vertical cavity surface-emitting laser and its fabrication method. The present invention does not require etching on the surface of the epitaxial wafer, thus preserving the overall structure of the epitaxial wafer. The surface layer containing the Al layer has no risk of exposure, the device fabrication process is more robust, and it has greater versatility.

[0008] The technical solution of the present invention is as follows:

[0009] First aspect

[0010] A vertical-cavity surface-emitting laser (VCSEL) includes, from bottom to top, a substrate, an n-DBR, an active layer, a p-DBR, and a p-Cap; the p-Cap has an annular contact electrode, and the contact electrode has a central region for light emission; the region between the contact electrode and the central region for light emission is an annular region; a first dielectric layer covers the p-Cap and the contact electrode, but the central region or the annular region is not covered by the first dielectric layer; a second dielectric layer covers the first dielectric layer, and the second dielectric layer covers the central region and the annular region; the first dielectric layer and the second dielectric layer are made of the same material.

[0011] Furthermore, the thickness of the first dielectric layer is an odd multiple of λ / (4n), where λ is the lasing wavelength of the vertical cavity surface-emitting laser and n is the real part of the refractive index of the first dielectric layer.

[0012] Furthermore, the sum of the thicknesses of the first dielectric layer and the second dielectric layer covering the central region of the light outlet is λ / n.

[0013] Furthermore, the central area of ​​the light outlet is circular or elliptical.

[0014] Furthermore, the active layer also includes an oxide layer between the p-DBRs.

[0015] Furthermore, the materials of the first dielectric layer and the second dielectric layer are silicon nitride or silicon dioxide.

[0016] Second aspect

[0017] A method for fabricating a vertical-cavity surface-emitting laser (VCSEL), used to fabricate the VCSEL described in the first aspect, characterized in that it comprises:

[0018] n-DBR, active layer, p-DBR and p-Cap are epitaxially grown sequentially on the substrate;

[0019] The contact electrode is fabricated on the p-Cap;

[0020] The first dielectric layer is grown on the p-Cap and the contact electrode;

[0021] The light-emitting port central region or the annular region is prepared by photolithography, including:

[0022] If the light-emitting port center region is prepared by photolithography, the first dielectric layer above the light-emitting port center region is removed by dry etching.

[0023] If the annular region is prepared by photolithography, the first dielectric layer above the annular region is removed by dry etching;

[0024] The second dielectric layer is grown on the contact electrode, the first dielectric layer, the light outlet center region, and the annular region.

[0025] Furthermore, after growing the second dielectric layer, mesa lithography is performed, and mesa is formed by dry etching, followed by wet oxidation.

[0026] Furthermore, the diameter of the oxide hole in the wet oxidation process is no greater than 10 μm, and the diameter of the central area of ​​the light outlet is smaller than that of the oxide hole; the outer diameter of the annular area is no less than the inner diameter of the contact electrode.

[0027] The present invention has the following beneficial effects:

[0028] This invention eliminates the need for etching the surface of the epitaxial wafer, thus preserving the overall structure of the epitaxial wafer. The surface layer containing the Al layer poses no risk of exposure, resulting in a more robust device fabrication process and greater versatility. This invention controls the lasing mode of the VCSEL by adjusting the thickness of the passivation layer in different regions, specifically by varying the thickness of the dielectric layer in the central region and the outer annular region of the light-emitting aperture. This difference in thickness creates variations in the losses corresponding to higher-order modes and the base film. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the upper structure of a vertical cavity surface-emitting laser according to an embodiment of the present invention.

[0030] Figure 2 This is a schematic diagram of the fabrication process of a vertical cavity surface-emitting laser according to an embodiment of the present invention.

[0031] Figure 3 This is a schematic diagram of the fabrication process of a vertical cavity surface-emitting laser according to an embodiment of the present invention.

[0032] The reference numerals in the figure are as follows:

[0033] 21. n-DBR; 22. Active layer; 23. p-DBR; 24. p-Cap; 25. Contact electrode; 26. First dielectric layer; 27. Second dielectric layer. Detailed Implementation

[0034] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0035] First aspect

[0036] refer to Figure 1 and 2A vertical-cavity surface-emitting laser (VCSEL) includes, from bottom to top, a substrate, an n-DBR 21, an active layer 22, a p-DBR 23, and a p-Cap 24. An annular contact electrode 25 is disposed on the p-Cap 24, and a central region for light emission is disposed inside the contact electrode 25. The region between the contact electrode 25 and the central region for light emission is an annular region. A first dielectric layer 26 covers the p-Cap 24 and the contact electrode 25, but the central region or the annular region is not covered by the first dielectric layer 26. A second dielectric layer 27 covers the first dielectric layer 26, and the second dielectric layer 27 covers both the central region and the annular region. The first dielectric layer 26 and the second dielectric layer 27 are made of the same material.

[0037] In one embodiment of the present invention, the thickness of the first dielectric layer 26 is an odd multiple of λ / (4n), where λ is the lasing wavelength of the vertical cavity surface-emitting laser and n is the real part of the refractive index of the first dielectric layer 26.

[0038] In one embodiment of the present invention, the sum of the thicknesses of the first dielectric layer 26 and the second dielectric layer 27 covering the central region of the light output port is λ / n. The corresponding epitaxial design in this case is an in-phase design.

[0039] In one embodiment of the present invention, the central area of ​​the light outlet is circular or elliptical.

[0040] In one embodiment of the present invention, an oxide layer is further included between the active layer 22 and the p-DBR23.

[0041] In one embodiment of the present invention, the materials of the first dielectric layer 26 and the second dielectric layer 27 are silicon nitride or silicon dioxide.

[0042] Second aspect

[0043] refer to Figure 2 and 3 A method for fabricating a vertical-cavity surface-emitting laser (VCSEL), comprising:

[0044] n-DBR21, active layer 22, p-DBR23 and p-Cap24 are epitaxially grown sequentially on the substrate;

[0045] The contact electrode 25 is fabricated on the p-Cap 24;

[0046] The first dielectric layer 26 is grown on the p-Cap 24 and the contact electrode 25;

[0047] The light-emitting port central region or the annular region is prepared by photolithography, including:

[0048] If the light-emitting port center region is prepared by photolithography, the first dielectric layer 26 above the light-emitting port center region is removed by dry etching.

[0049] If the annular region is prepared by photolithography, the first dielectric layer 26 above the annular region is removed by dry etching;

[0050] The second dielectric layer 27 is grown on the contact electrode 25, the first dielectric layer 26, the light outlet center region, and the annular region.

[0051] Because the light-emitting port area is small, in order to accurately control the size of the central area and the outer annular area, the first dielectric layer 26 and the second dielectric layer 27 are placed before oxidation. At this time, the device surface is relatively flat, and a thinner resist can be used to achieve higher photolithography resolution.

[0052] In one embodiment of the present invention, after growing the second dielectric layer 27, mesa photolithography is performed, and the mesa is formed by dry etching, followed by wet oxidation.

[0053] In one embodiment of the present invention, the diameter of the oxide hole in the wet oxidation process is not greater than 10 μm, and the diameter of the central region of the light outlet is smaller than the oxide hole; the outer diameter of the annular region is not less than the inner diameter of the contact electrode 25.

[0054] The following are some embodiments of the method of the present invention.

[0055] Example 1

[0056] This embodiment uses a 940nm three-dimensional sensing VCSEL as an example. The specific process steps are as follows:

[0057] (1) Using the MOCVD growth method, n-DBR, quantum well, p-DBR and other epitaxial layers are sequentially grown on GaAs substrate.

[0058] (2) After cleaning the surface of the epitaxial wafer, photolithography and electron beam evaporation are used to fabricate p-plane TiPtAu contact electrodes, among which... After the metal deposition is complete, the photoresist is stripped away.

[0059] (3) PECVD growth of SiNx with an equivalent thickness of approximately λ / 4.

[0060] (4) The light-emitting aperture area is lithographically etched, and then the λ / 4 thick SiNx in the annular area is removed by dry etching. After completion, the surface photoresist is removed.

[0061] (5) PECVD growth thickness is approximately The SiNx protective layer.

[0062] (6) After mesa lithography, ICP etching removes the surface SiNx and the epitaxial structure to a certain depth. The etching depth reaches the n-DBR below the quantum well, so that the oxide layer and the quantum well layer are exposed.

[0063] (7) Wet oxidation is performed at high temperature. After oxidation, the growth thickness is approximately λ*3 / 4- The SiNx passivation layer.

[0064] (8) Via photolithography and ICP etching of the contact hole remove part of SiNx on the contact ring, so that part of the metal is exposed.

[0065] (9) After seed layer deposition, photolithography is performed, followed by electroplating of Au to a thickness of approximately 3.5 μm. After resist removal, wet etching is used to remove some of the metal, followed by rinsing.

[0066] (10) The back side is thinned to an overall thickness of about 100 μm, and then the back N-type electrode is prepared and thermally annealed.

[0067] (11) A single VCSEL die is obtained after laser cutting.

[0068] Example 2

[0069] This embodiment takes an 850nm data communication VCSEL as an example. The specific process steps are as follows:

[0070] (1) Using the MOCVD growth method, n-DBR, quantum well, p-DBR and other epitaxial layers are sequentially grown on GaAs substrate.

[0071] (2) After cleaning the surface of the epitaxial wafer, photolithography and electron beam evaporation are used to fabricate p-plane TiPtAu contact electrodes, among which... After the metal deposition is complete, the photoresist is stripped away.

[0072] (3) The equivalent thickness of PECVD growth is approximately SiNx.

[0073] (4) The ring-shaped area of ​​the light-emitting aperture is photolithographically etched, and then the ring-shaped area is removed by dry etching. Thick SiNx, then remove the surface photoresist after completion.

[0074] (5) PECVD growth thickness is approximately The SiNx protective layer.

[0075] (6) After mesa lithography, ICP etching removes the surface SiNx and the epitaxial structure to a certain depth. The etching depth reaches the n-DBR below the quantum well, so that the oxide layer and the quantum well layer are exposed.

[0076] (7) Wet oxidation was carried out at high temperature, and the growth thickness after oxidation was approximately [missing information]. The SiNx passivation layer.

[0077] (8) BCB process.

[0078] (9) PECVD growth thickness approximately The SiNx protective layer.

[0079] (10) Via lithography and ICP etching are used to remove part of the SiNx on the contact electrode, so that part of the metal is exposed.

[0080] (11) After seed layer deposition, photolithography is performed, followed by electroplating of Au to a thickness of approximately 3.5 μm. After resist removal, wet etching is used to remove some of the metal, followed by rinsing.

[0081] (12) Scribing Street lithography and SiNx etching.

[0082] (12) Photolithography and deep etching of the front N electrode area, with an etching depth exceeding that of n-DBR, reaching the N-side substrate.

[0083] (13) Front N-electrode photolithography and N-electrode evaporation preparation.

[0084] (14) PECVD growth thickness is approximately The SiNx protective layer.

[0085] (15) Photolithography, etching to remove electrodes and passivation layer on the dicing track.

[0086] (16) The back side is thinned to an overall thickness of about 100 μm, and then the back N-type electrode is prepared and thermally annealed.

[0087] (17) A single or array of VCSEL chips are obtained after laser cutting.

[0088] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure made using the contents of the present invention specification and drawings, or directly or indirectly applied to other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A vertical-cavity surface-emitting laser, characterized in that, The structure includes, from bottom to top, a substrate, an n-DBR (21), an active layer (22), a p-DBR (23), and a p-Cap (24); a ring-shaped contact electrode (25) is disposed on the p-Cap (24), and a light-emitting port center area is disposed inside the contact electrode (25), and the area between the contact electrode (25) and the light-emitting port center area is a ring area; a first dielectric layer (26) covers the p-Cap (24) and the contact electrode (25), and the first dielectric layer (26) is not covered above the center area or the ring area; a second dielectric layer (27) covers the first dielectric layer (26), and the second dielectric layer (27) covers the center area and the ring area; the first dielectric layer (26) and the second dielectric layer (27) are made of the same material.

2. The vertical cavity surface-emitting laser according to claim 1, characterized in that, The thickness of the first dielectric layer (26) is an odd multiple of λ / (4n), where λ is the lasing wavelength of the vertical cavity surface-emitting laser and n is the real part of the refractive index of the first dielectric layer (26).

3. The vertical cavity surface-emitting laser according to claim 2, characterized in that, The sum of the thicknesses of the first dielectric layer (26) and the second dielectric layer (27) covering the central area of ​​the light outlet is λ / n.

4. The vertical-cavity surface-emitting laser according to claim 1, characterized in that, The central area of ​​the light outlet is circular or elliptical.

5. The vertical-cavity surface-emitting laser according to claim 1, characterized in that, An oxide layer is also included between the active layer (22) and the p-DBR (23).

6. The vertical-cavity surface-emitting laser according to claim 1, characterized in that, The materials of the first dielectric layer (26) and the second dielectric layer (27) are silicon nitride or silicon dioxide.

7. A method for fabricating a vertical-cavity surface-emitting laser, used to fabricate a vertical-cavity surface-emitting laser as described in any one of claims 1-6, characterized in that, include: n-DBR (21), active layer (22), p-DBR (23) and p-Cap (24) are epitaxially grown sequentially on the substrate; The contact electrode (25) is fabricated on the p-Cap (24); The first dielectric layer (26) is grown on the p-Cap (24) and the contact electrode (25); The light-emitting port central region or the annular region is prepared by photolithography, including: If the light-emitting port center region is prepared by photolithography, the first dielectric layer (26) above the light-emitting port center region is removed by dry etching; If the annular region is prepared by photolithography, the first dielectric layer (26) above the annular region is removed by dry etching; The second dielectric layer (27) is grown on the contact electrode (25), the first dielectric layer (26), the light outlet center region and the annular region.

8. The method for fabricating a vertical-cavity surface-emitting laser according to claim 7, characterized in that, After growing the second dielectric layer (27), mesa photolithography is performed, and the mesa is formed by dry etching, followed by wet oxidation.

9. The method for fabricating a vertical-cavity surface-emitting laser according to claim 8, characterized in that, The diameter of the oxide hole in the wet oxidation process is no greater than 10 μm, and the diameter of the central area of ​​the light outlet is smaller than that of the oxide hole; the outer diameter of the annular area is no less than the inner diameter of the contact electrode (25).

Citation Information

Patent Citations

  • Vertical cavity surface emitting laser

    CN220440121U