Dynamic current scaling of a regulator

Abstract

Dynamic current scaling of regulators is disclosed. A method and apparatus for performing dynamic current scaling of input current of a voltage regulator is provided. The method and apparatus allow for regulating current consumption in various applications, calculating duration of active phases in which various algorithms are performed, and activating dynamic current scaling of the regulator if the active duration is shorter than a programmable threshold. A controller receives a threshold of active duration and a window size for evaluating the active duration.

Description

Technical Field

[0001] This application relates to dynamically scaling the current of a regulator, and in particular, dynamically scaling the current based on the activity duration of a controller powered by the regulator. Background Technology

[0002] A regulator is used to provide a voltage with a substantially constant level. The regulator receives an input current and provides a voltage based on that received current. In many applications, such as low-power applications including activity trackers and pedometers, the calculation of activity varies over time. Furthermore, in these applications, reducing the current supplied to the regulator results in power savings. Summary of the Invention

[0003] In one embodiment, the system includes a regulator configured to receive an input current and provide a regulated voltage. The system includes a controller configured to: receive a threshold for an activity duration; determine a first activity duration within a first output data rate time period of a plurality of output data rate time periods; compare the first activity duration with the threshold for the activity duration; in response to determining that the first activity duration exceeds the threshold, avoid performing dynamic current scaling on the input current during the first output data rate time period; and in response to determining that the first activity duration does not exceed the threshold, cause dynamic current scaling to be performed on the input current during the first output data rate time period.

[0004] In one embodiment, the controller is configured to perform dynamic current scaling during a first output data rate time period by reducing the input current from a first current level to a second current level below the first current level. In another embodiment, the controller is configured to perform dynamic current scaling during a first output data rate time period by reducing the input current from the first current level to the second current level during a first standby duration. In one embodiment, the first standby duration follows a first activity duration within the first output data rate time period.

[0005] In one embodiment, the first standby duration is a portion of the first output data rate time period during which the controller does not execute one or more algorithms scheduled during the first output data rate time period. In another embodiment, the first activity duration is a portion of the first output data rate time period during which the controller executes one or more algorithms scheduled during the first output data rate time period.

[0006] In one embodiment, the controller is configured to avoid performing dynamic current scaling by maintaining the input current at a first current level during a first active duration and a first standby duration of a first output data rate time period. In one embodiment, the controller is configured to: receive an indication of a window size; determine that the window size is greater than 1; in response to determining that the window size is greater than 1, determine whether the active durations of one or more output data rate time periods in a plurality of output data rate time periods do not exceed a threshold; and in response to determining that both the one or more active durations and the first active duration do not exceed the threshold, cause dynamic current scaling to be performed on the input current during the first output data rate time period. In one embodiment, the first output data rate time period follows one or more output data rate time periods. In one embodiment, an regulated voltage powers the controller.

[0007] In one embodiment, the controller for the regulator includes a memory configured to store executable instructions for execution during a first activity duration over a first output data rate time period. The controller includes a control level configured to: receive a threshold for the activity duration; determine a first timestamp before executing the executable instructions; execute the executable instructions; determine a second timestamp after executing the executable instructions; determine the first activity duration as the difference between the first and second timestamps; compare the first activity duration with the threshold; and determine whether to reduce the current supplied to the regulator based on the comparison of the first activity duration with the threshold. In one embodiment, the controller includes a dynamic current scaling level configured to set the current supplied to the regulator.

[0008] In one embodiment, the control stage is configured to reduce the current supplied to the regulator from a first current level to a second current level in response to determining that the first activity duration is less than a threshold. In one embodiment, the control stage is configured to reduce the current supplied to the regulator during a first standby duration within a first output data rate time period. In one embodiment, the first standby duration is after the first activity duration.

[0009] In one embodiment, a dynamic current scaling stage is configured to increase the current supplied to the regulator from a second current level to a first current level during a second active duration of a second output data rate time period. In one embodiment, the second output data rate time period follows the first output data rate time period. In one embodiment, a control stage is configured to maintain the current level supplied to the regulator in response to determining that the first active duration is greater than a threshold. In one embodiment, a control stage is configured to maintain the current level supplied to the regulator during a first standby duration of the first output data rate time period. In one embodiment, the first standby duration follows the first active duration.

[0010] In one embodiment, a method includes receiving a threshold for an activity duration; determining a first activity duration in a first output data rate time period among a plurality of output data rate time periods; comparing the first activity duration with the threshold for the activity duration; and in response to determining that the first activity duration exceeds the threshold, avoiding dynamic current scaling of the input current of a regulator during the first output data rate time period, and in response to determining that the first activity duration does not exceed the threshold, causing dynamic current scaling of the input current to be performed during the first output data rate time period.

[0011] In one embodiment, performing dynamic current scaling during a first output data rate time period includes reducing the input current from a first current level to a second current level below the first current level. In another embodiment, performing dynamic current scaling during a first output data rate time period includes reducing the input current from the first current level to the second current level during a first standby duration of the first output data rate time period. In one embodiment, the first standby duration follows a first activity duration within the first output data rate time period.

[0012] In one embodiment, the first active duration is a portion of a first output data rate time period during which the controller executes one or more algorithms scheduled to run during the first output data rate time period. In one embodiment, avoiding dynamic current scaling includes maintaining the input current at a first current level during both the first active duration and the first standby duration of the first output data rate time period.

[0013] In one embodiment, the method includes receiving an indication of a window size; determining that the window size is greater than 1; in response to determining that the window size is greater than 1, determining whether the duration of one or more activity periods in one or more output data rate time periods does not exceed a threshold; and in response to determining that the duration of one or more activity periods and the first activity duration do not exceed the threshold, causing dynamic current scaling to be performed on the input current in the first output data rate time period. In one embodiment, the first output data rate time period follows one or more output data rate time periods. Attached Figure Description

[0014] Figure 1 A system block diagram including a controller and a regulator is shown.

[0015] Figure 2 A method for performing dynamic current scaling is shown.

[0016] Figure 3 An example of the application of dynamic current scaling during the output data rate time period is shown.

[0017] Figure 4 An example of the application of dynamic current scaling during the output data rate time period is shown.

[0018] Figure 5 A method for performing dynamic current scaling is shown.

[0019] Figure 6 An example of determining the duration of an activity is shown. Detailed Implementation

[0020] Figure 1 A block diagram of a system 100 including a controller 102 and a regulator 104 is shown. System 100 can be any electronic system performing computational operations. For example, system 100 can be a low-power system, such as a pedometer. Controller 102 includes a control stage 106, a dynamic current scaling (DCS) stage 108, a first memory 110 and a second memory 112, and one or more registers 114. Regulator 104 can be any type of regulator, such as a low dropout (LDO) regulator. Regulator 104 has an input for receiving input current. Regulator 104 generates a voltage (VREG) and provides a voltage to controller 102 through its output. The voltage (VREG) powers controller 102. Control stage 106 is communicatively coupled to DCS stage 108, first memory 110 and second memory 112, and one or more registers 114. Note that... Figure 1An example of a controller that sets the current supplied to regulator 104 is shown. However, in alternative embodiments, the techniques described herein can be used to implement a different controller. For example, control can be implemented using hardware logic and registers. Furthermore, the control can be implemented using an application-specific integrated circuit (ASIC) or an ASIC coupled to an application processor.

[0021] Controller 102 can be any type of control device or circuit, such as a processor, microprocessor, or microcontroller. Alternatively, a system-on-a-chip (SOC) or application-specific integrated circuit (ASIC) can be used instead of controller 102 described herein. Control level 106 can be any digital control circuit, such as an arithmetic logic unit (ALU).

[0022] The first memory 110 can be any type of data storage device. The first memory 110 can be non-volatile memory or read-only memory (RAM). The first memory 110 can be erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The first memory 110 can store executable instructions executed by the controller 102 (or its control level 106). The executable instructions can be grouped into multiple algorithms 116a, 116b and DCS algorithm 118. Algorithms 116a and 116b can, for example, be firmware of the controller 102. DCS algorithm 118 can be executable instructions for performing dynamic current scaling as described herein.

[0023] The second memory 112 can be any type of data storage device. The second memory 112 can be random access memory (ROM). The second memory 112 can be volatile random access semiconductor memory, such as static random access memory (SRAM) or dynamic random access memory (DRAM). As described herein, the second memory 112 can store threshold and window size parameters for the duration of activity.

[0024] One or more registers 114 can be any memory location used to store data. One or more registers 114 can store an enable indicator. The enable indicator can indicate to control stage 106 whether dynamic current scaling is configured. When the enable indicator indicates that dynamic current scaling is configured, control stage 106 can evaluate whether to perform dynamic current scaling, and when the enable indicator indicates that dynamic current scaling is not configured, control stage 106 can avoid evaluating whether to perform dynamic current scaling. As described herein, one or more registers 114 can store output data rate (ODR) frequency and counter values, etc. For example, the counter value can be the timestamp difference described herein. DCS stage 108 can be any circuit configured to receive DCS settings from control stage 106 and output current settings to regulator 104.

[0025] DCS stage 108 can receive a DCS setting indicating that dynamic current scaling should be performed. DCS stage 108 reduces the current level supplied to regulator 104 during the standby duration of the output data rate time period. DCS stage 108 can also receive a DCS setting indicating that dynamic current scaling should not be performed. Therefore, DCS stage 108 can maintain the current level supplied to regulator 104 during the standby duration at the same current level used during the previous active duration. Note that when the enable indicator indicates that dynamic current scaling is not configured, the DCS setting can continuously indicate that dynamic current scaling is not performed. When the enable indicator indicates that dynamic current scaling is configured, control stage 106 can set the DCS setting to indicate whether dynamic current scaling is performed based on the output data rate time period (e.g., at the end of the active duration of the output data rate time period).

[0026] Figure 2 A method 200 for performing dynamic current scaling is illustrated. In method 200, a control stage 106 receives a threshold for the activity duration and a window size at 202. The threshold for the activity duration and the window size may be stored in a second memory 112. The control stage 106 may retrieve the threshold for the activity duration and the window size from the second memory 112. At 204, the control stage 106 determines whether the window size is 1 or greater than 1. A window size of 1 indicates that the control stage 106 will perform dynamic current scaling based on an output data rate time period, while a window size greater than 1 indicates that the control stage 106 will evaluate the dynamic current scaling based on the number of output data rate time periods specified by the window size.

[0027] In response to determining a window size of 1, control level 106 determines the activity duration within an output data rate time period at 206. The activity duration can be the length of time elapsed during the execution of multiple algorithms 116a, 116b and DCS algorithm 118 by control level 106. The activity duration can be a portion of the output data rate time period. The multiple algorithms 116a, 116b can be allocated, scheduled, or reserved computational loads for execution during the output data rate time period. Control level 106 can execute DCS algorithm 118 after executing multiple algorithms 116a, 116b. After executing multiple algorithms 116a, 116b and DCS algorithm 118, control level 106 can enter a standby state, during which control level 106 may not execute instructions or perform computational tasks. Control level 106 can remain in standby until the end of the output data rate time period. Control level 106 then continues executing algorithms scheduled for the next output data rate time period.

[0028] At 208, control stage 106 determines whether the activity duration is greater than or equal to a threshold for the activity duration. If an affirmative determination is made and the activity duration is longer than or equal to the threshold, control stage 106 avoids enabling dynamic current scaling for the output data rate time period at 210. Conversely, if a negative determination is made and the activity duration is shorter than the threshold, at 212, control stage 106 enables dynamic current scaling for the output data rate time period. Method 200 then returns to 206, thereby performing an evaluation for the subsequent or next output data rate time period.

[0029] Note that in some applications where control stage 106 performs computational functions, activity varies with time and different output data rate time periods. Control stage 106 selectively implements dynamic current scaling over the output data rate time period based on the duration of activity within that time period. This selective implementation of dynamic current scaling reduces current consumption in system 100. For example, dynamic current scaling can cause the current supplied to the regulator to be reduced from a first current of 10 microamperes (μA) to a second current of 6 μA.

[0030] Figure 3 An example of dynamic current scaling applied during output data rate time periods is illustrated. First output data rate time periods 120a, 120b, and 120c have first active durations 122a, 122b, and 122c, and first standby durations 123a, 123b, and 123c, respectively. A threshold 128 for the active duration is configured, for example, by a user specification. The default value for the active duration threshold 128 can be half of the output data rate time periods 120a, 120b, and 120c. However, the user can specify another value for the active duration threshold 128. During the first output data rate time period 120a, the first active duration 122a is less than the active duration threshold 128. Therefore, control level 106 enables dynamic current scaling for the first standby duration 123a of the first output data rate time period 120a.

[0031] In response to enabling dynamic current scaling, dynamic current scaling stage 108 causes the current to be set to a first current during the first active duration 122a, and to a second current lower than the first current for the remainder of the first output data rate time period 120a (e.g., the first standby duration 123a). During dynamic current scaling, dynamic current scaling stage 108 reduces the current supplied to regulator 104 in response to (or following) the end of the first active duration 122a. The current reduction remains in effect until the start of the next output data rate time period.

[0032] The second output data rate time period 120b follows the first output data rate time period 120a. At the beginning of the second output data rate time period 120b, the dynamic current scaling stage 108 returns the current level of the regulator 104 to the first current. The dynamic current scaling stage 108 maintains the current of the regulator 104 at the first current throughout the second active duration 122b. The dynamic current scaling of the second standby duration 123b of the second output data rate time period 120b is evaluated based on the second active duration 122b. The second active duration 122b of the second output data rate time period 120b is greater than the threshold 128 of the active duration. Therefore, the control stage 106 disables dynamic current scaling. The dynamic current scaling stage 108 avoids reducing the current supplied to the regulator 104 to the second current during the second standby duration 123b. Figure 3 As shown, during the second standby duration 123b of the second output data rate time period 120b, a first current is supplied to the regulator 104.

[0033] During the third output data rate time period 120c, the dynamic current scaling stage 108 causes the first current to be output to the regulator 104 during the third activity duration 122c. Therefore, during the third activity duration 122c, a higher current is provided to the regulator 104 to perform the computational algorithm described herein. The control stage 106 determines that the third activity duration 122c is less than a threshold 128 for the activity duration. Therefore, the control stage 106 enables dynamic current scaling. The dynamic current scaling stage 108 sets the current supplied to the regulator 104 to a second current during the third standby duration 123c.

[0034] The regulation and dynamic current scaling operate in a manner that mitigates electrical damage to regulator 104 and system 100 while simultaneously reducing the power consumption and power dissipation of system 100. When the standby durations 123a, 123b, 123c (during which the current is changed) are relatively short, the regulation described herein avoids altering (by decreasing and then increasing) the current supplied to the regulator. This is due to the fact that decreasing and then restoring the current could damage or harm regulator 104, system 100, or their electrical components.

[0035] When the load presented to regulator 104 (e.g., controller 102) is unstable, control stage 106 avoids altering the input current of regulator 104 or another configuration of regulator 104. Control stage 106 avoids altering the input current of regulator 104 at the end of a standby phase and the beginning of a new active phase (the transition from the standby duration of the previous output data rate period to the new active duration of the subsequent output data rate period). During transitions, the load on regulator 104 changes, which can cause a drop in voltage (VREG). Furthermore, using a threshold reasonably below ODR results in a more significant improvement in current consumption, which may not be achievable by setting the threshold to a relatively large value.

[0036] The duration of activity helps determine the impact of applying dynamic current scaling on the average current consumption of regulator 104. A relatively long duration of activity may not justify the application of dynamic current scaling, as the resulting improvement or reduction in average current consumption will be minimal. Conversely, a relatively short duration of activity implies a greater chance of reducing average current consumption. When a relatively short duration of activity is detected, enabling dynamic current scaling can more significantly reduce average current consumption.

[0037] return Figure 2 In response to determining at 204 that the window size is greater than 1, control stage 106 sets a counter for the window size to zero at 214. At 216, control stage 106 determines the duration of activity within the output data rate time period as described herein. At 218, control stage 106 increments the counter by, for example, 1. At 220, control stage 106 determines whether the counter has reached the window size. In response to determining that the counter has not yet reached the window size, control stage 106 continues to determine the duration of activity for the next output data rate time period until the number of output data rate time periods for which the duration of activity has been determined reaches the window size.

[0038] In response to determining that the counter has reached the window size, at 222, control level 106 compares each activity duration within the window with a threshold. At 224, control level 106 determines whether to enable dynamic current scaling based on the comparison of each activity duration within the window with the threshold. Control level 106 enables dynamic current scaling at 224 or disables dynamic current scaling at 226 based on the comparison of each activity duration within the window with the threshold.

[0039] For example, if the duration of all activities within the window is shorter than a threshold, control stage 106 can enable dynamic current scaling. If the duration of at least one activity within the window is equal to or longer than the threshold, control stage 106 can disable dynamic current scaling. If control stage 106 determines to enable dynamic current scaling, it reduces the current of regulator 104 during the last output data rate time period of the window. Furthermore, control stage 106 can reduce the current during all subsequent output data rate time periods, whereby subsequent output data rate time periods may include or exclude the last output data rate time period of the window. Control stage 106 can reduce the current during a selected or set number of output data rate time periods (e.g., user-selected or set), whereby the number of output data rate time periods may include or exclude the last output data rate time period of the window. Control stage 106 can avoid enabling dynamic current scaling during previous output data rate time periods within the window.

[0040] Figure 4 An example of dynamic current scaling application during output data rate time periods is illustrated. A first output data rate time period 120a, a second output data rate time period 120b, and a third output data rate time period 120c have corresponding first active durations 122a, second active durations 122b, and third active durations 122c, and corresponding first standby durations 123a, second standby durations 123b, and third standby durations 123c. A threshold 128 for the active duration is configured, for example, by a user specification. When the window size is 1, control level 106 determines whether to enable dynamic current scaling during the standby duration 123 of the output data rate time period 120 based on whether the active duration 122 in the same output data rate time period 120 is the same as or exceeds the threshold 128 for the active duration. Because the first activity duration 122a, the second activity duration 122b, and the third activity duration 122c are all shorter than the activity duration threshold 128, the control level 106 determines to enable dynamic current scaling in each of the standby durations 123a, 123b, and 123c of the first activity duration 122a, the second activity duration 122b, and the third activity duration 122c.

[0041] Conversely, when the window size is greater than 1, control level 106 determines whether to apply dynamic current scaling to the last output data rate time period included in the window size. For example... Figure 4As shown, the window size is 3 and includes a first output data rate time period 120a, a second output data rate time period 120b, and a third output data rate time period 120c. Control stage 106 determines whether to perform dynamic current scaling during the third output data rate time period 120c based on whether the first activity duration 122a, the second activity duration 122b, and the third activity duration 122c (within the first, second, and third output data rate time periods 120a, 120b, and 120c) are all shorter than a threshold 128 for the activity duration. The first activity duration 122a, the second activity duration 122b, and the third activity duration 122c are all shorter than the threshold 128. Therefore, control stage 106 performs dynamic current scaling during the third output data rate time period 120c. Control stage 106 causes the current supplied to the regulator to decrease from a first current to a second current during the third standby duration 123c and during the standby duration of subsequent output data rate time periods.

[0042] Figure 5 A method 500 for performing dynamic current scaling is illustrated. In this method, at 502, control stage 106 reads and stores a first timestamp at the start of an active phase. The first timestamp may be the number of cycles of a first clock. The first clock may be a clock faster than the output data rate clock, whereby the output data rate time period may be consistent with the output data rate clock. Control stage 106 may store the first timestamp in one or more registers 114. Control stage 106 may read the first timestamp before starting execution of an algorithm 116 scheduled or pre-executed during the output data rate time period or its active duration.

[0043] At 504, control stage 106 executes one or more algorithms 116 during the active phase. A DCS algorithm 118 can be appended to the end of one or more algorithms 116 and scheduled or reserved for execution during output data rate time periods. After executing one or more algorithms 116, control stage 106 executes a dynamic current scaling algorithm at 506. The same dynamic current scaling algorithm can be appended to algorithms scheduled for execution during various output data rate time periods. At 508, control stage 106 reads and stores a second timestamp. Control stage 106 can store the second timestamp in one or more registers 114.

[0044] At 510, control stage 106 determines the activity duration of the output data rate time period as the difference between the second timestamp and the first timestamp. The activity duration can be in units of the clock cycles of a first clock. The first clock can be an internal clock of control stage 106. At 512, control stage 106 reads the output data rate frequency and determines the output data rate time period as the number of clock cycles of the first clock. The output data rate frequency can be stored in one or more registers 114. The output data rate frequency can be an integer multiple of the frequency of the first clock, and the output data rate time period can be an integer multiple of the cycle of the first clock.

[0045] At 514, control level 106 reads a threshold for the duration of the activity and determines the threshold as the number of clock cycles of the first clock. The threshold can be stored in a second memory 112, which can be RAM. The threshold can also be in units of the first clock cycles. For example, the output data rate time period can be 16 times the first clock cycle, and the threshold can be 8 to represent half of the output data rate time period.

[0046] The second memory 112 may store user-configured parameters, such as thresholds and window sizes. At 516, control stage 106 reads the window size from the second memory 112, for example. At 518, control stage 106 determines whether the window size is 1. In response to determining that the window size is 1, at 520, control stage 106 compares the activity duration with the threshold to determine whether to implement dynamic current scaling. In response to determining that the window size is greater than 1, at 522, control stage 106 compares the maximum activity duration within the window with the threshold to determine whether to implement dynamic current scaling. For example, if the activity duration is five cycles of the first clock and the threshold is eight cycles of the first clock, control stage 106 may implement dynamic current scaling. Conversely, if the activity duration is ten cycles of the first clock and the threshold is eight cycles of the first clock, control stage 106 may avoid implementing dynamic current scaling.

[0047] Note that control phase 106 may include the execution time of DCS algorithm 118 in the activity duration. Because control phase 106 determines the activity duration before completing the execution of DCS algorithm 118, the remaining execution time of DCS algorithm 118 can be added to a second timestamp. The remaining execution time of DCS algorithm 118 may be known and / or predetermined, and may not change from one execution to another. The execution time of DCS algorithm 118 may be relatively small compared to the execution times of multiple algorithms 116a, 116b. The threshold for activity duration can be modified to take into account the execution time of DCS algorithm 118. The threshold for activity duration can be increased to take into account the execution time of DCS algorithm 118 and become reflective of the execution times of multiple algorithms 116a, 116b.

[0048] Figure 6 An example of determining the duration of an activity is shown. A first memory 110 stores multiple algorithms 116a, 116b, ..., 116n for execution during the output data rate time period. The multiple algorithms 116a, 116b, ..., 116n can be executed sequentially. The first memory 110 also stores a DCS algorithm 118 for execution by the control level 106 after the multiple algorithms 116a, 116b, ..., 116n. The control level 106 has a first clock 124 and a second clock 126, which can have frequencies different from the output data rate frequency. Before or at the moment when the control level 106 begins executing the first algorithm 116a of the multiple algorithms 116a, 116b, ..., 116n, the control level 106 determines and stores a first timestamp (T1). After the control level 106 completes executing the last algorithm 116n of the multiple algorithms 116a, 116b, ..., 116n, the control level 106 determines and stores a second timestamp (T2). The first timestamp (T1), the second timestamp (T2), and the threshold for the duration of the activity can each be a count or counter value of the first clock cycle 124.

[0049] Note that in some embodiments, computational activity varies with time and different periods or output data rate time intervals. During computationally intensive periods, the regulator 104 experiences a voltage drop (VREG). To reduce voltage recovery time, the current supplied to the regulator is maintained at a high level without decreasing.

[0050] This paper describes the tuning current consumption for various applications. The duration of the active phase for executing various algorithms is determined. If the active duration is shorter than a threshold, dynamic current scaling of the regulator is activated; this threshold can be programmable.

[0051] The various embodiments described above can be combined to provide further embodiments.

[0052] Based on the detailed description above, these and other changes can be made to the embodiments. Generally, the terminology used in the appended claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full scope of equivalents entitled to be obtained by these claims. Therefore, the claims are not limited to this disclosure.

Claims

1. A system comprising: The regulator is configured to receive input current and provide a regulated voltage; as well as The controller is configured as follows: A threshold for the duration of the received activity; Determine the duration of the first activity within the first output data rate time period among multiple output data rate time periods; The duration of the first activity is compared with a threshold value for the duration of the activity; In response to determining that the duration of the first activity exceeds the threshold, dynamic current scaling of the input current is avoided during the first output data rate time period; as well as In response to determining that the duration of the first activity does not exceed the threshold, the dynamic current scaling is performed on the input current during the first output data rate time period.

2. The system of claim 1, wherein the controller is configured to perform dynamic current scaling during the first output data rate time period by reducing the input current from a first current level to a second current level below the first current level.

3. The system of claim 2, wherein the controller is configured to reduce the input current from the first current level to the second current level during a first standby duration of the first output data rate time period, such that dynamic current scaling is performed during the first output data rate time period, wherein the first standby duration follows the first activity duration of the first output data rate time period.

4. The system of claim 3, wherein the first standby duration is a portion of the first output data rate time period, during which the controller does not execute one or more algorithms scheduled during the first output data rate time period.

5. The system of claim 1, wherein the first activity duration is a portion of the first output data rate time period, during which the controller executes one or more algorithms scheduled during the first output data rate time period.

6. The system of claim 1, wherein the controller is configured to avoid performing the dynamic current scaling by maintaining the input current at a first current level during both the first active duration and the first standby duration of the first output data rate time period.

7. The system of claim 1, wherein the controller is configured to: Indicator of the receive window size; The window size is determined to be greater than 1, where a window size greater than 1 indicates that the controller will evaluate dynamic current scaling based on the number of output data rate time periods specified by the window size. In response to determining that the window size is greater than 1, determine whether the activity duration of one or more output data rate time periods in the plurality of output data rate time periods does not exceed the threshold; as well as In response to determining that the duration of the one or more activities and the duration of the first activity do not exceed the threshold, the dynamic current scaling is performed on the input current during a subsequent output data rate time period after the first output data rate time period and / or the plurality of output data rate time periods, wherein the first output data rate time period is after the one or more output data rate time periods.

8. The system of claim 1, wherein the regulated voltage powers the controller.

9. A controller for a regulator, comprising: The memory is configured to store executable instructions for execution during a first active duration of the first output data rate time period; The control level is configured as follows: A threshold for the duration of the received activity; Determine a first timestamp before executing the executable instructions; Execute the executable instructions; A second timestamp is determined after the executable instructions are executed; The duration of the first activity is determined as the difference between the first timestamp and the second timestamp; Compare the duration of the first activity with the threshold; as well as Whether to reduce the current supplied to the regulator is determined by comparing the duration of the first activity with the threshold in the following ways: in response to determining that the duration of the first activity exceeds the threshold, dynamic current scaling is avoided on the current supplied to the regulator during the first output data rate time period, or in response to determining that the duration of the first activity does not exceed the threshold, dynamic current scaling is performed on the current supplied to the regulator during the first output data rate time period. as well as A dynamic current scaling stage is configured to set the current supplied to the regulator.

10. The controller of claim 9, wherein the control stage is configured to reduce the current supplied to the regulator from a first current level to a second current level in response to determining that the duration of the first activity is less than the threshold.

11. The controller of claim 10, wherein the control stage is configured to reduce the current supplied to the regulator during a first standby duration during the first output data rate time period, wherein the first standby duration follows the first activity duration.

12. The controller of claim 11, wherein the dynamic current scaling stage is configured to increase the current supplied to the regulator from the second current level to the first current level during a second active duration of the second output data rate time period, wherein the second output data rate time period follows the first output data rate time period.

13. The controller of claim 9, wherein the control stage is configured to maintain the level of current supplied to the regulator in response to determining that the duration of the first activity is greater than the threshold.

14. The controller of claim 13, wherein the control stage is configured to maintain the level of the current supplied to the regulator during a first standby duration during the first output data rate time period, wherein the first standby duration follows the first active duration.

15. A method for using a dynamically scaled regulator current, comprising: A threshold for the duration of the received activity; Determine the duration of the first activity within the first output data rate time period among multiple output data rate time periods; The duration of the first activity is compared with the threshold value for the duration of the activity; as well as In response to determining that the duration of the first activity exceeds the threshold, dynamic current scaling of the input current of the regulator is avoided during the first output data rate time period, and in response to determining that the duration of the first activity does not exceed the threshold, the dynamic current scaling of the input current is performed during the first output data rate time period. The regulator receives the input current and provides the regulated voltage.

16. The method of claim 15, wherein performing the dynamic current scaling during the first output data rate time period comprises: The input current is reduced from a first current level to a second current level that is lower than the first current level.

17. The method of claim 16, wherein performing the dynamic current scaling during the first output data rate time period comprises: The input current is reduced from the first current level to the second current level during a first standby duration within the first output data rate time period, wherein the first standby duration follows the first activity duration within the first output data rate time period.

18. The method of claim 15, wherein the first activity duration is a portion of the first output data rate time period, during which the controller executes one or more algorithms scheduled to be executed during the first output data rate time period.

19. The method of claim 15, wherein avoiding the dynamic current scaling comprises: The input current is maintained at a first current level during both the first activity duration and the first standby duration of the first output data rate time period.

20. The method of claim 15, comprising: Indicator of the receive window size; The window size is determined to be greater than 1; In response to determining that the window size is greater than 1, determine whether the activity duration of one or more output data rate time periods in the plurality of output data rate time periods does not exceed the threshold; as well as In response to determining that the duration of the one or more activities and the duration of the first activity do not exceed the threshold, the dynamic current scaling is performed on the input current during a subsequent output data rate time period after the first output data rate time period and / or the plurality of output data rate time periods, wherein the first output data rate time period is after the one or more output data rate time periods.

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