A domain controller, data processor method and device

Abstract

The present application discloses a domain controller, a data processor method and a device, wherein the domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the first processor is used to: send the target data stream to be transmitted to the target conversion chip via a first virtual transmission path constructed in a virtual display screen manner; the target conversion chip is used to: convert the target data stream into a format and send it to the second processor; the second processor is used to: receive the target data stream after format conversion via a second virtual transmission path constructed in a virtual camera manner. This solution can improve the transmission efficiency of data streams.

Description

Technical Field

[0001] The present application relates to the field of automobile technology, and relates to but is not limited to a domain controller, a data processor method and a device. Background Art

[0002] With the continuous development of vehicle technology, the domain controller needs to process more and more data. In order to improve the processing efficiency of the domain controller, two processors are generally used to achieve load balancing.

[0003] Regarding the transmission of video data between two processors, the related technology generally transmits it through Ethernet. Obviously, the amount of video data is generally large, and the real-time requirement is also high. The Ethernet transmission speed is slow and cannot meet the real-time requirements of video data transmission. Summary of the invention

[0004] The present application provides a domain controller, a data processor method and a device, which can improve the transmission efficiency of data streams and meet the real-time requirements of data transmission.

[0005] The technical solution of this application is implemented as follows:

[0006] In a first aspect, the present application provides a domain controller, the domain controller comprising a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip;

[0007] The first processor is used to: send the target data stream to be transmitted to the target conversion chip based on the first virtual transmission path constructed in a virtual display screen manner;

[0008] The target conversion chip is used to: convert the target data stream into a format and then send it to the second processor;

[0009] The second processor is used to: receive the target data stream after format conversion through a second virtual transmission channel constructed based on a virtual camera.

[0010] In a second aspect, the present application provides a data processing method, which is applied to a domain controller, wherein the domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the method includes:

[0011] The first processor obtains a target data stream in a first format to be transmitted;

[0012] The first processor sends the target data stream in the first format to the target conversion chip based on a first virtual transmission path constructed in a virtual display screen manner;

[0013] The target conversion chip converts the target data stream in the first format into a target data stream in a second format;

[0014] The second processor receives the target data stream after format conversion through a second virtual transmission channel constructed based on a virtual camera.

[0015] In a third aspect, the present application further provides a vehicle device, wherein the vehicle device includes any domain controller provided in the first aspect above.

[0016] In a fourth aspect, the present application also provides a storage medium on which a computer program is stored, and the computer program implements the above-mentioned data processing method when executed by a processor.

[0017] The domain controller, data processor method and device provided in the present application, the domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the first processor is used to: send the target data stream to be transmitted to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen; the target conversion chip is used to: convert the format of the target data stream and send it to the second processor; the second processor is used to: receive the target data stream after format conversion through a second virtual transmission path constructed based on a virtual camera.

[0018] It can be seen that: for the solution of the present application, the first processor and the second processor are connected through a conversion chip, thereby building a hardware transmission path, and when transmitting data, a first virtual transmission path is constructed based on a virtual display screen. In this way, when the first processor sends data, it can be based on the first virtual transmission path to achieve a similar effect as sending data to a display screen, thereby improving data transmission efficiency, and a second virtual transmission path is constructed based on a virtual camera. In this way, when the second processor receives data, receiving data based on the second virtual transmission path can be similar to receiving data collected by a camera, thereby improving data transmission efficiency; further, transmission of the target data stream based on the first virtual transmission path, the conversion chip and the second virtual transmission path can further improve the transmission efficiency of the data stream, thereby meeting the real-time requirements of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a first optional structure of a domain controller provided in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of a second optional structure of a domain controller provided in an embodiment of the present application;

[0021] Figure 3 A schematic diagram of a third optional structure of a domain controller provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of a first optional flow chart of a data processing method provided in an embodiment of the present application;

[0023] Figure 5 A second optional flow chart of the data processing method provided in the embodiment of the present application;

[0024] Figure 6 An optional structural diagram of the A and B cores provided in the embodiment of the present application;

[0025] Figure 7 An optional structural diagram of the interface relationship between the A and B cores provided in the embodiment of the present application;

[0026] Figure 8 An optional structural diagram of the software architecture of the A and B cores provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the application will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application.

[0028] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0029] In the following description, the terms "first\second\third" are used only as examples to distinguish different objects, and do not represent a specific order for the objects, nor do they have a limitation on the order of precedence. It is understandable that "first\second\third" can be interchanged with a specific order or order of precedence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0031] The embodiments of the present application provide a data processing method, device, equipment and storage medium. In practical applications, the data processing method can be implemented by a data processing device, and each functional entity in the data processing device can be collaboratively implemented by hardware resources of an electronic device (such as a vehicle device), such as computing resources such as a processor, and communication resources (such as for supporting various communication methods such as optical cables and cellular).

[0032] The following describes various embodiments of the domain controller, data processor method and device provided in the embodiments of the present application.

[0033] In a first aspect, an embodiment of the present application provides a domain controller, which includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the first processor is used to: send a target data stream to be transmitted to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen; the target conversion chip is used to: convert the format of the target data stream and send it to the second processor; the second processor is used to: receive the target data stream after format conversion through a second virtual transmission path constructed based on a virtual camera.

[0034] refer to Figure 1 As shown, the domain controller 10 includes a first processor 101 and a second processor 102 ; the first processor 101 and the second processor 102 are connected via a conversion chip 103 .

[0035] The domain controller 10 may be any domain controller with relevant processing capabilities. Exemplarily, the domain controller may include but is not limited to any of the following: a power domain controller, a chassis domain controller, a cockpit domain controller, an autonomous driving domain controller, and a body domain controller.

[0036] The first processor 101 may refer to a main processor or a sub-processor.

[0037] The second processor 102 is different from the first processor 101. When the first processor 101 refers to a main processor, the second processor 102 refers to a sub-processor; when the first processor 101 refers to a sub-processor, the second processor 102 refers to a main processor.

[0038] Exemplarily, the first processor 101 and the second processor 102 may be integrated into a domain controller (Cabin Domain Controller, CDC) shell.

[0039] One or more operating systems may run in the first processor 101 and the second processor 102 .

[0040] In a possible implementation, the first processor 101 and the second processor 102 may be deployed on different boards. For example, the first processor 101 is deployed on board 1 , and the second processor 102 is deployed on board 2 .

[0041] There can be one or more conversion chips 103, and the data can be configured according to actual needs.

[0042] In a possible implementation, the conversion chip 103 may be deployed on the board 1 or on the board 2. The first processor 101 and the second processor 102 may be directly connected via the conversion chip 103. Alternatively, connectors may be first connected on the board 1 and the board, and then connected via the connector.

[0043] Optionally, the first processor 101 and the second processor 102 may also be connected via Ethernet.

[0044] Optionally, the first processor 101 and the second processor 102 may further include multiple external interfaces, such as a camera, a display screen, a radio, a Wireless Fidelity (WIFI) network, a Universal Serial Bus (USB) device, and the like.

[0045] For the first processor 101:

[0046] The first processor 101 is used to send the target data stream to be transmitted to the target conversion chip based on the first virtual transmission path constructed in a virtual display screen manner.

[0047] The target data stream refers to the data stream to be sent from the first processor to the second processor. The specific type of the target data stream is not limited in the embodiment of the present application, and can be determined according to actual conditions. Exemplarily, the target data stream may include but is not limited to: video data stream, audio data stream, audio and video data stream, etc.

[0048] The first processor 101 may construct a first virtual transmission path based on the virtual display screen, so that the first processor 101 sends the target data stream to the conversion chip in a manner of sending data to the virtual display screen.

[0049] In this way, the data transmission rate between the first processor 101 and the conversion chip 103 can be improved.

[0050] For conversion core 103:

[0051] The conversion core 103 is used to convert the format of the target data stream and then send it to the second processor.

[0052] Here, the type of conversion chip can be configured according to the format actually required to be converted, and the number of conversion chips can be determined according to the number of actual data transmission channels.

[0053] For the second processor 102:

[0054] The second processor 102 is used for receiving the target data stream after format conversion through a second virtual transmission channel constructed based on a virtual camera.

[0055] The second processor 102 can construct a second virtual transmission path based on the virtual camera, so that the second processor 102 receives the target data stream sent by the conversion chip in the manner of receiving data sent by the virtual camera.

[0056] In this way, the data transmission rate between the second processor 102 and the conversion chip 103 can be improved.

[0057] The domain controller provided in the present application includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the first processor is used to: send the target data stream to be transmitted to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen; the target conversion chip is used to: convert the format of the target data stream and send it to the second processor; the second processor is used to: receive the target data stream after format conversion through a second virtual transmission path constructed based on a virtual camera.

[0058] It can be seen that: for the solution of the present application, the first processor and the second processor are connected through a conversion chip, thereby building a hardware transmission path, and when transmitting data, a first virtual transmission path is constructed based on a virtual display screen. In this way, when the first processor sends data, it can be based on the first virtual transmission path to achieve a similar effect as sending data to a display screen, thereby improving data transmission efficiency, and a second virtual transmission path is constructed based on a virtual camera. In this way, when the second processor receives data, receiving data based on the second virtual transmission path can be similar to receiving data collected by a camera, thereby improving data transmission efficiency; further, transmission of the target data stream based on the first virtual transmission path, the conversion chip and the second virtual transmission path can further improve the transmission efficiency of the data stream, thereby meeting the real-time requirements of data transmission.

[0059] The following is an explanation of the process in which the first processor 101 constructs the first virtual transmission path.

[0060] The first processor 101 is also used to: create a virtual display screen and configure target parameters of the virtual display screen; add a first virtual driver for the target conversion chip; and construct the first virtual transmission path at the driver layer based on the virtual display screen and the first virtual driver, so that the first processor sends the target data stream to the target conversion chip based on the first virtual transmission path.

[0061] The first processor first creates a virtual display screen at the output interface, then configures the target parameters of the virtual display screen (for example, layers, resolution, refresh rate, etc.), adds a virtual driver for the target chip, and establishes a connection between the target virtual display screen and the conversion chip, thereby constructing a first virtual transmission path at the driver layer.

[0062] Next, the process of the second processor 102 constructing the second virtual transmission path is described.

[0063] The second processor 102 is also used to: create a virtual camera and configure target parameters of the virtual camera; add a second virtual driver for the target conversion chip; configure a target bus for data transmission; and construct a second virtual transmission path at the driver layer based on the virtual camera, the second virtual driver and the target bus, so that the second processor receives the converted target data stream based on the second virtual transmission path.

[0064] The embodiment of the present application does not limit the process of creating a virtual camera and can be configured according to actual conditions.

[0065] The parameters of the virtual camera here may include but are not limited to the acquisition resolution and the like.

[0066] The target bus for data transmission may be a DCC bus.

[0067] The second processor first creates a virtual camera at the input interface, and then configures the target parameters of the virtual camera (such as resolution, etc.); the first processor then adds a second virtual driver for the target conversion chip; configures the target bus for data transmission; and constructs a second virtual transmission path at the driver layer based on the virtual camera, the second virtual driver and the target bus, so that the second processor receives the converted target data stream based on the second virtual transmission path.

[0068] In this way, the rate at which the second processor receives the target data stream can be increased.

[0069] Next, the function of the target conversion chip 103 will be described.

[0070] The target conversion chip 103 is used to convert the target data stream in the first format into the target data stream in the second format.

[0071] The first format includes: a display serial interface (DSI) format or a standard display interface (DP) format; the second format includes: a camera serial interface (CSI) format.

[0072] It can be understood that the first format here can also be a CSI format, and the second format can also be a DSI format or a DP format. Of course, the first format and the second format can also be other formats, which are not listed here one by one.

[0073] In one possible implementation,

[0074] refer to Figure 2 As shown, the target conversion chip 103 includes a first conversion chip 1031 and a second conversion chip 1032 .

[0075] The first conversion chip 1031 is used to convert the target data stream in the DSI format into the target data stream in the CSI format.

[0076] Exemplarily, the first conversion chip 1031 may be a Longxun 9211 chip.

[0077] The second conversion chip 1032 is used to convert the target data stream in DP format into the target data stream in CSI format.

[0078] Exemplarily, the second conversion chip 1032 may be a Longxun 7911 chip.

[0079] The functions of the domain processor 10 are described below by taking the target data stream including the first map data stream, the first processor 101 as the main processor, the second processor 102 as the sub-processor, and the target conversion chip 103 including the first conversion chip 1031 and the second conversion chip 1032 as an example.

[0080] The first map data includes lane guidance data. In simple terms, the first map data is partial map data, that is, map data of a key area that needs to be displayed.

[0081] The main processor sends the first map data stream to the first conversion chip based on a first virtual transmission path constructed in a virtual display screen manner.

[0082] The first conversion chip converts the format of the first map data stream and sends the converted data to the sub-processor.

[0083] The sub-processor receives the first map data stream after format conversion through a second virtual transmission channel constructed by a virtual camera, superimposes the first map data stream with auxiliary data to obtain a second map data stream; and sends the second map data stream to the second conversion chip through a third virtual transmission channel constructed by a virtual display screen.

[0084] The auxiliary data includes at least one of the following: vehicle model data, instrument data and travel data.

[0085] The cockpit and the controller overlay the first map data and the auxiliary data into one layer through a rendering engine (such as Unity) in the second processor, and use the data overlaid into one image as the second map data.

[0086] In a possible implementation, the second map data may be superimposed with the first map data and the vehicle model data.

[0087] In yet another possible implementation, the second map data may be superimposed with the first map data, instrument data, and travel data.

[0088] In yet another possible implementation, the second map data may be superimposed with the first map data, instrument data, travel data, and vehicle model data.

[0089] The vehicle model here refers to the three-dimensional model of the vehicle equipment to which the domain controller belongs.

[0090] The second conversion chip converts the format of the second map data stream and sends the converted data to the main processor.

[0091] The main processor receives the second map data stream after format conversion through a fourth virtual transmission channel constructed based on a virtual camera, and sends the second map data stream after format conversion to a remote screen for display.

[0092] Exemplarily, the remote screen refers to a display screen located in front of the driver's field of vision and used to replace the instrument panel.

[0093] In this way, the domain processor can superimpose the lane guidance data and auxiliary information through the interaction of the two processors and display them on the remote screen, thereby improving processing efficiency and enhancing the user experience.

[0094] Below, taking the case where the target data stream includes: video data of the occupancy monitoring system (OMS) and / or video data of the driver monitoring system (DMS), the first processor is a sub-processor, and the second processor is a main processor as an example, the function of the domain processor 10 is explained.

[0095] Passenger Monitoring System, a system used to monitor passenger behavior to improve safety.

[0096] The video data of the passenger monitoring system refers to the video data of passengers collected in the passenger monitoring system.

[0097] Driver monitoring system is a system used to monitor driver behavior and improve driving safety.

[0098] The video data of the driver monitoring system refers to the video data of the driver collected by the driver monitoring system.

[0099] The sub-processor sends the video data of the OMS and / or the video data of the DMS in a first format to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen.

[0100] The target conversion chip converts the video data of the OMS and / or the video data of the DMS in a first format into the video data of the OMS and / or the video data of the DMS in a second format.

[0101] The second main processor receives the OMS video data and / or DMS video data in the second format after format conversion through the second virtual transmission channel constructed based on the virtual camera method, so as to process the OMS video data and / or DMS video data in the second format.

[0102] In this way, the collection efficiency of the OMS video data and / or the DMS video data can be improved.

[0103] For example, the domain controller 10 provided in the embodiment of the present application can also be as follows: Figure 3 As shown, reference Figure 3 As shown in the figure, the domain controller 10 includes a first processor 101 and a second processor 102. The first processor 101 is deployed on board A. The second processor 102 and the conversion chip 103 are deployed on board B. The first processor 101 on board A is connected to the connector 104, and the second processor 102 on board B is connected to the conversion chip 103, and then connected to the connector 104 through the conversion chip 103, and then the connection between the two connectors 104 is established to establish the connection between board A and board B.

[0104] The first processor 101 may further include an Ethernet interface 105 , and the second processor 102 may further include an Ethernet interface 105 . The two Ethernet interfaces may be connected to the two connectors 104 respectively, so as to establish an Ethernet connection between the board A and the board B.

[0105] The first processor 101 may also include multiple external interfaces, respectively connected to multiple external devices. For example, the first processor 101 may also be externally connected to: a radio 1011, WIFI 1012, Bluetooth 1013, a microphone 1014, a camera 1015, an external amplifier 1016, a USB 1017, a display screen 1018, etc.

[0106] The second processor 102 may also include multiple external interfaces, respectively connected to multiple external devices. For example, the second processor 102 may also be externally connected to: a display screen 1021, a camera 1022, and the like.

[0107] In a second aspect, an embodiment of the present application provides a data processing method, which is applied to a domain controller. The domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip.

[0108] Figure 4 Schematic diagram of the data processing method of the present application embodiment. Figure 4 As shown, the process may include but is not limited to the following S401 to S404.

[0109] S401: The first processor obtains a target data stream in a first format to be transmitted.

[0110] The embodiment of the present application does not limit the specific type and format of the target data stream in the first format, which can be determined according to actual conditions. For example, the target data stream in the first format can be a video data stream in DSI format. Of course, it can also be a data stream in other formats, which will not be listed here one by one.

[0111] In a possible implementation manner, the target data stream in the first format is a data stream generated by the first processor and to be transmitted to the second processor.

[0112] In another possible implementation, the target data stream in the first format may be a data stream sent by other devices to the first processor, for example, a video data stream of a camera collected by the first processor.

[0113] S402: The first processor sends the target data stream in the first format to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen.

[0114] Here, the first processor first constructs a first virtual transmission path based on the virtual display screen, and then sends the target data stream in the first format to the target conversion chip based on the first virtual transmission path.

[0115] The first virtual transmission path may be pre-constructed, or may be constructed in real time when the target data stream needs to be transmitted.

[0116] The specific construction process and sending process can refer to the description of the function of the first processor in the domain controller, which will not be repeated here.

[0117] S403: The target conversion chip converts the target data stream in the first format into a target data stream in a second format.

[0118] For the specific conversion process, please refer to the description of the function of the target conversion chip in the domain controller, which will not be described here one by one.

[0119] S404: The second processor receives the target data stream after format conversion through a second virtual transmission channel constructed based on a virtual camera.

[0120] Here, the second processor first constructs a second virtual transmission path based on the virtual camera method, and then receives the target data stream after format conversion sent by the target conversion chip based on the second virtual transmission path.

[0121] The second virtual transmission path may be pre-constructed, or may be constructed in real time when the target data stream needs to be received.

[0122] The specific construction process and receiving process can refer to the description of the function of the second processor in the domain controller, which will not be repeated here.

[0123] The data processing method provided in this embodiment of the present application is applied to a domain controller, and the domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; the method includes: the first processor obtains a target data stream in a first format to be transmitted; the first processor sends the target data stream in the first format to the target conversion chip based on a first virtual transmission path constructed by a virtual display screen; the target conversion chip converts the target data stream in the first format into a target data stream in a second format; the second processor receives the target data stream after format conversion through a second virtual transmission path constructed by a virtual camera.

[0124] It can be seen that: for the solution of the present application, the first processor and the second processor are connected through a conversion chip, thereby building a hardware transmission path, and when transmitting data, the first virtual transmission path constructed based on the virtual display screen and the second virtual transmission path constructed based on the virtual camera are used to transmit the target data stream, thereby improving the transmission efficiency of the data stream and meeting the real-time requirements of video data transmission.

[0125] Simply put, when the first processor sends a target data stream to the second processor, for the sender, the target data stream is sent out through the first virtual transmission path constructed based on the virtual display screen at the interface of the first processor, so that the first processor can realize direct data transmission just like sending data to the display screen; for the receiver, the target data is received through the second virtual transmission path constructed based on the virtual camera at the interface of the second processor, so that the second processor can receive the data just like receiving the data sent by the camera, realizing direct data transmission, thereby realizing direct transmission of data between the first processor and the second processor, and the data transmission efficiency is relatively high.

[0126] In a possible implementation manner, the embodiment of the present application may further make a judgment to determine a specific sending method of the first processor to send the target data stream to the second processor.

[0127] refer to Figure 5 As shown in the content, the process may include but is not limited to the following S501 to S503.

[0128] S501. The first processor detects the resolution and transmission rate of the target data stream.

[0129] The embodiments of the present application do not limit the specific method of detecting resolution and transmission rate, which can be determined according to actual needs.

[0130] Exemplarily, the resolution may be obtained by detecting the target data stream, and the transmission rate may be a transmission index directly obtained, or may be obtained by converting other indexes (such as transmission time).

[0131] S502: The first processor determines whether a resolution of the target data stream is greater than a resolution threshold, and whether a transmission rate is greater than a transmission rate threshold.

[0132] The embodiment of the present application does not limit the specific values ​​of the resolution threshold and the transmission rate threshold, and they can be configured according to actual conditions.

[0133] After obtaining the resolution and transmission rate of the target data stream, the first processor compares the resolution with the resolution threshold to determine whether the resolution is greater than the resolution threshold, and compares the transmission rate with the transmission rate threshold to determine whether the transmission rate is greater than the transmission rate threshold.

[0134] S503: When the resolution of the target data stream is greater than a resolution threshold and the transmission rate is greater than a transmission rate threshold, execute the first processor to construct a first virtual transmission path based on a virtual display screen to send the target data stream in the first format to the target conversion chip.

[0135] S503 can be implemented as follows: when the resolution of the target data stream is greater than a resolution threshold and the transmission rate is greater than a transmission rate threshold, executing the first processor to construct a first virtual transmission path based on a virtual display screen to send the target data stream in the first format to the target conversion chip; the target conversion chip converts the target data stream in the first format into a target data stream in a second format; and the second processor constructs a second virtual transmission path based on a virtual camera to receive the target data stream after format conversion.

[0136] It should be noted that, when the resolution of the target data stream is less than or equal to the resolution threshold, or the transmission rate is less than or equal to the transmission rate threshold, the first processor may also send the target data stream to the second processor via Ethernet.

[0137] In this way, the target data stream with high resolution and high transmission rate requirements can be transmitted through the virtual channel to ensure the transmission effect; for the target data stream with low resolution and low transmission rate requirements, the load can also be balanced through Ethernet.

[0138] In practice, it is also possible to judge whether to transmit data through a virtual transmission path based on other parameters. The specific reference type can be configured according to actual needs. For example, the data transmission volume of the target data stream, the transmission delay of the target data stream, and other parameters can also be used as the basis for judgment. For a target data stream with a data transmission volume greater than a transmission volume threshold and a transmission delay less than a delay threshold, the first virtual path and the second virtual path provided in the embodiment of the present application are used for transmission. Of course, other parameters can also be included, which will not be listed here one by one.

[0139] It is understandable that the target data stream may be directly transmitted based on the virtual path without any judgment, which has the characteristic of simple implementation logic.

[0140] It can be understood that the data processing method provided in this embodiment can also be used to process the first map data stream, the first format of OMS video data and / or DMS video data, etc. The specific implementation process can refer to the detailed description of the domain controller side, which will not be repeated here.

[0141] Below, taking the first processor as A core and the second processor as B core as an example, the data processing method provided in the embodiment of the present application is described.

[0142] First, the data transmission process between cores A and B is described.

[0143] Next, the case where core A transmits video data to core B is described.

[0144] For core A, which is the data sender, a virtual display screen is built on the output interface of core A (achieved by setting display screen parameters, including resolution, clock, frame rate, and color). Core A transmits video data to the virtual display screen through a direct video link.

[0145] Then, the data in the display format is converted into data in the camera format through a bridge chip between the A and B cores (equivalent to the above-mentioned conversion chip).

[0146] For the B core, it is the data receiver. A virtual camera is built on the B core (by setting camera parameters, including clock and frame rate), so that B can obtain data from the virtual camera.

[0147] For the case where the B core transmits video data to the A core, please refer to the detailed description of the A core transmitting video data to the B core, which will not be described in detail here.

[0148] Next, the A and B core screen projection configuration process is explained.

[0149] Screen projection from A to B:

[0150] The configuration process of A core is as follows:

[0151] 1. Add a virtual display (Display) and configure the corresponding hardware path, hardware layer, display timing, resolution and refresh rate.

[0152] 2. Add the virtual bridge chip driver and load the adapter driver correctly.

[0153] The configuration process of the B core is as follows: to add a first path between the bridge chip and B;

[0154] 1. Add a virtual camera (Camera), configure the corresponding CSI interface, the usage of the CSI link (Lane) and the collected resolution information.

[0155] 2. Configure the DCC bus, add the Longxun 7911 driver, and open the camera software link.

[0156] Screen projection from B to A:

[0157] The configuration process of B core is as follows:

[0158] 1. Add a display and configure the corresponding hardware path, hardware layer, display timing, resolution and refresh rate.

[0159] 2. Add the virtual bridge chip driver and load the adapter driver correctly.

[0160] The configuration process of A core is as follows:

[0161] 1. Add a camera, configure the corresponding CSI interface, the usage of CSI Lane, and the collected resolution information.

[0162] 2. Configure the DCC bus, add the driver of Longxun 7911, and open the camera software link.

[0163] After configuration, the application can see the virtual display screen and directly refresh the data on the screen. The application on the other end can use the camera to capture data from the camera for business processing.

[0164] Next, the hardware structure of the A and B cores is described.

[0165] refer to Figure 6 The content shown includes: A core 601, B core 602. A core 601 and B core 602 are integrated in the CDC shell. The connection between A core 601 and B core 602 includes: B2B connector 603, Ethernet 604, video conversion transmission 605, high-speed serial computer expansion bus (peripheral component interconnect express, PCIE) 606, physical port (Physical, PHY) 607. Among them, PHY607 can be connected to gateway (GateWay, GW) 6071 through Ethernet, and GW6071 is connected to microcontroller unit (Microcontroller Unit, MCU) 6072 through variable speed CAN bus (CAN with Flexible Data rate, CANFD).

[0166] The A core 601 can be connected to multiple external devices, including: a central control screen 6011, a 2K screen 6012, an analog microphone (MIC) 6013, an analog power amplifier 6014, a connector (AMP) 6015, a USB 6016, an electronic exterior rearview mirror 6017, and a reserved 2K screen 6018.

[0167] The B core 602 can be connected to multiple external devices, including: a reserved 2K screen 6021, a remote screen 6022, a DMS / OMS 6023, and a 360 panoramic camera 6024.

[0168] Next, the interface relationship between the A and B cores is described.

[0169] refer to Figure 7 As shown, the A core 701 is connected to the conversion chip 1 703 (MIPI convert) through the DSI1 interface 7011, the A core 701 is connected to the conversion chip 2 704 (DP2MIPI convert) through the CSI interface 7012, the A core 701 is connected to the remote screen 705 through the DP interface 7013 and DS70UB983, the A core 701 is connected to the central control screen 706 through the DSI0 interface 7014 and DS70UB981, and the A core 701 is connected to the RGMII interface 7021 in the B core 702 through the PCIE interface 7015 and the network converter (Eth Switch).

[0170] The B core 702 is connected to the conversion chip 2 704 (DP2MIPI convert) via the DP interface 7022, the B core 702 is connected to the conversion chip 1 703 (MIPI convert) via the CSI interface 7023, and the B core 702 is connected to the DMS / OMS 707 via the CSI interface 7024 and MAX96712. Figure 7 The dotted line in the figure represents the camera data transmission link, and the solid line represents the display screen data transmission link.

[0171] Next, the software architecture of the A and B cores is described.

[0172] refer to Figure 8 The content shown includes A core 801 and B core 802. Among them, A core 801 includes QNX operating system 8011, Android operating system 8012 and virtual machine (Hypervisor) 8013. B core 802 includes QNX operating system 8021, Android operating system 8022 and virtual machine (Hypervisor) 8023.

[0173] Among them, the data transmission link between A and B cores can refer to Figure 8 The link is shown in solid line.

[0174] For example, core A has complete map data (similar to the map navigation data displayed on the central control screen), and part of the map data (mainly turn arrows, etc.) will be transmitted from core A to core B (corresponding to the virtual display screen) through the virtual display screen. Figure 8 In the B core, this part of the map data and the 3D model (for example, the 3D vehicle model) are superimposed using the unity engine. The purpose is to superimpose the 3D model and part of the map data on one layer. The superimposed data is then transmitted from the B core to the A core through the virtual display screen (corresponding to Figure 8 In the DP to Cam driver line), the A core calls the display interface of the remote screen to display on the remote screen.

[0175] The display effects achieved include: complete map data is displayed on the central control screen, and partial map data and 3D models are displayed on the remote screen.

[0176] It should be noted that the data processing device provided in the embodiment of the present application includes the various units included, which can be implemented by a processor in an electronic device; of course, it can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU, Central Processing Unit), a microprocessor (MPU, Micro Processor Unit), a digital signal processor (DSP, Digital Signal Processor) or a field programmable gate array (FPGA, Field-Programmable Gate Array), etc.

[0177] The description of the above vehicle equipment and storage medium embodiments is similar to the description of the above domain control side embodiments, and has similar beneficial effects as the domain control side embodiments. For technical details not disclosed in the device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0178] It should be noted that in the embodiment of the present application, if the above-mentioned data processing method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, which is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.

[0179] In a third aspect, an embodiment of the present application provides a vehicle device, which may include any domain controller provided in the first aspect.

[0180] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, which, when running on a computer, is used to implement any one of the data processing methods provided in the second aspect above.

[0181] It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0182] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in some embodiments" appearing throughout the specification may not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. The above-mentioned sequence numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments.

[0183] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0184] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0185] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0186] In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be separately configured as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0187] A person skilled in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, etc., various media that can store program codes.

[0188] Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product that contributes to the relevant technology. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0189] The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A domain controller, characterized in that: The domain controller includes a first processor and a second processor; the first processor and the second processor are connected via a target conversion chip; The first processor is used to: send the target data stream to be transmitted to the target conversion chip through a first virtual transmission path constructed in the driver layer based on the virtual display screen mode; the output of the first processor in the first virtual transmission path is a virtual display screen; The target conversion chip is used to: convert the target data stream in the first format into the target data stream in the second format and then send it to the second processor; The second processor is used to: receive the target data stream in the second format after format conversion through a second virtual transmission channel constructed in the driver layer based on a virtual camera method; The input of the second processor in the second virtual transmission path is a virtual camera.

2. The domain controller according to claim 1, characterized in that: The first processor is further configured to: Creating a virtual display screen and configuring target parameters of the virtual display screen; Adding a first virtual driver of the target conversion chip; The first virtual transmission path is constructed at the driver layer based on the virtual display screen and the first virtual driver, so that the first processor sends the target data stream to the target conversion chip based on the first virtual transmission path.

3. The domain controller according to claim 1, characterized in that: The second processor is further configured to: Creating a virtual camera and configuring target parameters of the virtual camera; Adding a second virtual driver of the target conversion chip; configuring a target bus for data transfer; A second virtual transmission path is constructed at the driver layer based on the virtual camera, the second virtual driver and the target bus, so that the second processor receives the converted target data stream based on the second virtual transmission path.

4. The domain controller according to claim 1, characterized in that: The target conversion chip is used to convert the target data stream in a first format into the target data stream in a second format; The first format includes: a display serial interface DSI format or a standard display interface DP format; the second format includes: a camera serial interface CSI format.

5. The domain controller according to claim 4, characterized in that: The target conversion chip includes a first conversion chip and a second conversion chip; The first conversion chip is used to: convert the target data stream in DSI format into the target data stream in CSI format; The second conversion chip is used to convert the target data stream in DP format into the target data stream in CSI format.

6. The domain controller according to claim 1, characterized in that: In the case where the target data stream includes a first map data stream, the first processor is a main processor, the second processor is a sub-processor, and the target conversion chip includes a first conversion chip and a second conversion chip, The main processor sends the first map data stream to the first conversion chip based on a first virtual transmission path constructed in a virtual display screen manner; The first conversion chip converts the format of the first map data stream and sends it to the sub-processor; The sub-processor receives the first map data stream after format conversion through a second virtual transmission channel constructed by a virtual camera, and superimposes the first map data stream with auxiliary data to obtain a second map data stream; and sending the third virtual transmission path constructed by the second map data stream based on the virtual display screen to the second conversion chip; The second conversion chip converts the format of the second map data stream and sends it to the main processor; The main processor receives the second map data stream after format conversion via a fourth virtual transmission path constructed by a virtual camera method; The second map data stream after the format conversion is sent to the remote screen for display.

7. The domain controller according to claim 1, characterized in that: In the case where the target data stream includes: video data of a passenger monitoring system OMS and / or video data of a driver monitoring system DMS, the first processor is a sub-processor, and the second processor is a main processor, The sub-processor sends the video data of the OMS and / or the video data of the DMS in the first format to the target conversion chip through a first virtual transmission path constructed based on a virtual display screen; The target conversion chip converts the video data of the OMS and / or the video data of the DMS in the first format into the video data of the OMS and / or the video data of the DMS in the second format; The main processor receives the OMS video data and / or DMS video data in the second format after format conversion through a second virtual transmission channel constructed based on the virtual camera method to process the OMS video data and / or DMS video data in the second format.

8. A data processing method, characterized in that: The method is applied to a domain controller, the domain controller comprising a first processor and a second processor; The first processor and the second processor are connected via a target conversion chip; the method comprises: The first processor obtains a target data stream in a first format to be transmitted; The first processor sends the target data stream in the first format to the target conversion chip through a first virtual transmission path constructed at the driver layer based on the virtual display screen mode; The target conversion chip converts the target data stream in the first format into a target data stream in a second format; The second processor receives the target data stream in the second format after format conversion through a second virtual transmission channel constructed at the driver layer based on the virtual camera method.

9. The method according to claim 8, characterized in that Before the first processor sends the target data stream in the first format to the target conversion chip through the first virtual transmission path constructed based on the virtual display screen, the method further includes: The first processor detects the resolution and transmission rate of the target data stream; Determine whether the resolution of the target data stream is greater than a resolution threshold, and whether the transmission rate is greater than a transmission rate threshold; When the resolution of the target data stream is greater than a resolution threshold and the transmission rate is greater than a transmission rate threshold, the first processor executes a first virtual transmission path constructed in a driver layer based on a virtual display screen to send the target data stream in the first format to the target conversion chip.

10. A vehicle device, characterized in that: The vehicle equipment includes the domain controller according to any one of claims 1 to 7.

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