Dual temperature coefficient low dropout linear regulator circuit and power amplifier circuit thereof
By designing a dual temperature coefficient LDO circuit, utilizing a current mirror structure and current sources with different temperature coefficients, the problems of output voltage matching and circuit complexity in power amplifier design were solved, and the stability and reliability were improved under extreme temperature environments.
Patent Information
- Application Number
- CN202310838707.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-07
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2043-07-07
AI Technical Summary
In power amplifier design, existing technologies struggle to achieve the stability and reliability of dual temperature coefficient LDOs, especially in extreme temperature environments, where issues such as output voltage matching and circuit design complexity arise.
A dual temperature coefficient LDO circuit was designed, including a temperature coefficient adjustment circuit, a buffer, a temperature coefficient adjustment resistor, and an LDO unit. By configuring different output port connection relationships, the dual temperature coefficient of the LDO output voltage in various forms can be realized. The temperature coefficient of the output voltage is adjusted by using a current mirror structure composed of a reference current mirror circuit and an adjustment current mirror circuit, combined with PTAT and CTAT current sources.
It improves the output stability, temperature stability, and noise immunity of the power amplifier, enhances the system's reliability and anti-interference capabilities, and is suitable for extreme temperature environments.
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Figure CN117111674B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of analog integrated circuit design, and more particularly, to a dual-temperature-coefficient low-dropout linear regulator (LDO) circuit and a power amplifier (PA) circuit comprising the same. BACKGROUND
[0002] Low-dropout linear regulators (LDOs) with temperature coefficients are widely used in many electronic devices, especially for applications that require stable power supply voltage. LDOs with temperature coefficients can automatically adjust the output voltage to adapt to different temperature environments, thereby providing more stable power supply voltage, which helps to improve the performance and reliability of the device. In the design of power amplifiers (PAs), using LDOs with temperature coefficients can provide the following benefits: (1) improve the temperature stability of the power amplifier: due to the influence of temperature coefficient, LDOs with temperature coefficients can automatically adjust the output voltage to offset the influence of temperature on the power supply voltage, thereby improving the temperature stability of the power amplifier; (2) improve the output stability: LDOs with temperature coefficients can automatically adjust the output voltage at different temperatures, thereby maintaining a relatively stable output voltage, thereby improving the output stability of the power amplifier; (3) improve the reliability of the system: using LDOs with temperature coefficients can reduce the fluctuation of the power supply voltage in the system, reduce the instability of the output of the power amplifier, thereby improving the reliability and anti-interference ability of the system. In summary, using LDOs with temperature coefficients in the design of power amplifiers can improve the temperature stability, output stability and reliability of the system, thereby playing an important role in improving the performance and reliability of the power amplifier.
[0003] In a conventional PA circuit design, the LDO is configured to have a single temperature coefficient. The usual method to adjust the LDO temperature coefficient is to select different input reference voltages, which are typically derived from the output of a bandgap reference source, where the temperature coefficient can be positive, negative, or zero. A dual-temperature-coefficient LDO, as a special LDO design, can provide positive and negative temperature coefficients of output in different temperature ranges. Such a LDO usually consists of two different types of regulators, each with a different temperature coefficient. For example, the first regulator in a dual-temperature-coefficient LDO usually has a positive temperature coefficient and can be used to provide higher voltage stability in low-temperature environments; while the second regulator usually has a negative temperature coefficient and can be used to provide lower voltage stability in high-temperature environments. In the middle temperature range, both regulators can work simultaneously to provide a relatively smooth output voltage. Dual-temperature-coefficient LDOs have a wide range of applications, especially in applications that require operation in extreme temperature environments. For example, in the fields of aerospace, automotive, and industrial control, dual-temperature-coefficient LDOs can be used to provide high-precision, high-reliability power supply voltage outputs.
[0004] In power amplifier (PA) design, using an LDO with dual temperature coefficients can bring the following benefits: (1) higher output stability: compared with an LDO with a single temperature coefficient, an LDO with dual temperature coefficients can provide a more stable output voltage in a wider temperature range, for example, at low temperatures, the LDO will provide a positive temperature coefficient of voltage output, while at high temperatures, it will provide a negative temperature coefficient of voltage output, so as to maintain a relatively stable output voltage at different temperatures; (2) higher temperature stability: an LDO with dual temperature coefficients can automatically adjust the output voltage according to the ambient temperature, thereby improving the temperature stability of the system, for example, at low temperatures, the LDO will increase the output voltage to offset the effects of temperature, while at high temperatures, the LDO will reduce the output voltage to maintain output stability; (3) higher noise immunity: an LDO with dual temperature coefficients can offset the effects of power supply noise on the output, thereby improving the noise immunity of the system (this is very important in PA design, as power amplifiers are very sensitive to power supply noise); (4) higher reliability: an LDO with dual temperature coefficients can reduce fluctuations in the power supply voltage in the system, reducing the instability of the power amplifier output, thereby improving the reliability and anti-interference ability of the system. In summary, using an LDO with dual temperature coefficients in power amplifier design can improve output stability, temperature stability, noise immunity, and reliability, thereby playing an important role in improving the performance and reliability of power amplifiers.
[0005] However, there are some difficulties in the design of dual-temperature coefficient LDO compared to single-temperature coefficient LDO, which need to consider the following factors: (1) Temperature coefficient matching: Since the dual-temperature coefficient LDO has two temperature coefficients, it is necessary to ensure that the matching of the two temperature coefficients is very high, otherwise it will cause the output voltage to drift unstable; (2) Temperature range selection: In order to realize the dual-temperature coefficient LDO, two different temperature ranges need to be selected, improper selection may cause the system to be unstable or the output voltage to be discontinuous; (3) Circuit design complexity: Dual-temperature coefficient LDO needs to increase more circuits to realize the control of two temperature coefficients, which will increase the complexity of circuit design and manufacturing cost; and (4) Stability consideration: When using dual-temperature coefficient LDO, attention needs to be paid to stability problems, since dual-temperature coefficient LDO has more control circuits, therefore, in the design, the problem of output voltage stability needs to be considered to ensure that the circuit can maintain stable output voltage at different temperatures. Therefore, when designing dual-temperature coefficient LDO, special attention needs to be paid to the influence of the above factors, and corresponding measures need to be taken to solve these problems to ensure the stability and reliability of the circuit. SUMMARY
[0006] The present application provides a dual-temperature coefficient LDO circuit, which comprises a temperature coefficient adjustment circuit, a buffer, a temperature coefficient adjustment resistor and an LDO unit. By configuring different output ports of the temperature coefficient adjustment circuit, the LDO output voltage Vout can have multiple forms of dual-temperature coefficient. Using LDO with dual-temperature coefficient can improve the output stability, temperature stability, noise immunity and reliability in power amplifier design, thereby playing an important role in improving the performance and reliability of power amplifier.
[0007] One aspect of the present application provides a dual-temperature coefficient LDO circuit, comprising: a buffer configured to receive an input reference signal, and its output end is connected to a temperature coefficient adjustment resistor; a temperature coefficient adjustment resistor configured between the output end of the buffer and the input end of the LDO unit; a temperature coefficient adjustment circuit containing current output ports and current draw ports configured to have different temperature coefficients, and the current output ports or current draw ports are connected to the input end of the LDO unit through a control switch circuit; and an LDO unit whose input end is connected to the temperature coefficient adjustment resistor and the control switch circuit, and whose output end is connected to the output end of the LDO circuit.
[0008] One aspect of the present invention proposes a dual temperature coefficient LDO circuit, wherein the temperature coefficient adjustment circuit comprises a reference current mirror circuit, an adjustment current mirror circuit, a current supply current mirror circuit, and a current sink current mirror circuit, wherein a first current branch of the reference current mirror circuit is connected to a reference current source and a second current branch thereof is connected to a first current node; a third current branch of the adjustment current mirror circuit is connected to an adjustment current source and a fourth current branch thereof is connected to the first current node; a fifth current branch of the current supply current mirror circuit is connected to the first current node, a sixth current branch thereof is connected to a second current node, and a seventh current branch thereof is connected to a current output port; and an eighth current branch of the current sink current mirror circuit is connected to the second current node and a ninth current branch thereof is connected to a current sink port, and wherein the second current branch of the reference current mirror circuit and the fifth current branch of the current supply current mirror circuit provide currents to the third current branch of the adjustment current mirror circuit; and wherein the sixth current branch of the current supply current mirror circuit and the eighth current branch of the current sink current mirror circuit form a current path between a power supply voltage to a ground node.
[0009] One aspect of the present disclosure provides a dual temperature coefficient LDO circuit, wherein the regulating current mirror circuit includes a first NMOS transistor and a first NMOS transistor, the reference current mirror circuit includes a first PMOS transistor and a second PMOS transistor, the current providing current mirror circuit includes a third PMOS transistor, a fourth PMOS transistor and a fifth PMOS transistor, and the current sinking current mirror circuit includes a third NMOS transistor and a fourth NMOS transistor, wherein the regulating current source is connected to the drain and gate of the first NMOS transistor, the source of the first NMOS transistor is grounded, the source of the second NOMS transistor is grounded, and the gate of the second NOMS transistor is connected to the gate of the first NMOS transistor, the drain of the second NMOS transistor is connected to the drain of the second PMOS transistor, the sources of the first PMOS transistor and the second PMOS transistor are connected to a power supply voltage node, the gate of the second PMOS transistor is connected to the gate of the first PMOS transistor, and the drain and gate of the first PMOS transistor are connected to a reference current source, the gate and drain of the third PMOS transistor are connected to the drain of the second PMOS transistor, the gate of the third PMOS transistor is also connected to the gate of the fourth PMOS transistor and the gate of the fifth PMOS transistor, the drain of the fourth PMOS transistor is connected to the drain of the third NMOS transistor, the drain of the fifth PMOS transistor is connected to a current output port, and the sources of the third PMOS transistor, the fourth PMOS transistor and the fifth PMOS transistor are connected to the power supply voltage node, the gate of the third NMOS transistor is connected to the drain of the third NMOS transistor, the gate of the third NMOS transistor is connected to the gate of the fourth NMOS transistor, the drain of the fourth NMOS transistor is connected to a current sinking port, and the sources of the third NMOS transistor and the fourth NMOS transistor are grounded.
[0010] One aspect of the present disclosure provides a dual temperature coefficient LDO circuit, wherein the reference current source is configured as a current source with zero temperature coefficient.
[0011] One aspect of the present disclosure provides a dual temperature coefficient LDO circuit, wherein the reference current source is configured as a VBG / R circuit.
[0012] One aspect of the present disclosure provides a dual temperature coefficient LDO circuit, wherein the regulating current source is configured as an absolute temperature proportional PTAT current source, and wherein when an LDO circuit output voltage with a positive temperature coefficient is needed, a current output port of the temperature coefficient regulating circuit is connected to an input terminal of an LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is needed, a current sinking port of the temperature coefficient regulating circuit is connected to the input terminal of the LDO unit.
[0013] One aspect of the present invention proposes a dual temperature coefficient LDO circuit, wherein the regulating current source is configured as an absolute temperature inverse CTAT current source, and wherein a current draw port of a temperature coefficient regulating circuit is connected to an input of the LDO unit when an LDO circuit output voltage with a positive temperature coefficient is required, and a current output port of the temperature coefficient regulating circuit is connected to the input of the LDO unit when an LDO circuit output voltage with a negative temperature coefficient is required.
[0014] One aspect of the present invention proposes a dual temperature coefficient LDO circuit, wherein the input reference signal is configured to have a zero temperature coefficient, a positive temperature coefficient or a negative temperature coefficient.
[0015] One aspect of the present invention proposes a dual temperature coefficient LDO circuit, wherein the input reference signal is provided by an output of a bandgap reference source.
[0016] One aspect of the present invention proposes a power amplifier circuit comprising a dual temperature coefficient LDO circuit according to any one of the aspects described above, a biasing circuit and an amplifier unit, wherein the dual temperature coefficient LDO circuit is configured to supply power to the biasing circuit, and the biasing circuit is configured to provide a bias voltage to the amplifier unit in the power amplifier circuit. BRIEF DESCRIPTION OF DRAWINGS
[0017] Figure 1 is a schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present invention;
[0018] Figure 2 is a schematic diagram illustrating a temperature coefficient regulating circuit of a dual temperature coefficient LDO circuit according to an embodiment of the present invention;
[0019] Figure 3 is a circuit schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present invention;
[0020] Figure 4 is a circuit schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to another embodiment of the present invention;
[0021] Figure 5 is a schematic diagram illustrating a circuit effect of a dual temperature coefficient LDO circuit according to an embodiment of the present invention; and
[0022] Figure 6 is a schematic diagram illustrating a power amplifier PA circuit with a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present invention. DETAILED DESCRIPTION
[0023] Before proceeding with the detailed description below, it may be advantageous to define certain words and phrases used throughout this patent document. The terms “coupled,” “connected,” and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are physically in contact with each other. The terms “transmit,” “receive,” and “communicate,” and their derivatives cover both direct and indirect communication. The terms “comprise,” “include,” and their derivatives refer to, but are not limited to, those including, those including, those including, those including. The term “or” is inclusive, meaning and / or. The phrase “associated with,” and its derivatives refer to, including, being contained within, interconnected, containing, being included in, being connected or connected to, coupled or coupled to, communicating with, cooperating, intertwining, juxtaposed, proximate, bound or bound to, having, having attributes, having a relationship or being related to, etc. The term “controller” refers to any device, system, or part thereof that controls at least one operation. Such a controller may be implemented in hardware, or a combination of hardware and software and / or firmware. The functionality associated with any particular controller may be centralized or distributed, local or remote. The phrase "at least one" when used with a list of items means that different combinations of one or more of the listed items may be used, and that only one item from the list may be required. For example, "at least one of A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.
[0024] Definitions of other specific words and phrases are provided throughout this patent document. Those skilled in the art will understand that, in many, if not most, cases, such definitions apply to the prior and future use of the words and phrases thus defined.
[0025] In this patent document, the application combination of modules and the hierarchical division of sub-modules are for illustrative purposes only. Without departing from the scope of this disclosure, the application combination of modules and the hierarchical division of sub-modules can be in different ways.
[0026] Figure 1 This is a schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present invention.
[0027] like Figure 1As shown, the dual temperature coefficient LDO circuit according to an embodiment of the present invention mainly includes: a temperature coefficient adjustment circuit (TC Adjust), a buffer, a temperature coefficient adjustment resistor R1, and an LDO unit. The input of the buffer is connected to port Vref0, the output of the buffer is connected to the temperature coefficient adjustment resistor R1, the other end of the temperature coefficient adjustment resistor is connected to the input of the LDO unit, the output of the temperature coefficient adjustment circuit is connected to the input of the LDO unit, and the output of the LDO unit is connected to port Vout. By configuring the connection relationship between different output ports of the temperature coefficient adjustment circuit and the LDO unit, for example, by controlling a switching circuit, the output voltage Vout of the LDO circuit can have various forms of dual temperature coefficients.
[0028] Figure 2 This is a schematic diagram showing the temperature coefficient adjustment circuit of a dual temperature coefficient LDO circuit according to an embodiment of the present invention.
[0029] like Figure 2 As shown, the temperature coefficient adjustment circuit (TC Adjust) includes: a current source I_ref (reference current source), a current source I_tc (adjustment current source), transistors MN1, MN2, MN3, MN4, MP1, MP2, MP3, MP4, MP5, port I_source, and port I_sink. The current source I_tc is connected to the drain and gate of transistor MN1, and the source of transistor MN1 is grounded. Transistors MN2 and MN1 form a current mirror structure 202. The source of transistor MN2 is grounded, and its gate is connected to the gate of transistor MN1. The drain of transistor MN2 is connected to the drain of transistor MP2. The source of transistor MP2 is connected to the power supply, and the gates of transistor MP2 and MP1 are connected, forming a current mirror structure 201. The source of transistor MP1 is connected to the power supply, and its drain and gate are connected to the current source I_ref. Transistors MP3, MP4, and MP5 form a current mirror structure 203. The gate and drain of transistor MP3 are connected to the drain of transistor MP2, and the drain of transistor MP4 is connected to the drain of transistor MN3. The drain of transistor MP5 is connected to port I_source (current output port). Transistors MN3 and MN4 form a current mirror structure 204. The gate and drain of transistor MN3 are connected, and the drain of transistor MN4 is connected to port Isink (current draw port). The above temperature coefficient adjustment circuit (TC Adjust) has two current output ports, where I_source has the ability to output current, and I_sink has the ability to draw current. By configuring the connection relationships of different output ports of the temperature coefficient adjustment circuit, the output voltage Vout of the LDO circuit can have various forms of dual temperature coefficients.
[0030] Embodiments of the present application provide a dual temperature coefficient LDO circuit, which comprises a temperature coefficient adjustment circuit, a buffer, a temperature coefficient adjustment resistor and an LDO unit. By configuring the connection relationship of different output ports of the temperature coefficient adjustment circuit, the output voltage Vout of the LDO circuit can have multiple forms of dual temperature coefficients.
[0031] Figure 3 is a circuit schematic diagram showing a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present application.
[0032] Reference Figure 3 , wherein the input port Vref0 is an input reference signal of the LDO circuit, generally from the output of a bandgap reference source. The bandgap reference source can provide a positive temperature coefficient Vref0, a negative temperature coefficient Vref0 or a zero temperature coefficient Vref0, which can be selected according to the actual specific application requirements. In this embodiment, the selected Vref0 has a zero temperature coefficient, i.e. the output voltage of Vref0 does not change with temperature. The function of the buffer is to change the input reference signal Vref0 into a signal Vref1 with current driving capability, so as to solve the problem that the output voltage Vref0 of the general bandgap reference source does not have current driving capability. Assuming that the output end of the temperature coefficient adjustment circuit and the input end of the LDO unit are disconnected, the temperature coefficient of the output voltage of the LDO unit depends on the temperature coefficient of Vref0 and the amplification multiple of the loop of the LDO unit to the input signal. In this embodiment, Vref0 is selected to have a zero temperature coefficient, so if the output end of the temperature coefficient adjustment circuit is not connected to the input end of the LDO unit, the output voltage of the LDO unit has a zero temperature coefficient.
[0033] When the output port I_source (current output port) of the temperature coefficient adjustment circuit is connected to the input end node Vref2 of the LDO unit, the LDO circuit is analyzed below according to the working conditions of the circuit at normal temperature (critical temperature t0), low temperature and high temperature.
[0034] According to an embodiment of the present application, the current source I_ref (reference current source) of the temperature coefficient adjustment circuit is configured as a current source with zero temperature coefficient, which can be implemented by a traditional VBG / R circuit. In addition, the current source I_tc (adjustment current source) of the temperature coefficient adjustment circuit is configured as a Proportional to Absolute Temperature (PTAT) current source, which can be provided by a bandgap reference source. In circuit design, a PTAT circuit is configured as a circuit whose output current is proportional to absolute temperature. According to an embodiment of the present application, the normal temperature 25 degrees is set as the turning point of the LDO temperature coefficient, and transistors MN1 and MN2 are configured to have the same size, and transistors MP1 and MP2 are configured to have the same size.
[0035] At the normal temperature 25 degrees, let the current I_ref = I_tc. Since MP1 and MP2 constitute a current mirror, it can be known that I_MP2 = I_ref, and since MN1 and MN2 constitute a current mirror, it can be known that I_MN2 = I_tc, so it can be known that at the normal temperature 25 degrees, I_MN2 = I_MP2. At this time, MP3 has no current, and since MP3, MP4 and MP5 constitute a current mirror, it can be known that the current output port I_source has no output current. The output Vout of the LDO circuit = f(Vref0), and it has a zero temperature coefficient.
[0036] Since I_tc is configured as a PTAT current, when the temperature is lower than 25 degrees, I_tc is less than I_ref. Since MP1 and MP2 constitute a current mirror, it can be known that I_MP2 = I_ref, and since MN1 and MN2 constitute a current mirror, it can be known that I_MN2 = I_tc, so it can be known that when the temperature is lower than 25 degrees, I_MP2 is greater than I_MN2. At this time, the working state of transistor MP2 will enter the linear region from the saturation region, and the drain voltage of transistor MP2 will rise, forcing the current I_MP2 to decrease to the same value as the current I_MN2. At this time, MP3 has no current, and since MP3, MP4 and MP5 constitute a current mirror, it can be known that the current output port I_source has no output current. The output Vout of the LDO circuit = f(Vref0), and it has a zero temperature coefficient.
[0037] Since I_tc is configured as a PTAT current, when the temperature is higher than 25 degrees, I_tc is greater than I_ref. Since MP1 and MP2 constitute a current mirror, it can be known that I_MP2 = I_ref, and since MN1 and MN2 constitute a current mirror, it can be known that I_MN2 = I_tc, thus it can be known that when the temperature is higher than 25 degrees, I_MP2 is less than I_MN2, at this time, the working state of transistor MP3 will enter the saturation zone from the cut-off zone, and the transistor MP3 and the transistor MP2 simultaneously output the current, so that I_MP2 + I_MP3 = I_MN2. Since MP3, MP4 and MP5 constitute a current mirror, it can be known that the current output port I_source has an output current, and the current flows through the temperature coefficient adjusting resistor R1 to lift the voltage of the node Vref2. So that the output Vout of the LDO circuit = f(Vref0 + I source ×R1). Since the current output port I_source has a positive temperature coefficient, the output voltage of the LDO circuit has a positive temperature coefficient after the temperature is greater than 25 degrees.
[0038] Figure 5 is a schematic diagram showing the circuit effect of the dual-temperature-coefficient LDO circuit according to an embodiment of the present application.
[0039] Reference Figure 5 Part A in FIG. 1, wherein when t0 is set to 25 degrees, when the temperature is less than t0, the LDO output voltage has a zero temperature coefficient, and after the temperature is greater than t0, the LDO output voltage has a positive temperature coefficient, and the positive temperature coefficient can be adjusted and determined by the resistance value of the temperature coefficient adjusting resistor R1.
[0040] According to another embodiment of the present application, the adjusting current source I_tc can also be configured as a complementary to absolute temperature (CTAT) current source. Unlike the PTAT circuit, the output current of the CTAT circuit is inversely proportional to the absolute temperature, that is, it has a negative temperature coefficient. Similar to the above analysis method, the following analysis results can be obtained: when the temperature t0 is equal to 25 degrees, the output Vout of the LDO circuit = f(Vref0), and it has a zero temperature coefficient. When the temperature is less than 25 degrees, the output Vout of the LDO circuit = f(Vref0 + I source ×R1), and the current output port I_source has a negative temperature coefficient; when the temperature t0 is greater than 25 degrees, the output Vout of the LDO circuit = f(Vref0), and it has a zero temperature coefficient. The effect of the above embodiment is shown in Figure 5wherein, in the case that the temperature t0 is set to 25 degrees, the LDO circuit output voltage has a negative temperature coefficient when the temperature is less than t0, and the LDO circuit output voltage has a zero temperature coefficient when the temperature is greater than t0, wherein the negative temperature coefficient can be adjusted and determined by the resistance of the temperature coefficient adjustment resistor R1.
[0041] Figure 4 is a circuit schematic diagram showing a dual temperature coefficient low dropout linear regulator (LDO) circuit according to another embodiment of the present application.
[0042] Reference Figure 4 wherein the input port Vref0 is the input reference signal of the LDO circuit, which is generally from the output of a bandgap reference source. The bandgap reference source can provide a positive temperature coefficient Vref0, a negative temperature coefficient Vref0 or a zero temperature coefficient Vref0, which can be selected according to the actual specific application requirements. According to the embodiment of the present application, Vref0 is configured to have a zero temperature coefficient, i.e. the output voltage of Vref0 does not change with temperature. The function of the buffer is to change the input signal Vref0 into a signal Vref1 with current driving capability, so as to solve the problem that the output voltage Vref0 of the general bandgap reference source does not have current driving capability. Assuming that the output end of the temperature coefficient adjustment circuit and the input end of the LDO unit are disconnected, the temperature coefficient of the output voltage of the LDO unit depends on the temperature coefficient of Vref0 and the amplification multiple of the input signal by the loop of the LDO unit. Since Vref0 has a zero temperature coefficient in the present embodiment, if the output end of the temperature coefficient adjustment circuit is not connected to the input end of the LDO unit, the output voltage of the LDO unit has a zero temperature coefficient.
[0043] When the output port I_sink (current sink port) of the temperature coefficient adjustment circuit is connected to the input end node Vref2 of the LDO unit, the LDO circuit is analyzed as follows according to the working conditions of the circuit at normal temperature, low temperature and high temperature.
[0044] According to the embodiment of the present application, the current source I_ref (reference current source) of the temperature coefficient adjustment circuit is configured as a current source with a zero temperature coefficient, which can be realized by a conventional VBG / R circuit. In addition, the current source I_tc (adjustment current source) of the temperature coefficient adjustment circuit is configured as a Proportional to Absolute Temperature (PTAT) current source, which can be provided by a bandgap reference source. According to one embodiment of the present application, the normal temperature 25 degrees is set as the turning point of the LDO temperature coefficient, and the transistors MN1 and MN2 are configured to have the same size, and the transistors MP1 and MP2 are configured to have the same size.
[0045] At room temperature 25 degrees, let the current I_ref = I_tc. Since MP1 and MP2 constitute a current mirror, it is known that I_MP2 = I_ref, since MN1 and MN2 constitute a current mirror, it is known that I_MN2 = I_tc, so it is known that at room temperature 25 degrees, I_MN2 = I_MP2. At this time, MP3 has no current, since MP3, MP4 constitute a current mirror, MN3 and MN3 constitute a current mirror, it is known that the current sink port I_sink has no sink current. The output of the LDO circuit Vout = f(Vref0), and it has a zero temperature coefficient.
[0046] Since I_tc is configured as a PTAT current, when the temperature is lower than 25 degrees, I_tc is less than I_ref. Since MP1 and MP2 constitute a current mirror, it is known that I_MP2 = I_ref, since MN1 and MN2 constitute a current mirror, it is known that I_MN2 = I_tc, so it is known that when the temperature is lower than 25 degrees, I_MP2 is greater than I_MN2, at this time, the working state of transistor MP2 will enter from the saturation region to the linear region, the leakage voltage of transistor MP2 will rise, forcing the current of I_MP2 to reduce to the same value as the current of I_MN2, at this time, MP3 has no current, since MP3, MP4 constitute a current mirror, MN3 and MN3 constitute a current mirror, it is known that the current sink port I_sink has no sink current. The output of the LDO circuit Vout = f(Vref0), and it has a zero temperature coefficient.
[0047] Since I_tc is configured as a PTAT current, when the temperature is higher than 25 degrees, I_tc is greater than I_ref. Since MP1 and MP2 constitute a current mirror, it is known that I_MP2 = I_ref, since MN1 and MN2 constitute a current mirror, it is known that I_MN2 = I_tc, so it is known that when the temperature is higher than 25 degrees, I_MP2 is less than I_MN2, at this time, the working state of transistor MP3 will enter from the cutoff region to the saturation region, transistor MP3 and transistor MP2 output current at the same time, so that I_MP2 + I_MP3 = I_MN2. Since MP3, MP4 constitute a current mirror, MN3 and MN4 constitute a current mirror, it is known that the current sink port I_sink has a sink current, and the current flows through the temperature coefficient adjusting resistor R1, reducing the voltage of node Vref2. The output of the LDO circuit Vout = f(Vref0-I sink ×R1). Since the current sink port I_sink has a positive temperature coefficient, the output voltage of the LDO circuit has a negative temperature coefficient after the temperature is greater than 25 degrees.
[0048] Reference Figure 5part B in FIG. 1C, where, in the case that t0 is set to 25 degrees, the LDO output voltage has a zero temperature coefficient when the temperature is less than t0, and has a negative temperature coefficient after the temperature is greater than t0, and the negative temperature coefficient can be adjusted and determined by the resistance of the temperature coefficient adjustment resistor R1.
[0049] According to another embodiment of the present application, the adjustment current source I_tc can also be set as a complementary to absolute temperature (CTAT) current source. Unlike the PTAT circuit, the output current of the CTAT circuit is inversely proportional to the absolute temperature, i.e., it has a negative temperature coefficient. Similar to the above analysis method, the following analysis results can be obtained: when the temperature t0 is equal to 25 degrees, the output of the LDO circuit Vout = f(Vref0), and it has a zero temperature coefficient. When the temperature is less than 25 degrees, the output of the LDO circuit Vout = f(Vref0-I sink ×R1), and the current sink port I_sink has a negative temperature coefficient, and the output of the LDO circuit has a positive temperature coefficient; when the temperature t0 is greater than 25 degrees, the output of the LDO circuit Vout = f(Vref0), and it has a zero temperature coefficient. The effect of the above embodiment is shown in part D in FIG. 1D, where, in the case that t0 is set to 25 degrees, the LDO circuit output voltage has a positive temperature coefficient when the temperature is less than t0, and has a zero temperature coefficient after the temperature is greater than t0, and the positive temperature coefficient can be adjusted and determined by the resistance of the temperature coefficient adjustment resistor R1. Figure 5
[0050] According to an embodiment of the present application, a dual temperature coefficient LDO circuit including a temperature coefficient adjustment circuit, a buffer, a temperature coefficient adjustment resistor and an LDO unit is provided. By configuring the connection relationship of different output ports of the temperature coefficient adjustment circuit, the output voltage Vout of the LDO circuit can have multiple forms of dual temperature coefficients. For example, the connection relationship of different output ports of the temperature coefficient adjustment circuit can be adjusted by controlling the switch circuit. For example, in the case where the adjustment current source I_tc is configured as a PTAT current source, when an LDO circuit output voltage with a positive temperature coefficient is needed, the current output port I_source of the temperature coefficient adjustment circuit is connected to the input end of the LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is needed, the current sink port I_sink of the temperature coefficient adjustment circuit is connected to the input end of the LDO unit; and in the case where the adjustment current source I_tc is configured as a CTAT current source, when an LDO circuit output voltage with a positive temperature coefficient is needed, the current sink port I_sink of the temperature coefficient adjustment circuit is connected to the input end of the LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is needed, the current output port I_source of the temperature coefficient adjustment circuit is connected to the input end of the LDO unit.
[0051] Although in the above embodiment, Vref0 is configured as a zero temperature coefficient, it should be understood by those skilled in the art that Vref0 can also be configured as a positive temperature coefficient, a negative temperature coefficient, and the specific configuration can be adjusted according to actual application.
[0052] Figure 6 is a schematic diagram showing a power amplifier PA circuit having a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present application.
[0053] Reference Figure 6 According to an embodiment of the present application, a dual temperature coefficient LDO is configured to supply power to a bias circuit (PA Bias) of a power amplifier, and provide a stable bias voltage to an amplifier unit in the power amplifier through the bias circuit, wherein the power amplifier circuit includes a single-stage amplifier and a multi-stage amplifier.
[0054] Although the present disclosure has been described with an exemplary embodiment, various changes and modifications can be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims.
[0055] None of the description in this application should be read as implying that any particular element, step, or function is an essential element that must be included in the claim scope. The scope of patented subject matter is defined only by the claims.
Claims
1. A dual temperature coefficient low dropout regulator (LDO) circuit, comprising: a buffer configured to receive an input reference signal and having an output connected to a temperature coefficient adjustment resistor; a temperature coefficient adjustment resistor configured between the output of the buffer and an input of an LDO cell; a temperature coefficient adjustment circuit comprising current output and current sink ports configured to have different temperature coefficients, and the current output or current sink port is connected to the input of the LDO cell through a control switch circuit; and an LDO cell having an input connected to the temperature coefficient adjustment resistor and the control switch circuit, and an output connected to an output of the LDO circuit, wherein the temperature coefficient adjustment circuit comprises a reference current mirror circuit, an adjustment current mirror circuit, a current supply current mirror circuit, and a current sink current mirror circuit, wherein a first current branch of the reference current mirror circuit is connected to a reference current source, and a second current branch of the reference current mirror circuit is connected to a first current node; a third current branch of the adjustment current mirror circuit is connected to an adjustment current source, and a fourth current branch of the adjustment current mirror circuit is connected to the first current node; a fifth current branch of the current supply current mirror circuit is connected to the first current node, a sixth current branch of the current supply current mirror circuit is connected to a second current node, and a seventh current branch of the current supply current mirror circuit is connected to the current output port; and an eighth current branch of the current sink current mirror circuit is connected to the second current node, and a ninth current branch of the current sink current mirror circuit is connected to the current sink port, and wherein the second current branch of the reference current mirror circuit and the fifth current branch of the current supply current mirror circuit supply current to the third current branch of the adjustment current mirror circuit; and wherein the sixth current branch of the current supply current mirror circuit and the eighth current branch of the current sink current mirror circuit form a current path between a supply voltage node and a ground node, wherein the input reference signal is provided by an output of a bandgap reference source. the adjustment current mirror circuit comprises a first NMOS transistor and a first PMOS transistor, the reference current mirror circuit comprises a second PMOS transistor and a second NMOS transistor, the current supply current mirror circuit comprises a third PMOS transistor, a fourth PMOS transistor, and a fifth PMOS transistor, and the current sink current mirror circuit comprises a third NMOS transistor and a fourth NMOS transistor, 2. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, wherein the adjustment current source is connected to a drain and a gate of the first NMOS transistor, a source of the first NMOS transistor is connected to ground, a source of the second NMOS transistor is connected to ground, and a gate of the second NMOS transistor is connected to a gate of the first NMOS transistor, a drain of the second NMOS transistor is connected to a drain of the second PMOS transistor, sources of the first PMOS transistor and the second PMOS transistor are connected to a supply voltage node, a gate of the second PMOS transistor is connected to a gate of the first PMOS transistor, and a drain and a gate of the first PMOS transistor are connected to the reference current source, a gate and a drain of the third PMOS transistor are connected to a drain of the second PMOS transistor, the gate of the third PMOS transistor is also connected to a gate of a fourth PMOS transistor and a gate of a fifth PMOS transistor, a drain of the fourth PMOS transistor is connected to a drain of the third NMOS transistor, a drain of the fifth PMOS transistor is connected to the current output port, and sources of the third PMOS transistor, the fourth PMOS transistor and the fifth PMOS transistor are connected to a power supply voltage node, a gate and a drain of the third NMOS transistor are connected, the gate of the third NMOS transistor is connected to a gate of a fourth NMOS transistor, a drain of the fourth NMOS transistor is connected to the current draw port, and sources of the third NMOS transistor and the fourth NMOS transistor are grounded.
3. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, The reference current source is configured as a current source with zero temperature coefficient.
4. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, The reference current source is configured as a VBG / R circuit.
5. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, The regulation current source is configured as an absolute temperature proportional PTAT current source, and wherein, when an LDO circuit output voltage with positive temperature coefficient is needed, the current output port of the temperature coefficient regulation circuit is connected to the input terminal of the LDO unit, and when an LDO circuit output voltage with negative temperature coefficient is needed, the current draw port of the temperature coefficient regulation circuit is connected to the input terminal of the LDO unit.
6. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, The regulation current source is configured as an absolute temperature inverse proportional CTAT current source, and wherein, when an LDO circuit output voltage with positive temperature coefficient is needed, the current draw port of the temperature coefficient regulation circuit is connected to the input terminal of the LDO unit, and when an LDO circuit output voltage with negative temperature coefficient is needed, the current output port of the temperature coefficient regulation circuit is connected to the input terminal of the LDO unit.
7. The dual temperature coefficient low dropout linear regulator (LDO) circuit of claim 1, wherein, The input reference signal is configured as having zero temperature coefficient, positive temperature coefficient or negative temperature coefficient.
8. A power amplifier circuit comprising: The dual temperature coefficient low dropout linear regulator LDO circuit, bias circuit and amplifier unit of any one of claims 1-7, wherein, The dual temperature coefficient low dropout linear regulator LDO circuit is configured to supply power to the bias circuit, and The bias circuit is configured to provide a bias voltage to the amplifier unit in the power amplifier circuit.
Citation Information
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