CMOS image sensor, method of manufacturing the same, and electronic device

Abstract

The application provides a CMOS image sensor and a preparation method thereof, and an electronic device. The CMOS image sensor comprises, from top to bottom, a pixel structure layer, an infrared light absorption layer and a conductive interconnection layer, wherein the surface of the pixel structure layer away from the infrared light absorption layer is an incident surface, the pixel structure layer comprises a plurality of pixel units arranged at intervals, and the infrared light absorption layer comprises an electrochromic material layer. The CMOS image sensor provided by the application has an improved structure design, can effectively reduce or even avoid crosstalk caused by infrared reflection of the metal surface of the conductive interconnection layer, can significantly improve the performance and precision of the CMOS image sensor in the infrared application field, and meanwhile, does not increase the complexity of the process and does not affect other performances of the sensor. The electronic device provided by the application can be further expanded in the application in the infrared imaging field.

Description

Technical Field

[0001] This invention relates to the field of image acquisition technology, specifically to a CMOS image sensor and its fabrication method, as well as an electronic device. Background Technology

[0002] CMOS image sensors (Complementary Metal-Oxide-Semiconductor) are increasingly widely used due to their advantages such as low cost, low power consumption, and high integration. In the field of infrared applications, CMOS image sensors are often used in security products.

[0003] However, traditional CMOS image sensors have some limitations. For example, silicon-based CMOS image sensors have a weak response to long-wavelength infrared light, limiting their performance in infrared applications. Secondly, the metal layer adjacent to the silicon surface of a CMOS image sensor reflects transmitted infrared light, causing signal crosstalk and reducing the sensor's accuracy and performance.

[0004] To address signal crosstalk, optical filters can be used for each pixel unit to reduce the impact of infrared reflection from the metal surface. However, this solution increases manufacturing complexity and cost and may affect the performance of the image sensor.

[0005] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a CMOS image sensor and its fabrication method, as well as an electronic device, to solve the problems of weak response of existing CMOS image sensors to long-wavelength infrared light, the reflection of incident infrared light by the metal layer on the surface of the CMOS image sensor, which leads to signal crosstalk, reduces the accuracy and performance of the sensor, and affects its application in the field of infrared technology, and the increased manufacturing cost of the sensor caused by the existing method of adding optical filters to reduce infrared reflection of the metal surface.

[0007] To achieve the above and other related objectives, the present invention provides a CMOS image sensor, which comprises, from top to bottom, a pixel structure layer, an infrared light absorption layer, and a conductive interconnect layer, wherein the surface of the pixel structure layer facing away from the infrared light absorption layer is the incident surface, the pixel structure layer includes a plurality of pixel units arranged at intervals, and the infrared light absorption layer includes an electrochromic material layer.

[0008] Optionally, the electrochromic material layer includes at least one of a non-stoichiometric metal oxide layer and a metal compound layer other than the metal oxide layer, wherein the metal element in the metal oxide layer and the metal compound layer is selected from at least one of tungsten, tantalum, erbium, vanadium and chromium.

[0009] Optionally, the pixel unit includes a photoelectric conversion element and a corresponding pixel circuit transistor, and the CMOS image sensor further includes an infrared absorption auxiliary layer covering the pixel circuit transistor and the photoelectric conversion element, wherein the infrared light absorption layer is located on the surface of the infrared absorption auxiliary layer opposite to the photoelectric conversion element.

[0010] Optionally, the CMOS image sensor has a transparent first electrode material layer, an infrared light absorption layer, and a second electrode material layer sequentially disposed along the direction away from the pixel structure layer, wherein the first electrode material layer is located on the surface of the infrared absorption auxiliary layer away from the photoelectric conversion element.

[0011] Optionally, the first electrode material layer is selected from at least one of tin oxide, indium tin oxide, and indium zinc oxide; and / or, the second electrode material layer includes at least one of a metal conductive layer, a metal oxide conductive layer, and a graphite conductive layer; and / or, the infrared absorption auxiliary layer includes at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0012] Optionally, the conductive interconnect layer includes a dielectric layer and a metal wiring layer located on the second electrode material layer. The pixel circuit transistor is electrically connected to the metal wiring layer through an interconnect structure. The conductive interconnect layer further includes a metal lead layer that is insulated from the metal wiring layer. The metal lead layer realizes the electrical connection between the first electrode material layer and the second electrode material layer.

[0013] Optionally, the interconnect structure includes interconnect vias, an isolation structure layer located on the sidewall of the interconnect vias, and a conductive structure layer located on the inner surface of the isolation structure layer and electrically connected to the lead-out portion of the pixel circuit transistor. The interconnect vias penetrate the second electrode material layer, the infrared light absorption layer, the first electrode material layer, and the infrared absorption auxiliary layer, and correspondingly expose the lead-out portion.

[0014] Optionally, the infrared light absorbing layer is a tungsten oxide layer, the infrared absorption auxiliary layer is a silicon oxide layer, the thickness of the tungsten oxide layer is between 5 nm and 20 nm, the diameter of the tungsten oxide pillar structure of the tungsten oxide layer is between 15 nm and 25 nm, and the distance between adjacent tungsten oxide pillar structures is between 25 nm and 40 nm.

[0015] Optionally, the CMOS image sensor further includes a microlens layer disposed on the incident surface of the pixel structure layer; and / or, each pixel unit includes at least one infrared photosensitive pixel, and the infrared light absorption layer corresponds to the pixel structure layer.

[0016] This application also provides an electronic device, which includes a CMOS image sensor as described in any of the above embodiments.

[0017] This application also provides a method for fabricating a CMOS image sensor as described in any of the above embodiments, the method comprising the following steps:

[0018] Provide semiconductor substrates;

[0019] The pixel structure layer is fabricated in the semiconductor substrate, and the pixel structure layer includes a plurality of pixel units;

[0020] An infrared light absorption layer is fabricated on the pixel unit, and the infrared light absorption layer covers the semiconductor substrate;

[0021] The conductive interconnect layer is fabricated on the infrared light absorbing layer; and

[0022] The semiconductor substrate is flipped over, and a microlens layer is formed on the side of the semiconductor substrate away from the infrared light absorption layer.

[0023] Optionally, when the CMOS image sensor further includes the infrared absorption auxiliary layer, the fabrication method includes the following steps:

[0024] After the pixel structure layer is prepared, an infrared absorption auxiliary layer covering the semiconductor substrate is prepared on the pixel structure layer, and an infrared light absorption layer is prepared on the surface of the infrared absorption auxiliary layer.

[0025] And / or, when the CMOS image sensor further includes the interconnect structure, the fabrication method includes the following steps:

[0026] The interconnect vias are formed by sequentially etching the second electrode material layer, the infrared light absorption layer, the first electrode material layer, and the infrared absorption auxiliary layer, and then the isolation structure layer and the conductive structure layer are prepared.

[0027] As described above, the CMOS image sensor, its fabrication method, and electronic device of the present invention have the following beneficial effects: The improved structural design of the CMOS image sensor provided by the present invention can effectively reduce or even avoid optical crosstalk caused by infrared reflection from the metal surface of the conductive interconnect layer, significantly improving the performance and accuracy of the CMOS image sensor in infrared applications, while not increasing the complexity of the fabrication process or affecting other sensor performance characteristics. The electronic device provided by the present invention has significantly improved infrared imaging capabilities, thus further expanding its application in the field of infrared imaging. Attached Figure Description

[0028] Figure 1 The diagram shown is an exemplary system framework diagram of an image sensor provided in an embodiment of the present invention.

[0029] Figure 2 The diagram shown is an exemplary partial cross-sectional view of the CMOS image sensor provided by the present invention.

[0030] Figure 3 This diagram illustrates the change in transmittance of a non-stoichiometric tungsten oxide layer to light of different wavelengths as a function of voltage.

[0031] Figure 4 The diagram shown is an exemplary structural schematic of the tungsten oxide layer applied in this embodiment.

[0032] Figure 5 The diagram shown is a schematic cross-sectional structure of another example of the CMOS image sensor provided by the present invention.

[0033] Figure 6 Displayed as Figure 5 Area A along with Figure 5 An illustrative enlarged diagram in the opposite direction. Detailed Implementation

[0034] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. For ease of explanation, when detailing the embodiments of the present invention, the cross-sectional views showing the device structure are partially enlarged, not according to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0035] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0036] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0037] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show components related to the present invention and are not drawn according to the actual number, shape, and size of the components in the actual implementation. In the actual implementation, the form, quantity, and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex. To keep the illustrations as concise as possible, not all structures are shown in the figures.

[0038] A typical system framework diagram of an image sensor is shown below. Figure 1As shown, it includes a readout circuit and a control circuit connected to the pixel array layer. The readout circuit is connected to an external functional logic unit to control the reading of the pixel circuit. The readout circuit and the control circuit are connected to a status register to control the reading of the pixel array. The pixel array includes multiple pixels arranged in rows (R1, R2, R3…Ry) and columns (C1, C2, C3…Cx). The pixel signals of the pixel array can be output to the readout circuit one by one or row by row via column lines. In one embodiment, after each pixel acquires image data, the image data is read out by the readout circuit with the readout mode specified by the status register, and then transmitted to the functional logic unit. In specific applications, the readout circuit typically includes modules such as an analog-to-digital converter (ADC) unit and an amplifier, while the status register typically contains a programmable selection module used to determine the reading mode of the readout circuit. The functional logic unit can store only image data or image data applied or processed through image effects. In one application example, the readout circuit can read one row of image data at a time along the readout column lines, or it can read out image data in various other ways. The operation of the control circuitry can be determined by the current settings of the status register. For example, the control circuitry generates a shutter signal to control image acquisition. In some applications, this shutter signal can be a global exposure signal, allowing all pixels of the pixel array to acquire their image data simultaneously through a single acquisition window. In other applications, this shutter signal can be a rolling exposure signal, where each row of pixels is read sequentially through the acquisition window.

[0039] Currently, commonly used image sensors mainly include CMOS (Complementary Metal Oxide Semiconductor) image sensors and CCD (Charge Coupled Device) image sensors. Among these, silicon-based CMOS image sensors are increasingly widely used in the security field due to their advantages such as relatively low power consumption, higher sensitivity, and lower manufacturing cost. However, silicon-based CMOS image sensors have a weak response to long-wavelength infrared light, limiting their performance in infrared applications. Secondly, the metal layer adjacent to the silicon surface of the CMOS image sensor reflects the transmitted infrared light, causing signal crosstalk and reducing the sensor's accuracy and performance. Existing methods for reducing optical crosstalk each have their own shortcomings. Based on this, the inventors of this paper, after long-term research, have proposed an improvement scheme.

[0040] Specifically, such as Figure 2As shown, the present invention provides a CMOS image sensor, which includes, from top to bottom, a pixel structure layer 11, an infrared light absorption layer 12, and a conductive interconnect layer 13. The surface of the pixel structure layer 11 facing away from the infrared light absorption layer 12 is the incident surface. The pixel structure layer 11 includes a plurality of spaced pixel units, and the infrared light absorption layer 12 includes an electrochromic material layer.

[0041] The pixel structure layer 11 is used to convert the incident light signal into an electrical signal and output it outwards. The conductive interconnect layer 13 is used to electrically connect the pixel structure layer 11 to external readout circuits and other modules. In this embodiment, the conductive interconnect layer 13 is located on the non-incident surface side of the pixel structure layer 11, that is, on the back side of the pixel structure layer 11. Therefore, the CMOS image sensor in this embodiment is more precisely a back-illuminated image sensor (BSI). The conductive interconnect layer 13 typically includes a metal layer, and at least part of the metal layer needs to be exposed on the surface of the conductive interconnect layer to achieve interconnection with the pixel structure layer 11. When incident light shines on the pixel structure layer 11, inevitably some light will pass through the pixel structure layer 11 and strike the surface of the conductive interconnect layer 13. Since metals generally have a strong reflective ability to light, and since the surface of the metal layer of the conductive interconnect layer 13 is not a perfectly flat surface, if the incident light shines on the surface of the metal layer, it will be reflected back to the pixel structure layer 11, causing crosstalk between adjacent pixel units 110, resulting in a decrease in imaging accuracy and quality. However, in this embodiment, the infrared light absorption layer 12, which includes an electrochromic material layer, is creatively provided in the pixel structure layer 11 and the conductive interconnect layer 13, which can effectively avoid such problems.

[0042] Electrochromism refers to the phenomenon where the optical properties of a material, such as reflectivity, transmittance, and absorptivity, undergo stable and reversible color changes under the influence of an applied electric field. This manifests as reversible changes in color and transparency. In other words, the electrochromic material layer itself is conductive, and its properties, such as transmittance, change when an electric current is applied. In this embodiment, introducing an electrochromic material layer between the pixel structure layer 11 and the conductive interconnect layer 13 does not affect the interconnection between them and does not substantially alter the sensor's structure. During sensor operation, a voltage is applied to the electrochromic material layer, significantly reducing its transmittance and increasing its light absorption performance, especially its absorption performance of infrared light. Therefore, light passing through the pixel structure layer 11, such as infrared light, is absorbed by the electrochromic material layer and does not incident on the surface of the conductive interconnect layer 13. This effectively avoids optical crosstalk caused by infrared light reflection, significantly improving the sensor's imaging accuracy and performance.

[0043] The CMOS image sensor provided in this embodiment features an improved structural design that can effectively reduce or even avoid crosstalk caused by infrared reflection from the metal surface of the conductive interconnect layer. This significantly improves the performance and accuracy of the CMOS image sensor in infrared applications without increasing the complexity of the manufacturing process or affecting other sensor performance characteristics.

[0044] Theoretically, any material with electrochromic properties is suitable for this embodiment. However, considering factors such as material preparation, process compatibility, and device durability, the electrochromic material layer in this embodiment is preferably an inorganic electrochromic material, such as a non-stoichiometric metal oxide layer containing tungsten, tantalum, erbium, vanadium, and chromium, or a metal compound layer containing these elements other than metal oxides (i.e., the metal compound here refers to a pure substance other than a metal oxide containing the corresponding metal). In particular, metal oxide layers containing these metals are preferred due to their wide availability and mature preparation processes. Among these, tungsten oxide is especially preferred. Tungsten oxide can effectively absorb infrared light transmitted through the pixel structure layer 11. At the same time, the preparation process of the tungsten oxide layer is relatively mature, the preparation cost is low, and the interfacial bonding performance between the tungsten oxide layer and other structural layers is excellent, which helps to improve the interlayer stress distribution of the device.

[0045] In one example, the transmittance of a non-stoichiometric tungsten oxide layer to light of different wavelengths varies with voltage as follows: Figure 3 As shown. From Figure 3 It is known that when a voltage is applied to the tungsten oxide layer, for light with wavelengths above 450 nm, the longer the wavelength, the lower the transmittance of the tungsten oxide layer. Since the wavelength range of near-infrared light (NIR) is 780–2526 nm, when a voltage is applied to the tungsten oxide layer, near-infrared light will have difficulty passing through it. Therefore, using a tungsten oxide layer in this embodiment effectively prevents near-infrared light from incident on the conductive interconnect layer 13.

[0046] In this embodiment, the electrochromic mechanism of the tungsten oxide thin film is that the intrinsic plasmon oscillation frequency of the electrochromic layer is in the infrared band. Its oscillation frequency can be modulated by an applied voltage, causing it to resonate and absorb infrared light of the corresponding wavelength. The intrinsic oscillation frequency of the plasmons can be obtained by controlling its thickness and morphology. To ensure the tungsten oxide layer effectively absorbs infrared light, controlling its thickness and morphology is crucial. Through extensive experimentation, the inventors discovered that when using a tungsten oxide layer as the electrochromic material layer, the thickness of the tungsten oxide layer is preferably 5nm-20nm, such as 5nm, 9nm, 10nm, 13nm, 15nm, 20nm, or any value within this range. The tungsten oxide layer preferably has the following characteristics: Figure 4The morphology shown depicts a tungsten oxide layer comprising multiple spaced tungsten oxide pillar structures 19. The tungsten oxide crystals of each pillar structure 19 grow irregularly upwards, resulting in increasing interlacing between adjacent pillar structures 19 as they ascend. This ultimately forms a non-flat surface on the top surface of the tungsten oxide layer (in this embodiment, the surface adjacent to the conductive interconnect layer 13). This causes infrared light transmitted from the substrate (in this embodiment, the silicon substrate corresponding to the pixel structure layer 11) to gradually diffuse and be absorbed by tungsten oxide particles between the gaps in the tungsten oxide pillar structures 19. Of course, the size of the tungsten oxide pillar structures 19 and the dimensions between adjacent pillar structures 19 are also important parameters. Controlling the appropriate spacing between the pillar structures 19 is beneficial for improving their infrared light absorption performance. For example, a larger spacing between the pillar structures 19, i.e., a more uneven surface of the tungsten oxide layer, is beneficial for infrared light to be incident on the tungsten oxide layer and reflected from its surface. A smaller spacing between the pillar structures 19 is beneficial for adjacent pillar structures 19 to stagger at the end away from the substrate, creating a gap, which helps prevent infrared light from passing through the tungsten oxide layer and incident on the surface of the conductive interconnect layer 13. Controlling the appropriate diameter of the tungsten oxide pillar structures 19 themselves also helps improve their absorption performance for infrared light. Extensive research by the inventors has found that the diameter of the tungsten oxide pillar structures 19 in the tungsten oxide layer is preferably 15nm-25nm, for example, 15nm, 20nm, 25nm or any value within this range, and the distance between adjacent tungsten oxide pillar structures 19 is preferably between 25nm-40nm, for example, 25nm, 30nm, 35nm, 40nm or any value within this range, when the blocking and absorption effect of the tungsten oxide layer on infrared light is particularly good. Specifically, the distance between adjacent tungsten oxide pillar structures 19 is as follows: Figure 4 As shown in L1 and L2, tungsten oxide layers with the above parameters can be easily prepared using existing technologies such as CVD and PVD, therefore the preparation methods will not be elaborated in detail.

[0047] Of course, the electrochromic material layer is not limited to a tungsten oxide layer; it can also be a tungsten compound layer other than a tungsten oxide layer, or an oxide layer and / or compound layer containing metal elements such as tantalum, erbium, vanadium, and chromium, as mentioned above. The metal element in the electrochromic material layer is also not limited to one type; it can contain two or more of the aforementioned metal elements simultaneously.

[0048] The electrochromic material layer can be a single-layer structure or a double-layer structure. From the perspective of simplifying the fabrication process, a single layer is preferred. Moreover, as mentioned earlier, different metal elements can be introduced into the single-layer material layer to improve device performance.

[0049] like Figure 5 and Figure 6As shown, the pixel unit 110 includes a photoelectric conversion element 111 and a corresponding pixel circuit transistor. The photoelectric conversion element 111 may include, for example, a PIN-structured photodiode, which converts incident light into electrons. The pixel circuit transistor may be, for example, an NMOS transistor, electrically connected to the photoelectric conversion element 111, and can be used to transmit the electrical signal converted by the photoelectric conversion element 111 to an external circuit and receive read control from the external circuit. The pixel circuit transistor can adopt the configuration of 3T or 4T transistors commonly used in existing image sensors. A single pixel unit 110 may include a single photodiode or two or more shared photodiodes. The CMOS image sensor includes a pixel array, corresponding to the pixel structure layer 11. The pixel array includes several pixel units to achieve photoelectric conversion and image acquisition based on the pixel units. The pixel units can adopt the layout design of existing image sensors according to actual needs; they can be transparent pixels that sense white light, color pixels arranged in a Bayer array, or infrared pixels that sense infrared light. When a single pixel unit includes two or more photodiodes, different photodiodes can have different photosensitive characteristics, or the same photodiode can be provided with photosensitive areas with different photosensitive performance. For example, by doping the photodiode with different doses and / or materials, the periphery of the same photodiode has stronger photosensitive performance than its center. This will help reduce crosstalk between adjacent pixel units 110.

[0050] To achieve the electrical signal output of the photoelectric conversion element 111, each pixel unit 110 is provided with a gate 112 connected to the photoelectric conversion element 111; this gate 112 can also be called a transmission gate. Figure 6 As shown, this gate 112 serves as one of the gates of the corresponding pixel circuit transistor. In one example, Figure 6 The gate shown includes, from bottom to top, a gate oxide layer 112a and a gate conductive layer 112b. Of course, in other examples, a dielectric layer may also be included. The gate oxide layer 112a is, for example, a silicon oxide layer formed by a thermal oxidation process, the gate conductive layer 112b is, for example, a polysilicon layer, and the dielectric layer is, for example, a silicon nitride layer, but is not limited thereto. In other examples, the gate arrangement of each pixel unit 110 may also have other options, and there is no strict limitation on this.

[0051] Continue to refer to Figure 6As shown, when an infrared light absorption layer 12 is disposed between the pixel structure layer 11 and the conductive interconnect layer 13, the CMOS image sensor preferably also has an infrared absorption auxiliary layer 16 covering the pixel circuit transistor and the photoelectric conversion element 111 (i.e., the infrared absorption auxiliary layer 16 also covers the aforementioned gate 112). The infrared light absorption layer 12 is located on the surface of the infrared absorption auxiliary layer 16 facing away from the photoelectric conversion element 111. The infrared absorption auxiliary layer 16 can be selected from at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer, but is not limited to these. When the infrared light absorption layer 12 is a tungsten oxide layer, the infrared absorption auxiliary layer 16 is preferably a silicon oxide layer, which helps to improve the interlayer stress distribution. The infrared absorption auxiliary layer 16 not only further absorbs the infrared light of the transparent pixel unit 110, but also provides good protection for the gate 112, and also facilitates the fabrication of subsequent structural layers.

[0052] The infrared light absorption layer 12 can be disposed only between the pixel structure layer 11 and the conductive interconnect layer 13. The advantage of this design is its relatively simple structure, which simplifies fabrication. However, a disadvantage is that it is difficult to ensure a uniform distribution of the electric field on the surface of the electrochromic material layer when a voltage is applied, which may result in localized areas where the electrochromic material layer fails to effectively absorb infrared light. In a preferred embodiment provided by this invention, reference continues... Figure 6 As shown, the CMOS image sensor has a transparent first electrode material layer 14, an infrared light absorption layer 12, and a second electrode material layer 15 sequentially disposed along the direction away from the pixel structure layer 11. The first electrode material layer 14 is located on the surface of the infrared absorption auxiliary layer 16 away from the photoelectric conversion element 111. That is, the second electrode material layer 15 is closer to the conductive interconnect layer 13 than the first electrode material layer 14. Electrode layers are disposed on opposite sides of the infrared light absorption layer 12, or more precisely, the electrochromic material layer. A stable voltage can be applied to the electrochromic material layer, causing the oscillation frequency of the plasmons in the electrochromic material layer to shift under the voltage, resulting in a color change and absorption of infrared light due to its unique crystal structure. The first electrode material layer 14 is made of a transparent conductive material, allowing infrared light from the transparent pixel structure layer 11 to enter the infrared light absorption layer 12. The second electrode material layer 15 is preferably made of a non-transparent conductive material to prevent infrared light that is not completely absorbed by the infrared light absorption layer 12 from entering the conductive interconnect layer 13. As an example, the first electrode material layer 14 is preferably at least one of tin oxide, indium tin oxide, and indium zinc oxide, but is not limited thereto, and may also be other organic transparent conductive materials. The second electrode material layer 15 is preferably at least one of a metal conductive layer, a metal oxide conductive layer, and a graphite conductive layer.

[0053] To better facilitate the electrical outgoing of the pixel structure layer 11, the conductive interconnect layer 13 preferably includes a dielectric layer and a metal wiring layer located on the second electrode material layer 15. The dielectric layer can be, for example, an inorganic dielectric material layer such as silicon oxide, and its formation method varies depending on the material, including chemical vapor deposition (CVD) or coating. The metal wiring layer is made of materials including, but not limited to, aluminum and copper, and its formation method is preferably physical vapor deposition (PVD). The dielectric layer and the metal wiring layer can be single-layer or multi-layer structures. A multi-layer conductive interconnect layer 13 is prepared by a combination of deposition and etching methods, and the metal wiring layer is at least partially exposed on the surface of the conductive interconnect layer 13 to achieve electrical connection. The pixel circuit transistor is electrically connected to the metal wiring layer through the interconnect structure 18. The conductive interconnect layer 13 also includes a metal lead layer (not shown) that is insulated from the metal wiring layer. The metal lead layer electrically connects the first electrode material layer 14 and the second electrode material layer 15 to apply a voltage to the infrared light absorption layer 12.

[0054] In a further example, the interconnect structure 18 includes interconnect vias, an isolation structure layer located on the sidewalls of the interconnect vias, and a conductive structure layer 182 located on the inner surface of the isolation structure layer 181 and electrically connected to the lead-out portion of the pixel circuit transistor. The interconnect vias penetrate the second electrode material layer 15, the infrared light absorption layer 12, the first electrode material layer 14, and the infrared absorption auxiliary layer 16, and correspondingly expose the lead-out portion. The isolation structure layer provides electrical insulation between the conductive structure layer and the second electrode material layer 15 and the first electrode material layer 14. The material of the isolation structure layer is, for example, silicon oxide and / or silicon nitride, and the material of the conductive structure layer is, for example, a metal such as tungsten or copper.

[0055] To expand the light-receiving surface and focus the incident light onto each photoelectric conversion element 111, thereby further improving the imaging accuracy and quality of the sensor, in one example, the CMOS image sensor further includes a microlens layer 17 disposed on the incident surface of the pixel structure layer 11. The microlenses 171 of the microlens layer 17 can have a one-to-one correspondence with each pixel unit 110, meaning that a convex lens covering the incident surface of each pixel unit 110 is disposed on its incident surface. In another example, two or more microlenses 171 can also be disposed on the incident surface of each pixel unit 110. By adjusting the material and / or curvature of each microlens 171, the light-receiving surface can be further increased. The material of each microlens 171 can be, for example, transparent materials such as silicon oxide, silicon nitride, or organic resin. Furthermore, each microlens 171 can be made of a single material, or it can be made from multiple conformally shaped materials with different refractive indices from top to bottom. For example, along the direction away from pixel unit 110, the refractive index of the microlens material layer gradually increases, which helps to further increase the light-receiving area of ​​pixel unit 110, especially increasing the ability to receive light rays incident at large angles, and improving the imaging accuracy of the sensor. Of course, other material layers commonly used in image sensors can also be disposed between the pixel structure layer and the microlens layer, which are not shown in the figure.

[0056] In some examples, each pixel unit 110 includes at least one infrared photosensitive pixel, and the infrared light absorption layer 12 corresponds to the pixel structure layer 11. That is, the infrared light absorption layer 12 and the pixel structure layer 11 overlap vertically, and the infrared light absorption layer 12 as a whole corresponds to multiple pixel units 110. Furthermore, the infrared light absorption layer 12 as a whole corresponds to multiple infrared photosensitive pixels. This helps to improve the infrared sensing function of the CMOS image sensor and enhance its infrared imaging capability. In one example, a pixel unit includes one infrared photosensitive pixel, that is, an IR-transmitting pixel can acquire the image information represented by infrared light, forming an RGBIR pixel unit, which can correspond to a Bayer array arrangement or a four-Bayer array arrangement, designed according to actual needs; of course, in other examples, a pixel unit can also consist entirely of infrared photosensitive pixels.

[0057] As mentioned earlier, a single image sensor typically includes multiple pixel units 110 arranged in multiple rows and columns. Therefore, avoiding crosstalk between adjacent pixel units 110 is extremely important. In this embodiment, in addition to providing an infrared light absorption layer 12, including an electrochromic material layer, between the pixel structure layer 11 and the conductive interconnect layer 13, an isolation structure 113 can also be provided between adjacent pixel units 110. This isolation structure 113 can be formed by first creating trenches between adjacent pixel units 110 through a photolithography etching process, and then filling the trenches with an isolation material. Alternatively, before filling the isolation material, an adhesion material layer such as titanium nitride can be formed on the inner wall of the trench, or a negatively charged material layer such as aluminum oxide can be formed on the inner wall of the trench. The trench can be a structure whose size gradually decreases along the direction away from the incident surface. The isolation material can be a common non-transparent material. Alternatively, in some examples, the isolation material can be a reflective metal material layer to reflect light incident on the surface of the isolation structure 113 back to the corresponding pixel unit 110, which can improve the imaging capability of the sensor. In some examples, the isolation material may also be an electrochromic material layer, such as a tungsten oxide layer, as mentioned above, to absorb infrared light incident on the isolation structure and avoid optical crosstalk. In other examples, the isolation structure may include a reflective material layer on the inner surface of the isolation trench and an absorbing material layer located inside the reflective material layer. Therefore, most of the infrared light incident on the surface of the isolation structure 113 will be reflected back to the corresponding pixel unit 110, while a very small portion of the transmitted light will be absorbed by the absorbing material layer, which helps to further avoid optical crosstalk in the pixel unit 110.

[0058] This invention also provides an electronic device comprising the CMOS image sensor described in any of the above embodiments. The foregoing description of the CMOS image sensor can be quoted in its entirety here, and will not be repeated for the sake of brevity. The specific structure of the electronic device varies depending on its application field. For example, it can be a monitoring device for security, a dashcam for vehicles, a telescope for aerospace, or a detector for biological detection. Therefore, this embodiment does not limit the specific structure and application of the electronic device. Due to the use of the CMOS image sensor of this embodiment, the performance and accuracy of the electronic device provided in the infrared application field are greatly improved, making it particularly suitable for infrared imaging.

[0059] The present invention also provides a method for fabricating a CMOS image sensor as described in any of the above embodiments.

[0060] As mentioned above, there are many options for the specific structure of the CMOS image sensor, so this embodiment only briefly introduces the fabrication process of its main structure.

[0061] In one example, the fabrication method of the CMOS image sensor mainly includes the following steps:

[0062] First, a semiconductor substrate is provided, preferably a silicon wafer, but of course, various substrate structures used in the fabrication of existing CMOS image sensors can be used;

[0063] The pixel structure layer 11 is fabricated in the semiconductor substrate. The pixel structure layer 11 includes a plurality of pixel units 110. Each pixel unit 110 typically includes a photoelectric conversion element 111 and a pixel circuit transistor, both of which can be fabricated based on conventional silicon-based semiconductor processes.

[0064] An infrared light absorbing layer 12 is fabricated on the pixel unit 110, and the infrared light absorbing layer 12 covers the semiconductor substrate. The fabrication method of the infrared light absorbing layer 12 can be flexibly selected according to the different materials. For example, when the infrared light absorbing layer 12 is a non-stoichiometric tungsten oxide layer, its fabrication method can be chemical vapor deposition (CVD), physical vapor deposition (PVD), molecular beam epitaxy (MBE), sol-gel method, solvothermal method, and hydrothermal method, as well as the synthesis method of corresponding thin coatings, etc. The specific fabrication method can be selected according to the characteristics of the growth material and the required equipment conditions. Depending on the specific method, different growth conditions can be adjusted during the fabrication process, such as adjusting the growth time, temperature, atmosphere, etc., to obtain an infrared absorbing material layer with the required performance. In this embodiment, a metal oxide layer with electrochromic properties is preferred, such as a non-stoichiometric tungsten oxide layer. Therefore, its fabrication is preferably carried out using PVD process, because PVD process makes it relatively easier to adjust the element composition ratio and film thickness.

[0065] The conductive interconnect layer 13 is prepared on the infrared light absorption layer 12. The preparation of the conductive interconnect layer 13 can be carried out using existing image sensor interconnection processes. For example, a dielectric layer can be formed by chemical vapor deposition, interconnect holes can be formed in the dielectric layer by photolithography, a metal layer covering the dielectric layer and filling the interconnect holes can be deposited, and then the surface can be planarized.

[0066] The semiconductor substrate is then flipped over, and a microlens layer 17 is fabricated on the side of the semiconductor substrate away from the infrared light absorption layer 12. The microlens layer 17 can be fabricated, for example, by first forming a lens material layer through a deposition or coating process, and then etching to form a convex lens with an arcuate surface.

[0067] When the CMOS image sensor further includes an infrared absorption auxiliary layer 16, the fabrication method includes the following steps:

[0068] After the pixel structure layer 11 is prepared, an infrared absorption auxiliary layer 16 covering the semiconductor substrate is prepared on the pixel structure layer 11, and an infrared light absorption layer 12 is prepared on the surface of the infrared absorption auxiliary layer 16. The infrared absorption auxiliary layer 16 includes, but is not limited to, silicon oxide, and can be prepared on the entire surface of the semiconductor substrate on which the photoelectric conversion element and pixel transistor are formed using a thermal oxidation process. Furthermore, the infrared light absorption layer 12 is prepared on it.

[0069] When the CMOS image sensor further includes the interconnect structure 18, the fabrication method includes the following steps:

[0070] The second electrode material layer 15, the infrared light absorption layer 12, the first electrode material layer 14 and the infrared absorption auxiliary layer 16 are etched sequentially to form the interconnect via, and then the isolation structure layer and the conductive structure layer are prepared.

[0071] In this embodiment, the infrared light absorption layer can be fabricated using conventional semiconductor processes such as vapor deposition. Furthermore, the fabrication of the infrared light absorption layer, the conductive interconnect layer, and the infrared absorption auxiliary layer are performed continuously on the same equipment. Therefore, its fabrication process is not significantly different from that of existing CMOS image sensors. In other words, the CMOS image sensor provided in this embodiment does not increase the complexity of its fabrication process, but its performance is significantly improved, thus possessing great potential for widespread application.

[0072] In summary, the CMOS image sensor provided by this invention creatively incorporates an infrared light absorption layer, including an electrochromic material layer, in the pixel structure layer and the conductive interconnect layer. This effectively reduces or even avoids crosstalk caused by infrared reflection from the metal surface of the conductive interconnect layer, significantly improving the performance and accuracy of the CMOS image sensor in infrared applications without increasing process complexity or affecting other sensor performance characteristics. The electronic device provided by this invention significantly enhances infrared imaging capabilities, thus further expanding its applications in the field of infrared imaging. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and possesses high industrial applicability.

[0073] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A CMOS image sensor, characterized in that, The CMOS image sensor comprises, from top to bottom, a pixel structure layer, an infrared absorption auxiliary layer, a transparent first electrode material layer, an infrared light absorption layer, a second electrode material layer, and a conductive interconnect layer. The surface of the pixel structure layer facing away from the infrared light absorption layer is the incident surface. The pixel structure layer includes a plurality of spaced pixel units. The infrared light absorption layer includes an electrochromic material layer. The infrared absorption auxiliary layer covers the pixel structure layer. The first electrode material layer is located on the surface of the infrared absorption auxiliary layer facing away from the pixel units. The pixel units are electrically connected to the conductive interconnect layer via an interconnect structure. The interconnect structure includes interconnect vias, an isolation structure layer located on the sidewall of the interconnect vias, and a conductive structure layer located on the inner surface of the isolation structure layer and electrically connected to the lead-out portion of the pixel unit. The interconnect vias penetrate the second electrode material layer, the infrared light absorption layer, the first electrode material layer, and the infrared absorption auxiliary layer, and correspondingly expose the lead-out portion.

2. The CMOS image sensor according to claim 1, characterized in that, The electrochromic material layer includes at least one of a non-stoichiometric metal oxide layer and a metal compound layer other than the metal oxide layer, wherein the metal element in the metal oxide layer and the metal compound layer is selected from at least one of tungsten, tantalum, erbium, vanadium and chromium.

3. The CMOS image sensor according to claim 1, characterized in that, The pixel unit includes a photoelectric conversion element and a corresponding pixel circuit transistor, and the infrared absorption auxiliary layer covers the pixel circuit transistor and the photoelectric conversion element.

4. The CMOS image sensor according to claim 1, characterized in that, The first electrode material layer is selected from at least one of tin oxide layer, indium tin oxide layer and indium zinc oxide layer; and / or, the second electrode material layer includes at least one of metal conductive layer, metal oxide conductive layer and graphite conductive layer; and / or, the infrared absorption auxiliary layer includes at least one of silicon oxide layer, silicon nitride layer and silicon oxynitride layer.

5. The CMOS image sensor according to claim 3, characterized in that, The conductive interconnect layer includes a dielectric layer and a metal wiring layer located on the second electrode material layer. The pixel circuit transistor is electrically connected to the metal wiring layer through the interconnect structure. The conductive interconnect layer also includes a metal lead layer that is insulated from the metal wiring layer. The metal lead layer realizes the electrical lead-out of the first electrode material layer and the second electrode material layer.

6. The CMOS image sensor according to claim 1, characterized in that, The infrared light absorbing layer is a tungsten oxide layer, the infrared absorption auxiliary layer is a silicon oxide layer, the thickness of the tungsten oxide layer is between 5nm and 20nm, the diameter of the tungsten oxide pillar structure of the tungsten oxide layer is between 15nm and 25nm, and the distance between adjacent tungsten oxide pillar structures is between 25nm and 40nm.

7. The CMOS image sensor according to any one of claims 1 to 6, characterized in that, The CMOS image sensor further includes a microlens layer disposed on the incident surface of the pixel structure layer; and / or, each pixel unit includes at least one infrared photosensitive pixel, and the infrared light absorption layer corresponds to the pixel structure layer.

8. An electronic device, characterized in that, The electronic device includes a CMOS image sensor as described in any one of claims 1 to 7.

9. A method for fabricating a CMOS image sensor as described in any one of claims 1-7, characterized in that, The preparation method includes the following steps: Provide semiconductor substrates; The pixel structure layer is fabricated in the semiconductor substrate, and the pixel structure layer includes the pixel unit; The infrared absorption auxiliary layer, the first electrode material layer, the infrared light absorption layer, and the second electrode material layer are fabricated on the pixel structure layer; The conductive interconnect layer is fabricated on the second electrode material layer, and an interconnect structure is fabricated between the conductive interconnect layer and the pixel unit; as well as The semiconductor substrate is flipped over, and a microlens layer is formed on the side of the semiconductor substrate away from the infrared light absorption layer.

10. The method for fabricating a CMOS image sensor according to claim 9, characterized in that, The method for fabricating the interconnect structure includes the following steps: The interconnect vias are formed by sequentially etching the second electrode material layer, the infrared light absorption layer, the first electrode material layer, and the infrared absorption auxiliary layer, and then the isolation structure layer and the conductive structure layer are prepared.

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