Overcurrent protection circuit and DC-DC converter

Abstract

The present invention provides an overcurrent protection circuit and a DC-DC converter, which relates to the technical field of power supply, wherein the circuit includes: a frequency foldback module and a modulation module, the frequency foldback module is connected to the modulation module, wherein: the frequency foldback module includes a frequency foldback circuit and a main controller, the frequency foldback circuit is connected to the main controller, and the frequency foldback circuit and the main controller are both connected to the modulation module, the frequency foldback circuit is used to adjust the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle when the output is overloaded and the foldback frequency is greater than or equal to the preset frequency; the main controller is used to adjust the foldback frequency of the next switching cycle when the output is overloaded and the foldback frequency is less than the preset frequency; the modulation module is connected to the power conversion circuit. The present invention can achieve effective overcurrent protection by adjusting the foldback frequency of the next switching cycle to avoid the continuous increase of the inductor current under the peak current control mode and when the output is overloaded.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply, and in particular to an overcurrent protection circuit and a DC-DC converter. Background Art

[0002] A DC-to-DC converter, also known as a DC-DC converter, can convert a DC power supply into a DC power supply of different voltages or a DC-approximate DC power supply. DC-DC converters have the advantages of high efficiency, high power density and high reliability, and are widely used in various fields. For DC-DC converters, the most commonly used control methods include voltage control and current control. Among them, the current control method is further divided into average current control, peak current control and hysteresis current control.

[0003] When the DC-DC converter adopts peak current control mode, in each switching cycle, when the peak current signal increases from the initial value to the feedback signal value of the output voltage, the main switch tube is turned off, thereby adjusting the system duty cycle to maintain a stable output voltage when the input voltage and load change, thereby forming cycle-by-cycle overcurrent protection.

[0004] However, when the output is overloaded, the DC-DC converter needs to operate at a low duty cycle to ensure that the inductor current is lower than the peak current limit threshold. Due to the limitation of the minimum on-time, the duty cycle cannot be further reduced, and the decay rate of the inductor current slows down after the main switch is turned off, and the inductor is more likely to saturate, causing the peak current to continue to rise in each switching cycle, causing the actual operating current of the inductor to be greater than the cycle-by-cycle current limit threshold set by the system, resulting in the inability to perform effective overcurrent protection in the event of output overload or even short circuit. Summary of the invention

[0005] The present invention provides an overcurrent protection circuit and a DC-DC converter, which are used to solve the defect in the prior art that effective overcurrent protection cannot be performed in the case of output overload or even short circuit. By adjusting the return frequency of the next switching cycle, the inductor current is prevented from continuously increasing when the output is overloaded under the peak current control mode, thereby achieving effective overcurrent protection.

[0006] The present invention provides an overcurrent protection circuit, comprising: a frequency foldback module and a modulation module, wherein the frequency foldback module is connected to the modulation module, wherein:

[0007] The frequency foldback module includes a frequency foldback circuit and a main controller, the frequency foldback circuit is connected to the main controller, and the frequency foldback circuit and the main controller are both connected to the modulation module, the frequency foldback circuit is used to adjust the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle when the output is overloaded and the foldback frequency is greater than or equal to the preset frequency; the main controller is used to adjust the foldback frequency of the next switching cycle when the output is overloaded and the foldback frequency is less than the preset frequency;

[0008] The modulation module is connected to the power conversion circuit, and is used to generate a pulse width modulation signal based on the foldback frequency of the next switching cycle to perform overcurrent protection.

[0009] According to the overcurrent protection circuit provided by the present invention, the frequency foldback circuit includes: a first comparison circuit, a second comparison circuit and a third comparison circuit, wherein:

[0010] The input ends of the first comparison circuit and the second comparison circuit are both connected to the output end of the analog-to-digital conversion module, the output ends of the first comparison circuit and the second comparison circuit are both connected to the input end of the third comparison circuit, the first output end of the third comparison circuit is connected to the modulation module, and the second output end of the third comparison circuit is connected to the main controller;

[0011] The first comparison circuit is used to determine a first state signal of the frequency foldback circuit based on an output voltage sampling value and a preset voltage value in the output sampling value;

[0012] The second comparison circuit is used to determine a second state signal of the frequency foldback circuit based on the output current sampling value and the preset current value in the output sampling value;

[0013] The third comparison circuit is used to determine the clock period of the next switching cycle based on the first state signal, the second state signal and the preset period value, so as to determine the foldback frequency of the next switching cycle.

[0014] According to the overcurrent protection circuit provided by the present invention, the third comparison circuit comprises: a first subcircuit, a second subcircuit and a data selector S1, wherein:

[0015] The first input terminal of the first sub-circuit is connected to the output terminal of the first comparison circuit and the second input terminal of the second sub-circuit, the second input terminal of the first sub-circuit is connected to the output terminal of the second comparison circuit and the third input terminal of the second sub-circuit, the third input terminal of the first sub-circuit is connected to the second sub-circuit, the output terminal of the first sub-circuit is connected to the first input terminal of the second sub-circuit and the first input terminal of the data selector S1, and the first sub-circuit is used to determine the state cycle value;

[0016] The output end of the second sub-circuit is connected to the main controller, and is used to determine a foldback error signal based on the first state signal, the second state signal, the state cycle value and the preset cycle value when the state cycle value is less than the preset cycle value, wherein the foldback error signal is used to instruct the main controller to determine the foldback frequency of the next switching cycle;

[0017] The output control end of the data selector S1 is connected to the first sub-circuit, the output end of the data selector S1 is connected to the modulation module, and the output end of the data selector S1 serves as the first output end of the third comparison circuit. The data selector S1 is used to determine the clock period of the next switching cycle according to the initial period value or the state period value to determine the return frequency of the next switching cycle.

[0018] According to the overcurrent protection circuit provided by the present invention, the first sub-circuit includes an AND gate Q1 and an adder, wherein:

[0019] The first input terminal of the AND gate Q1 serves as the first input terminal of the first sub-circuit, the second input terminal of the AND gate Q1 serves as the second input terminal of the first sub-circuit, the third input terminal of the AND gate Q1 serves as the third input terminal of the first sub-circuit, the output terminal of the AND gate Q1 is connected to the first input terminal of the adder and the output control terminal of the data selector S1, the AND gate Q1 is used to generate an enable signal of the adder and an output control signal of the data selector S1, and the enable signal is equal to the output control signal;

[0020] The second input end of the adder is connected to the second input end of the data selector S1, the output end of the adder serves as the output end of the first subcircuit, and the adder is used to determine the state cycle value based on the initial cycle value when the enable signal is valid.

[0021] According to the overcurrent protection circuit provided by the present invention, the second sub-circuit includes: a third comparator and an AND gate Q2, wherein:

[0022] A first input terminal of a third comparator is used as a first input terminal of the second sub-circuit, an output terminal of the third comparator is connected to a third input terminal of the first sub-circuit and a third input terminal of the AND gate Q2, and the third comparator is used to determine a third state signal based on a state cycle value and a preset cycle value inputted to a second input terminal of the third comparator;

[0023] The first input terminal of the AND gate Q2 serves as the second input terminal of the second sub-circuit, the second input terminal of the AND gate Q2 serves as the third input terminal of the second sub-circuit, the output terminal of the AND gate Q2 serves as the output terminal of the second sub-circuit, and the AND gate Q2 is used to determine the return error signal based on the first state signal, the second state signal and the third state signal when the state cycle value is less than the preset cycle value.

[0024] According to the overcurrent protection circuit provided by the present invention, the first comparison circuit includes: a first filter and a first comparator, the first filter is connected to the output end of the analog-to-digital conversion module and the first input end of the first comparator, the first filter is used to determine the filtered voltage sampling value corresponding to the output voltage sampling value, the output end of the first comparator serves as the output end of the first comparison circuit, and the first comparator is used to determine the first state signal based on the filtered voltage sampling value and the preset voltage value.

[0025] According to the overcurrent protection circuit provided by the present invention, the second comparison circuit includes: a second filter and a second comparator, the second filter is connected to the output end of the analog-to-digital conversion module and the first input end of the second comparator, the second filter is used to determine the filtered current sampling value corresponding to the output current sampling value, the output end of the second comparator serves as the output end of the second comparison circuit, and the second comparator is used to determine the second state signal based on the filtered current sampling value and the preset current value.

[0026] According to the overcurrent protection circuit provided by the present invention, the modulation module includes: a compensation unit and a digital pulse width modulation unit, wherein:

[0027] The compensation unit is connected to the analog-to-digital conversion module, the frequency foldback circuit and the digital pulse width modulation unit, and the compensation unit is used to determine the duty cycle value of the power conversion circuit based on the foldback frequency of the next switching cycle;

[0028] The digital pulse width modulation unit is respectively connected to the analog-to-digital conversion module, the frequency foldback unit and the main controller. The digital pulse width modulation unit is used to adjust the duty cycle of the power conversion circuit based on the duty cycle value or the foldback frequency output by the main controller to perform overcurrent protection. The priority of the foldback frequency output by the main controller is higher than the priority of the foldback frequency received by the compensation unit.

[0029] The present invention further provides a DC-DC converter, comprising a drive circuit, a power conversion circuit, an analog-to-digital conversion module and an overcurrent protection circuit as described in any one of the above items, wherein:

[0030] The driving circuit and the analog-to-digital conversion module are connected to the overcurrent protection circuit and the power conversion circuit respectively;

[0031] The analog-to-digital conversion module is used to perform analog-to-digital conversion on the output sampling value of the current switching cycle output by the power conversion circuit, the drive circuit is used to generate a drive signal based on the pulse width modulation signal output by the overcurrent protection circuit, and the power conversion circuit is used to adjust the output value of the next switching cycle based on the drive signal.

[0032] According to the DC-DC converter provided by the present invention, the power conversion module comprises: a switch unit and a conversion unit, wherein:

[0033] The switch unit is connected to the conversion unit and is used to adjust the switch state of the switch unit based on the drive signal;

[0034] The conversion unit is connected to the analog-to-digital conversion module, and the conversion unit is used to adjust the output value of the next switching cycle based on the switch state.

[0035] The overcurrent protection circuit and DC-DC converter provided by the present invention, when the output is overloaded, adjust the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle through the frequency foldback circuit in the frequency foldback module when the foldback frequency is greater than or equal to the preset frequency, or adjust the foldback frequency of the next switching cycle through the main controller in the frequency foldback module when the foldback frequency is less than the preset frequency. The modulation module generates a pulse width modulation signal based on the foldback frequency of the next switching cycle, adjusts the duty cycle of the power conversion circuit, and avoids the continuous increase of the inductor current in the power conversion circuit, so as to realize effective overcurrent protection in different situations after the output is overloaded, and improve the reliability of the overcurrent protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 This is one of the connection diagrams of the overcurrent protection circuit provided by an embodiment of the present invention;

[0038] Figure 2 This is the second connection diagram of the overcurrent protection circuit provided by the embodiment of the present invention;

[0039] Figure 3 is a connection diagram of a frequency foldback circuit provided by an embodiment of the present invention;

[0040] Figure 4 This is the third connection diagram of the overcurrent protection circuit provided by the embodiment of the present invention;

[0041] Figure 5 Schematic diagram of the connection of the DC-DC converter provided by the embodiment of the present invention.

[0042] Reference numerals:

[0043] 100: overcurrent protection circuit; 110: modulation module; 111: digital pulse width modulation unit; 112: compensation unit; 120: frequency foldback module; 121: frequency foldback circuit; 1211: first comparison circuit; 1212: second comparison circuit; 1213: third comparison circuit; 1214: first sub-circuit; 1215: second sub-circuit; 122: main controller; 200: analog-to-digital conversion module; 300: drive circuit; 400: power conversion circuit; 410: switch unit; 420: conversion unit. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] In view of the problem in the prior art that in the peak current control mode and when the output is overloaded, the inductor current continues to increase and effective overcurrent protection cannot be performed, an embodiment of the present invention provides an overcurrent protection circuit. Figure 1 FIG. 1 is one of the connection diagrams of the overcurrent protection circuit provided in an embodiment of the present invention. Figure 1 As shown, the overcurrent protection circuit 100 includes: a frequency foldback module 120 and a modulation module 110, wherein the frequency foldback module 120 is connected to the modulation module 110, wherein:

[0046] The frequency foldback module 120 includes a frequency foldback circuit 121 and a main controller 122, wherein the frequency foldback circuit 121 is connected to the main controller 122, and both the frequency foldback circuit 121 and the main controller 122 are connected to the modulation module 110, wherein the frequency foldback circuit 121 is used to adjust the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle when the output is overloaded and the foldback frequency is greater than or equal to the preset frequency; and the main controller 122 is used to adjust the foldback frequency of the next switching cycle when the output is overloaded and the foldback frequency is less than the preset frequency;

[0047] The modulation module 110 is connected to the power conversion circuit 400 , and the modulation module 110 is used to generate a pulse width modulation signal based on the foldback frequency of the next switching cycle to perform over-current protection.

[0048] Specifically, when the output current increases due to overload at the output end of the power conversion circuit 400 and the loop cannot maintain a stable output, the output voltage begins to drop, and the modulation module 110 needs to work at the lowest duty cycle to make the output inductor current lower than the peak current limit threshold and decrease with each switching cycle. However, due to the limitation of the minimum on-time, the duty cycle cannot be further reduced, resulting in a slower decay rate of the inductor current, and the inductor is more likely to saturate, resulting in the peak current continuing to rise in each switching cycle, causing the actual inductor current to be greater than the set cycle-by-cycle current limit threshold, and unable to achieve effective overcurrent protection. Therefore, in the embodiment of the present invention, when the output end of the power conversion circuit 400 is overloaded, the frequency foldback circuit 121 and the main controller 122 in the frequency foldback module 120 adjust the foldback frequency of the next switching cycle respectively. For example, when the foldback frequency is greater than or equal to the preset frequency, the frequency foldback circuit 121 can adjust the foldback frequency of the next switching cycle through the output sampling value and the preset cycle value of the current switching cycle, and when the foldback frequency is less than the preset frequency, the main controller 122 can autonomously generate the clock cycle of the next switching cycle to adjust the foldback frequency of the next switching cycle. The foldback frequency of the next switching cycle is the actual operating frequency of the next switching cycle, and adjusting the foldback frequency of the next switching cycle is to reduce the foldback frequency of the next switching cycle. The modulation module 110 adjusts the duty cycle through the foldback frequency of the next switching cycle. After the foldback frequency of the next switching cycle is reduced, the duration of the next switching cycle is increased, so that after the main switch tube is turned off, the inductor current can be fully decayed in the next switching cycle, thereby reducing the rising speed of the peak current and the speed of inductor saturation, and then the inductor current can be less than the cycle-by-cycle current limiting threshold set by the system, realizing effective overcurrent protection.

[0049] It should be noted that the preset frequency can be the lowest foldback frequency, taking the normal working frequency as 1MHz and the lowest foldback frequency as 300KHz as an example, when it is in the interval of (300KHz, 1MHz), the foldback frequency of the next switching cycle can be adjusted by the frequency foldback circuit 121, and when the foldback frequency reaches 300KHz, the foldback frequency of the next switching cycle can be adjusted by the main controller 122. In addition, the frequency foldback circuit 121 only works when the output end of the power conversion circuit 400 is overloaded.

[0050] Optionally, Figure 2 FIG. 2 is a second connection diagram of the overcurrent protection circuit provided in an embodiment of the present invention. Figure 2As shown, the frequency foldback circuit 121 includes: a first comparison circuit 1211, a second comparison circuit 1212 and a third comparison circuit 1213, wherein:

[0051] The input ends of the first comparison circuit 1211 and the second comparison circuit 1212 are both connected to the output end of the analog-to-digital conversion module 200, the output ends of the first comparison circuit 1211 and the second comparison circuit 1212 are both connected to the input end of the third comparison circuit 1213, the first output end of the third comparison circuit 1213 is connected to the modulation module 110, and the second output end of the third comparison circuit 1213 is connected to the main controller 122;

[0052] The first comparison circuit 1211 is used to determine the first state signal of the frequency foldback circuit 121 based on the output voltage sampling value and the preset voltage value in the output sampling value;

[0053] The second comparison circuit 1212 is used to determine the second state signal of the frequency foldback circuit 121 based on the output current sampling value and the preset current value in the output sampling value;

[0054] The third comparison circuit 1213 is used to determine the clock period of the next switching cycle based on the first state signal, the second state signal and the preset period value, so as to determine the return frequency of the next switching cycle.

[0055] Specifically, the first comparison circuit 1211 compares the output voltage sampling value in the output sampling value of the output end of the power conversion circuit 400 with the preset voltage value. If the output voltage sampling value is lower than the preset voltage value, the first state signal is a high level signal. If the output voltage sampling value is higher than or equal to the preset voltage value, the first state signal is a low level signal. The second comparison circuit 1212 compares the output current sampling value in the output sampling value of the output end of the power conversion circuit 400 with the preset current value. If the output current sampling value is higher than the preset current value, the second state signal is a high level signal. If the output current sampling value is lower than or equal to the preset current value, the second state signal is a low level signal. When both the first state signal and the second state signal are high level signals, it can be determined that the output of the power conversion circuit 400 is in an overload state, and the frequency foldback circuit 121 starts to work. After the frequency foldback circuit 121 starts to work, in addition to the first state signal and the second state signal, the clock period of the next switching cycle is determined according to the preset period value, and then the foldback frequency of the next switching cycle is determined. The foldback frequency of the next switching cycle is the inverse of the clock period of the next switching cycle.

[0056] Optionally, the preset current value may be a maximum current value.

[0057] Optionally, Figure 3 1 is a connection diagram of the frequency foldback circuit 121 provided in an embodiment of the present invention. Figure 3 As shown, the third comparison circuit 1213 includes: a first sub-circuit 1214, a second sub-circuit 1215 and a data selector S1, wherein:

[0058] The first input terminal of the first subcircuit 1214 is connected to the output terminal of the first comparison circuit 1211 and the second input terminal of the second subcircuit 1215, the second input terminal of the first subcircuit 1214 is connected to the output terminal of the second comparison circuit 1212 and the third input terminal of the second subcircuit 1215, the third input terminal of the first subcircuit 1214 is connected to the second subcircuit 1215, the output terminal of the first subcircuit 1214 is connected to the first input terminal of the second subcircuit 1215 and the first input terminal of the data selector S1, and the first subcircuit 1214 is used to determine the state cycle value;

[0059] The output end of the second sub-circuit 1215 is connected to the main controller 122, and is used to determine a foldback error signal based on the first state signal, the second state signal, the state cycle value and the preset cycle value when the state cycle value is less than the preset cycle value, and the foldback error signal is used to instruct the main controller 122 to determine the foldback frequency of the next switching cycle;

[0060] The output control end of the data selector S1 is connected to the first sub-circuit 1214, the output end of the data selector S1 is connected to the modulation module 110, and the output end of the data selector S1 serves as the first output end of the third comparison circuit 1213. The data selector S1 is used to determine the clock period of the next switching cycle according to the initial period value or the state period value to determine the return frequency of the next switching cycle.

[0061] Alternatively, if Figure 3 As shown, the first sub-circuit 1214 includes an AND gate Q1 and an adder, wherein:

[0062] The first input terminal of the AND gate Q1 serves as the first input terminal of the first sub-circuit 1214, the second input terminal of the AND gate Q1 serves as the second input terminal of the first sub-circuit 1214, the third input terminal of the AND gate Q1 serves as the third input terminal of the first sub-circuit 1214, the output terminal of the AND gate Q1 is connected to the first input terminal of the adder and the output control terminal of the data selector S1, the AND gate Q1 is used to generate an enable signal of the adder and an output control signal of the data selector S1, and the enable signal is equal to the output control signal;

[0063] The second input end of the adder is connected to the second input end of the data selector S1, and the output end of the adder serves as the output end of the first sub-circuit 1214. The adder is used to determine the state cycle value based on the initial cycle value when the enable signal is valid.

[0064] Alternatively, if Figure 3 As shown, the second sub-circuit 1215 includes: a third comparator and an AND gate Q2, wherein:

[0065] The first input terminal of the third comparator serves as the first input terminal of the second sub-circuit 1215, the output terminal of the third comparator is connected to the third input terminal of the first sub-circuit 1214 and the third input terminal of the AND gate Q2, and the third comparator is used to determine the third state signal based on the state cycle value and the preset cycle value inputted by the second input terminal of the third comparator;

[0066] The first input terminal of the AND gate Q2 serves as the second input terminal of the second sub-circuit 1215, the second input terminal of the AND gate Q2 serves as the third input terminal of the second sub-circuit 1215, and the output terminal of the AND gate Q2 serves as the output terminal of the second sub-circuit 1215. The AND gate Q2 is used to determine the return error signal based on the first state signal, the second state signal and the third state signal when the state cycle value is less than the preset cycle value.

[0067] Specifically, the normal working state cycle value is used as the initial cycle value, and the maximum cycle value allowed by foldback is used as the preset cycle value. When the output is overloaded, that is, the output voltage sampling value is lower than the preset voltage value, and the output current sampling value is higher than the preset current value, that is, in the initial state of output overload, the enable end of the adder in the first subcircuit 1214 is in a valid state, and the adder adds 1 on the basis of the initial cycle value to obtain the state cycle value of the next switching cycle. The third comparator compares the state cycle value with the preset cycle value. Obviously, in the initial state, the state cycle value is less than the preset cycle value, and the third comparator outputs a low-level signal, so that the third input end of the AND gate Q1 is a high-level signal. At the same time, the input of the first input end of the data selector S1 is the initial cycle value, the input of the second input end of the data selector S1 is the state cycle value, and the input of the output control end of the data selector S1 is a valid signal, so that the output end of the data selector S1 outputs the state cycle value, that is, the state cycle value is determined as the clock cycle of the next switching cycle, and the foldback frequency of the next switching cycle can be obtained by the inverse of the clock cycle of the next switching cycle. Afterwards, due to the output overload state, the first input terminal and the second input terminal of the AND gate Q1 are both high-level signals, so that the output terminal of the AND gate Q1 outputs a high-level signal, and the enable signal of the adder is a valid signal, and the adder continues to add 1 based on the clock cycle of the previous switching cycle. At the same time, the output of the AND gate Q2 is a low-level signal, that is, the return error signal is a low-level signal, and the low-level signal is an invalid signal, and it is determined that the clock cycle output by the data selector S1 is output to the modulation module 110 to adjust the duty cycle. Repeat the above method until the enable signal of the adder is a low-level signal, and the low-level signal is an invalid signal. At this time, the adder no longer adds 1 based on the clock cycle of the previous switching cycle to obtain the next switching cycle.

[0068] Secondly, in the process that the enable signal of the adder is valid and the output state cycle value is always less than the preset cycle value, if the output voltage sampling value and the output current sampling value return to normal during the frequency foldback process, the first comparison circuit 1211 and the second comparison circuit 1212 both output low-level signals, so that the output end of the AND gate Q1 outputs a low-level signal, that is, the enable signal and the output control signal are both low-level signals, the adder has no output, and the output control end of the data selector S1 is a low-level signal, and the initial cycle value is selected as the clock cycle of the next switching cycle. In addition, the second sub-circuit 1215 outputs an invalid foldback error signal.

[0069] If the output voltage sampling value and the output current sampling value cannot be restored to normal during the frequency foldback process, resulting in the foldback frequency of the current switching cycle being less than the preset frequency, that is, when the clock period of the current switching cycle is greater than the preset period value, the third comparator outputs a high-level signal, so that the first input terminal, the second input terminal and the third input terminal of the AND gate Q2 are all high-level signals, and the AND gate Q2 outputs a valid foldback error signal and sends it to the main controller 122, and the main controller 122 will autonomously determine the clock period of the next switching cycle. At the same time, since the output value of the third comparator is a high-level signal, the AND gate Q1 outputs a low-level signal, so that the generated enable signal and the output control signal are both invalid signals, and the data selector S1 will select the initial period value as the clock period of the next switching cycle. However, at this time, two clock periods are generated at the same time, but since the priority of the clock period generated by the main controller 122 is higher than the priority of the clock period of the data selector S1, the modulation module 110 will adjust the duty cycle based on the clock period generated by the main controller 122. At this time, the frequency foldback circuit 121 no longer works and reports an error to the main controller 122.

[0070] Alternatively, if Figure 3 As shown, the first comparison circuit 1211 includes: a first filter and a first comparator, the first filter is connected to the output end of the analog-to-digital conversion module 200 and the first input end of the first comparator, the first filter is used to determine the filtered voltage sampling value corresponding to the output voltage sampling value, the output end of the first comparator serves as the output end of the first comparison circuit 1211, and the first comparator is used to determine the first state signal based on the filtered voltage sampling value and the preset voltage value.

[0071] Specifically, after collecting the output sampling value, the first filter in the first comparison circuit 1211 first filters the output voltage sampling value to obtain the filtered voltage sampling value, and the first comparator compares the filtered voltage sampling value with the preset voltage value. If the filtered voltage sampling value is lower than the preset voltage value, the first state signal output by the first comparator is a high-level signal. If the filtered voltage sampling value is higher than the preset voltage value, the first state signal output by the first comparator is a low-level signal, and the obtained first state signal is transmitted to the first input terminal of the AND gate Q1 respectively, so as to facilitate the subsequent determination of whether the output is overloaded. At the same time, the first state signal is also transmitted to the first input terminal of the AND gate Q2, so as to facilitate the subsequent judgment of whether the return error occurs, so as to meet the adjustment of the return frequency under different circumstances.

[0072] Alternatively, if Figure 3As shown, the second comparison circuit 1212 includes: a second filter and a second comparator, the second filter is connected to the output end of the analog-to-digital conversion module 200 and the first input end of the second comparator, the second filter is used to determine the filtered current sampling value corresponding to the output current sampling value, the output end of the second comparator serves as the output end of the second comparison circuit 1212, and the second comparator is used to determine the second state signal based on the filtered current sampling value and the preset current value.

[0073] Specifically, after collecting the output sampling value, the second filter in the second comparison circuit 1212 first filters the output current sampling value to obtain the filtered current sampling value, and the second comparator compares the filtered current sampling value with the preset current value. If the filtered current sampling value is higher than the preset current value, the second state signal output by the second comparator is a high-level signal. If the filtered current sampling value is lower than the preset current value, the second state signal output by the second comparator is a low-level signal, and the obtained second state signal is transmitted to the second input terminal of the AND gate Q1 respectively, so as to facilitate the subsequent determination of whether the output is overloaded. At the same time, the second state signal is also transmitted to the second input terminal of the AND gate Q2, so as to facilitate the subsequent judgment of whether the return error occurs, so as to meet the adjustment of the return frequency under different circumstances.

[0074] Optionally, Figure 4 FIG. 3 is a third connection diagram of the overcurrent protection circuit provided in an embodiment of the present invention. Figure 4 As shown, the modulation module 110 includes: a compensation unit 112 and a digital pulse width modulation unit 111, wherein:

[0075] The compensation unit 112 is connected to the analog-to-digital conversion module 200, the frequency foldback circuit 121 and the digital pulse width modulation unit 111, and the compensation unit 112 is used to determine the duty cycle value of the power conversion circuit 400 based on the foldback frequency of the next switching cycle;

[0076] The digital pulse width modulation unit 111 is respectively connected to the analog-to-digital conversion module 200, the frequency foldback unit and the main controller 122. The digital pulse width modulation unit 111 is used to adjust the duty cycle of the power conversion circuit 400 based on the duty cycle value or the foldback frequency output by the main controller 122 to perform overcurrent protection. The priority of the foldback frequency output by the main controller 122 is higher than the priority of the foldback frequency received by the compensation unit 112.

[0077] Specifically, during the period when the third comparator in the frequency foldback circuit 121 outputs a low-level signal, that is, the foldback error signal output by the AND gate Q2 is a low-level signal, and the foldback frequency of the next switching cycle is determined by the clock period of the next switching cycle output by the data selector S1, the clock period of the next switching cycle is simultaneously sent to the digital pulse width modulation unit 111 and the compensation unit 112, and the compensation unit 112 calculates the corresponding duty cycle value according to the clock period, and sends the duty cycle value to the digital pulse width modulation unit 111, so as to adjust the duty cycle of the power conversion circuit 400 according to the duty cycle value to perform overcurrent protection. In addition, when the third comparator in the frequency foldback circuit 121 outputs a high-level signal, that is, when the foldback error signal output by the AND gate Q2 is a high-level signal, the digital pulse width modulation unit 111 will receive the duty cycle value sent by the compensation unit 112 and the foldback frequency determined based on the clock cycle of the next switching cycle determined by the main controller 122. Since the foldback frequency determined by the main controller 122 has a higher priority than the duty cycle value, the digital pulse width modulation unit 111 will adjust the duty cycle of the power conversion circuit 400 based on the foldback frequency determined by the main controller 122, and ignore the duty cycle value calculated by the compensation unit 112.

[0078] The overcurrent protection circuit provided in the embodiment of the present invention, when the output is overloaded, adjusts the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle through the frequency foldback circuit 121 in the frequency foldback module 120 when the foldback frequency is greater than or equal to the preset frequency, or adjusts the foldback frequency of the next switching cycle through the main controller 122 in the frequency foldback module 120 when the foldback frequency is less than the preset frequency. The modulation module 110 generates a pulse width modulation signal based on the foldback frequency of the next switching cycle to adjust the duty cycle of the power conversion circuit 400. The inductor current can be fully attenuated in the next switching cycle, thereby reducing the rising speed of the peak current and the speed of inductor saturation, and further making the inductor current less than the cycle-by-cycle current limiting threshold set by the system, avoiding the continuous increase of the inductor current in the power conversion circuit 400, so as to achieve effective overcurrent protection in different situations after the output is overloaded, and improve the reliability of overcurrent protection. In addition, the foldback frequency decreases continuously and the decreasing process is smooth, the adjustment range of the foldback frequency is wide, and the adjustment accuracy of the foldback frequency is ensured to be high based on the cooperation of the digital pulse width modulation unit 111. At the same time, when determining the foldback frequency, the sampled output sample value is directly used to modify the cycle value of the loop, thereby improving the response speed and timeliness of the overcurrent protection.

[0079] The embodiment of the present invention further provides a DC-DC converter, Figure 5 is a connection diagram of a DC-DC converter provided in an embodiment of the present invention, such as Figure 5As shown, the DC-DC converter includes a drive circuit 300, a power conversion circuit 400, an analog-to-digital conversion module 200 and an overcurrent protection circuit 100 as described in any one of the above items, wherein:

[0080] The driving circuit 300 and the analog-to-digital conversion module 200 are connected to the overcurrent protection circuit 100 and the power conversion circuit 400 respectively;

[0081] The analog-to-digital conversion module 200 is used to perform analog-to-digital conversion on the output sampling value of the current switching cycle output by the power conversion circuit 400, the drive circuit 300 is used to generate a drive signal based on the pulse width modulation signal output by the overcurrent protection circuit 100, and the power conversion circuit 400 is used to adjust the output value of the next switching cycle based on the drive signal.

[0082] Alternatively, if Figure 5 As shown, the power conversion module includes: a switch unit 410 and a conversion unit 420, wherein:

[0083] The switch unit 410 is connected to the conversion unit 420 and is used to adjust the switch state of the switch unit 410 based on the driving signal;

[0084] The conversion unit 420 is connected to the analog-to-digital conversion module 200 , and the conversion unit 420 is used to adjust the output value of the next switching cycle based on the switch state.

[0085] Specifically, the driving circuit 300 generates a driving signal according to the pulse width modulation signal generated by the digital pulse width modulation unit 111, and controls the conduction or shutdown of the two switching tubes in the switching unit 410 through the driving signal, thereby controlling the output value in the conversion unit 420. The output value can be an output voltage value or an output current value. By sampling the output voltage value, the above-mentioned output voltage sampling value can be obtained, and by sampling the output current value, the above-mentioned output current sampling value can be obtained.

[0086] like Figure 5 As shown, the switch unit 410 includes a MOS transistor Q3 and a MOS transistor Q4, the gate of the MOS transistor Q3 and the gate of the MOS transistor Q4 are both connected to the output end of the driving circuit 300, the drain of the MOS transistor Q3 is connected to the power supply, the source of the MOS transistor Q3 is connected to the drain of the MOS transistor Q4, and the source of the MOS transistor Q3 serves as the output end of the switch unit 410, and the source of the MOS transistor Q4 is grounded. The output end of the switch unit 410 is connected to the conversion unit 420 to adjust the output value of the conversion unit 420.

[0087] Alternatively, if Figure 5As shown, the conversion unit 420 may include an inductor L1, resistors R1-R3 and a capacitor C1. One end of the inductor L1 is connected to the output end of the switch unit 410 and serves as the input end of the conversion unit 420. The other end of the inductor L1 is connected to one end of the resistor R1 and the first input end of the analog-to-digital conversion module 200. The other end of the resistor R1 is connected to the output end of the conversion unit 420, one end of the resistor R2 and the second input end of the analog-to-digital conversion module 200. The other end of the resistor R2 is connected to the third input end of the analog-to-digital conversion module 200 and one end of the resistor R3. The other end of the resistor R3 is connected to one end of the capacitor C1 and is grounded. The other end of the capacitor C1 is connected to the output end of the conversion unit 420. The output end of the conversion unit 420 is the output end of the power conversion circuit 400. It should be noted that the conversion unit 420 may be a boost circuit or a buck circuit. The conversion unit 420 in the embodiment of the present invention is not limited to the following. Figure 5 The circuit shown.

[0088] The DC-DC converter provided in the embodiment of the present invention, when the output is overloaded, adjusts the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle through the frequency foldback circuit 121 of the frequency foldback module 120 in the overcurrent protection circuit 100 when the foldback frequency is greater than or equal to the preset frequency, or adjusts the foldback frequency of the next switching cycle through the main controller 122 in the frequency foldback module 120 when the foldback frequency is less than the preset frequency. The modulation module 110 generates a pulse width modulation signal based on the foldback frequency of the next switching cycle to adjust the duty cycle of the power conversion circuit 400. The inductor current can be fully attenuated in the next switching cycle, thereby reducing the rising speed of the peak current and the speed of inductor saturation, so that the inductor current can be less than the cycle-by-cycle current limiting threshold set by the system, avoiding the continuous increase of the inductor current in the power conversion circuit 400, so as to achieve effective overcurrent protection in different situations after the output is overloaded, and improve the reliability of the overcurrent protection. In addition, the foldback frequency decreases continuously and the decreasing process is smooth, the adjustment range of the foldback frequency is wide, and the adjustment accuracy of the foldback frequency is ensured to be high based on the cooperation of the digital pulse width modulation unit 111. At the same time, when determining the foldback frequency, the sampled output sample value is directly used to modify the cycle value of the loop, thereby improving the response speed and timeliness of the overcurrent protection.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An overcurrent protection circuit, characterized in that: include: A frequency foldback module and a modulation module, wherein the frequency foldback module is connected to the modulation module, wherein: The frequency foldback module includes a frequency foldback circuit and a main controller, the frequency foldback circuit is connected to the main controller, and the frequency foldback circuit and the main controller are both connected to the modulation module, the frequency foldback circuit is used to adjust the foldback frequency of the next switching cycle based on the output sampling value and the preset cycle value of the current switching cycle when the output is overloaded and the foldback frequency is greater than or equal to the preset frequency; the main controller is used to adjust the foldback frequency of the next switching cycle when the output is overloaded and the foldback frequency is less than the preset frequency; The modulation module is connected to the power conversion circuit, and the modulation module is used to generate a pulse width modulation signal based on the foldback frequency of the next switching cycle to perform overcurrent protection; The frequency foldback circuit comprises: a first comparison circuit, a second comparison circuit and a third comparison circuit, wherein: The input ends of the first comparison circuit and the second comparison circuit are both connected to the output end of the analog-to-digital conversion module, the output ends of the first comparison circuit and the second comparison circuit are both connected to the input end of the third comparison circuit, the first output end of the third comparison circuit is connected to the modulation module, and the second output end of the third comparison circuit is connected to the main controller; The first comparison circuit is used to determine a first state signal of the frequency foldback circuit based on an output voltage sampling value and a preset voltage value in the output sampling value; The second comparison circuit is used to determine a second state signal of the frequency foldback circuit based on the output current sampling value and the preset current value in the output sampling value; The third comparison circuit is used to determine the clock period of the next switching cycle based on the first state signal, the second state signal and the preset period value, so as to determine the foldback frequency of the next switching cycle.

2. The overcurrent protection circuit according to claim 1, characterized in that: The third comparison circuit comprises: a first sub-circuit, a second sub-circuit and a data selector S1, wherein: The first input terminal of the first sub-circuit is connected to the output terminal of the first comparison circuit and the second input terminal of the second sub-circuit, the second input terminal of the first sub-circuit is connected to the output terminal of the second comparison circuit and the third input terminal of the second sub-circuit, the third input terminal of the first sub-circuit is connected to the second sub-circuit, the output terminal of the first sub-circuit is connected to the first input terminal of the second sub-circuit and the first input terminal of the data selector S1, and the first sub-circuit is used to determine the state cycle value; The output end of the second sub-circuit is connected to the main controller, and is used to determine a foldback error signal based on the first state signal, the second state signal, the state cycle value and the preset cycle value when the state cycle value is less than the preset cycle value, wherein the foldback error signal is used to instruct the main controller to determine the foldback frequency of the next switching cycle; The output control end of the data selector S1 is connected to the first sub-circuit, the output end of the data selector S1 is connected to the modulation module, and the output end of the data selector S1 serves as the first output end of the third comparison circuit. The data selector S1 is used to determine the clock period of the next switching cycle according to the initial period value or the state period value to determine the return frequency of the next switching cycle.

3. The overcurrent protection circuit according to claim 2, characterized in that: The first sub-circuit comprises an AND gate Q1 and an adder, wherein: The first input terminal of the AND gate Q1 serves as the first input terminal of the first sub-circuit, the second input terminal of the AND gate Q1 serves as the second input terminal of the first sub-circuit, the third input terminal of the AND gate Q1 serves as the third input terminal of the first sub-circuit, the output terminal of the AND gate Q1 is connected to the first input terminal of the adder and the output control terminal of the data selector S1, the AND gate Q1 is used to generate an enable signal of the adder and an output control signal of the data selector S1, and the enable signal is equal to the output control signal; The second input end of the adder is connected to the second input end of the data selector S1, the output end of the adder serves as the output end of the first subcircuit, and the adder is used to determine the state cycle value based on the initial cycle value when the enable signal is valid.

4. The overcurrent protection circuit according to claim 3, characterized in that: The second sub-circuit comprises: a third comparator and an AND gate Q2, wherein: A first input terminal of a third comparator is used as a first input terminal of the second sub-circuit, an output terminal of the third comparator is connected to a third input terminal of the first sub-circuit and a third input terminal of the AND gate Q2, and the third comparator is used to determine a third state signal based on a state cycle value and a preset cycle value inputted to a second input terminal of the third comparator; The first input terminal of the AND gate Q2 serves as the second input terminal of the second sub-circuit, the second input terminal of the AND gate Q2 serves as the third input terminal of the second sub-circuit, the output terminal of the AND gate Q2 serves as the output terminal of the second sub-circuit, and the AND gate Q2 is used to determine the return error signal based on the first state signal, the second state signal and the third state signal when the state cycle value is less than the preset cycle value.

5. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The first comparison circuit includes: a first filter and a first comparator, the first filter is connected to the output end of the analog-to-digital conversion module and the first input end of the first comparator, the first filter is used to determine the filtered voltage sampling value corresponding to the output voltage sampling value, the output end of the first comparator serves as the output end of the first comparison circuit, and the first comparator is used to determine the first state signal based on the filtered voltage sampling value and the preset voltage value.

6. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The second comparison circuit includes: a second filter and a second comparator, the second filter is connected to the output end of the analog-to-digital conversion module and the first input end of the second comparator, the second filter is used to determine the filtered current sampling value corresponding to the output current sampling value, the output end of the second comparator serves as the output end of the second comparison circuit, and the second comparator is used to determine the second state signal based on the filtered current sampling value and the preset current value.

7. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The modulation module includes: a compensation unit and a digital pulse width modulation unit, wherein: The compensation unit is connected to the analog-to-digital conversion module, the frequency foldback circuit and the digital pulse width modulation unit, and the compensation unit is used to determine the duty cycle value of the power conversion circuit based on the foldback frequency of the next switching cycle; The digital pulse width modulation unit is respectively connected to the analog-to-digital conversion module, the frequency foldback unit and the main controller. The digital pulse width modulation unit is used to adjust the duty cycle of the power conversion circuit based on the duty cycle value or the foldback frequency output by the main controller to perform overcurrent protection. The priority of the foldback frequency output by the main controller is higher than the priority of the foldback frequency received by the compensation unit.

8. A DC-DC converter, characterized in that: The invention comprises a driving circuit, a power conversion circuit, an analog-to-digital conversion module and an overcurrent protection circuit as claimed in any one of claims 1 to 7, wherein: The driving circuit and the analog-to-digital conversion module are connected to the overcurrent protection circuit and the power conversion circuit respectively; The analog-to-digital conversion module is used to perform analog-to-digital conversion on the output sampling value of the current switching cycle output by the power conversion circuit, the drive circuit is used to generate a drive signal based on the pulse width modulation signal output by the overcurrent protection circuit, and the power conversion circuit is used to adjust the output value of the next switching cycle based on the drive signal.

9. The DC-DC converter according to claim 8, characterized in that: The power conversion module comprises: a switch unit and a conversion unit, wherein: The switch unit is connected to the conversion unit and is used to adjust the switch state of the switch unit based on the drive signal; The conversion unit is connected to the analog-to-digital conversion module, and the conversion unit is used to adjust the output value of the next switching cycle based on the switch state.

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