A bandgap reference circuit

Abstract

The disclosure provides a bandgap reference circuit, comprising: a first resistor and a second resistor connected in series; a first transistor, the base electrode of which is connected to a series connection node between the first resistor and the second resistor, the collector electrode of which is connected to the second resistor, and the emitter electrode of which is grounded; a third resistor and a second transistor connected in series; the base electrode of the second transistor is connected to a series connection node between the collector electrode of the first transistor and the second resistor, the collector electrode of the second transistor is connected to the third resistor, and the emitter electrode of the second transistor is grounded; wherein the current density of the first transistor is greater than that of the second transistor; an operational amplifier, the positive input end of which is connected to a series connection node between the first resistor and the second resistor, the negative input end of which is connected to a series connection node between the third resistor and the collector electrode of the second transistor, and the output end of which is connected to the first resistor and the second resistor respectively. The voltage output accuracy of the bandgap reference can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of electronic circuit technology, and more specifically, to a bandgap reference circuit. Background Technology

[0002] With the continuous development of electronic technology, circuits such as ADCs, DACs, and LDOs can convert analog signals into digital signals, digital signals into analog signals, and provide a relatively stable and unchanging power supply voltage for subsequent loads. At this point, a reference voltage that is almost unaffected by power supply voltage and temperature changes is crucial. This reference voltage can provide a reference voltage for comparison in ADCs and DACs, and the deviation between the actual output value and the ideal output value obtained by the ADC and DAC depends on the bandgap reference.

[0003] Currently, traditional bandgap reference circuits mainly use transistors connected by diodes, resistors, and amplifiers composed of MOSFETs. The principle of a bandgap reference is to add a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient in a certain ratio to obtain a reference voltage that hardly changes with temperature. However, in traditional bandgap structures, the equivalent input offset voltage of the operational amplifier is amplified after being superimposed, resulting in a large equivalent input deviation and consequently, low output voltage accuracy of the bandgap reference. Summary of the Invention

[0004] This disclosure provides at least one bandgap reference circuit that can improve the voltage output accuracy of the bandgap reference.

[0005] This disclosure provides a bandgap reference circuit, including:

[0006] The first resistor and the second resistor are connected in series;

[0007] The first transistor has its base connected to the series node between the first resistor and the second resistor, its collector connected to the second resistor, and its emitter grounded.

[0008] The third resistor and the second transistor are connected in series;

[0009] The second transistor has its base connected to the series node between the collector of the first transistor and the second resistor, its collector connected to the third resistor, and its emitter grounded.

[0010] The current density of the first transistor is greater than that of the second transistor.

[0011] The operational amplifier has its positive input terminal connected to the series node between the first resistor and the second resistor, its negative input terminal connected to the series node between the third resistor and the collector of the second transistor, and its output terminal connected to the first resistor and the third resistor, respectively.

[0012] In one optional implementation, the voltage value at the series node between the first resistor and the second resistor is equal to the first base-emitter voltage of the first transistor.

[0013] At the node where the second resistor is connected in series with the collector of the first transistor, the corresponding voltage value is equal to the second base-emitter voltage of the second transistor.

[0014] In one optional implementation, the first base-emitter voltage has a negative temperature coefficient;

[0015] The voltage across the second resistor is equal to the voltage difference between the first base-emitter voltage and the second base-emitter voltage, and has a positive temperature coefficient.

[0016] The voltage value across the first resistor is equal to the product of the voltage difference and the ratio of the resistance values ​​of the first resistor and the second resistor.

[0017] In one optional implementation, the output voltage value of the operational amplifier is the sum of the voltage value at the series node between the first resistor and the second resistor and the voltage values ​​corresponding to both ends of the first resistor.

[0018] By controlling the ratio between the resistance values ​​of the first resistor and the second resistor, the output voltage of the operational amplifier can be adjusted to have a zero temperature coefficient.

[0019] In one optional implementation, the voltage across the first resistor is equal to the voltage across the third resistor;

[0020] By controlling the ratio of the resistance values ​​of the first resistor and the third resistor, the ratio of the current flowing through the first resistor and the third resistor can be controlled.

[0021] In one optional embodiment, the operational amplifier includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a current source;

[0022] The first PMOS transistor and the first NMOS transistor are connected in series to form the first input path;

[0023] The second PMOS transistor and the third NMOS transistor are connected in series to form a second input path;

[0024] Both the first input path and the second input path are connected between the current source and ground;

[0025] The third PMOS transistor is connected in series with the second NMOS transistor, and the fourth PMOS transistor is connected in series with the fourth NMOS transistor;

[0026] The gates of the third PMOS transistor and the fourth PMOS transistor are interconnected, the gates of the second NMOS transistor and the first NMOS transistor are interconnected, and the gates of the third NMOS transistor and the fourth NMOS transistor are interconnected.

[0027] Both the third PMOS transistor and the fourth PMOS transistor are connected to the voltage input terminal.

[0028] In one optional implementation, the operational amplifier further includes a fifth PMOS transistor;

[0029] The fifth PMOS transistor is connected between the series node between the fourth PMOS transistor and the fourth NMOS transistor and ground to provide phase compensation.

[0030] In one optional implementation, the gate of the first PMOS transistor serves as the negative input terminal of the operational amplifier.

[0031] The gate of the second PMOS transistor serves as the positive input terminal of the operational amplifier;

[0032] The series node between the fourth PMOS transistor and the fourth NMOS transistor serves as the output terminal of the operational amplifier.

[0033] In one optional embodiment, the bandgap reference circuit further includes a first current mirror, a second current mirror, and a third transistor;

[0034] The base of the third transistor is connected to the collector of the first transistor and the base of the second transistor, respectively; the emitter is grounded; and the collector is connected to the first current mirror and the second current mirror.

[0035] The first current mirror is used to replicate the current flowing through the third transistor according to a preset first replication ratio and inject it into the series node between the first resistor and the second resistor, so as to provide base current for the first transistor.

[0036] The second current mirror is used to replicate the current flowing through the third transistor according to a preset second replication ratio and inject it into the series node between the second resistor and the collector of the first transistor, so as to provide base current for the second transistor.

[0037] In one optional embodiment, the first current mirror includes a sixth PMOS transistor and a seventh PMOS transistor, and the second current mirror includes a sixth PMOS transistor and an eighth PMOS transistor, wherein the first current mirror and the second current mirror share the sixth PMOS transistor.

[0038] The sources of the sixth, seventh, and eighth PMOS transistors are all connected to the input voltage, and their gates are all interconnected.

[0039] The drain of the sixth PMOS transistor is connected to the collector of the third transistor.

[0040] The drain of the seventh PMOS transistor is connected to the series node between the first resistor and the second resistor;

[0041] The drain of the eighth PMOS transistor is connected to the connection node between the second resistor and the collector of the first transistor.

[0042] This disclosure provides a bandgap reference circuit, comprising: a first resistor and a second resistor connected in series; a first transistor, with its base connected to the series node between the first resistor and the second resistor, its collector connected to the second resistor, and its emitter grounded; a third resistor and a second transistor connected in series; the second transistor, with its base connected to the series node between the collector of the first transistor and the second resistor, its collector connected to the third resistor, and its emitter grounded; wherein the current density of the first transistor is greater than that of the second transistor; an operational amplifier, with its positive input terminal connected to the series node between the first resistor and the second resistor, its negative input terminal connected to the series node between the third resistor and the collector of the second transistor, and its output terminal connected to the first resistor and the second resistor respectively. This circuit can improve the voltage output accuracy of the bandgap reference.

[0043] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0044] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this disclosure and, together with the specification, serve to explain the technical solutions of this disclosure. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as limiting the scope. Those skilled in the art can obtain other related drawings based on these drawings without creative effort.

[0045] Figure 1 A schematic diagram of a bandgap reference circuit provided in an embodiment of this disclosure is shown;

[0046] Figure 2 A schematic diagram of an operational amplifier provided in an embodiment of this disclosure is shown;

[0047] Figure 3 A schematic diagram of another operational amplifier provided in an embodiment of this disclosure is shown;

[0048] Figure 4 A schematic diagram of another bandgap reference circuit provided in an embodiment of this disclosure is shown.

[0049] Illustration:

[0050] 100 - Bandgap reference circuit; 110 - First resistor; 120 - Second resistor; 130 - Third resistor; 140 - First transistor; 150 - Second transistor; 160 - Operational amplifier; 300 - Sixth PMOS transistor; 310 - Seventh PMOS transistor; 320 - Eighth PMOS transistor; 330 - Third transistor; 200 - First PMOS transistor; 210 - Second PMOS transistor; 220 - Third PMOS transistor; 230 - Fourth PMOS transistor; 240 - First NMOS transistor; 250 - Second NMOS transistor; 260 - Third NMOS transistor; 270 - Fourth NMOS transistor; 280 - Current source; 290 - Fifth PMOS transistor. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0052] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0053] In this document, the term "and / or" merely describes a relationship, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0054] Research has revealed that traditional bandgap reference circuits primarily utilize diode-connected transistors, resistors, and amplifiers composed of MOSFETs. The principle of a bandgap reference involves adding a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient in a specific ratio to obtain a reference voltage that is almost unaffected by temperature. However, in traditional bandgap structures, the equivalent input offset voltage of the operational amplifier is amplified after being superimposed, resulting in a larger equivalent input deviation and consequently lower output voltage accuracy of the bandgap reference.

[0055] Based on the above research, this disclosure provides a bandgap reference circuit, comprising: a first resistor and a second resistor connected in series; a first transistor, with its base connected to the series node between the first resistor and the second resistor, its collector connected to the second resistor, and its emitter grounded; a third resistor and a second transistor connected in series; the second transistor, with its base connected to the series node between the collector of the first transistor and the second resistor, its collector connected to the third resistor, and its emitter grounded; wherein the current density of the first transistor is greater than that of the second transistor; an operational amplifier, with its positive input terminal connected to the series node between the first resistor and the second resistor, its negative input terminal connected to the series node between the third resistor and the collector of the second transistor, and its output terminal connected to the first resistor and the third resistor respectively. This can improve the voltage output accuracy of the bandgap reference.

[0056] To facilitate understanding of this embodiment, a bandgap reference circuit disclosed in this disclosure will first be described in detail. (See also...) Figure 1 The diagram shown is a schematic of a bandgap reference circuit 100 provided in an embodiment of this disclosure.

[0057] like Figure 1 As shown, the bandgap reference circuit 100 includes a first resistor 110, a second resistor 120, a third resistor 130, a first transistor 140, a second transistor 150, and an operational amplifier 160.

[0058] Specifically, the first resistor 110 and the second resistor 120 are connected in series; the base of the first transistor 140 is connected to the series node between the first resistor 110 and the second resistor 120, the collector of the first transistor 140 is connected to the second resistor 120, and the emitter of the first transistor 140 is grounded; the third resistor 130 and the second transistor 150 are connected in series; the base of the second transistor 150 is connected to the series node between the collector of the first transistor 140 and the second resistor 120, the collector of the second transistor 150 is connected to the third resistor 130, and the emitter of the second transistor 150 is grounded; the positive input terminal of the operational amplifier 160 is connected to the series node between the first resistor 110 and the second resistor 120, the negative input terminal is connected to the series node between the third resistor 130 and the collector of the second transistor 150, and the output terminal of the operational amplifier 160 is connected to the first resistor 110 and the third resistor 130 respectively.

[0059] In a specific implementation, the current density ratio of the first transistor 140 to the second transistor 150 is designed such that the current density of the first transistor 140 is greater than that of the second transistor 150, so that the base-emitter voltage of the first transistor 140 is greater than that of the second transistor 150.

[0060] Here, at the series connection point between the first resistor 110 and the second resistor 120, the corresponding voltage value is equal to the first base-emitter voltage of the first transistor 140; at the series connection point between the second resistor 120 and the collector of the first transistor 140, the corresponding voltage value is equal to the second base-emitter voltage of the second transistor 150.

[0061] Wherein, the first base-emitter voltage corresponding to the first transistor 140 has a negative temperature coefficient; the voltage value corresponding to the second resistor 120 is equal to the voltage difference between the first base-emitter voltage corresponding to the first transistor 140 and the second base-emitter voltage corresponding to the second transistor 150, which has a positive temperature coefficient; the voltage value corresponding to the first resistor 110 is equal to the product of the voltage difference between the first base-emitter voltage corresponding to the first transistor 140 and the second base-emitter voltage corresponding to the second transistor 150 and the ratio of the resistance values ​​of the first resistor 110 and the second resistor 120.

[0062] Furthermore, the output voltage of the operational amplifier 160 is the sum of the voltage at the series node between the first resistor 110 and the second resistor 120 and the voltage across the first resistor 110. By controlling the ratio between the resistance of the first resistor 110 and the resistance of the second resistor 120, the output voltage of the operational amplifier 160 is adjusted to have a zero temperature coefficient.

[0063] Here, the function of operational amplifier 160 is to adjust the voltage values ​​of the series node between the first resistor 110 and the second resistor 120, and the series node between the third resistor 130 and the collector of the second transistor 150, that is, to make the voltage values ​​of the positive input terminal and the negative input terminal of operational amplifier 160 equal.

[0064] Meanwhile, the other ends of the first resistor 110 and the third resistor 130 are connected together, so the voltages across the first resistor 110 and the third resistor 130 are equal.

[0065] In this way, the ratio between the current flowing through the first resistor 110 and the current flowing through the third resistor 130 is equal to the ratio between the resistance values ​​of the first resistor 110 and the third resistor 130. By controlling the resistance values ​​of the first resistor 110 and the third resistor 130, the ratio of the current flowing through the first resistor 110 and the third resistor 130 can be controlled.

[0066] Furthermore, the first base-emitter voltage corresponding to the first transistor 140 has a negative temperature coefficient, and the difference between the first base-emitter voltage corresponding to the first transistor 140 and the second base-emitter voltage corresponding to the second transistor 150 has a positive temperature coefficient. By designing a suitable ratio between the resistance values ​​of the first resistor 110 and the second resistor 120, the output voltage of the operational amplifier 160 can be compensated to have a zero temperature coefficient.

[0067] In contrast to traditional bandgap reference circuits, where the equivalent input offset voltage of operational amplifier 160 is directly superimposed on the voltage difference between the first base-emitter voltage of the first transistor 140 and the second base-emitter voltage of the second transistor 150 (i.e., the voltage across the second resistor 120), the equivalent input offset voltage of operational amplifier 160 is amplified by the error in the ratio between the resistances of the first resistor 110 and the second resistor 120, resulting in lower accuracy. However, in this embodiment, the equivalent input offset voltage of operational amplifier 160 does not directly affect the voltage drop across the second resistor 120, thereby improving the output voltage accuracy.

[0068] As one possible implementation method, see Figure 2 The diagram shown is a schematic of an operational amplifier 160 provided in an embodiment of this disclosure.

[0069] like Figure 2 As shown, the operational amplifier includes a first PMOS transistor 200, a second PMOS transistor 210, a third PMOS transistor 220, a fourth PMOS transistor 230, a first NMOS transistor 240, a second NMOS transistor 250, a third NMOS transistor 260, a fourth NMOS transistor 270, and a current source 280.

[0070] Specifically, the first PMOS transistor 200 and the first NMOS transistor 240 are connected in series to form the first input path; the second PMOS transistor 210 and the third NMOS transistor 260 are connected in series to form the second input path; both the first and second input paths are connected between the current source 280 and ground; the third PMOS transistor 220 and the second NMOS transistor 250 are connected in series, and the fourth PMOS transistor 230 and the fourth NMOS transistor 270 are connected in series; the gates of the third PMOS transistor 220 and the fourth PMOS transistor 230 are interconnected, the gates of the second NMOS transistor 250 and the first NMOS transistor 240 are interconnected, and the gates of the third NMOS transistor 260 and the fourth NMOS transistor 270 are interconnected; both the third PMOS transistor 220 and the fourth PMOS transistor 230 are connected to the voltage input terminal.

[0071] In this configuration, the gate of the first PMOS transistor 200 serves as the negative input terminal of the operational amplifier 160; the gate of the second PMOS transistor 210 serves as the positive input terminal of the operational amplifier 160; and the series node between the fourth PMOS transistor 230 and the fourth NMOS transistor 270 serves as the output terminal of the operational amplifier 160.

[0072] Here, the source of the first PMOS transistor 200 is connected to the current source 280, and its drain is connected to the drain of the first NMOS transistor 240; the source of the first NMOS transistor 240 is grounded, and its gate is connected to its drain. The source of the second PMOS transistor 210 is connected to the current source 280, and its drain is connected to the drain of the third NMOS transistor 260; the source of the third NMOS transistor 260 is grounded, and its gate is connected to its drain.

[0073] Furthermore, the source of the third PMOS transistor 220 is connected to the voltage input terminal, and its drain is connected to the drain of the second NMOS transistor 250, whose source is grounded. The gate of the third PMOS transistor 220 is connected to the gate of the fourth PMOS transistor 230, and the gate of the second NMOS transistor 250 is connected to the gate of the first NMOS transistor 240. The source of the fourth PMOS transistor 230 is connected to the voltage input terminal, and its drain is connected to the drain of the fourth NMOS transistor 270, whose source is grounded. Its gate is connected to the gate of the third NMOS transistor 260.

[0074] In practice, the operational amplifier 160 generates a gain by multiplying the transconductance of the first PMOS transistor 200 by its output impedance.

[0075] As another possible implementation, see Figure 3 The diagram shown is a schematic of an operational amplifier 160 provided in an embodiment of this disclosure.

[0076] like Figure 3 As shown, the operational amplifier includes a first PMOS transistor 200, a second PMOS transistor 210, a third PMOS transistor 220, a fourth PMOS transistor 230, a first NMOS transistor 240, a second NMOS transistor 250, a third NMOS transistor 260, a fourth NMOS transistor 270, and a current source 280, and also includes a fifth PMOS transistor 290.

[0077] Specifically, the fifth PMOS transistor 290 is connected between the series node between the fourth PMOS transistor 230 and the fourth NMOS transistor 270 and ground to provide phase compensation and help the loop meet stability requirements.

[0078] Further, see Figure 4 The diagram shown is a schematic of another bandgap reference circuit 100 provided in an embodiment of this disclosure.

[0079] like Figure 4 As shown, the bandgap reference circuit 100 includes a first resistor 110, a second resistor 120, a third resistor 130, a first transistor 140, a second transistor 150, and an operational amplifier 160. It also includes a sixth PMOS transistor 300, a seventh PMOS transistor 310, an eighth PMOS transistor 320, and a third transistor 330.

[0080] Specifically, the sixth PMOS transistor 300 and the seventh PMOS transistor 310 form the first current mirror, and the sixth PMOS transistor 300 and the eighth PMOS transistor 320 form the second current mirror. The first current mirror and the second current mirror share the sixth PMOS transistor 300.

[0081] Here, the first current mirror is used to replicate the current flowing through the third transistor 330 according to a preset first replication ratio and inject it into the series node between the first resistor 110 and the second resistor 120 to provide base current for the first transistor 140; the second current mirror is used to replicate the current flowing through the third transistor 330 according to a preset second replication ratio and inject it into the series node between the second resistor 120 and the collector of the first transistor 140 to provide base current for the second transistor 150.

[0082] In this configuration, the base of the third transistor 330 is connected to the collector of the first transistor 140 and the base of the second transistor 150, respectively. The emitter of the third transistor 330 is grounded, and the collector of the third transistor 330 is connected to the first current mirror and the second current mirror. The sources of the sixth PMOS transistor 300, the seventh PMOS transistor 310, and the eighth PMOS transistor 320 are all connected to the input voltage, and the gates of the sixth PMOS transistor 300, the seventh PMOS transistor 310, and the eighth PMOS transistor 320 are all interconnected. The drain of the sixth PMOS transistor 300 is connected to the collector of the third transistor 330. The drain of the seventh PMOS transistor 310 is connected to the series node between the first resistor 110 and the second resistor 120. The drain of the eighth PMOS transistor 320 is connected to the connection node between the second resistor 120 and the collector of the first transistor 140.

[0083] It should be noted that the preset first copy ratio and the preset second copy ratio can be selected according to actual needs, and no specific restrictions are imposed here. Preferably, the preset first copy ratio can be 1 / 60 and the preset second copy ratio can be 1 / 30.

[0084] In a specific implementation, the third transistor 330 replicates a portion of the current of the second transistor 150. The sixth PMOS transistor 300 and the seventh PMOS transistor 310 form a current mirror. The seventh PMOS transistor 310 replicates a portion of the current of the third transistor 330 and injects it into the series node between the first resistor 110 and the second resistor 120 to cancel the influence of the base current of the first transistor 140. That is, it is equivalent to using the seventh PMOS transistor 310 to provide the base current of the first transistor 140.

[0085] Furthermore, the sixth PMOS transistor 300 and the eighth PMOS transistor 320 form a current mirror. The eighth PMOS transistor 320 replicates a portion of the current of the third transistor 330 and injects it into the connection node between the second resistor 120 and the collector of the first transistor 140. This is used to cancel the influence of the base current of the second transistor 150 and the third transistor 330, which is equivalent to using the eighth PMOS transistor to provide base current for the second transistor 150 and the third transistor 330.

[0086] In a preferred embodiment, the sixth PMOS transistor 300, the seventh PMOS transistor 310, and the eighth PMOS transistor 320 are designed to match, the first transistor 140, the second transistor 150, and the third transistor 330 are designed to match, and the first resistor 110, the second resistor 120, and the third resistor 130 are designed to match.

[0087] It should be noted that the first transistor 140, the second transistor 150, and the third transistor 330 are NPN transistors.

[0088] This disclosure provides a bandgap reference circuit, comprising: a first resistor and a second resistor connected in series; a first transistor, with its base connected to the series node between the first resistor and the second resistor, its collector connected to the second resistor, and its emitter grounded; a third resistor and a second transistor connected in series; the second transistor, with its base connected to the series node between the collector of the first transistor and the second resistor, its collector connected to the third resistor, and its emitter grounded; wherein the current density of the first transistor is greater than that of the second transistor; an operational amplifier, with its positive input terminal connected to the series node between the first resistor and the second resistor, its negative input terminal connected to the series node between the third resistor and the collector of the second transistor, and its output terminal connected to the first resistor and the second resistor respectively. This circuit can improve the voltage output accuracy of the bandgap reference.

[0089] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0090] Finally, it should be noted that the above-described embodiments are merely specific implementations of this disclosure, used to illustrate the technical solutions of this disclosure, and not to limit it. The protection scope of this disclosure is not limited thereto. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this disclosure. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. A bandgap reference circuit, characterized by, include: The first resistor and the second resistor are connected in series; The first transistor has its base connected to the series node between the first resistor and the second resistor, its collector connected to the end of the second resistor that is not connected to the first resistor, and its emitter grounded. The third resistor and the second transistor are connected in series; The second transistor has its base connected to the series node between the collector of the first transistor and the second resistor, its collector connected to the third resistor, and its emitter grounded. The current density of the first transistor is greater than that of the second transistor. The operational amplifier has its positive input terminal connected to the series node between the first resistor and the second resistor, its negative input terminal connected to the series node between the third resistor and the collector of the second transistor, and its output terminal connected to the end of the first resistor that is not connected to the second resistor and the end of the third resistor that is not connected to the collector of the second transistor, respectively. At the series connection point between the first resistor and the second resistor, the corresponding voltage value is equal to the first base-emitter voltage of the first transistor; At the series connection point between the second resistor and the collector of the first transistor, the corresponding voltage value is equal to the second base-emitter voltage of the second transistor. The first base-emitter voltage has a negative temperature coefficient; The voltage across the second resistor is equal to the voltage difference between the first base-emitter voltage and the second base-emitter voltage, and has a positive temperature coefficient. The voltage across the first resistor is equal to the product of the voltage difference and the ratio of the resistance values ​​of the first resistor and the second resistor. The output voltage value of the operational amplifier is the sum of the voltage value at the series node between the first resistor and the second resistor and the voltage value at both ends of the first resistor. By controlling the ratio between the resistance values ​​of the first resistor and the second resistor, the output voltage of the operational amplifier can be adjusted to have a zero temperature coefficient.

2. The bandgap reference circuit according to claim 1, characterized in that: The voltage across the first resistor is equal to the voltage across the third resistor; By controlling the ratio of the resistance values ​​of the first resistor and the third resistor, the ratio of the current flowing through the first resistor and the third resistor can be controlled.

3. The bandgap reference circuit according to claim 1, characterized in that, The operational amplifier includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a current source; The first PMOS transistor and the first NMOS transistor are connected in series to form the first input path; The second PMOS transistor and the third NMOS transistor are connected in series to form a second input path; Both the first input path and the second input path are connected between the current source and ground; The third PMOS transistor is connected in series with the second NMOS transistor, and the fourth PMOS transistor is connected in series with the fourth NMOS transistor; The gates of the third PMOS transistor and the fourth PMOS transistor are interconnected, the gates of the second NMOS transistor and the first NMOS transistor are interconnected, and the gates of the third NMOS transistor and the fourth NMOS transistor are interconnected. Both the third PMOS transistor and the fourth PMOS transistor are connected to the voltage input terminal.

4. The bandgap reference circuit according to claim 3, characterized in that, The operational amplifier also includes a fifth PMOS transistor; The fifth PMOS transistor is connected between the series node between the fourth PMOS transistor and the fourth NMOS transistor and ground to provide phase compensation.

5. The bandgap reference circuit according to claim 3, characterized in that: The gate of the first PMOS transistor serves as the negative input terminal of the operational amplifier; The gate of the second PMOS transistor serves as the positive input terminal of the operational amplifier; The series node between the fourth PMOS transistor and the fourth NMOS transistor serves as the output terminal of the operational amplifier.

6. The bandgap reference circuit according to claim 1, characterized in that, The bandgap reference circuit also includes a first current mirror, a second current mirror, and a third transistor; The base of the third transistor is connected to the collector of the first transistor and the base of the second transistor, respectively; the emitter is grounded; and the collector is connected to the first current mirror and the second current mirror. The first current mirror is used to replicate the current flowing through the third transistor according to a preset first replication ratio and inject it into the series node between the first resistor and the second resistor, so as to provide base current for the first transistor. The second current mirror is used to replicate the current flowing through the third transistor according to a preset second replication ratio and inject it into the series node between the second resistor and the collector of the first transistor, so as to provide base current for the second transistor.

7. The bandgap reference circuit according to claim 6, characterized in that: The first current mirror includes a sixth PMOS transistor and a seventh PMOS transistor, and the second current mirror includes a sixth PMOS transistor and an eighth PMOS transistor, wherein the first current mirror and the second current mirror share the sixth PMOS transistor; The sources of the sixth, seventh, and eighth PMOS transistors are all connected to the input voltage, and their gates are all interconnected. The drain of the sixth PMOS transistor is connected to the collector of the third transistor. The drain of the seventh PMOS transistor is connected to the series node between the first resistor and the second resistor; The drain of the eighth PMOS transistor is connected to the connection node between the second resistor and the collector of the first transistor.

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