Implementation method of hardware control circuit of linear regression algorithm based on memristor array

Abstract

The present invention provides a method for implementing a hardware control circuit of a linear regression algorithm based on a memristor array. The method comprises: using an external device to input data, converting the data into digital-to-analog form as an input signal for a control circuit; establishing a linear relationship between the input data and the output voltage of the memristor array, using a gradient descent algorithm, and correcting the memristor conductance value through a pulse resistance value control circuit; connecting the trained memristor to a control circuit to generate a signal to control an external device. The present invention uses a memristor to build a linear regression neural network control model, which can adapt to most application scenarios, and adopts an in-memory calculation method in an analog domain, which increases the speed while reducing power consumption.

Description

Technical Field

[0001] The invention belongs to the field of control circuit implementation methods, and in particular relates to a linear regression algorithm hardware control circuit implementation method based on a memristor array. Background Art

[0002] Memristor, first proposed by Professor Shao-Tang Tsai of the University of California, Berkeley in 1971, can memorize the amount of charge flowing through a circuit, and therefore has a variable and controllable resistance value. Memristor is considered to be the fourth basic circuit element besides resistors, inductors and capacitors, and is regarded as the next generation of non-volatile memory technology. It has the advantages of high speed, low power consumption, easy integration, and compatibility with CMOS processes, and can meet the performance requirements of general-purpose electronic memory for the next generation of high-density information storage and high-performance computing. At the same time, memristors can realize non-volatility and brain-like neural morphological logical computing, integrating information storage and computing in a single device. It can be used as a core basic device for the non-Turing computing model of cutting-edge in-memory computing and the non-von Neumann computing architecture. It has a milestone significance and cornerstone role in major strategic fields such as ultra-high-density information storage, ultra-high-performance computing, and brain-like artificial intelligence in the era of big data.

[0003] Traditional neural network hardware control circuits use the von Neumann "storage and computation separation" architecture. The data transmission delay between the memory and the processing circuit restricts the further improvement of computing power. As the data that needs to be stored and processed increases day by day, the "storage wall" problem derived from the traditional von Neumann computing architecture has never been solved. In this context, memristors rely on their adjustable resistance and non-volatility, and can be used in conjunction with hardware circuit design to use circuit theorems to achieve in-situ storage and matrix operation integration in the analog domain, avoiding frequent data exchange, and significantly improving computing speed while reducing power consumption.

[0004] In addition, neural network control systems involve a large number of matrix operations, namely multiplication and addition operations. Generally speaking, memristors are metal / insulator / metal unit structures. This simple device structure facilitates large-scale integration through a cross-array structure. The memristor array structure can be obtained through a relatively simple preparation process and is often used for parallel multiplication and addition operations in the analog domain, enabling the neuromorphic computing architecture to achieve high computing throughput with low energy consumption and low area consumption. Summary of the invention

[0005] The purpose of the present invention is to provide a method for realizing a hardware control circuit of a linear regression algorithm based on a memristor array, so as to solve the technical problems that a traditional neural network control circuit has slow speed, high power consumption, weak computing power, and is not suitable for most application scenarios.

[0006] In order to solve the above technical problems, the specific technical solutions of the present invention are as follows:

[0007] A method for implementing a hardware control circuit of a linear regression algorithm based on a memristor array comprises the following steps:

[0008] Step 1: Data set acquisition: input data using external equipment, and convert the data into digital-to-analog form as input signal for the control circuit;

[0009] Step 2, weight training; a linear regression equation between the input signal and the output voltage of the memristor array is established through the memristor array, that is, the input signal and the output voltage are in a linear relationship, and the weight in the relationship is represented by the memristor conductance value; the array output is connected to the control circuit to generate a control signal, and the signal is compared with the correct signal through the comparison circuit to obtain an error signal, which is applied to the control circuit to generate a control signal to correct the conductance value of the memristor array; repeat this step according to the change of the input signal to continuously adjust the conductance value of the memristor array until the error signal is within an acceptable range;

[0010] Step 3: Write the trained memristor conductance value into the control circuit to generate a signal to control the external device.

[0011] Furthermore, the memristor array adopts a cross structure, and the memristor units are located at the intersections.

[0012] Furthermore, the control circuit adopts a pulse resistance control circuit; the circuit relies on a monostable trigger and a semiconductor switch to apply positive and negative pulses to the memristor; the monostable trigger provides a trigger high level to enable the semiconductor switch, and at the same time the single-pole double-throw analog switch connects the error signal to realize the selection of positive and negative pulse voltages, ensuring the output pulse width of the monostable trigger, thereby realizing the application of pulses to the memristor array, thereby correcting its conductance value.

[0013] Furthermore, the gradient descent algorithm is used to train the weights; the weight change Δw is determined by the following formula

[0014] Δw=η·δ·x

[0015] Where η is the learning rate, δ is the error value, and x is the input data.

[0016] Furthermore, according to the universal approximation principle, improving the prediction accuracy of linear regression is achieved by increasing the number of weights, that is, the scale of the memristor array.

[0017] The present invention discloses a method for realizing a linear regression algorithm hardware control circuit based on a memristor array, which has the following advantages: the present invention uses memristors to build a linear regression algorithm hardware control circuit, avoids the traditional von Neumann storage-computation separation architecture, and reduces the time for reading data; at the same time, the memristor can complete the multiplication and addition operations in one step, thereby improving the throughput of the neural network, lowering the circuit operation speed, and consuming less power, and is suitable for most neural network application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of a framing frame of a line patrol car camera based on a memristor array provided in an embodiment of the present invention.

[0019] Figure 2 A schematic diagram of a weight training process represented by a memristor array provided in an embodiment of the present invention.

[0020] Figure 3 A circuit diagram for testing the resistance of a memristor using pulse modulation is provided in an embodiment of the present invention.

[0021] Figure 4 A simulation waveform diagram of a pulse-controlled memristor resistance test circuit in operation provided by an embodiment of the present invention.

[0022] Figure 5 A circuit diagram of a DAC and a memristor array in a training process provided by an embodiment of the present invention.

[0023] Figure 6 A schematic diagram of a PWM signal generation method for controlling the front wheel steering of a vehicle provided in an embodiment of the present invention.

[0024] Figure 7 A circuit diagram for controlling the steering of the front wheels of a vehicle provided in an embodiment of the present invention.

[0025] Figure 8 A control voltage output circuit diagram based on a pull-down resistor provided in an embodiment of the present invention.

[0026] Fig. 9 The present invention is a flow chart of a method for realizing a linear regression algorithm hardware control circuit based on a memristor array. DETAILED DESCRIPTION

[0027] In order to better understand the purpose, structure and function of the present invention, a method for implementing a hardware control circuit of a linear regression algorithm based on a memristor array of the present invention is further described in detail below in conjunction with the accompanying drawings.

[0028] In one embodiment of the present invention, a hardware circuit implementation method for controlling a vehicle to patrol a line based on a linear regression algorithm of a memristor array is provided. The specific implementation steps are described below.

[0029] Step 1: Dataset collection.

[0030] Data is inputted by an external device and converted into digital-to-analog form as an input signal of a control circuit; the control circuit is composed of a memristor array and a reverse proportional operation circuit; the memristor array adopts a cross structure, and the memristor unit is located at the intersection.

[0031] For a fixed route, this embodiment obtains a data set through a camera. The camera viewfinder is as follows Figure 1 , 1 is the road, 2 is the center point of the road. Image processing can get x 1 ,x 2 ,x 3 and x 4 The angle θ that the front wheel should rotate is calculated. In this embodiment, the front wheel rotation angle θ is set to be the same as the data set x 1 ,x 2 ,x 3 ,x 4 Satisfies the following formula:

[0032] θ=w 1 x 1 +w 2 x 2 +w 3 x 3 +w 4 x 4 +b

[0033] where w 1 ,w 2 ,w 3 ,w 4 is the weight, b is the bias, which can be determined by the following linear regression gradient descent training algorithm.

[0034] The car patrols along the predetermined route and obtains the data set x 1 ,x 2 ,x 3 ,x 4 Used for weight training.

[0035] Step 2: Weight training.

[0036] Weight training; a linear regression equation between the input signal and the output voltage of the memristor array is established through the memristor array, that is, the input signal and the output voltage are in a linear relationship, and the weight in this relationship is represented by the memristor conductance value; the array output is connected to the control circuit to generate a control signal, and the signal is compared with the correct signal through the comparison circuit to obtain an error signal, which is applied to the control circuit to generate a control signal to correct the conductance value of the memristor array; this step is repeated according to the change of the input signal to continuously adjust the conductance value of the memristor array until the error signal is within an acceptable range.

[0037] The control circuit adopts a pulse resistance control circuit; the circuit relies on a monostable trigger and a semiconductor switch to apply positive and negative pulses to the memristor; the monostable trigger provides a trigger high level to enable the semiconductor switch, and at the same time the single-pole double-throw analog switch connects the error signal to realize the selection of positive and negative pulse voltages, ensuring the output pulse width of the monostable trigger, so as to realize the application of pulses to the memristor array, thereby correcting its conductance value.

[0038] The online training method provided in this embodiment is as follows: Figure 2 As shown, the memristor array output satisfies the formula:

[0039] V out =w 1 x 1 +w 2 x 2 +w 3 x 3 +w 4 x 4 +b

[0040] Among them, the weight w 1 ,w 2 ,w 3 ,w 4 Characterized by the conductance value of the memristor array, x 1 ,x 2 ,x 3 ,x 4 The data set is converted into an analog voltage representation through DAC and applied to the memristor array to calculate the predicted value; the predicted value is compared with the correct voltage value converted from the PWM signal to obtain the error value, and the corresponding change in the weight is calculated using the gradient descent algorithm, and the pulse-controlled memristor value, i.e. the training weight, is output. The above process is repeated until the error obtained is within an acceptable range and the algorithm terminates.

[0041] This embodiment uses the 8-bit DAC chip AD7304.

[0042] This embodiment adopts a method of pulse control of memristor resistance. Experiments have shown that applying pulses of different polarities at both ends of the memristor can change the resistance of the memristor in different directions, and the change amplitude is positively correlated with the pulse amplitude and pulse width. This embodiment adopts a threshold memristor model. When the absolute value of the applied voltage is less than the threshold, the resistance of the memristor remains unchanged. The test circuit of this experiment is as follows Figure 3As shown in the figure, the circuit relies on the monostable trigger LTC6993-1 and the semiconductor switch ADG1401 to apply positive and negative pulses to the memristor. The monostable trigger LTC6993-1 provides a trigger high level to enable the switch ADG1401. At the same time, the input signal of the single-pole double-throw analog switch ADG1436 selects the positive and negative voltages to ensure the output pulse width of the trigger, so as to apply pulses to the memristor. The input signals of the single-pole double-throw switch ADG1436 and the trigger LTC6993-1 are provided by the linear regression gradient descent algorithm circuit.

[0043] In this embodiment, Figure 4 The simulation results of the pulse resistance control test circuit are shown. The experiment shows that the memristor value increases or decreases gradually, and the step size is within the acceptable range of the neural network weight update.

[0044] This embodiment Figure 2 The DAC and memristor array module circuit diagram is as follows Figure 5 As shown. VREFA~VREFD are connected to the reference voltage, the DAC output terminals VOUTA~VOUTD are connected to four memristor units, and another memristor unit is connected to the bias voltage V b Then the whole is connected to the reverse proportional operation to get the output V out . Data x 1 ,x 2 ,x 3 ,x 4 After being reduced by a certain ratio by the single-chip microcomputer, it is input to the SDI terminal of the DAC chip AD7304 and applied to the memristor array in the form of voltage (assuming that the resistance of each memristor is R 1 ,R 2 ,R 3 ,R 4 ,R 5 ), then the operational amplifier output is:

[0045]

[0046] Among them, V outi (i=1,2,3,4) respectively correspond to the output voltages of ports VOUTA, VOUTB, VOUTC, and VOUTD of DAC chip AD7043, and fix the reference voltage |V 1 |=|V 2 |=|V 3 |=|V 4 |, let V outi =kx i (i=1,2,3,4), k is the proportionality coefficient between the DAC output voltage and the input digital quantity, then the operational amplifier output is:

[0047]

[0048] Among them, The operational amplifier output is:

[0049]

[0050] This embodiment comprehensively considers x 1 ~x 4 The range of w 1 ~w 4 The value of resistance, the range of resistance, the voltage value that can be easily obtained in the actual circuit, the threshold voltage, etc. are selected. k w =0.1mS, R F =1kΩ, k b =6.67×10 -4 mS,V 5 =2.5V, then the operational amplifier output is:

[0051] |V out |=k w R F k(w 1 x 1 +w 2 x 2 +w 3 x 3 +w 4 x 4 +b)

[0052] The output voltage value of the memristor array satisfies the linear regression equation.

[0053] In this embodiment, the signal for controlling the steering of the front wheels of the car is PWM, which is generated as follows: Figure 6 As shown. The triangle wave with the lowest voltage of 0V, the highest voltage of 3.3V and the frequency of 100Hz and |V out |Compare and obtain, according to the proportional relationship, the correct array output value can be converted, and the error value δ can be calculated. The corresponding weight change can be obtained by using the gradient descent algorithm:

[0054] Δw i =η·δ·x i (i=1,2,3,4)

[0055] Where η is the learning rate, δ is the error value, and x is the input data.

[0056] The new weight and bias are obtained from the above formula, and the change in memristor value can be obtained based on the conversion relationship and the pulse resistance value can be adjusted.

[0057] Step 3: Patrol the line.

[0058] The trained memristor conductance value is written into the control circuit to generate a signal to control the external device.

[0059] In this embodiment, the trained memristor resistance is written into the control circuit, and the control circuit is replaced by a digital potentiometer to generate a PWM signal for controlling the steering of the front wheels of the car. The car successfully travels around the indicator line for a complete circle.

[0060] Additionally, another typical embodiment of the present invention is given below.

[0061] This embodiment provides another memristor array output voltage circuit for a hardware circuit that controls a patrol vehicle based on a linear regression algorithm of a memristor array.

[0062] The first embodiment cooperates with the inverting proportional operation circuit of the operational amplifier to obtain the output voltage of the memristor array. In addition to considering the reference voltage of each channel of the digital-to-analog converter, this embodiment also needs to consider the operating voltage of the operational amplifier, that is, the selection of the linear region range.

[0063] This embodiment uses a memristor unit to connect the memristor array and ground, which acts as a pull-down resistor and replaces the inverting proportional operation circuit of the operational amplifier to achieve the voltage output of the memristor array, and obtain V out .

[0064] In this embodiment, Figure 8 The circuit diagram of the memristor array output voltage based on the pull-down resistor is shown. Four memristor units are connected to the output voltages VOUTA to VOUTD of the DAC, and another memristor unit is connected to the bias voltage Vb. At the same time, a fixed resistor is selected as the pull-down resistor, and the output voltage V is drawn from the common terminal. out .

[0065] In this embodiment, the linear regression equation θ=w 1 x 1 +w 2 x 2 +w 3 x 3 +w 4 x 4 The weight of +b is represented by the conductance of the memristor, and the independent variable is represented by the output voltage of the digital-to-analog converter.

[0066] In this embodiment, the conductance value g of the memristor unit is assumed to be i =k w w i ,(i=1,2,3,4),g 5 =k b b, the output voltage of the digital-to-analog converter V i =k x x i ,(i=1,2,3,4), then Figure 8 The output voltage V out It is derived from the following formula:

[0067]

[0068] In this embodiment, as long as k is reasonably set x ,k w ,k b ,g 6 ,V b The value of can make:

[0069] V out =w 1 x 1 +w 2 x 2 +w 3 x 3 +w 4 x 4 +b

[0070] In this embodiment, taking into account x 1 ~x 4 k is determined by factors such as the range of variation of resistance, the range of resistance, the voltage value that is easily obtained in the actual circuit, and the threshold voltage. x =0.0167V, k w =0.1mS, k b =6.67×10 -4 mS,V b =2.5V, g 6 =4.219mS.

[0071] In this embodiment, the resistance value of the memristor after training is written into the Figure 8 The digital potentiometer built by the connection method is connected Figure 6 The circuit shown in Figure 8 V out Ports and Figure 6 V out The port is connected to generate a PWM signal to control the steering of the car's front wheels. The car successfully travels around the indicator line for a complete circle.

[0072] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A method for implementing a hardware control circuit of a linear regression algorithm based on a memristor array. It is characterized in that The following steps are involved: Step 1: Data set acquisition: input data using external equipment, and convert the data into digital-to-analog form as input signal for the control circuit; Step 2: Weight training; A linear regression equation between an input signal and an output voltage of the memristor array is established through the memristor array, that is, the input signal and the output voltage are in a linear relationship, and the weight in the relationship is represented by the memristor conductance value; The array output is connected to the control circuit to generate a control signal. The signal is compared with the correct signal through the comparison circuit to obtain an error signal, which is applied to the control circuit to generate a control signal to correct the conductance value of the memristor array. This step is repeated according to the change of the input signal to continuously adjust the conductance value of the memristor array until the error signal is within an acceptable range. Step 3: writing the trained memristor conductance value into the control circuit to generate a signal to control the external device; The control circuit adopts a pulse resistance control circuit; the circuit relies on a monostable trigger and a semiconductor switch to apply positive and negative pulses to the memristor; the monostable trigger provides a trigger high level to enable the semiconductor switch, and the single-pole double-throw analog switch connects the error signal to select the positive and negative pulse voltages, ensuring the output pulse width of the monostable trigger, so as to apply pulses to the memristor array, thereby correcting its conductance value; The weights are trained using the gradient descent algorithm; the weight change Determined by the following formula: ； In the formula is the learning rate, is the error value, For input data.

2. The method for implementing a linear regression algorithm hardware control circuit based on a memristor array according to claim 1, It is characterized in that The memristor array adopts a cross-shaped structure, and the memristor units are located at the intersections.

3. The method for implementing a linear regression algorithm hardware control circuit based on a memristor array according to claim 1, It is characterized in that According to the universal approximation principle, improving the prediction accuracy of linear regression is achieved by increasing the number of weights, that is, the size of the memristor array.

Images