A three-level inverter, control method and system

Abstract

The present application discloses a three-level inverter, a control method and a system, and relates to the field of electronic power technology. The three-level inverter includes: a first bus capacitor, a second bus capacitor, a power conversion circuit and a controller. The first end of the first bus capacitor is connected to the positive DC bus and the first input end of the power conversion circuit, the second end of the first bus capacitor is connected to the negative DC bus and the second input end of the power conversion circuit through the second bus capacitor, and the second end of the first bus capacitor is also connected to the third input end of the power conversion circuit; the power conversion circuit is used to convert DC power into three-phase AC power and then output it; the controller is used to use the difference between the absolute values ​​of the positive and negative DC bus voltages and the even harmonic current in the grid-connected current to determine the balancing instruction, and the balancing instruction is used to enable the three-level inverter to generate a current signal that balances the positive and negative DC bus voltages. The voltages of the positive and negative DC buses of the three-level inverter can be balanced.

Description

[0001] This application is a divisional application. The application number of the original application is 202080024643.3, and the original application date is September 8, 2020. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The present application relates to the field of power electronics technology, and in particular to a three-level inverter, a control method and a system. Background Art

[0003] Photovoltaic power generation is a technology that uses the photovoltaic effect of semiconductor interfaces to convert light energy into electrical energy. It has been developing rapidly. As the core component of photovoltaic power generation systems, photovoltaic inverters are used to convert direct current generated by photovoltaic modules into alternating current.

[0004] As a type of photovoltaic inverter, the three-level inverter has a three-level bridge arm voltage, which is more than the two-level inverter. It is widely used because it can effectively reduce the volume of passive components such as filter inductors. However, since the three-level inverter has a bus midpoint, and the balance of the bus midpoint potential involves many indicators such as the withstand voltage of the inverter power device and the harmonics of the grid-connected current, the balanced control of the midpoint potential of the three-level inverter is crucial.

[0005] When the photovoltaic power generation system is applied to the grid-connected scenario, the photovoltaic power generation system is connected to the grid, and there will be large voltage background harmonic disturbances in the grid. The voltage background harmonics will cause the grid-connected current to contain current harmonics of the same frequency, which will lead to voltage imbalance between the positive and negative DC buses, causing the midpoint of the DC bus to shift, threatening the normal operation of the inverter. Summary of the invention

[0006] In order to solve the above technical problems, the present application provides a three-level inverter, a control method and a system, wherein the voltages of the positive and negative DC buses of the three-level inverter can be balanced.

[0007] In the first aspect, the present application provides a three-level inverter, which includes a first bus capacitor, a second bus capacitor, a power conversion circuit and a controller. The first end of the first bus capacitor is connected to the positive DC bus and the first input end of the power conversion circuit, the second end of the first bus capacitor is connected to the negative DC bus and the second input end of the power conversion circuit through the second bus capacitor, and the second end of the first bus capacitor is also connected to the third input end of the power conversion circuit; the power conversion circuit is used to convert DC power into three-phase AC power and then output it; the controller is used to use the difference between the absolute values ​​of the positive and negative DC bus voltages and the even harmonic current in the grid-connected current to determine the balancing instruction, and the balancing instruction is used to enable the three-level inverter to generate a current signal that balances the positive and negative DC bus voltages.

[0008] The technical solution provided by the present application fully considers the influence of the even harmonic current in the grid-connected current on the bus midpoint potential of the three-level inverter. The controller of the three-level inverter uses the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter to characterize the deviation of the current bus midpoint potential, and determines the balancing instruction in combination with the even harmonic current in the grid-connected current, and uses the current balancing instruction to adjust the grid-connected current. That is, the current signal generated according to the current balancing instruction can weaken the even harmonic current in the grid-connected current after being superimposed, so the positive and negative bus voltages of the three-level inverter can be balanced, and in addition, the harmonics of the grid-connected current are suppressed at the same time, which improves the adaptability of the three-level inverter to the grid, so that the three-level inverter takes into account both bus balancing control and grid current harmonic suppression in harsh grid environments.

[0009] In combination with the first aspect, in a first possible implementation method, the controller uses the difference to determine the harmonic amplitude coefficient, and then determines the type and order of the even-order harmonic current in the grid-connected current, as well as the weight coefficient corresponding to the even-order harmonic current of each type. The weight coefficient is positively correlated with the degree of influence of the even-order harmonic on the grid-connected current. Then, the harmonic amplitude coefficient, the type and order corresponding to each even-order harmonic current, and the weight coefficient are used to determine the balancing instruction.

[0010] The balancing instruction combines the type order and weight coefficient corresponding to each even-order harmonic current, and can suppress the even-order harmonic current.

[0011] In combination with the first aspect, in a second possible implementation method, the controller is specifically used to obtain a balancing instruction component corresponding to each even-order harmonic current, where the balancing instruction component is the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type order; the balancing instruction components corresponding to each even-order harmonic current are superimposed to obtain a balancing instruction.

[0012] In combination with the first aspect, in a third possible implementation, the controller is specifically used to superimpose the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; use the grid-connected current instruction to obtain a first balancing voltage instruction; and use the first balancing voltage instruction to adjust the drive instruction of the three-level inverter, that is, superimpose the obtained first balancing voltage instruction with the original control signal of the three-level inverter to generate a drive signal for driving the three-level inverter, so that a current signal for reducing even harmonic current is generated in the output current of the three-level inverter.

[0013] In combination with the first aspect, in a fourth possible implementation, the controller superimposes the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; uses the grid-connected current instruction to obtain a first balancing voltage instruction; uses the difference to obtain a second balancing voltage instruction; and uses the first balancing voltage instruction and the second balancing voltage instruction to adjust the drive instruction of the three-level inverter so that a current signal for reducing the even harmonic current is generated in the output current of the three-level inverter.

[0014] The second balanced voltage instruction is the common mode voltage of the three-level inverter. The first balanced voltage instruction and the second balanced voltage instruction are superimposed to generate a balanced voltage composite control instruction, and the acquired control signal is superimposed with the original control signal of the three-level inverter to generate a driving signal for driving the three-level inverter.

[0015] In combination with the first aspect, in a fifth possible implementation, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents. That is, the weight coefficient is positively correlated with the amplitude, and the higher the amplitude, the larger the corresponding even-order harmonic current, and the greater the impact on the grid-connected current.

[0016] In combination with the first aspect, in a sixth possible implementation, when the even harmonic current in the grid-connected current is less than a preset current threshold and / or when the difference is less than a preset voltage threshold, the controller uses the difference to obtain the balancing instruction.

[0017] When the even-order harmonic current in the grid-connected current is less than the preset current threshold, it indicates that the influence of the even-order harmonic current on the potential of the bus midpoint is small and can be ignored; when the difference between the absolute values ​​of the positive and negative DC bus voltages is less than the preset voltage threshold, it indicates that the potential of the bus midpoint is less affected by the even-order harmonic current. Therefore, when at least one of the above two conditions is met, it indicates that the grid conditions are better and the influence of the even-order harmonic current in the grid-connected current is small. Therefore, the difference can be used to obtain the balancing instruction, which is the three-phase common-mode voltage bus balancing control quantity.

[0018] In combination with the first aspect, in a seventh possible implementation manner, the controller is specifically configured to adjust a driving instruction of the three-level inverter by using a balancing instruction.

[0019] In combination with the first aspect, in an eighth possible implementation manner, the current signal and the even harmonic current are in opposite phase, thereby minimizing the even harmonic current in the grid-connected current while balancing the bus potential.

[0020] In a second aspect, the present application also provides a method for controlling an inverter, the method comprising: determining a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic currents in the grid-connected current, the balancing instruction being used to enable the three-level inverter to generate a current signal that balances the positive and negative DC bus voltages; and adjusting the grid-connected current using the balancing instruction.

[0021] The method uses the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter to characterize the deviation of the current bus midpoint potential, and determines the balancing instruction in combination with the even harmonic current in the grid-connected current, and uses the current balancing instruction to adjust the grid-connected current, thereby generating a current signal in the grid-connected current for reducing the even harmonic current. That is, the current signal generated according to the current balancing instruction can weaken the even harmonic current in the grid-connected current after being superimposed on the even harmonic current in the grid-connected current, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, since the method suppresses the harmonics of the grid-connected current, it also improves the adaptability of the three-level inverter to the grid, and reduces the probability of the three-level inverter causing protection shutdown due to bus potential imbalance when the grid environment is harsh.

[0022] In combination with the second aspect, in a first possible implementation method, the method of determining a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic currents in the grid-connected current specifically includes: determining a harmonic amplitude coefficient using the difference; determining the type and order of the even harmonic currents in the grid-connected current, and weight coefficients corresponding to the even harmonic currents of each type and order, the weight coefficient being positively correlated to the degree of influence of the even harmonics on the grid-connected current; and determining a balancing instruction using the harmonic amplitude coefficient, the type and order corresponding to each even harmonic current, and the weight coefficient.

[0023] In combination with the second aspect, in a second possible implementation method, the harmonic amplitude coefficient, the type and weight coefficient corresponding to each even-order harmonic current are used to determine the balancing instruction, specifically including: obtaining the balancing instruction component corresponding to each even-order harmonic current, the balancing instruction component being the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type; superimposing the balancing instruction components corresponding to each even-order harmonic current to obtain the said balancing instruction.

[0024] In combination with the second aspect, in a third possible implementation method, the grid-connected current is regulated using a balancing instruction, specifically including: superimposing the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; obtaining a first balancing voltage instruction using the grid-connected current instruction; and adjusting a drive instruction of the three-level inverter using the first balancing voltage instruction so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0025] In combination with the second aspect, in a fourth possible implementation manner, the grid-connected current is regulated using a balancing instruction, specifically including: superimposing the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; using the grid-connected current instruction to obtain a first balancing voltage instruction; using the difference to obtain a second balancing voltage instruction, the second balancing voltage instruction being a common-mode voltage of the three-level inverter; and using the first balancing voltage instruction and the second balancing voltage instruction to adjust a drive instruction of the three-level inverter so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0026] In combination with the second aspect, in a fifth possible implementation manner, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents.

[0027] In combination with the second aspect, in a sixth possible implementation method, a balancing instruction is determined using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current, specifically including: when the even harmonic current in the grid-connected current is less than a preset current threshold, and / or when the difference is less than a preset voltage threshold, using the difference to obtain a balancing instruction.

[0028] In combination with the second aspect, in a seventh possible implementation manner, adjusting the grid-connected current by using the balancing instruction specifically includes: adjusting the driving instruction of the three-level inverter by using the balancing instruction.

[0029] In combination with the second aspect, in an eighth possible implementation manner, the current signal and the even-order harmonic current are in opposite phases.

[0030] In a third aspect, the present application also provides a control device for an inverter, the device comprising: a determination unit and an adjustment unit. The determination unit is used to determine a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current, the balancing instruction being used to enable the three-level inverter to generate a current signal that balances the positive and negative DC bus voltages. The adjustment unit is used to adjust the grid-connected current using the balancing instruction.

[0031] In combination with the third aspect, in a first possible implementation, the determination unit specifically includes: a first coefficient determination subunit, a second coefficient determination subunit and a first instruction determination subunit. The first coefficient determination subunit is used to determine the harmonic amplitude coefficient using the difference. The second coefficient determination subunit is used to determine the type and order of the even harmonic current in the grid-connected current, and the weight coefficient corresponding to each type and order of the even harmonic current, and the weight coefficient is positively correlated with the degree of influence of the even harmonic on the grid-connected current. The first instruction determination subunit is used to determine the balancing instruction using the harmonic amplitude coefficient, the type and order corresponding to each even harmonic current and the weight coefficient.

[0032] In combination with the third aspect, in a second possible implementation method, the first instruction determination subunit is specifically used to: obtain the balancing instruction component corresponding to each even-order harmonic current, the balancing instruction component being the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type order; superimpose the balancing instruction components corresponding to each even-order harmonic current to obtain a balancing instruction.

[0033] In combination with the third aspect, in a third possible implementation method, the adjustment unit is specifically used to: superimpose the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; use the grid-connected current instruction to obtain a first balancing voltage instruction; use the first balancing voltage instruction to adjust the drive instruction of the three-level inverter so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0034] In combination with the third aspect, in a fourth possible implementation method, the adjustment unit is specifically used to: superimpose the balancing instruction with the grid-connected current to obtain a grid-connected current instruction; use the grid-connected current instruction to obtain a first balancing voltage instruction; use the difference to obtain a second balancing voltage instruction; use the first balancing voltage instruction and the second balancing voltage instruction to adjust the drive instruction of the three-level inverter so that a current signal for reducing even harmonic current is generated in the output current of the three-level inverter.

[0035] In combination with the third aspect, in a fifth possible implementation manner, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents.

[0036] In combination with the third aspect, in a sixth possible implementation, the determination unit is specifically used to obtain a balancing instruction using a difference when an even harmonic current in the grid-connected current is less than a preset current threshold and / or when the difference is less than a preset voltage threshold.

[0037] In combination with the third aspect, in a seventh possible implementation manner, the adjustment unit is specifically the same as: adjusting the driving instruction of the three-level inverter by using the balancing instruction.

[0038] In combination with the third aspect, in an eighth possible implementation manner, the current signal and the even harmonic current are in opposite phases.

[0039] In a fourth aspect, the present application further provides a photovoltaic power generation system, which includes the three-level inverter provided in any of the above implementations, and also includes a photovoltaic unit. The photovoltaic unit includes a plurality of photovoltaic modules, and the output end of the photovoltaic unit is connected to the input end of the three-level inverter. The photovoltaic unit is used to convert light energy into direct current and transmit it to the three-level inverter.

[0040] In a fifth aspect, the present application also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed, the control method provided by any of the above implementations is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 is a schematic diagram of a photovoltaic system;

[0042] Figure 2 A flow chart of a control method for a three-level inverter provided in an embodiment of the present application;

[0043] Figure 3 A flow chart of another control method of a three-level inverter provided in an embodiment of the present application;

[0044] Figure 4 A control block diagram provided for an embodiment of the present application;

[0045] Figure 5 A flowchart of a method for determining a balancing instruction provided in an embodiment of the present application;

[0046] Figure 6 A waveform diagram provided in an embodiment of the present application when the control method of the present application is not adopted;

[0047] Figure 7 A waveform diagram of the control method of the present application provided in an embodiment of the present application;

[0048] Figure 8 Provided for the embodiments of this application Figure 6 The corresponding grid-connected current waveform;

[0049] Fig. 9 Provided for the embodiments of this application Figure 7 The corresponding grid-connected current waveform;

[0050] Fig.10 A flow chart of another control method of a three-level inverter provided in an embodiment of the present application;

[0051] Fig.11 Another control block diagram provided for an embodiment of the present application;

[0052] Fig.12 A flowchart of another method for controlling a three-level inverter provided in an embodiment of the present application;

[0053] Fig.13 A schematic diagram of a control device for a three-level inverter provided in an embodiment of the present application;

[0054] Fig.14 A schematic diagram of another control device for a three-level inverter provided in an embodiment of the present application;

[0055] Fig.15 A schematic diagram of a three-level inverter provided in an embodiment of the present application;

[0056] Fig.16 A schematic diagram of a power conversion circuit provided in an embodiment of the present application;

[0057] Fig.17 A schematic diagram of a photovoltaic power generation system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] In order to enable those skilled in the art to more clearly understand the technical solution provided by the embodiments of the present application, the application scenarios of the technical solution provided by the present application are first introduced below.

[0059] See also Figure 1 , which is a schematic diagram of a photovoltaic system.

[0060] The photovoltaic system shown in the figure includes a photovoltaic unit 10 and a three-level inverter 20 , and the photovoltaic system is connected to a power grid 30 .

[0061] The photovoltaic unit 10 includes a plurality of photovoltaic (PV) modules, and the plurality of photovoltaic modules are connected in series or in parallel. For example, the plurality of photovoltaic modules may be connected in series to form a photovoltaic string, and the plurality of photovoltaic strings may be connected in series to form the photovoltaic unit 10 .

[0062] The three-level inverter 20 is used to convert the direct current generated by the photovoltaic module 10 into alternating current and transmit it to the power grid. The output current of the photovoltaic system is represented by ig, and the voltage of the power grid is represented by Ug.

[0063] The three-level inverter 20 includes: bus capacitors C1 and C2 , and a power conversion circuit 201 .

[0064] The midpoint of the positive and negative DC busbars is represented by N. The balance of the potential at the midpoint N involves many indicators such as the withstand voltage of the power devices of the three-level inverter and the harmonics of the grid-connected current. Therefore, the balanced control of the midpoint potential of the three-level inverter is very important.

[0065] In order to achieve the balance of the midpoint potential, currently, the bus voltage equalization can be forced to be achieved by connecting resistive loads externally to the bus capacitors C1 and C2 of the three-level inverter 20; or a switching converter can be externally connected to the positive and negative DC buses. When the voltages of the positive and negative DC buses are unbalanced, the external switching converter is controlled to transfer the energy of the positive and negative DC buses to achieve the balance of the midpoint potential.

[0066] However, despite the above measures, when the grid environment is relatively harsh, there is still a problem in actual applications that the three-level inverter is disconnected from the grid due to the unbalanced bus midpoint potential, which seriously threatens the normal and reliable operation of the three-level inverter.

[0067] In order to solve the above technical problems, the present application provides a three-level inverter, a control method and a system, which fully considers the influence of the even harmonic current in the grid-connected current on the bus midpoint potential of the three-level inverter. The balance instruction is determined by using the difference in the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current, and the grid-connected current is adjusted by using the current balance instruction, so that the grid-connected current generates a current signal for reducing the even harmonic current, thereby reducing the influence of the grid-connected current on the three-level inverter, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, the harmonics of the grid-connected current are suppressed, thereby improving the adaptability of the three-level inverter to the grid, and reducing the probability of the three-level inverter causing protection shutdown due to unbalanced bus potential when the grid environment is harsh.

[0068] In order to enable persons skilled in the art to more clearly understand the solution of the present application, the technical solution in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0069] The terms "first", "second", etc. in this application description are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0070] In the present application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0071] Embodiment 1:

[0072] The inventor has found through research and repeated experiments that for a grid with relatively bad conditions, due to the voltage U g Containing a large even-order harmonic current, the grid-connected current ig of the three-level inverter 20 also contains a certain amount of harmonic current of the same frequency. The even-order harmonic current will cause the energy between the positive and negative DC buses of the photovoltaic system to transfer to each other, thereby causing the voltage of the positive and negative DC buses to be unbalanced. The specific energy transfer situation can be seen in Table 1.

[0073] Table 1: Correspondence table of DC bus energy transfer caused by harmonic current

[0074]

[0075] The frequency of the even-order harmonic current is an even multiple of the frequency of the grid-connected current, such as 2, 4, 8, etc.

[0076] The current midpoint potential balance control strategy has an upper limit on its control capability. When the energy transfer between the positive and negative DC buses caused by the even harmonic current is serious, the current strategy is not enough to suppress the problem, which may eventually lead to the midpoint potential shift of the DC bus, threatening the normal and reliable operation of the three-level inverter. In severe cases, it may cause the three-level inverter to shut down in batches for protection and disconnect from the grid.

[0077] To this end, an embodiment of the present application provides a control method for a three-level inverter, which is described in detail below with reference to the accompanying drawings.

[0078] See also Figure 2 , which is a flow chart of a control method for a three-level inverter provided in an embodiment of the present application.

[0079] The method provided in the embodiment of the present application can be implemented by a controller of a three-level inverter, and the method comprises the following steps:

[0080] S101: Determine a balancing instruction using the absolute value difference between the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current, wherein the balancing instruction is used to enable the three-level inverter to generate a current signal for balancing the positive and negative DC bus voltages.

[0081] The difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter represents the degree of deviation of the DC bus midpoint potential at this time, and also represents the influence of the even harmonic current in the current grid-connected current on the potential of the bus DC midpoint. The following example illustrates this:

[0082] Assuming that at a certain moment, the total DC bus voltage of the photovoltaic power generation system is 749.6V, under the influence of the grid-connected current, the voltage of the positive DC bus is +353.6V, and the voltage of the negative DC bus is -396V, then the difference is -42.4V. The larger the difference, the greater the current positive and negative DC bus voltage offset, that is, the more serious the even harmonic current in the grid-connected current is on the midpoint voltage of the positive and negative DC buses.

[0083] At the same time, the grid-connected current can be sampled in real time, and the harmonic information of the grid-connected current can be analyzed to obtain the information of the even-order harmonic current in the grid-connected current. For example, the amplitude information and type information of the even-order harmonic current can be obtained. Among them, the type of the even-order harmonic current represents the multiple relationship between the frequency of the even-order harmonic current and the frequency of the grid-connected current. The larger the type, the larger the frequency of the harmonic current.

[0084] The balancing instruction is determined according to the difference and the even harmonic current in the grid-connected current. The function of the balancing instruction is to make the three-level inverter generate a current signal for reducing the even harmonic current in the grid-connected current, that is, the generated current signal weakens the influence of the even harmonic current on the positive and negative DC bus midpoint voltages of the three-level inverter.

[0085] S102: Regulate the grid-connected current using a balancing instruction.

[0086] The balancing instruction obtained in S101 is used to control the working state of the three-level inverter so that the positive and negative DC buses of the three-level inverter can achieve voltage balance. By controlling the three-level inverter, the output current of the three-level inverter is adjusted, that is, the grid-connected current is adjusted.

[0087] In summary, the control method provided by the present application fully considers the influence of the even harmonic current in the grid-connected current on the bus midpoint potential of the three-level inverter. The difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter is used to characterize the deviation of the current DC bus midpoint potential, and the balancing instruction is determined in combination with the even harmonic current in the grid-connected current, and the grid-connected current is adjusted by the current balancing instruction, so that the grid-connected current generates a current signal for reducing the even harmonic current. That is, the current signal generated according to the current balancing instruction can weaken the even harmonic current after being superimposed with the even harmonic current in the grid-connected current, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, since the method suppresses the harmonics of the grid-connected current, it also improves the adaptability of the three-level inverter to the grid, reduces the probability of the three-level inverter being shut down due to the imbalance of the bus potential when the grid environment is bad, enhances the friendliness of the grid-connected network, and moves from adapting to the grid to supporting the grid.

[0088] Embodiment 2:

[0089] The principle of controlling a three-level inverter to achieve bus voltage balancing is explained below in conjunction with a specific implementation method.

[0090] See also Figure 3 , which is a flow chart of another control method for a three-level inverter provided in an embodiment of the present application.

[0091] For easier understanding, please also refer to Figure 4 The control block diagram is shown.

[0092] S201: Determine the harmonic amplitude coefficient using the difference between the absolute values ​​of the positive and negative DC bus voltages.

[0093] When the three-level inverter is connected to the grid, the voltages of the positive and negative DC buses are collected in real time, and the difference ΔU between the absolute values ​​of the two is obtained. The deviation ΔU can be used to generate the harmonic amplitude coefficient Im through the proportional integral controller (PI controller) 401. The harmonic amplitude coefficient represents the amplitude of the even harmonic current in the grid-connected current at this time.

[0094] S202: Determine the type and order of the even-order harmonic current in the grid-connected current, and the weight coefficient corresponding to each type and order of the even-order harmonic current, wherein the weight coefficient is positively correlated with the influence of the even-order harmonic on the grid-connected current.

[0095] The detection unit 402 samples the grid-connected current ig, and the processing unit 403 analyzes the sampling information of the grid-connected current to obtain the type and order of the even harmonic current in the grid-connected current and the weight coefficient corresponding to each type and order of the even harmonic current. Specifically, the harmonic type and order selection unit determines the type and order of each even harmonic current according to the distribution of each harmonic in the grid-connected current:

[0096] cos(nwt+Δθ n )(1)

[0097] Where w is the fundamental angular frequency, Δθ n is the harmonic sub-starting phase angle, n=2·i, i∈[-N,N], where N is a positive integer.

[0098] The harmonic weight distribution unit determines the weight coefficient k corresponding to each type of even harmonic current n The weight coefficient is positively correlated with the influence of even harmonics on the grid-connected current. This application does not specifically limit the specific allocation method of the weight coefficient.

[0099] In some embodiments, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents, that is, the weight coefficient is positively correlated with the amplitude, and the higher the amplitude, the larger the corresponding even-order harmonic current, and the greater the degree of influence on the grid-connected current. Therefore, the weight coefficient of the second harmonic current is the largest. In practical applications, the type of even-order harmonic currents to be considered can be determined in combination with the specific requirements for the potential of the positive and negative DC buses when the three-level inverter is working normally. For even-order harmonic currents of particularly high types, due to their extremely low weight coefficients, their influence on the grid-connected current can be ignored.

[0100] S203: Determine a balancing instruction using the harmonic amplitude coefficient, the order and weight coefficient corresponding to each even-order harmonic current.

[0101] The balancing instruction combines the order and weight coefficient corresponding to each even-order harmonic current, and is used to generate a current signal for reducing the even-order harmonic current in the output current of the three-level inverter, that is, the balancing instruction is used to suppress the even-order harmonic current.

[0102] A method for determining a balancing instruction is described below.

[0103] See also Figure 5 , which is a flow chart of a method for determining a balancing instruction provided in an embodiment of the present application.

[0104] S203a: Obtain the balancing instruction component corresponding to each even-order harmonic current, where the balancing instruction component is the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type order.

[0105] The balancing instruction component is i j分 (t), which is shown as follows:

[0106] i j min(t)=I m ·k n ·cos(nwt+Δθ n )(2)

[0107] Among them, k n ∈[-1, 1].

[0108] S203b: Superimpose the balancing instruction components corresponding to the even-order harmonic currents to obtain a balancing instruction.

[0109] The balancing instruction is i j (t), which is shown as follows:

[0110]

[0111] Wherein, j = a, b, c. a, b and c correspond to one phase of the three-phase alternating current respectively.

[0112] In other embodiments, even harmonic currents whose weight coefficients are less than a preset weight threshold may be ignored. The present application does not specifically limit the method for determining the preset weight threshold and the specific value.

[0113] S204: Superimpose the balancing instruction and the grid-connected current to obtain a grid-connected current instruction.

[0114] Grid-connected current command i ref , which is shown in the following formula:

[0115] i ref =i g +i j (t) (4)

[0116] S205: Obtain a first balancing voltage instruction using the grid-connected current instruction.

[0117] That is, the grid-connected current instruction i ref After passing through the grid-connected current loop 404, a first balanced voltage command U is generated ref_h The grid-connected current loop includes a loop for adjusting the working state of the three-level inverter according to the sampling information feedback of the grid-connected current. The detection and control principle of the loop is a relatively mature existing technology, and the embodiments of the present application will not be described in detail here.

[0118] S206: Using the first balanced voltage instruction to adjust the driving instruction of the three-level inverter, so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0119] The U ref_h The control signal of the three-level inverter is superimposed to generate a driving signal for driving the three-level inverter. The three-level inverter includes a controllable switch tube. The embodiment of the present application does not specifically limit the type of the controllable switch tube, for example, it can be an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET, hereinafter referred to as MOS tube), SiC MOSFET (Silicon Carbide Metal Oxide Semiconductor, silicon carbide field effect tube), etc.

[0120] When the method of the embodiment of the present application is applied to a controller, the controller adjusts the working state of the controllable switch tube by adjusting the PWM (Pulse Width Modulation) signal acting on the controllable switch tube, so that a current signal for reducing even harmonic current is generated in the output current of the three-level inverter. Therefore, the current signal can weaken the even harmonic current after being superimposed on the even harmonic current in the grid-connected current.

[0121] In some embodiments, in order to better weaken the even harmonic current, the current signal generated by the output end of the three-level inverter is opposite in phase to the even harmonic current, thereby minimizing the even harmonic current in the grid-connected current while balancing the bus potential.

[0122] The division and order of the above steps in the embodiment of the present application are for convenience only and do not constitute a limitation to the present application. Those skilled in the art may make appropriate adjustments during the specific implementation. For example, the order of S201 and S202 may be swapped.

[0123] In summary, the method of the embodiment of the present application ensures the balance of the positive and negative bus voltages of the three-level inverter. In addition, since the method suppresses the harmonics of the grid-connected current, the adaptability of the three-level inverter to the grid is also improved, and the probability of the three-level inverter causing protection shutdown due to bus potential imbalance when the grid environment is harsh is reduced. In order to enable those skilled in the art to clearly understand the advantages of the solution of the present application, it is specifically described below in conjunction with the accompanying drawings.

[0124] See also Figure 6 and Figure 7.in, Figure 6 This is a waveform diagram provided in an embodiment of the present application when the control method of the present application is not adopted. Figure 7 A waveform diagram of the control method of the present application provided in an embodiment of the present application.

[0125] Figure 6 The waveform of the voltage of the positive DC bus is 602, and the waveform of the voltage of the negative DC bus after taking the absolute value is 601. Due to the influence of the even harmonic components in the grid-connected current, the energy between the positive and negative DC buses is transferred to each other, so there is an obvious voltage difference ΔU between the two waveforms.

[0126] and Figure 7 After adopting the control method of the present application, the bus midpoint potential is effectively balanced, so that the positive and negative DC bus voltages of the inverter are balanced.

[0127] See also Figure 8 and Fig. 9 ,.in, Figure 8 Provided for this application Figure 6 The corresponding grid-connected current waveform is as follows: Fig. 9 Provided for this application Figure 7 The corresponding grid-connected current waveform.

[0128] The grid-connected current is in the form of three-phase alternating current. Figure 8 Region 801 is the peak of one phase of the three-phase AC, and region 802 is the trough of the phase. Since there are obvious even-order harmonic components in the grid-connected current, the energy between the positive and negative DC buses is transferred to each other, which leads to obvious distortion of the waveforms of the peaks and troughs.

[0129] See also Fig. 9 It can be seen from regions 901 and 902 in FIG. 1 that the method of the embodiment of the present application not only balances the bus midpoint potential of the three-level inverter, but also suppresses the even harmonic current in the grid-connected current, so that the output grid-connected current is more standardized.

[0130] Embodiment three:

[0131] The principle of controlling a three-level inverter to achieve bus voltage balancing is described below in conjunction with another specific implementation.

[0132] See also Fig.10 , which is a flow chart of another control method for a three-level inverter provided in an embodiment of the present application.

[0133] For easier understanding, see Fig.11 , which is another control block diagram provided in an embodiment of the present application.

[0134] S301-S305 of the method provided in the embodiment of the present application corresponds to S201-S205 of the method described in the second embodiment, except that Fig.11 The first proportional-integral controller in is equivalent to Figure 4 The proportional-integral controller 401 in the embodiment of the present application will not be described in detail here.

[0135] Through the above S301-S305, the first balanced voltage instruction U is obtained. ref_h .

[0136] S306: Obtain a second balanced voltage instruction using the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter.

[0137] The absolute value difference between the positive and negative DC bus voltages of the three-level inverter is obtained, and a second balanced voltage instruction U is generated by the second proportional integral controller 502. ref_m The second balanced voltage instruction is a common mode voltage of the three-level inverter.

[0138] S307: Using the first balanced voltage instruction and the second balanced voltage instruction to adjust the driving instruction of the three-level inverter, so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0139] The first balancing voltage command U ref_h And the second balancing voltage command U ref_m Superposition is performed to generate a balanced voltage composite control instruction U ref , and the obtained U ref The signal is superimposed on the original control signal of the three-level inverter to generate a driving signal for driving the three-level inverter.

[0140] The three-level inverter is driven by the driving signal so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter. In some embodiments, the driving signal can cause the output current of the three-level inverter to generate a current signal that is anti-phase with the even-order harmonic current, thereby minimizing the even-order harmonic current in the grid-connected current while balancing the bus potential.

[0141] See also Fig.12 , which is a flow chart of another control method for a three-level inverter provided in an embodiment of the present application.

[0142] The method provided in the embodiment of the present application comprises the following steps:

[0143] S1201: When the even harmonic current in the grid-connected current is less than a preset current threshold, and / or when the difference is less than a preset voltage threshold, a balancing instruction is obtained using the difference.

[0144] When the even harmonic current in the grid-connected current is less than the preset current threshold, it indicates that the influence of the even harmonic current on the potential of the bus midpoint is small and can be ignored;

[0145] When the difference between the absolute values ​​of the positive and negative DC bus voltages is less than a preset voltage threshold, it indicates that the potential at the bus midpoint is less affected by the even harmonic current.

[0146] Therefore, when at least one of the above two conditions is met, it indicates that the grid condition is better at this time, and the influence of the even harmonic current in the grid-connected current is small. Therefore, the difference can be used to obtain the balancing instruction, and the balancing instruction is the three-phase common mode voltage bus balancing control quantity. The specific description is similar to the second balancing voltage instruction U in the above embodiment. ref_m , can be generated by a proportional-integral controller.

[0147] S1202: Use the balancing instruction to adjust the driving instruction of the three-level inverter.

[0148] The balancing instruction is superimposed on the original control signal of the three-level inverter to generate a driving signal for driving the three-level inverter.

[0149] In summary, using the method provided by the embodiment of the present application, when the even harmonic current in the grid-connected current affects the bus midpoint potential balance of the three-level inverter, the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter is used, combined with the even harmonic current in the grid-connected current to determine the balance instruction, and the grid-connected current is adjusted using the current balance instruction, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, since the method suppresses the harmonics of the grid-connected current, it also improves the adaptability of the three-level inverter to the grid, and reduces the probability of the three-level inverter causing protection shutdown due to bus potential imbalance when the grid environment is harsh.

[0150] Embodiment 4:

[0151] Based on the control method of the three-level inverter provided in the above embodiment, the embodiment of the present application further provides a control device of the three-level inverter, which is described in detail below with reference to the accompanying drawings.

[0152] See also Fig.13 , which is a schematic diagram of a control device for a three-level inverter provided in an embodiment of the present application.

[0153] The device includes a determining unit 1301 and an adjusting unit 1302 .

[0154] The determining unit 1301 determines a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current, and the balancing instruction is used to generate a current signal for reducing the even harmonic current in the output current of the three-level inverter.

[0155] In a preferred implementation, the current signal and the even harmonic current are in opposite phase.

[0156] The regulating unit 1302 is used to regulate the grid-connected current using the balancing instruction. Fig.11 The grid-connected current loop 404 in.

[0157] See also Fig.14 , which is a schematic diagram of another control device for a three-level inverter provided in an embodiment of the present application.

[0158] The determination unit 1301 specifically includes: a first coefficient determination subunit 1301a, a second coefficient determination subunit 1301b and a first instruction determination subunit 1301c.

[0159] The first coefficient determination subunit 1301a is used to determine the harmonic amplitude coefficient using the difference. Fig.11 The first proportional-integral controller 501 is shown in FIG.

[0160] The second coefficient determination subunit 1301b determines the type and order of the even harmonic current in the grid-connected current, and the weight coefficient corresponding to each type and order of the even harmonic current. The weight coefficient is positively correlated with the influence of the even harmonic on the grid-connected current. Fig.11 The detection unit 402 shown in , and the harmonic weight distribution unit and the harmonic type sub-selection unit in 403.

[0161] In some embodiments, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents.

[0162] The first instruction determination subunit 1301c is used to determine the balancing instruction by using the harmonic amplitude coefficient, the type order and weight coefficient corresponding to each even-order harmonic current.

[0163] Specifically, the first instruction determination subunit 1301c obtains the balanced instruction component corresponding to each even-order harmonic current, which is the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type order, and superimposes the balanced instruction components corresponding to each even-order harmonic current to obtain the balanced instruction.

[0164] In some possible implementations, the adjustment unit 1302 superimposes the balancing instruction with the grid-connected current to obtain a grid-connected current instruction, uses the grid-connected current instruction to obtain a first balancing voltage instruction, and uses the first balancing voltage instruction to adjust the driving instruction of the three-level inverter, so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter. In this case, the implementation corresponds to Figure 4 The control block diagram is shown.

[0165] In some other possible implementations, the adjustment unit 1302 superimposes the balancing instruction with the grid-connected current to obtain the grid-connected current instruction, uses the grid-connected current instruction to obtain the first balancing voltage instruction, and uses the difference to obtain the second balancing voltage instruction, where the second balancing voltage instruction is the three-phase common-mode voltage bus balancing control quantity. The first balancing voltage instruction and the second balancing voltage instruction are used to adjust the driving instruction of the three-level inverter so that the output current of the three-level inverter generates a current signal for reducing the even harmonic current. That is, the adjustment unit 1302 also includes Fig.11 The second proportional-integral controller 502 shown in FIG. 5 corresponds to Fig.11 The control block diagram is shown.

[0166] Continue to see Fig.13 In another possible implementation, the determination unit 1301 obtains a balancing instruction using the difference when the even harmonic current in the grid-connected current is less than a preset current threshold and / or when the difference is less than a preset voltage threshold.

[0167] At this time, the grid conditions are relatively good, and the influence of even harmonic current in the grid-connected current is relatively small. The balancing instruction is the three-phase common mode voltage bus balancing control quantity, similar to Fig.11 The second balancing voltage command U ref_m , can be generated by the second proportional-integral controller 502.

[0168] The adjusting unit 1302 adjusts the driving instruction of the three-level inverter using the balancing instruction. Specifically, the adjusting unit 1302 superimposes the balancing instruction with the original control signal of the three-level inverter to generate a driving signal for driving the three-level inverter.

[0169] In summary, the determination unit of the control device uses the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter to characterize the deviation of the current bus midpoint potential, and determines the balancing instruction in combination with the even harmonic current in the grid-connected current. The adjustment unit uses the current balancing instruction to adjust the grid-connected current, thereby generating a current signal in the grid-connected current for reducing the even harmonic current. That is, the current signal generated according to the current balancing instruction can be superimposed with the even harmonic current in the grid-connected current to weaken the even harmonic current, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, the harmonics of the grid-connected current are suppressed, thereby improving the adaptability of the three-level inverter to the grid, and reducing the probability of the three-level inverter shutting down due to unbalanced bus potential when the grid environment is harsh.

[0170] Embodiment five:

[0171] Based on the control method of the three-level inverter provided in the above embodiment, the embodiment of the present application further provides a three-level inverter, which is described in detail below with reference to the accompanying drawings.

[0172] See also Fig.15 , which is a schematic diagram of a three-level inverter provided in an embodiment of the present application.

[0173] The three-level inverter 20 shown in the figure includes: a first bus capacitor C1 , a second bus capacitor C2 , a power conversion circuit 201 and a controller 202 .

[0174] Among them, the first end of the first bus capacitor C1 is connected to the positive DC bus and the first input end of the power conversion circuit 201, the second end of the first bus capacitor C1 is connected to the negative DC bus and the second input end of the power conversion circuit 201 through the second bus capacitor C2, and the second end of the first bus capacitor C1 is also connected to the third input end of the power conversion circuit 201.

[0175] The power conversion circuit 201 is used to convert direct current into three-phase alternating current for output.

[0176] See also Fig.16 , which is a schematic diagram of a power conversion circuit provided in an embodiment of the present application.

[0177] The figure shows a possible implementation of the power conversion circuit. The working principle of the power conversion circuit is a relatively mature existing technology and will not be described in detail in the embodiments of the present application.

[0178] The controller 202 is used to determine a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages and the even harmonic current in the grid-connected current. The balancing instruction is used to generate a current signal for reducing the even harmonic current in the output current of the three-level inverter, and the grid-connected current is adjusted using the balancing instruction.

[0179] In a preferred embodiment, the current signal is in opposite phase to the even harmonic current.

[0180] Controller 202 is specifically used to use the difference to determine the harmonic amplitude coefficient, determine the type and order of the even-order harmonic current in the grid-connected current, and the weight coefficient corresponding to the even-order harmonic current of each type. The weight coefficient is positively correlated with the degree of influence of the even harmonic on the grid-connected current, and the harmonic amplitude coefficient, the type and order corresponding to each even-order harmonic current and the weight coefficient are used to determine the balancing instruction.

[0181] In a possible implementation, the ratio of the weight coefficients corresponding to the even-order harmonic currents is the ratio of the amplitudes of the even-order harmonic currents.

[0182] Furthermore, the controller 202 obtains the balancing instruction component corresponding to each even-order harmonic current, which is the product of the amplitude coefficient, the weight coefficient of the even-order harmonic current and the type order; and superimposes the balancing instruction components corresponding to each even-order harmonic current to obtain the balancing instruction.

[0183] In some embodiments, the controller superimposes the balancing instruction with the grid-connected current to obtain a grid-connected current instruction, uses the grid-connected current instruction to obtain a first balancing voltage instruction, and uses the first balancing voltage instruction to adjust the driving instruction of the three-level inverter so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0184] In other embodiments, the controller superimposes the balancing instruction with the grid-connected current to obtain a grid-connected current instruction, uses the grid-connected current instruction to obtain a first balancing voltage instruction, and uses the difference to obtain a second balancing voltage instruction, wherein the second balancing voltage instruction is a three-phase common-mode voltage bus balancing control quantity, and uses the first balancing voltage instruction and the second balancing voltage instruction to adjust the drive instruction of the three-level inverter so that a current signal for reducing even-order harmonic current is generated in the output current of the three-level inverter.

[0185] The controller in the embodiment of the present application may be an application specific integrated circuit (ASIC), a programmable logic device (PLD), a digital signal processor (DSP) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof, and the embodiment of the present application does not specifically limit this.

[0186] In summary, the controller of the three-level inverter uses the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter to characterize the deviation of the current bus midpoint potential, and determines the balancing instruction in combination with the even harmonic current in the grid-connected current, and uses the current balancing instruction to adjust the grid-connected current, thereby generating a current signal in the grid-connected current for reducing the even harmonic current. That is, the current signal generated according to the current balancing instruction can weaken the even harmonic current in the grid-connected current after being superimposed with the even harmonic current in the grid-connected current, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, since the harmonics of the grid-connected current are also suppressed, the adaptability of the three-level inverter to the grid is also improved, and the probability of the three-level inverter causing protection shutdown due to bus potential imbalance when the grid environment is harsh is reduced.

[0187] Embodiment six:

[0188] Based on the three-level inverter provided in the above embodiment, the embodiment of the present application further provides a photovoltaic power generation system, which is described in detail below with reference to the accompanying drawings.

[0189] See also Fig.17 , which is a schematic diagram of a photovoltaic power generation system provided in an embodiment of the present application.

[0190] The photovoltaic power generation system 1700 includes a photovoltaic unit 10 and a three-level inverter 20 .

[0191] The photovoltaic unit 10 includes a plurality of photovoltaic modules, and an output end of the photovoltaic unit 10 is connected to an input end of a three-level inverter 20 .

[0192] The photovoltaic unit 10 is used to convert light energy into direct current and transmit the direct current to the three-level inverter 20 .

[0193] The three-level inverter 20 is used to convert direct current into three-phase alternating current for output.

[0194] The controller 202 of the three-level inverter 20 is used to determine a balancing instruction using the difference in absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current. The balancing instruction is used to generate a current signal for reducing the even harmonic current in the output current of the three-level inverter, and the grid-connected current is adjusted using the balancing instruction.

[0195] The specific working principle of the controller 202 can be found in the relevant descriptions in the above embodiments, and the embodiments of the present application will not be repeated here.

[0196] In summary, the photovoltaic power generation system provided by the embodiment of the present application includes a three-level inverter, and the controller of the three-level inverter uses the difference between the absolute values ​​of the positive and negative DC bus voltages of the three-level inverter and the even harmonic current in the grid-connected current to determine the balancing instruction, and uses the current balancing instruction to adjust the grid-connected current, thereby generating a current signal in the grid-connected current for reducing the even harmonic current. That is, the current signal generated according to the current balancing instruction can be superimposed with the even harmonic current in the grid-connected current to weaken the even harmonic current, thereby ensuring the balance of the positive and negative bus voltages of the three-level inverter. In addition, the harmonics of the grid-connected current are suppressed, thereby improving the adaptability of the three-level inverter to the grid, reducing the probability of the three-level inverter causing protection shutdown due to bus potential imbalance when the grid environment is harsh, and improving the stability of the photovoltaic power generation system.

[0197] Through the description of the above implementation methods, it can be known that those skilled in the art can clearly understand that all or part of the steps in the above-mentioned embodiment method can be implemented by means of software plus a general hardware platform. Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product, and the computer software product can be stored in a storage medium, such as a read-only memory (ROM) / RAM, a disk, an optical disk, etc., including a number of program codes or instructions for an electronic device (which can be a personal computer, a server, or a network communication device such as a router, etc.) to execute the methods described in each embodiment of the present application or some parts of the embodiments.

[0198] The electronic device for implementing the computer program product includes a processor and a memory, and the processor may refer to one processor or multiple processors. The memory may include a volatile memory (English: volatile memory), such as a random access memory (English: random-access memory, abbreviated: RAM); the memory may also include a non-volatile memory (English: non-volatile memory), such as a read-only memory (English: read-only memory, abbreviated: ROM), a flash memory (English: flash memory), a hard disk drive (English: hard disk drive, abbreviated: HDD) or a solid-state drive (English: solid-state drive, abbreviated: SSD); the memory may also include a combination of the above types of memories. The memory may refer to one memory or multiple memories. In a specific embodiment, the memory stores computer-readable instructions, and the computer-readable instructions include multiple software units, such as the determination unit and the adjustment module in the above embodiment. After executing each software unit, the processor can perform corresponding operations according to the instructions of each software unit. In this embodiment, the operation performed by a software unit actually refers to the operation performed by the processor according to the instructions of the software unit. After the processor executes the computer-readable instructions in the memory, it can perform all operations that the network device can perform according to the instructions of the computer-readable instructions.

[0199] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment and the equipment embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The equipment and device embodiments described above are merely schematic, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0200] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0201] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An inverter, characterized in that: include: A first bus capacitor, a second bus capacitor, a power conversion circuit and a controller; A first end of the first bus capacitor is connected to a positive DC bus and a first input end of the power conversion circuit, and a second end of the first bus capacitor is connected to a negative DC bus and a second input end of the power conversion circuit through the second bus capacitor; The power conversion circuit is used to convert direct current into three-phase alternating current for output; The controller is used to generate a balancing instruction using the difference between the absolute values ​​of the positive and negative DC bus voltages and at least one even harmonic current in the grid-connected current, wherein the balancing instruction is used to enable the inverter to generate a current signal that balances the positive and negative DC bus voltages, wherein the current value of the current signal output by the balancing instruction is positively correlated with the difference between the absolute values ​​of the positive and negative DC bus voltages, and is positively correlated with the current amplitude of the corresponding even harmonic current in the grid-connected point, and when the difference between the absolute values ​​of the positive and negative DC bus voltages is less than a preset voltage threshold, the balancing instruction is obtained using the difference; The frequency of the current signal output based on the balancing instruction is the same as the frequency of the corresponding even harmonic current in the grid connection point, so as to output a current for offsetting one of the even harmonic currents of the corresponding frequency.

2. The inverter according to claim 1, characterized in that: The phase of the balancing instruction is opposite to the phase of the corresponding even harmonic current in the grid connection point.

3. The inverter according to claim 1 or 2, characterized in that: The controller is used to: The balancing instruction is superimposed on the grid-connected current to generate a grid-connected current instruction, so that a current signal for reducing the even-order harmonic current is generated in the output current of the inverter.

4. A control method for an inverter, characterized in that: The method comprises: A balancing instruction is generated by using the difference in absolute values ​​of the voltages of the positive DC bus of the inverter and the negative DC bus of the inverter, and at least one even harmonic current in the grid-connected current, wherein the balancing instruction is used to enable the inverter to generate a current signal that balances the positive and negative DC bus voltages, wherein the current value of the current signal output by the balancing instruction is positively correlated with the difference in absolute values ​​of the positive and negative DC bus voltages, and is positively correlated with the current amplitude of the corresponding even harmonic current in the grid-connected point, and when the difference in absolute values ​​of the positive and negative DC bus voltages is less than a preset voltage threshold, the balancing instruction is obtained by using the difference to adjust the current signal; Wherein, a first end of the first bus capacitor of the inverter is connected to the positive DC bus and a first input end of the power conversion circuit of the inverter, and a second end of the first bus capacitor is connected to the negative DC bus and a second input end of the power conversion circuit of the inverter through a second bus capacitor; The frequency of the current signal output based on the balancing instruction is the same as the frequency of the corresponding even harmonic current in the grid connection point, so as to output a current for offsetting one of the even harmonic currents of the corresponding frequency.

5. The inverter control method according to claim 4, characterized in that: The phase of the current signal output based on the balancing instruction is opposite to the phase of the corresponding even harmonic current in the grid connection point.

6. The inverter control method according to any one of claims 4 or 5, characterized in that: The balancing instruction is superimposed on the grid-connected current to generate a grid-connected current instruction, so that a current signal for reducing the even-order harmonic current is generated in the output current of the inverter.

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