A production process of a radar circuit board

Abstract

The application provides a production process of a radar circuit board, and process problems caused by a blind hole design are solved by improving the production process, so that the bottom of the blind hole is lifted before the hole is filled, thereby meeting the normal equipment process capacity requirements. The application provides a production process of a radar circuit board, first, the first layer to the seventh layer are laminated, for the first lamination, the third layer, the fifth layer and the seventh layer are subjected to line marking process before lamination, then copper is electroplated, copper plating thickening is performed below the second layer and above the seventh layer, so that the eighth layer and the ninth layer are padded when the first to seventh layers are subjected to secondary lamination, and the ninth layer blind hole bottom is equivalent to the height of the copper plating pad, thereby meeting the requirements of the blind hole process, and the design requirements of the circuit board are met, and the production process of the blind hole is realized.

Description

Technical Field

[0001] This invention relates to the production of circuit boards, and more particularly to a production process for a high aspect ratio filled-hole electroplated radar circuit board. Background Technology

[0002] Currently, with the continuous improvement of electronic product performance, the frequency of transmission signals on single-board circuit boards is getting higher and higher. In the design process of printed circuit boards, many details that were previously negligible now have a significant impact on the signal integrity of transmission lines under such high-frequency environments. In multilayer printed circuit boards, when a signal is transmitted from one layer of interconnect to another, it is usually necessary to achieve the connection through vias.

[0003] If the signal frequency is below 1GHz, a via can serve as a good connection, and its parasitic capacitance and inductance can be ignored. However, when the signal frequency is above 1GHz, the parasitic effect of the via on signal integrity cannot be ignored. At this time, the via manifests as a discontinuity in impedance on the transmission path, and these discontinuities will cause signal reflection, delay, attenuation, and other signal integrity problems.

[0004] Therefore, in multilayer high-frequency printed circuit board (PCB) design, seemingly simple vias can often have a significant negative impact on circuit design. In multilayer high-frequency PCBs, when a signal is transmitted from the top layer to an inner layer, the use of vias creates redundant short pins, which greatly affect signal transmission quality. When the signal is transmitted through a via to another impedance-matched layer, some energy is transferred to the short pins of the via. Since this portion has no impedance termination, it can be considered a completely open circuit. Therefore, this branch causes total reflection of the remaining energy, greatly weakening signal quality and damaging the integrity of the original signal.

[0005] When designing printed circuits, if through-holes are used to connect the top layer and a high-frequency signal transmission line in an inner layer, redundant short through-hole posts will be generated. If these short through-hole posts are ignored, it may lead to design defects in the printed circuit board.

[0006] Therefore, during the design process, changing through holes to blind holes can avoid generating unnecessary short pillars in the through holes. However, when the through-hole board is changed to a blind hole filling process: First, the amount of copper in the holes of the radar PCB after copper plating is uneven, and the copper plating layer is prone to oxidation, resulting in a low filling rate after electroplating and a large depression in the blind holes, affecting the conductivity and precision of the radar PCB; Second, it is not suitable for radar PCBs after horizontal copper plating. The copper plating layer of horizontal copper plating is thinner, and the charge attraction during electroplating is weaker, which will lead to insufficient electroplating of through holes, low filling rate of blind holes, and large depressions; Third, when the jet frequency is too high during electroplating, the areas with thicker copper shielding in the blind holes of the radar PCB are prone to forming defects such as voids. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a manufacturing process for radar circuit boards. By improving the manufacturing process, the process problems caused by blind via design are solved, so that the bottom of the blind via is raised before the via is filled, thereby meeting the normal equipment process capability requirements.

[0008] To solve the above-mentioned technical problems, the technical solution of the present invention is: a manufacturing process for a radar circuit board, wherein the circuit board has nine layers from top to bottom, designated as the first to the ninth layers, which are arranged and laminated sequentially from bottom to top. The bottommost first layer is copper foil, the second layer is a PP prepreg, the third layer is a double-sided copper substrate, the fourth layer is a PP prepreg, the fifth layer is a double-sided copper substrate, the sixth layer is a PP prepreg, the seventh layer is a double-sided copper substrate, the eighth layer is a PP prepreg, and the ninth layer is a single-sided substrate. The manufacturing process is as follows:

[0009] Step 1: First, press the first to seventh layers together. After pressing, perform X-ray target punching and measure expansion and contraction.

[0010] Step 2: After the first to seventh layers are laminated, the exposure data is obtained by the expansion and contraction ratio, and copper is electroplated to form high-convex copper pads for the eighth and ninth layers of laser blind holes;

[0011] Step 3: Before the second pressing of the eighth and ninth layers, pre-process positioning holes on the eighth and ninth layers;

[0012] Step 4: Perform a second lamination of the eighth and ninth layers with the first to seventh layers. After lamination, perform X-ray measurement and complete LDD browning and copper reduction.

[0013] Step 5: Create blind holes using laser technology. After completion, perform plasma desmearing to completely remove PTFE carbonization residue. The second desmearing uses wet desmearing (permanganese acid) to remove PP carbonization residue.

[0014] Step Six: After removing the adhesive, perform micro-etching cleaning and 100% check whether the bottom of the blind hole is clean.

[0015] Step 7: Fill the completed blind holes; increase the thickness at the bottom of the blind holes to meet process requirements, and scribing the ninth layer;

[0016] Step 8: After the hole filling is completed, perform AOI optical inspection, then solder resist, then surface treatment, then molding, and finally package the finished product to complete the processing.

[0017] Furthermore, in step one, before the first to seventh layers are laminated, one side of the third, fifth and seventh layers is etched into a blank plate.

[0018] Furthermore, during the fabrication of the circuitry from the first to the seventh layer, targets for the laser blind holes in the eighth and ninth layers are reserved in advance.

[0019] Furthermore, in step three, the size of the positioning hole is made according to the expansion and contraction ratio of the first pressing, and the hole diameter is increased by 3mil compared to the diameter of the pad in the second layer.

[0020] Furthermore, in step four, to ensure the roundness of the hole and reduce protrusion, the copper thickness needs to be controlled at 6-7 μm.

[0021] Furthermore, in step five, it is ensured that there is no PP residue on the copper surface at the bottom of the hole, the laser hole diameter is 150um, the dielectric thickness is 0.208mm, and the double-sided copper substrate of the third, fifth and seventh layers uses 2OZ thick copper foil as the base copper, and then electroplats 50um of copper to form the circuit.

[0022] Furthermore, the copper plating is 50µm thick, which ensures that the copper pad thickness of the blind via is 50µm, thus guaranteeing the process capability of meeting the aspect ratio <1 requirement when electroplating the blind via.

[0023] Furthermore, in step seven, the hole filling depth is 0.15mm. Since the copper pad thickness has been increased by 50um, the actual hole filling depth only needs to be 0.15mm, and the hole diameter of 0.15mm is sufficient to meet the process requirements.

[0024] Furthermore, the blind hole has an inverted trapezoidal shape, which facilitates the exchange of chemicals during the filling electroplating process.

[0025] Compared with the prior art, the manufacturing process of a radar circuit board provided by the present invention first laminates the first to seventh layers, which is the first lamination. Before lamination, the third, fifth and seventh layers are scribing. Then, copper plating is performed below the second layer and above the seventh layer to thicken the copper. This makes the eighth and ninth layers raised when they are laminated with the first to seventh layers. Therefore, the bottom of the blind hole in the ninth layer is equivalent to the height of the copper plating, thus meeting the requirements of the blind hole process. In this way, the design requirements of the circuit board are met, and the blind hole manufacturing process is realized. Attached Figure Description

[0026] Figure 1 An exploded view of the circuit board of the present invention is shown.

[0027] Figure 2 A finished circuit board diagram of the present invention is shown.

[0028] Wherein: L1. First layer is copper foil, L2. Second layer is PP prepreg, L3. Third layer is double-sided copper substrate, L4. Fourth layer is PP prepreg, L5. Fifth layer is double-sided copper substrate, L6. Sixth layer is PP prepreg, L7. Seventh layer is double-sided copper substrate, L8. Eighth layer is PP prepreg, L9. Ninth layer is single-sided substrate, 10. Electroplated copper, 11. Blind via. Detailed Implementation

[0029] like Figure 1 As shown, in one embodiment, a manufacturing process for a radar circuit board is described. The circuit board has nine layers from top to bottom, designated as layer 1 L1 to layer 9 L9, which are arranged and laminated sequentially from bottom to top. The bottommost layer 1 L1 is copper foil, the second layer L2 is a PP prepreg, the third layer L3 is a double-sided copper substrate, the fourth layer L4 is a PP prepreg, the fifth layer L5 is a double-sided copper substrate, the sixth layer L6 is a PP prepreg, the seventh layer L7 is a double-sided copper substrate, the eighth layer L8 is a PP prepreg, and the ninth layer L9 is a single-sided substrate. The manufacturing process is as follows:

[0030] Step 1: First, press the first layer L1 to the seventh layer L7. After pressing, perform X-Ray target punching and measure expansion and contraction. Before pressing, perform scribing on one side of L2, L3 and L5 and make positioning holes for positioning during pressing. At the same time, reserve the target for the eighth and ninth layer laser blind holes in advance.

[0031] Step 2: After laminating layers L1 to L7, exposure data is obtained by measuring the expansion and contraction ratio. Copper plating is then performed to form high-convex copper pads for the laser blind holes in layers 8 and 9. Since the base copper thickness of the material itself is 70um, an additional 50um is added after pattern plating to meet the process requirements.

[0032] Step 3: Before the second pressing of the eighth layer L8 and the ninth layer L9, pre-process positioning holes on the eighth and ninth layers. The hole diameter is increased by 3mil compared to the positioning holes of the first pressing.

[0033] Step 4: Perform a second lamination of the eighth and ninth layers with the first to seventh layers. After lamination, perform X-ray measurement and complete LDD browning and copper reduction. The copper thickness needs to be controlled at 6.5um.

[0034] Step 5: Use the reserved target to create laser blind holes. After completion, perform plasma desmearing to completely remove the PTFE carbonization residue. The second desmearing uses wet desmearing (permanganese acid) to remove the PP carbonization residue.

[0035] Step Six: After removing the adhesive, perform micro-etching cleaning and 100% check whether the bottom of the blind hole is clean.

[0036] Step 7: Fill the completed blind holes; increase the thickness at the bottom of the blind holes, fill the holes to a depth of 0.15mm to meet the process requirements, and scribing lines on the ninth layer, and then scribing lines on the first layer;

[0037] Step 8: After the hole filling is completed, perform AOI optical inspection, then solder resist, then surface treatment, then molding, and finally package the finished product to complete the processing.

[0038] like Figure 2 This enables the fabrication of high aspect ratio radar circuit boards.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit the technical solutions. Those skilled in the art should understand that any modifications or equivalent substitutions to the technical solutions of the present invention without departing from the spirit and scope of the present invention should be covered within the scope of the claims of the present invention.

Claims

1. A manufacturing process for a radar circuit board, wherein the circuit board comprises nine layers from top to bottom, designated as layers one through nine, arranged and laminated sequentially from bottom to top, wherein the bottommost layer is copper foil, the second layer is a PP prepreg, the third layer is a double-sided copper substrate, the fourth layer is a PP prepreg, the fifth layer is a double-sided copper substrate, the sixth layer is a PP prepreg, the seventh layer is a double-sided copper substrate, the eighth layer is a PP prepreg, and the ninth layer is a single-sided substrate: characterized in that... The production process is as follows: Step 1: First, press the first to seventh layers together. After pressing, perform X-ray target punching and measure expansion and contraction. Step 2: After the first to seventh layers are laminated, the exposure data is obtained by the expansion and contraction ratio, and copper is electroplated to form high-convex copper pads for the eighth and ninth layers of laser blind holes; Step 3: Before the second pressing of the eighth and ninth layers, pre-process positioning holes on the eighth and ninth layers; Step 4: Perform a second lamination of the eighth and ninth layers with the first to seventh layers. After lamination, perform X-ray measurement and complete LDD browning and copper reduction. Step 5: Create blind holes using laser technology. After completion, perform plasma desmearing to completely remove PTFE carbonization residue. The second desmearing uses wet desmearing (permanganese acid) to remove PP carbonization residue. Step Six: After removing the adhesive, perform micro-etching cleaning and 100% check whether the bottom of the blind hole is clean. Step 7: Fill the completed blind holes; increase the thickness at the bottom of the blind holes to meet process requirements, and scribing the ninth layer; Step 8: After the hole filling is completed, perform AOI optical inspection, then solder resist, then surface treatment, then molding, and finally package the finished product to complete the processing.

2. The manufacturing process of a radar circuit board according to claim 1, characterized in that, In step one, before the first to seventh layers are laminated, one side of the third, fifth and seventh layers is etched into a blank plate.

3. The manufacturing process of a radar circuit board according to claim 2, characterized in that, During the fabrication of the circuitry from the first to the seventh layer, targets for laser blind holes in the eighth and ninth layers are reserved in advance.

4. The manufacturing process of a radar circuit board according to claim 1, characterized in that, In step three, the size of the positioning hole is made according to the expansion and contraction ratio of the first pressing, and the hole diameter is increased by 3mil compared with the diameter of the pad in the second layer.

5. The manufacturing process of a radar circuit board according to claim 1, characterized in that, In step four, to ensure the roundness of the hole and reduce protrusion, the copper thickness needs to be controlled at 6-7 μm.

6. The manufacturing process of a radar circuit board according to claim 1, characterized in that, In step five, ensure that there is no PP residue on the copper surface at the bottom of the hole. The double-sided copper substrate of the third, fifth and seventh layers uses 2OZ thick copper foil as the base copper.

7. The manufacturing process of a radar circuit board according to claim 6, characterized in that, The copper plating process increases the thickness of the copper pads in the blind holes, which ensures that the aspect ratio is less than 1 when the blind holes are filled by electroplating.

8. The manufacturing process of a radar circuit board according to claim 1, characterized in that, In step seven, the hole filling depth is increased. Since the copper pad thickness has been increased, the actual hole filling depth is reduced.

9. The manufacturing process of a radar circuit board according to claim 1, characterized in that, The shape of a blind hole is an inverted trapezoid.

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