Aging compensation for multi-resistor based current sense amplifier

Abstract

The present disclosure relates to aging compensation for a multi-resistor based current sense amplifier. A wireless power system includes a coil for receiving and transmitting wireless power, an integrated circuit, and one or more batteries. The integrated circuit includes a rectifier circuit, a current sense amplifier circuit, a calibration circuit, and a voltage regulator. The rectifier circuit receives an alternating current from the coil and generates a rectified voltage when the wireless power system is in a receive mode, and further transmits an alternating current to the coil when the wireless power system is in a transmit mode. The current sense amplifier circuit detects a current flowing between the rectifier and the voltage regulator. The calibration circuit generates a voltage used by firmware of the integrated circuit to calibrate an aging of resistors within the current sense amplifier circuit.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to circuitry, and more particularly to circuitry for measuring current. BACKGROUND

[0002] Current sensing is a module in a wireless power system. The sensed current, together with a voltage measurement, provides a power measurement of the system. The power measurement is critical to understanding how much power is actually received from the transmitter and delivered to the load (e.g., battery). In particular, the wireless power system must measure power very accurately to help with foreign object detection. Unwanted, a foreign object can receive power from the transmitter and start to overheat. The receiver can include current sensing functionality to measure the received power to determine the power lost by the foreign object. The power loss due to the foreign object can be predicted by more accurately determining the current received. Thus, it is desirable to determine the current received at a given level of accuracy. However, the current sensing functionality of the wireless power system can include inaccuracies introduced by one or more sources.

[0003] In particular, many known current sensing systems include a resistor that includes polysilicon, which is known to suffer from an increase in resistance value due to aging. Over a period of 10 years, the increase in resistance can be as high as 1.5%. Thus, aging makes it difficult for known current sensing systems to meet a given accuracy specification.

[0004] In view of the above, one or more embodiments of the present disclosure provide an integrated circuit that includes improved current sensing capabilities. SUMMARY

[0005] According to one or more embodiments of the present disclosure, an integrated circuit is described. In some embodiments, the integrated circuit includes a current sensing circuit including a first amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor. In some embodiments, the first resistor includes a first resistance (Rs), the second and third resistors each include a second resistance (Rt), and the fourth and fifth resistors each include a third resistance (Rb). In some embodiments, the first resistor is configured to carry a first current (Isns) based on the first resistance (Rs) and a voltage difference between a first voltage (Vrect) and a second voltage (Vmid). In some embodiments, the first amplifier is configured to output a third voltage (Vo) based on the current (Isns). In some embodiments, a gain of the first amplifier is based on the second resistance (Rt) and the third resistance (Rb). In some embodiments, at least the fourth and fifth resistors are composed of a polysilicon material. In some embodiments, the third resistance (Rb) increases as the fourth and fifth resistors age. In some embodiments, the integrated circuit includes a calibration circuit including a sixth resistor composed of a polysilicon material. In some embodiments, the sixth resistor includes the third resistance (Rb). In some embodiments, the calibration circuit is configured to output a fourth voltage (Vcal) proportional to the third resistance (Rb). In some embodiments, the integrated circuit includes a processor. In some embodiments, the processor is configured to receive one or more digital signals of the third voltage (Vo) and the fourth voltage (Vcal). In some embodiments, the processor is configured to determine the current (Isns) based on the third voltage (Vo). In some embodiments, the processor is configured to calibrate for aging of the fourth and fifth resistors based on the fourth voltage (Vcal) when determining the first current (Isns).

[0006] According to one or more embodiments of the present disclosure, a wireless power system is described. In some embodiments, the wireless power system includes a coil. In some embodiments, the wireless power system includes an integrated circuit. In some embodiments, the integrated circuit includes a rectifier circuit configured to receive an alternating current from the coil and generate a first voltage (Vrect). In some embodiments, the integrated circuit includes a current sense circuit including a first amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor. In some embodiments, the first resistor includes a first resistance (Rs), the second and third resistors each include a second resistance (Rt), and the fourth and fifth resistors each include a third resistance (Rb). In some embodiments, the first resistor is configured to carry a first current (Isns) based on the first resistance (Rs) and a voltage difference between the first voltage (Vrect) and a second voltage (Vmid). In some embodiments, the first amplifier is configured to output a third voltage (Vo) based on the current (Isns); wherein a gain of the first amplifier is based on the second resistance (Rt) and the third resistance (Rb). In some embodiments, at least the fourth and fifth resistors are composed of a polysilicon material. In some embodiments, the third resistance (Rb) increases as the fourth and fifth resistors age. In some embodiments, the integrated circuit includes a voltage regulator circuit configured to regulate the second voltage (Vmid). In some embodiments, the integrated circuit includes a calibration circuit including a sixth resistor composed of a polysilicon material. In some embodiments, the sixth resistor includes the third resistance (Rb). In some embodiments, the calibration circuit is configured to output a fourth voltage (Vcal) proportional to the third resistance (Rb). In some embodiments, the integrated circuit includes a processor. In some embodiments, the processor is configured to receive one or more digital signals of the third voltage (Vo) and the fourth voltage (Vcal). In some embodiments, the processor is configured to determine the current (Isns) based on the third voltage (Vo). In some embodiments, the processor is configured to calibrate the aging of the fourth and fifth resistors based on the fourth voltage (Vcal) when determining the first current (Isns). In some embodiments, the wireless power system includes a passive element disposed external to the integrated circuit and coupled to a pin; wherein the passive element is coupled between the pin and ground. In some embodiments, the wireless power system includes a battery charging system.

[0007] According to one or more illustrative embodiments, a calibration circuit is described. In some embodiments, the calibration circuit includes a pin. In some embodiments, the calibration circuit includes a passive element coupled to the pin; wherein the passive element is coupled between the pin and ground. In some embodiments, the calibration circuit includes a first resistor comprising a polysilicon material. In some embodiments, the first resistor includes a first resistance (Rb) that increases with aging of the polysilicon material. In some embodiments, the calibration circuit includes an amplifier configured to receive a bandgap voltage (Vbg) and generate a current (Ical) across the passive element. In some embodiments, the calibration circuit is further configured to mirror the current (Ical) across the first resistor. In some embodiments, the calibration circuit is configured to output a first voltage (Vcal) based on the bandgap voltage (Vbg), the first resistance (Rb), and the passive element. BRIEF DESCRIPTION OF DRAWINGS

[0008] Embodiments of the concepts disclosed herein can be better understood with reference to the following detailed description. Reference is made to the accompanying drawings that form a part of this disclosure, wherein like reference characters designate same or similar components in the various figures. In the drawings:

[0009] Figure 1A A calibration circuit is depicted in accordance with one or more embodiments of the present disclosure.

[0010] Figure 1A A current sense circuit is depicted in accordance with one or more embodiments of the present disclosure.

[0011] Figure 2 A simplified block diagram of an integrated circuit including a calibration circuit and a current sense circuit is depicted in accordance with one or more embodiments of the present disclosure.

[0012] Figure 3 A simplified schematic of a wireless power system is depicted in accordance with one or more embodiments of the present disclosure.

[0013] Figure 4 A simplified communication device including one or more components of a wireless power system is depicted in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0014] Before one or more embodiments of the disclosure are explained in detail, it is to be understood that the application of the embodiments is not limited to the details of construction and the arrangement of components or steps or methods set forth in the following description or illustrated in the drawings. In the following detailed description of the embodiments, numerous specific details are set forth in order to provide a more thorough understanding of the disclosure. However, it will be apparent to one of ordinary skill in the art having the benefit of the present disclosure that the embodiments disclosed herein can be practiced without these specific details. In other instances, well-known features can not be described in detail to avoid unnecessarily complicating the present disclosure.

[0015] As used herein, letters following reference numerals are intended to refer to embodiments of features or elements that can be similar to, but not necessarily identical to, elements or features previously described having the same reference numeral (e.g., 1, 1a, 1b). Such shorthand notation is used for convenience only and should not be construed to limit the disclosure in any way unless explicitly stated otherwise.

[0016] Further, unless explicitly stated otherwise, "or" means an inclusive or and not an exclusive or. For example, a condition A or B is satisfied by any one of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present).

[0017] Additionally, elements and components of the embodiments disclosed herein can be described using "a" or "an," which is intended to be synonymous with "one or more" or "at least one" unless explicitly stated otherwise. Furthermore, the use of "a" or "an" herein does not denote a limitation of quantity, but rather a limitation of at least the referenced item.

[0018] Finally, as used herein, any reference to "one embodiment" or "some embodiments" means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. The appearances of the phrase "in some embodiments" in various places in the specification are not necessarily all referring to the same embodiment, and the

[0019] Reference will now be made to the disclosed subject matter, which is illustrated in the accompanying drawings.

[0020] Due to aging, polysilicon in semiconductor integrated circuits (ICs) is subject to an increase in resistance value. Over a period of 10 years, the increase in resistance can be as high as 1.5%. For a current sense amplifier that uses a polysilicon resistor as a sense element, this aging increase over time can result in a gain error equal to the magnitude of the aging. Thus, aging makes it difficult for a current sense amplifier to meet a given accuracy specification.

[0021] Embodiments of the present disclosure are generally directed to compensating for aging of one or more resistors in a current sense circuit through calibration. The current sense circuit is internal to an integrated circuit and includes one or more polysilicon resistor elements that are susceptible to aging. To calibrate for aging, a calibration circuit is employed. The calibration circuit includes polysilicon resistor elements that match the polysilicon resistor elements used in the current sense circuit and are also subject to change due to aging. The calibration circuit can further include external passive elements with high precision, such as an external resistor or an external capacitor. The calibration circuit and the current sense circuit can be assembled into the integrated circuit. Once assembled, an internal current can be applied to the calibration circuit and a voltage can be converted to a digital signal with an analog-to-digital converter (ADC). The digital signal can then be provided to a processor. This voltage can be stored in a non-volatile memory within the integrated circuit. The processor of the integrated circuit can periodically measure the digital signal from the ADC and compare the current voltage reading to the initial voltage reading. The processor can then calibrate the current sense reading based on the change in voltage. This can allow for the fact that the polysilicon resistor elements change due to aging to be accounted for. For example, if the processor detects that the resistance value of the polysilicon resistor elements has increased by 1% due to aging, then the current sense reading from the current sense circuit is decreased by 1% to be calibrated by firmware maintained on the memory. In embodiments, the calibration circuit can be provided for one or more resistors between the output of an operational amplifier of the current sense circuit and ground. Advantageously, the calibrated value from the current sense circuit can allow for current readings to be achieved within a given tolerance. In embodiments, the integrated circuit is a wireless power integrated circuit for a wireless power system, but this is not intended to be limiting. By calibrating for aging, the wireless power integrated circuit can achieve 1% or better accuracy when using internal multi-resistance sense elements.

[0022] Reference generally Figure 1A and 1BNow described are current sense circuit 103 and calibration circuit 101 of current sense circuit 103. The current sensed by current sense circuit 103 can be calibrated by calibration circuit 101. The current sense circuit can be configured to measure current across a wide range of voltages, such as up to 24 volts or higher. Current sense circuit 103 can be configured to measure current with a relatively large dynamic range, such as but not limited to between 1 milliampere to 2.5 amperes, or greater. By performing an aging calibration with calibration circuit 101, the accuracy of current sense circuit 103 has been determined, through experimentation, to be within 0.5% of the actual current across the dynamic range of the current. It is further contemplated that advancements in current sense circuit 103, as well as various additional components, can cause current sense circuit 103 to include an accuracy within 0.5% of the actual current across the dynamic range of the current, but this is not intended to be limiting. Although current sense circuit 103 and calibration circuit 101 are depicted as including various components contained in respective arrangements, this is not intended to be limiting of the present disclosure. It is further contemplated that current sense circuit 103 and calibration circuit 101 can include various additional components not depicted. It is noted herein that for purposes of the present disclosure, "coupled" can mean one or more of "communicatively coupled to," "electrically coupled to," and / or "physically coupled to." As used herein, coupled can refer to either a direct or indirect coupling. An indirect coupling can refer to a connection via another functional element. A direct coupling can refer to a connection without an intervening functional element. It is noted herein that with respect to "coupled between," this can be understood with respect to signal movement or flow between two other components, and can additionally include intervening components therein.

[0023] Now referring to Figure 1A Calibration circuit 101 is described. Calibration circuit 101 can also be referred to as an aging calibration circuit, a polysilicon resistor aging calibration circuit, or an external circuit. Calibration circuit 101 can provide a structure that tracks the shift in resistance value of a polysilicon resistor element due to aging. Calibration circuit 101 can be configured to generate a voltage (Vcal). The voltage (Vcal) can be provided to an analog-to-digital converter that generates a digital signal. The digital signal can then be used to calibrate errors due to aging or temperature of one or more resistors of current sense circuit 103. Calibration circuit 101 can include one or more components for generating the voltage (Vcal). For example, calibration circuit 101 can include amplifier 102, resistor 104, pin 106, external passive element 108, transistor 110, and transistor 112.

[0024] Pin 106 can generally include any pin suitable for use in an integrated circuit. Pin 106 can also be referred to as a pin output or a chip pin. An external passive element 108 can be coupled between pin 106 and ground. External passive element 108 can be coupled to the integrated circuit 200 including calibration circuit 101 through pin 106 such that the element can be considered "external." The use of external passive element 108 can be advantageous for including passive elements (e.g., resistors, capacitors) that have very low temperature and aging coefficients. In this regard, external passive element 108 can be considered a precision passive element that has less than 0.1% change due to aging. For example, external passive element 108 can include a 0.135% increase after 2.2 years, but this is not intended to be limiting. By way of another example, external passive element 108 can include a temperature coefficient (TC) of 10 PPM / C, but this is not intended to be limiting.

[0025] In an embodiment, external passive element 108 can be a resistor, such as but not limited to a thin film chip resistor. The resistor can be formed of a material having a very low temperature coefficient and a very low aging coefficient, such as a nichrome material. For example, the temperature coefficient and the aging coefficient of the nichrome material can each be close to zero. The resistor can also include a known resistance value, such as but not limited to a resistance value of 10 kilo ohms (10 KΩ). In an embodiment, external passive element 108 can be a capacitor. The capacitor can similarly include a material having a very low temperature coefficient and a very low aging coefficient. The capacitor can also include a known capacitance value, such as but not limited to a capacitance value of 10 micro farads (10 μF).

[0026] Amplifier 102 can generally include any amplifier, such as but not limited to an operational amplifier. Operational amplifier 102 can drive a bandgap voltage (Vbg) on pin 106 and similarly drive external passive element 108. For example, operational amplifier 102 can be configured to drive a bandgap voltage (Vbg) of 1.25 volts on pin 106. The voltage on pin 106 can then produce a current (Ical) across external passive element 108. In the case that external passive element 108 is a resistor, the current (Ical) can be the bandgap voltage (Vbg) at pin 106 divided by the resistance value. For example, the current (Ical) can be 0.125 milliamps as determined by 1.25 volts divided by 10 KΩ, but this is not intended to be limiting. It is further contemplated that any number of voltages and resistance values can be used, and similarly the current (Ical) can include a range of values. Thus, the current (Ical) can be a known value that is relatively independent of aging and temperature. The current (Ical) can be stored in memory.

[0027] The resistor 104 can be coupled between a node and ground. The node can be a point connected between one or more elements of a circuit and / or between one or more branches of a circuit. The node can be represented by a wire connecting various elements and / or branches. The resistor 104 can be included within the integrated circuit 200 such that the resistor 104 can be considered "internal." The resistor 104 can include a resistance value (Rb). The resistor 104 can be formed from one or more polysilicon elements that define the resistance value (Rb). The resistor 104 can be designed such that the resistance value (Rb) matches the resistance value (Rb) of one or more resistors (e.g., resistor 122, resistor 124) in the current sense circuit 103. For example, the resistor 104 can be designed to have matching physical dimensions (e.g., width, length) and / or number of polysilicon resistor elements to achieve a matching resistance. The resistor 104 can be placed in the same layer as the resistor 122 and the resistor 124. The resistor 104 can be placed with the resistor 122 and 124 in a finger interdigitated configuration. By matching the resistance value (Rb), the resistor 104 can include a similar temperature coefficient and / or a similar aging coefficient as the matched resistors present within the current sense circuit 103. As depicted, the resistor 104 can be a variable resistor, but this is not intended to be limiting.

[0028] The calibration circuit 101 can be further configured to mirror the current (Ical) across the resistor 104. Mirroring a current can refer to copying the current from a first element to a second element and keeping the output current constant regardless of the load. The calibration circuit 101 can generally include any suitable structure to mirror the current (Ical) across the resistor 104 and the external passive element 108. For example, the calibration circuit 101 can include a transistor 110 and a transistor 112 to mirror the current (Ical). The transistor 110 can be coupled between the output of the operational amplifier 102, the pin 106, and a power supply 130. The power supply 130 can be an analog power supply voltage (AVDD). Similarly, the transistor 112 can be coupled between the output of the operational amplifier 102, the node of the resistor 104, and the power supply 130. As can be appreciated, the transistor 110 and the transistor 112 can generally include any transistor, such as but not limited to a field effect transistor, such as a metal oxide semiconductor field effect transistor (MOSFET or M). In the case that the transistor 110 and the transistor 112 include MOSFETs, the calibration circuit 101 can be considered to include a MOSFET current mirror. As depicted, the transistor 110 and the transistor 112 can be P-channel MOS (PMOS), but this is not intended to be limiting.

[0029] The node coupled to the external passive element 108 can include a voltage (Vcal) by mirroring the current (Ical) across the resistor 104. Thus, the voltage (Vcal) can depend on one or more factors. The voltage (Vcal) can be proportional to the bandgap voltage (Vbg), the resistance value (Rb), and an error factor of the resistor 104 (e.g., an error due to temperature and / or aging). In the case that the external passive element 108 is a resistor, the voltage (Vcal) can also be inversely proportional to the resistance (Rext). For example, an equation for the voltage (Vcal) is provided as follows:

[0030]

[0031] The node can output the voltage (Vcal) to an analog-to-digital converter (ADC) that is not depicted in Figure 1A The voltage (Vcal) at the node can thus be output from the calibration circuit 101 to the ADC for allowing one or more processors to determine an error factor of the resistor 104 based on one or more digital signals corresponding to changes in the voltage (Vcal) and similarly changes in the resistance (Rb) due to one or more of temperature or aging. For example, the voltage (Vcal) can increase due to an increase in the resistance (Rb) due to aging. Advantageously, the error factor can be the same as the error factor in the resistor 122 or the resistor 124 of the current sense circuit 103. Thus, the voltage (Vcal) generated by the calibration circuit 101 can include the same temperature and aging percentage error as the current sense circuit 103. The processors can then calibrate for aging of the downstream resistors of the current sense circuit when determining the current (Isns).

[0032] Although the calibration circuit 101 is described as including the external passive element 108, this is not intended to be limiting to the present disclosure. In the case that the calibration circuit 101 is included in an integrated circuit, the calibration circuit 101 can not include the external passive element 108. Rather, the external passive element 108 can be coupled to the calibration circuit through the pin 106. For example, the integrated circuit can be formed during one or more fabrication steps. The external passive element 108 can then be coupled to the integrated circuit in a later assembly step (e.g., when the integrated circuit is installed in a communication device).

[0033] Reference is now made to Figure 1BThe current sense circuit 103 is described. The current sense circuit 103 can provide a structure to measure current across a resistor. The current can be measured at selected levels of accuracy and across a wide range of current values. The current sense circuit 103 can be configured to output a voltage (Vo). The voltage (Vo) can be provided to an analog-to-digital converter that produces a digital signal that can then be used by a processor to determine the current (Isns). The current sense circuit 103 can include one or more components for generating the voltage (Vo). For example, the current sense circuit 103 can include a resistor 114, a resistor 116, a resistor 118, an amplifier 120, a resistor 122, a resistor 124, a transistor 126, and a transistor 128.

[0034] The resistor 114 can be coupled between a node having a first voltage (Vrect) and a node having a voltage (Vmid). The resistor 114 can include a resistance (Rs). The resistance (Rs) can include a relatively small resistance value. Due to the inverse relationship between resistance and power loss, the resistance (Rs) can be relatively small to reduce the amount of power dissipated across the resistor 114. For example, the resistor 114 can be a 20 milliohm resistor, but this is not intended to be limiting. The range of values for the resistor 114 is contemplated to be around the exemplary 20 milliohm resistor. In this regard, the resistance value can be selected to be approximately 1 milliohm to 100 milliohms, or greater. The resistor 114 can be configured to carry a current (Isns) across the resistor, which can be based on the resistance (Rs) and the voltage difference between the voltage (Vrect) and the voltage (Vmid). Providing a low resistance resistor presents challenges to circuit design, particularly at reducing the resistance (Rs) and when measuring current across a wide and dynamic range, such as between the milliamp range to the 2.5 amp range. There are several challenges to integrating the resistor 114 into an integrated circuit (IC).

[0035] In an embodiment, the current sense circuit 103 is designed to output a voltage (Vo) for sensing the current (Isns). In this regard, the ability to detect the current (Isns) can be advantageous for sensing received or transmitted power. Since it is desirable to detect the current (Isns) across the resistor 114, the resistor 114 can also be referred to as a sense resistor.

[0036] The resistor 116 can be coupled between a node having a voltage (Vrect) and an input of the amplifier 120. Similarly, the resistor 118 can be coupled between a node having a voltage (Vmid) and an input of the amplifier 120. In this regard, the resistors 116 and 118 can also be referred to herein as the upstairs resistors or input resistors of the amplifier 120. In embodiments, the resistors 116 and 118 each include a matching resistance value (Rt). In this regard, the resistors 116 and 118 can also be referred to herein as a first pair of matched resistors. The resistance (Rt) can increase with age of the resistors 116 and 118.

[0037] The resistor 122 can be coupled between an output of the amplifier 120 and ground. Similarly, the resistor 124 can be coupled between the output of the amplifier 120 and ground. For example, the resistor 122 is depicted as being coupled between a node of the transistor 126 and ground, and the resistor 124 is depicted as being coupled between a node of the transistor 128 and ground. In this regard, the resistors 122 and 124 can also be referred to herein as the downstairs resistors of the amplifier 120. In embodiments, the resistors 122 and 124 each include a matching resistance value (Rb). In this regard, the resistors 122 and 124 can also be referred to herein as a second pair of matched resistors. With the arrangement of the resistors 122 and 124, a voltage (Vo) output from the current sense circuit 103 is proportional to the resistance (Rb). As depicted, the resistors 122 and 124 can be variable resistors, but this is not intended to be limiting.

[0038] The amplifier 120 can be configured to output a voltage (Vo). The amplifier 120 can output the voltage (Vo) by amplifying a voltage drop across the resistor 114 and can be based on the current (Isns). The amplifier 120 can also be referred to as an operational amplifier, differential amplifier, or high gain amplifier. The amplifier 120 can sense the input voltage on the upstairs resistors and drive the output such that the voltages from the left and right sides are equal. Driving the output to be equal can thereby guarantee a current that is proportional to the current (Isns). The amplifier 120 can include a gain that is based on the resistance (Rb) of the downstairs resistors divided by the resistance (Rt) of the upstairs resistors. For example, the resistance (Rt) of the upstairs resistors can be 1 kilo-ohm (1 K resistor), but this is not intended to be limiting. Continuing the example, the resistance (Rb) of the downstairs resistors can be 17.5 kilo-ohm (17.5 K resistor), but this is not intended to be limiting. With the upstairs resistors being 1 K resistor and the downstairs resistors being 17.5 K resistor, the gain of the amplifier can be 17.5 times (e.g., the gain is approximately 24.86 dB), but this is not intended to be limiting. In some examples, the gain of the amplifier 120 can be selected based on the capabilities of a downstream ADC.

[0039] In embodiments, each of resistor 114, resistor 116, resistor 118, resistor 122, and resistor 124 is included within integrated circuit 200, such that the resistors can be considered "internal." Each of the resistors can be formed from one or more polysilicon elements that define a resistance value (Rs), a resistance value (Rt), and a resistance value (Rb). Resistors 122 and 124 can be designed such that the resistance value (Rb) matches the resistance value (Rb) of resistor 104 in calibration circuit 101. For example, the resistors can be designed to have matching physical dimensions (e.g., width, length) and / or number of polysilicon resistor elements to achieve matching resistance. By matching the resistance value (Rb), resistors 122, 124, and 104 can include similar temperature coefficients and similar aging coefficients. It is further contemplated that resistors 114, 116, and 118 can include substantially similar temperature coefficients and similar aging coefficients via appropriate matching techniques described herein.

[0040] In embodiments, resistor 114 is an internal resistor. The current sense circuit can internally sense current without using external components, such as an external sense resistor. Resistor 114, which is part of the integrated circuit, includes a relatively low resistance value, and measures a large dynamic range of current, can present challenges to designing current sense circuit 103. In embodiments, resistor 114 is a precision resistor that is disposed within the integrated circuit on the chip and combined with amplifier 120 to form current sense circuit 103. The current measured across resistor 114 can be referred to herein as sensed current (Isns) and can be based on the resistance value of the sense resistor (Rs) and the voltage drop between the rectified voltage (Vrect) and the intermediate voltage (Vmid).

[0041] As Figure 1B depicted in FIG. 1, current sense circuit 103 includes pin 132 coupled to the node between resistor 114 and resistor 116. Pin 132 can be provided for routing voltage (Vrect) to and from the rectifier, but this is not intended to be limiting. Current sense circuit 103 can also include pin 134 coupled to the node between resistor 114 and resistor 116. Pin 134 can be provided for routing voltage (Vmid) to and from the voltage regulator, but this is not intended to be limiting.

[0042] In an embodiment, resistor 114 is assembled into an integrated circuit with amplifier 120. The upper floor resistors (e.g., resistor 116, resistor 118) and the lower floor resistors (e.g., resistor 122, resistor 124) can also be part of the integrated circuit. By incorporating the amplifier assembly with resistor 114 onto an integrated circuit, the temperature coefficients and aging of resistor 114 and the upper floor resistors can be substantially similar. In an embodiment, the integrated circuit includes the upper floor resistors and the current sense resistor integrated into the layout.

[0043] In an embodiment, one or more of resistor 114, resistor 116, resistor 118, resistor 122, or resistor 124 includes a polysilicon resistor formed onto an integrated circuit below a metallization layer. The polysilicon resistor can also be referred to herein as a poly resistor or an internal poly resistor. In an embodiment, the polysilicon resistor is formed as an array of polysilicon elements, which can also be referred to herein as a polysilicon sheet. The polysilicon elements can include any polysilicon material known in the art, such as but not limited to a doped or undoped polysilicon film. The polysilicon material can include a resistance that changes with temperature. Using a polysilicon material can facilitate reducing the temperature coefficient compared to implementing a resistor in a metallization layer of an integrated circuit. For example, the polysilicon material can include a resistance temperature coefficient (TCR) of 160 parts per million per degree Celsius (PPM / C), but this is not intended to be limiting. The polysilicon elements can each include a resistance value. For example, the polysilicon elements can each include a sheet resistance of 300 ohms / square, but this is not intended to be limiting. The polysilicon elements can be arranged in parallel and / or in series to form a resistor array of the polysilicon resistor having a selected resistance value. In an embodiment, the polysilicon elements are disposed below one or more metallization layers of the integrated circuit. The resistance (Rs), the resistance (Rt), and the resistance (Rb) can be based on the number and arrangement of the array of polysilicon elements. Assuming the resistance (Rs) is substantially less than the resistance (Rt) and the resistance (Rb), the number of resistor elements used to form the array of resistor 114 can be substantially greater than the number of resistor elements used to form resistor 116, resistor 118, resistor 122, or resistor 124. For example, there can be several thousand polysilicon elements in parallel to achieve a 20 milliohm resistance value for the resistance (Rs).

[0044] Polysilicon elements can include a wide range of dimensions. For example, polysilicon elements used to form resistor 114, resistor 116, or resistor 118 can be relatively wide. For example, a polysilicon element can be 50 microns wide. Polysilicon elements can further include a length of, for example, but not limited to, 4 microns. Thus, the aspect ratio of a polysilicon element can be 50 microns by 4 microns. Polysilicon elements having a 50 micron by 4 micron aspect ratio have been experimentally determined to include a temperature coefficient of 150 PPM / C. By way of another example, polysilicon elements used to form resistor 122 or resistor 124 can be relatively narrow when compared to the polysilicon elements of the upstairs resistors and the sense resistor. For example, a polysilicon element of a downstairs resistor can be 1 micron wide. The polysilicon element of a downstairs resistor can change over time due to aging. In embodiments, the resistance change of a downstairs resistor is further calibrated by calibration circuit 101. Calibration circuit 101 can track the shift in resistance over time to provide additional calibration, thereby improving the accuracy of the current sense circuit.

[0045] One challenge to implementing resistor 114 within an integrated circuit is the temperature coefficient and aging of resistor 114. Integrating an upstairs resistor into the array of resistor 114 can allow for the elimination of the temperature coefficient and aging of resistances (Rs) and (Rt), thereby removing inaccuracies associated with the temperature of the upstairs resistor and the current sense resistor. Voltage (Vo) can be proportional to current (Isns), resistance (Rs), and resistance (Rb). Voltage (Vo) can further be inversely proportional to resistance (Rt). Unfortunately, voltage (Vo) can also include error terms for the temperature and aging of resistance (Rb). For example, the equation for voltage (Vo) is provided as follows:

[0046]

[0047] In the above equation, Isns can refer to the current across resistor 114. In the above equation, Rs can refer to the resistance of resistor 114 before being subjected to aging and temperature. In the above equation, TCwide can refer to the temperature coefficient of resistor 114, resistor 116, and / or resistor 118. In the above equation, Age(Rwide) can refer to the aging coefficient of resistor 114, resistor 116, and / or resistor 118. In the above equation, Rb can refer to the resistance of resistor 122 and / or resistor 124 before being subjected to aging and temperature. In the above equation, TC(RB) can refer to the temperature coefficient of resistor 122 and / or resistor 124. In the above equation, Age(Rb) can refer to the aging coefficient of resistor 122 and / or resistor 124. In the above equation, Rt can refer to the resistance of resistor 116 and / or resistor 118 before being subjected to aging and temperature. As is apparent, (1 + TC(wide) + Age(Rwide)) can be found in both the numerator and the denominator due to the configuration of resistor 114, resistor 116, and resistor 118. The term "wide" is not intended to be limiting, but merely to illustrate that resistor 114, resistor 116, and / or resistor 118 can each include a common width that can be wider than resistor 122 and / or resistor 124.

[0048] Voltage (Vo) can be affected by the aging and temperature coefficients of resistance (Rb). Due to aging, resistance (Rb) can increase between 1% and 1.5%, or more. Accordingly, calibration circuit 101 can be beneficial to compensate for 1% to 1.5% error and maintain the detection of current (Isns) within 1% error (i.e., equal to or below 1% error). By calibrating the aging of resistor 122 and resistor 124, the integrated circuit including calibration circuit 101 and current sense circuit 103 has been experimentally determined to include an accuracy within 0.5% of the actual current. The accuracy within 0.5% applies to a dynamic current range between milliampere and 2.5 ampere with resistance (Rs) being 20 milli-ohms.

[0049] In an embodiment, one or more components of the calibration circuit 101 and one or more components of the current sense circuit 103 include substantially similar temperatures. Including substantially similar temperatures can mean that the circuits and / or components operate at and / or are subjected to substantially the same temperatures during operation. The resistor 104, the resistor 122, and the resistor 124 can include substantially similar temperatures. By maintaining the resistor 104, the resistor 122, and the resistor 124 at the same temperature, the resistance of the resistors (Rb) can include similar errors due to temperature. The calibration circuit 101 and the current sense circuit 103 can include any suitable structure for ensuring uniform temperatures. For example, the resistor 104, the resistor 122, and the resistor 124 can be fingered across in a matrix, in close proximity to each other, for reducing temperature differences between the resistor 104, the resistor 122, and the resistor 124. Thus, the aging and temperature of the resistor 104, the resistor 122, and the resistor 124 can be similar (i.e., (1 + TC(Rb) + Age(Rb)) == (1 + TC(Rb) + Age(Rb)) per the above equation).

[0050] The transistors 126 and 128 can act as a second gain stage from the amplifier. If the amplifier 120 starts to detect a voltage difference on the input, the output from the amplifier can pull up or down the gates of the transistors 126 and 128, causing the transistors 126 and 128 to act as variable current sources. As can be appreciated, the transistors 126 and 128 can generally include any transistor, such as but not limited to a field effect transistor, such as a metal oxide semiconductor field effect transistor (MOSFET or MOS). As depicted, the transistors 126 and 128 can be P-channel MOS (PMOS), but this is not intended to be limiting.

[0051] Reference is now made to Figure 2FIG. 1 depicts an exemplary embodiment of an integrated circuit 100, in accordance with one or more embodiments of the present disclosure. The integrated circuit 100 can also be referred to herein as a transceiver unit, a mixed-signal chip, a wireless power chip, a wireless power receiver (Rx), a wireless power transmitter (Tx), a receiver (Rx) integrated circuit, and the like. The integrated circuit 100 can be configured to receive and regulate an alternating current and output a regulated DC voltage. For example, the alternating current can be received from a coil of a wireless power system, and the regulated DC voltage can be provided to a battery to charge the battery, although this is not intended to be limiting. In embodiments, the integrated circuit 100 can include one or more of a rectifier 102, a current sense circuit 104, a processor 106, a power unit 108, a voltage regulator 110, an analog-to-digital converter 112, a calibration circuit 114, and the like. In embodiments, the integrated circuit 100 can include pins 105 for coupling external passive components 116 to the integrated circuit 100. It is further contemplated that the integrated circuit 100 can include any number of additional components, which are not described herein for the sake of clarity. For example, the integrated circuit 100 can further include various traces between one or more of the rectifier 102, the current sense circuit 104, the embedded processor 106, the power unit 108, the voltage regulator 110, the analog-to-digital converter 112, the calibration circuit 114, and the pins 105, which are not depicted.

[0052] The rectifier 102 can be configured to receive an alternating current having a voltage (Vin). For example, the alternating current can be received from a coil of a wireless power system, although this is not intended to be limiting. The rectifier 102 can be further configured to generate a direct current having a voltage (Vrect). The voltage (Vrect) can not be regulated to a desired supply power. For example, the unregulated voltage can vary between different voltages. The rectifier 102 can generally include any suitable circuit for rectifying a current. For example, the rectifier 102 can include a bridge circuit, such as an H-bridge circuit.

[0053] When the integrated circuit is configured to be in a receive mode, the rectifier 102 can convert the AC input voltage to a rectified DC voltage. When the integrated circuit is configured to be in a transmit mode, the rectifier can also convert the DC input voltage to an AC output voltage. For example, the integrated circuit can be configured to be in a receive mode for receiving wireless power. By way of another example, the integrated circuit can be configured to be in a receive mode and / or a transmit mode for wirelessly communicating with a transmitter.

[0054] With respect to current sense circuit 204, the discussion of current sense circuit 103 is incorporated herein by reference. Current sense circuit 204 can include a voltage from node (Vrect) and a voltage from node (Vmid). Depending on whether integrated circuit 200 is receiving or transmitting, voltage (Vrect) can be higher or lower than voltage (Vmid). Current sense circuit 204 can further output a voltage (Vo) that can be used to determine current (Isns).

[0055] Processor 206 can generally include any suitable processor. For example, embedded processor 206 can be a microprocessor, although this is not intended to be limiting. Processor 206 can further include one or more memory blocks by which processor 206 can be configured to perform any of the various methods described herein. For example, processor 206 can include, but is not limited to, read only memory (ROM) for boot operations, one-time programmable (OTP) memory for startup code, and / or random access memory (e.g., static RAM) for maintaining program instructions, communications (e.g., FSK communications, ASK communications, etc.), etc.

[0056] Processor 206 can generally be configured to perform various program functions that can be maintained in firmware. For example, processor 206 can be configured to receive various bits from analog-to-digital converter 212. Processor 206 can be further configured to determine current (Isns) across current sense circuit 204. In an embodiment, processor 206 is further configured to scale current (Isns) based on voltage (Vcal) output from calibration circuit 214 (e.g., based on a percentage error). In this regard, processor 206 can detect a percentage error in voltage (Vcal) corresponding to an increase in resistance (Rb) due to resistor 104 aging and calibrate aging of resistor 122 and / or resistor 124 by scaling current (Isns) according to the percentage error. Scaling can refer to reducing by a multiplication factor.

[0057] Power unit 208 can be configured to power various components of an integrated circuit, such as, but not limited to, embedded processor 206 or another component of integrated circuit 200. Power unit 208 can generally provide any level of power, such as, but not limited to, 1.2 volts, 1.8 volts, 3.3 volts, or 5 volts. Power unit 208 can draw power from any number of sources, such as, but not limited to, a main power rail of a communication device.

[0058] The voltage regulator 210 can be configured to receive a voltage (Vmid) from the current sense circuit 204. The voltage regulator 210 can be further configured to regulate the voltage to a desired output. The regulated voltage can then be provided to a battery or battery charging system for charging a battery. The regulated voltage can generally include any suitable output voltage for wireless charging, such as but not limited to 15 volts or 30 volts.

[0059] The analog-to-digital converter 212 can be configured to receive various voltages and / or currents from any one or more components of the integrated circuit and generate a digital signal of bits. For example, the analog-to-digital converter 212 can receive a voltage (Vo) from the current sense circuit 204 and / or a voltage (Vcal) from the calibration circuit 214 and generate a digital signal based on the voltage (Vo) and the voltage (Vcal). The analog-to-digital converter 212 can then provide the digital signal to the processor 206 for processing. As can be appreciated, the analog-to-digital converter 212 can generally include any analog-to-digital converter (ADC) and can further include a variety of various other converters not depicted herein for handling various other signals.

[0060] With respect to the calibration circuit 214, the discussion of the calibration circuit 101 is incorporated herein by reference. The calibration circuit 214 can be configured to receive a bandgap voltage (Vbg). The calibration circuit 214 can be further coupled to an external passive component 218 through a pin 205. The pin 205 can also be referred to herein as a chip pin, pin output, and the like. The calibration circuit 214 can be further configured to output a voltage (Vcal) for calibrating one or more resistors of the current sense circuit 204. Once the external passive component 218 is coupled to the pin 205, an initial calibration voltage (Vint) can be received at time t=0 and stored in a non-volatile memory (e.g., RRAM or OTP). Periodically, the processor 206 can then execute program instructions maintained in memory (e.g., firmware) to re-measure the voltage (Vcal) and compare to the voltage (Vint) for calibration of the current (Isns).

[0061] While the current sense circuit 204 and the calibration circuit 214 are described as components of the integrated circuit 200, this is not intended to be limiting of the present disclosure. It is contemplated that the current sense circuit 103 and / or the current sense circuit 204, along with the calibration circuit 101 and / or the calibration circuit 214, can be integrated into any number of integrated circuits. In this regard, current sense and aging calibration can be advantageous in any number of integrated circuits for providing precise current measurements over a wide dynamic range. The applications can include any type of precise current measurement on a chip, such as a wireless power system, or for any type of power management type of integrated circuit.

[0062] Reference is now made toFigure 3 FIG. 14 illustrates a wireless power system 300, in accordance with one or more embodiments of the present disclosure. The wireless power system 300 can include one or more components, such as, but not limited to, a transmitter unit 302, a transmitter coil 304, a receiver coil 306, an integrated circuit 200, and a battery charger 308. The transmitter unit 302 and the integrated circuit 200 can be inductively coupled through the transmitter coil 304 and the receiver coil 306. In this regard, the integrated circuit 200 can wirelessly receive power from the transmitter unit 302 and provide the power to the battery charger 308 for charging one or more batteries. The integrated circuit 200 and the transmitter unit 302 can wirelessly communicate through any number of communication protocols. For example, the integrated circuit 200 can receive transmit and receive communications to the transmitter unit 302 to establish a transmission through one or more handshaking protocols. A current sense circuit can be configured to sense a current (Isns) in a transmit mode or a receive mode.

[0063] Providing high accuracy current measurements from a current sense circuit within the integrated circuit 200 is advantageous to help perform foreign object detection. The more accurate the current sensing, the more accurate the power transfer can be performed in the system 300. The power transfer level of the wireless power system 300 increases over time. As the power level increases, accurate current sensing becomes more and more important. It is also advantageous to sense the current internally without using an external resistor within the current sense circuit.

[0064] Reference is now made to Figure 4 FIG. 14 illustrates a wireless power system 300, in accordance with one or more embodiments of the present disclosure. The wireless power system 300 can include one or more components, such as, but not limited to, a transmitter unit 302, a transmitter coil 304, a receiver coil 306, an integrated circuit 200, and a battery charger 308. The transmitter unit 302 and the integrated circuit 200 can be inductively coupled through the transmitter coil 304 and the receiver coil 306. In this regard, the integrated circuit 200 can wirelessly receive power from the transmitter unit 302 and provide the power to the battery charger 308 for charging one or more batteries. The integrated circuit 200 and the transmitter unit 302 can wirelessly communicate through any number of communication protocols. For example, the integrated circuit 200 can receive transmit and receive communications to the transmitter unit 302 to establish a transmission through one or more handshaking protocols. A current sense circuit can be configured to sense a current (Isns) in a transmit mode or a receive mode.

[0065] Reference is now made to Figures 1A to 4For the purposes of this disclosure, the term "processor" or "processing element" can be broadly defined to encompass any device (e.g., one or more microprocessor devices, one or more application specific integrated circuit (ASIC) devices, one or more field programmable gate arrays (FPGAs), or one or more digital signal processors (DSPs)) having one or more processing or logic elements. In this sense, the one or more processors can include any device configured to execute algorithms and / or instructions (e.g., program instructions stored in a memory). Moreover, the memory can include any storage media suitable for storing program instructions that can be executed by the associated processor(s). For example, the memory media can include non-transitory memory media. By way of further example, the memory media can include, but is not limited to, read-only memory (ROM), random access memory (RAM), magnetic or optical memory devices (e.g., magnetic disk), solid state drives, and the like. It should also be noted that the memory media can be housed in a common controller housing with the processor(s). In embodiments, the memory media can be located remotely with respect to the physical location of the processor(s).

[0066] In this disclosure, the disclosed methods, operations, and / or functionalities can be implemented as sets of instructions that can be read by a device or as software. Moreover, it should be understood that the particular order and hierarchy of steps in the disclosed methods, operations, and / or functionalities are examples of exemplary methods. Based upon design preferences, it should be understood that the particular order and hierarchy of steps in the methods, operations, and / or functionalities can be rearranged, while remaining within the scope of the inventive concepts disclosed herein. The accompanying claims can present elements of the various steps in example order, and are not necessarily meant to be limited to the specific order or hierarchy presented.

[0067] It should be understood that embodiments of methods in accordance with the inventive concepts disclosed herein can include one or more of the steps described herein. Moreover, such steps can be performed in any desired order and two or more of the steps can be performed simultaneously with one another. Two or more of the steps disclosed herein can be combined in a single step, and in some embodiments, one or more of the steps can be performed as two or more sub-steps. Furthermore, other steps or sub-steps can be performed in addition to or instead of one or more of the steps disclosed herein.

[0068] From the above description, it is clear that the inventive concepts disclosed herein are suitable for performing the objects mentioned herein and achieving the advantages mentioned herein as well as the advantages inherent in the inventive concepts disclosed herein. Although a presently preferred embodiment of the inventive concepts disclosed herein has been described for purposes of this disclosure, it will be understood that numerous modifications can be made to the embodiments described herein, which will achieve at least some of the objects and advantages of the inventive concepts disclosed herein, and are within the scope of the inventive concepts disclosed and claimed herein.

Claims

1. An integrated circuit, comprising: The first circuit includes a first amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor. The first resistor has a first resistance (Rs); the second and third resistors each have a second resistance (Rt); the fourth and fifth resistors each have a third resistance (Rb); the first resistor is configured to carry a first current (Isns) based on the first resistance (Rs) and the voltage difference between a first voltage (Vrect) and a second voltage (Vmid); the first amplifier is configured to output a third voltage (Vo) based on the current (Isns); the gain of the first amplifier is based on the second resistance (Rt) and the third resistance (Rb); at least the fourth and fifth resistors are made of polycrystalline silicon; and the third resistance (Rb) increases with the aging of the fourth and fifth resistors. The second circuit includes a sixth resistor made of the polycrystalline silicon material; The sixth resistor has the third resistor (Rb); the second circuit is configured to output a fourth voltage (Vcal) proportional to the third resistor (Rb); and processor; The processor is configured to receive one or more digital signals of the third voltage (Vo) and the fourth voltage (Vcal); the processor is configured to determine the current (Isns) based on the third voltage (Vo). The processor is configured to calibrate the aging of the fourth resistor and the fifth resistor based on the fourth voltage (Vcal) when determining the first current (Isns).

2. The integrated circuit of claim 1, wherein the second circuit further comprises: Pins configured to couple to external passive components; The external passive component is coupled between the pin and ground; and A second amplifier is configured to generate a second current (Ical) across the external passive element; wherein the second circuit is configured to mirror the second current (Ical) across the sixth resistor.

3. The integrated circuit of claim 2, wherein the second circuit includes a first transistor and a second transistor for mirroring the second current (Ical) across the sixth resistor.

4. The integrated circuit of claim 1, wherein the processor includes a memory having an initial voltage (Vint) output from the second circuit; wherein the processor is configured to compare the fourth voltage (Vcal) with the initial voltage (Vint) to detect a percentage error in the fourth voltage (Vcal), the percentage error corresponding to an increase in the third resistance (Rb) due to aging of the sixth resistor; wherein the processor is configured to calibrate the aging of the fourth resistor and the fifth resistor by proportionally reducing the first current (Isns) according to the percentage error.

5. The integrated circuit of claim 1, wherein the fourth resistor, the fifth resistor, and the sixth resistor are placed in the same layer to reduce the temperature difference between the fourth resistor, the fifth resistor, and the sixth resistor.

6. The integrated circuit of claim 1, wherein the first resistor is coupled between a first node having the first voltage (Vrect) and a second node having the second voltage (Vmid); The second resistor is coupled between the first node and the first input of the amplifier; wherein the third resistor is coupled between the second node and the second input of the amplifier; The fourth resistor is coupled between the first output of the amplifier and ground; the fifth resistor is coupled between the second output of the amplifier and ground.

7. The integrated circuit of claim 6, wherein the gain of the amplifier is proportional to the third resistor (Rb) and inversely proportional to the second resistor (Rt); wherein the third voltage (Vo) is proportional to the first current (Isns), the first resistor (Rs), and the third resistor (Rb); wherein the third voltage (Vo) is inversely proportional to the second resistor (Rt).

8. The integrated circuit of claim 7, wherein each of the first resistor, the second resistor, and the third resistor is composed of the polysilicon material; wherein the gain of the first amplifier and the third voltage (Vo) are independent of changes in the first resistance (Rs) and the second resistance (Rt) due to aging.

9. The integrated circuit of claim 8, wherein the third resistor (Rb) is configured to increase by up to 1.5% due to aging of the fourth and fifth resistors; wherein, By calibrating the aging of the fourth and fifth resistors, the processor is configured to determine that the first current (Isns) is within 0.5% error of the actual value when the third resistor (Rb) has increased by 1.5%.

10. The integrated circuit of claim 8, wherein the first resistor, the second resistor, and the third resistor are disposed in the same layer of the integrated circuit to reduce the temperature difference between the first resistor, the second resistor, and the third resistor.

11. The integrated circuit of claim 1, further comprising at least one analog-to-digital converter configured to convert the third voltage (Vo) into a first digital signal and the fourth voltage (Vcal) into a second digital signal, and to provide the first digital signal and the second digital signal to the processor.

12. The integrated circuit of claim 1, further comprising a rectifier and a voltage regulator; wherein the rectifier is configured to receive an alternating current received from a coil, rectify the alternating current and output the first voltage (Vrect); wherein the voltage regulator is configured to regulate the second voltage (Vmid).

13. The integrated circuit of claim 1, wherein the amplifier comprises a differential amplifier.

14. The integrated circuit of claim 1, wherein the change in the third resistance (Rb) due to aging is substantially similar for the fourth resistor, the fifth resistor, and the sixth resistor.

15. A wireless power system comprising: coil; Integrated circuits, including: A rectifier configured to receive alternating current from the coil and generate a first voltage (Vrect); A first circuit includes a first amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor; wherein the first resistor has a first resistance (Rs); wherein the second and third resistors each have a second resistance (Rt); wherein the fourth and fifth resistors each have a third resistance (Rb); wherein the first resistor is configured to carry a first current (Isns) based on the first resistance (Rs) and the voltage difference between a first voltage (Vrect) and a second voltage (Vmid); wherein the first amplifier is configured to output a third voltage (Vo) based on the current (Isns); wherein the gain of the first amplifier is based on the second resistor (Rt) and the third resistor (Rb); wherein at least the fourth and fifth resistors are made of polycrystalline silicon; wherein the third resistance (Rb) increases with the aging of the fourth and fifth resistors. A voltage regulator configured to regulate the second voltage (Vmid); A second circuit includes a sixth resistor made of the polycrystalline silicon material; wherein the sixth resistor has the third resistance (Rb); wherein the second circuit is configured to output a fourth voltage (Vcal) proportional to the third resistance (Rb); and A processor; wherein the processor is configured to receive one or more digital signals of the third voltage (Vo) and the fourth voltage (Vcal); wherein the processor is configured to determine the current (Isns) based on the third voltage (Vo); wherein the processor is configured to calibrate the aging of the fourth resistor and the fifth resistor based on the fourth voltage (Vcal) when determining the first current (Isns); A passive component, disposed externally to the integrated circuit and coupled to a pin; wherein the passive component is coupled between the pin and ground; and Battery charging system.

16. The wireless power system of claim 15, wherein the wireless power system is configurable between a receiving mode and a transmitting mode; wherein when the wireless power system is in the receiving mode, the first current (Isns) is provided from the rectifier across the first resistor to the voltage regulator; wherein the processor is configured to determine the first current (Isns) when the wireless power system is in the receiving mode.

17. The wireless power system of claim 15, wherein the first amplifier comprises a differential amplifier.

18. A circuit comprising: pins; A passive component coupled to the pin; The passive component is coupled between the pin and ground; The first resistor comprises polycrystalline silicon material; The first resistor has a first resistance (Rb) that increases with the aging of the polycrystalline silicon material; and An amplifier configured to receive a bandgap voltage (Vbg) and generate a current (Ical) across the passive element; wherein the circuitry is further configured to mirror the current (Ical) across the first resistor. The circuit is configured to output a first voltage (Vcal), which is based on the bandgap voltage (Vbg), the first resistor (Rb), and the passive element.

19. The circuit of claim 18, wherein the passive element is a thin-film chip resistor; wherein the thin-film chip resistor has a second resistance (Rext); wherein the first voltage (Vcal) is inversely proportional to the second resistance (Rext).

20. The circuit of claim 18, wherein the passive component is a capacitor coupled to the pin.

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