Simulation bad point correction method, neural network training method and storage medium

By obtaining the simulation bad points and corresponding positions in the mask layout, correcting the graphics at the simulation bad points in the design layout, performing optical proximity correction and lithography simulation verification, and continuously correcting until the bad points are completely repaired, solving the simulation bad points problem that is difficult to effectively repair in the existing technology, and achieving a more comprehensive and efficient solution.

CN117391040BActive Publication Date: 2025-05-06DONGFANG JINGYUAN ELECTRON LTD
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Patent Information

Application Number
CN202311277940.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-05-06
Estimated Expiration
2043-09-28

AI Technical Summary

Technical Problem

When solving simulation bad points, it is difficult to effectively repair bad points caused by inappropriate design layouts, and it is difficult to find an effective solution through repeated optimization of the mask, which makes it difficult to completely solve the bad points problem.

Method used

Provide a method for correcting the simulation bad points. By obtaining the simulation bad points and corresponding positions in the mask layout, correcting the graphics at the simulation bad points in the design layout, performing optical proximity correction and lithography simulation verification, and continuously correcting until the bad points are completely repaired.

Benefits of technology

This has achieved a more comprehensive and efficient solution to the problem of simulation bad points. By modifying the bad point repair mechanism of the design layout locally, the bad points caused by inappropriate design layout are solved, and potential OPC bad points are eliminated preventively in the design stage.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to the field of photolithography technology, and in particular to a correction method for simulated bad spots, a neural network training method and a storage medium. The correction method for simulated bad spots of the present invention comprises the following steps: providing a mask layout, obtaining simulated bad spots and corresponding positions in the mask layout; obtaining a design layout corresponding to the mask layout, obtaining and correcting the corresponding simulated bad spot graphics in the design layout, and obtaining a corrected new design layout; performing optical proximity correction on the new design layout to obtain new mask data; performing photolithography simulation verification on the simulated bad spot position based on the new mask data, and if there are still simulated bad spots, continuously correcting the graphics at the simulated bad spots in the design layout until the simulated bad spots are completely repaired; if there are no simulated bad spots, the bad spots have been solved, and the final design layout is output. Correcting the simulated bad spot positions starting from the design layout solves the problem of simulated bad spots in a more comprehensive and efficient manner.
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Description

[Technical field]

[0001] The present invention relates to the field of photolithography technology, and in particular to a correction method for simulated bad points, a neural network training method and a storage medium. [Background technology]

[0002] At present, the business model of the semiconductor industry is divided into wafer foundry (FAB) and pure design company (FABLESS). Usually, FABLESS designs the chip and then relies on FAB to realize the production of the chip. The chip design and manufacturing are separated. In the manufacturing process of integrated circuits, although the designer (FABLESS) has followed the design rules (Design Rule) given by FAB, in practice, because the scenarios that can be described by the rules are always limited, compliance with the design rules does not mean that the design version provided by FABLESS is Figure 1 It does not necessarily mean that it can be manufactured, nor does it mean that there will be a robust process window and high yield.

[0003] The existing technology essentially corrects the bad pixels that are not solved by the macroscopic optical proximity correction (OPCRecipe) by partially correcting the mask. Even if there are more advanced methods for correcting the mask, some bad pixels may be caused by inappropriate design layout. In this case, it is difficult to find a better solution by repeatedly trying to optimize the mask. It is very likely that after many rounds of attempts, the bad pixel problem still cannot be solved, or it will cost a lot to eliminate it. In this case, by breaking through the information barriers between design and manufacturing, making some changes on the design side instead of blindly correcting the mask, it is completely possible to achieve twice the result with half the effort. [Summary of the invention]

[0004] In order to solve the simulation bad pixel problem more comprehensively and efficiently, the present invention provides a simulation bad pixel correction method, a neural network training method and a storage medium.

[0005] The solution to the technical problem of the present invention is to provide a method for correcting simulated bad spots, the method comprising: providing a mask layout, obtaining simulated bad spots and corresponding positions in the mask layout; obtaining a design layout corresponding to the mask layout, obtaining and correcting the graphics at the corresponding simulated bad spots in the design layout, and obtaining a corrected new design layout, wherein correcting the corresponding simulated bad spots in the design layout comprises: obtaining a preset optimization area based on the position of the simulated bad spots, performing local mask optimization on the simulated bad spots, and if simulated bad spots still exist, then performing local design layout correction on the simulated bad spots; performing optical proximity correction on the new design layout to obtain new mask data; performing lithography simulation verification on the position of the simulated bad spots based on the new mask data, and if simulated bad spots still exist, then continuously correcting the graphics at the simulated bad spots in the design layout until the simulated bad spots are completely repaired; if there are no simulated bad spots, the bad spots have been resolved, and the final design layout is output.

[0006] Preferably, a design layout corresponding to the mask layout is obtained, and the graphics at the corresponding simulated bad spots in the design layout are obtained and corrected to obtain a corrected new design layout, which specifically includes a distributed processing process for the simulated bad spots, specifically including: taking the position of the simulated bad spots in the design layout as the center, obtaining an area within a preset range as an optimized area; distributing the optimized area for distributed processing to completely correct all simulated bad spots in the design layout and the corresponding optimized areas.

[0007] Preferably, the correction of all simulated bad pixels and corresponding optimized areas in the design layout is a completely progressive optimization process, which specifically includes: optimizing based on the simulated bad pixels and the corresponding optimized areas; judging whether the optimized design layout has been repaired; if the repair is completed, exiting the repair process; if the repair is not completed, iterating the above-mentioned optimization process for the simulated bad pixels and the corresponding optimized areas until the simulated bad pixels are completely repaired and exiting the repair process.

[0008] Preferably, the optimization region includes an optimization variable region surrounding the simulation bad point and a fixed variable region surrounding the optimization variable region.

[0009] In order to solve the above-mentioned technical problems, the present invention also provides a neural network training method to implement the method for correcting simulated bad spots as described above, comprising: using a preset model to obtain and analyze at least one final design layout after the repair of simulated bad spots is completed, training based on the analysis results, and providing the training results as data to the preset model for learning; obtaining an initial design layout to be optimized and a mask layout to be optimized, and obtaining simulated bad spots of the mask layout to be optimized based on the learning results; using a preset repair tool to repair the simulated bad spots of the initial design layout, and obtaining a new design layout after preliminary repair.

[0010] Preferably, a preset model is used to obtain and analyze the final design layout after at least one simulated bad spot repair is completed, training is performed based on the analysis results, and the training results are provided as data to the preset model for learning. The training is specifically performed using the following method: the final design layout and the mask layout obtained after correction are each subjected to lithography simulation verification, and the bad spot optimization results are analyzed and compared; the bad spot optimization results of the final design layout are compared with the mask layout, and the bad spot optimization results that exceed the preset error range are defined as new bad spots; new bad spots that exceed the preset standard are filtered out to obtain new bad spots within the preset standard; new bad spots within the preset standard are classified, and multiple candidate new bad spots are selected from each category; preset weights are given based on the selected candidate new bad spots, and they are brought into the optimization process of the design layout for iteration until the optimization of the candidate new bad spots is completed; the optimized candidate new bad spots are replaced with other candidate new bad spots of the same type that have not been optimized, the optimization is completed, and the optimization results are recorded as the training results of the preset model for learning.

[0011] Preferably, obtaining an initial design layout to be optimized and a mask layout to be optimized, and obtaining simulated bad points of the mask layout to be optimized based on the learning results specifically includes the following steps: obtaining the initial design layout to be optimized, forming the contour lines of the graphics in the initial design layout on the mask layout based on the initial design layout, and obtaining the mask layout to be optimized; using the learning results of the preset model to operate on the mask layout to be optimized, and obtaining simulated bad points in the mask layout to be optimized.

[0012] Preferably, the preset model is an AI neural network training model, and an initial design layout to be optimized is obtained. Based on the initial design layout, a graphic contour line in the initial design layout is formed on a mask layout, and obtaining the mask layout to be optimized specifically includes: embedding the AI ​​neural network training model into an optical proximity correction module; during simulation, dividing the initial design layout into multiple simulation slices based on the AI ​​neural network training model; dividing each simulation slice into smaller secondary slices, using the AI ​​neural network training model to splice the secondary slices to form new simulation slices, and splicing the new simulation slices to form graphic contour lines on the mask layout to be optimized.

[0013] Preferably, the optical proximity correction module divides the initial design layout into a plurality of correction slices, and the computational size of the simulation slices is smaller than the computational size of the correction slices.

[0014] To solve the above technical problems, the present invention also provides a storage medium, including a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that when the processor executes the computer program, the method for correcting simulated bad points as described above is implemented.

[0015] Compared with the prior art, the correction method for simulated bad pixels, the neural network training method and the storage medium of the present invention have the following advantages:

[0016] 1. The correction method of the simulation bad point of the present invention comprises: providing a mask layout, obtaining the simulation bad point and the corresponding position in the mask layout; obtaining the design layout corresponding to the mask layout, obtaining and correcting the corresponding simulation bad point pattern in the design layout, and obtaining the corrected new design layout; performing optical proximity correction on the new design layout to obtain new mask data; performing lithography simulation verification on the simulation bad point position based on the new mask data, if there are still simulation bad points, then continuously correcting the simulation bad point pattern of the design layout until the simulation bad point is completely repaired; if there are no simulation bad points, the bad points have been solved, and the final design layout is output. The present invention constructs a bad point repair mechanism based on local modification of the design layout, so that the bad points caused by inappropriate design layout can be solved, and the problem of simulation bad points can be solved more comprehensively and efficiently; on the other hand, the OPC methodology is creatively fed forward to the physical design stage, and on the layout integrated circuit file that has passed the physical design sign-off, potential OPC bad points caused by inappropriate design can be preventively eliminated in the design stage.

[0017] 2. The correction method of the simulated bad point of the present invention obtains the design layout corresponding to the mask layout, obtains and corrects the graphics at the corresponding simulated bad points in the design layout, and obtains the corrected new design layout, which specifically includes a distributed processing process for the simulated bad points, specifically including: taking the position of the simulated bad point in the design layout as the center, obtaining the area within a preset range as the optimization area; and completely correcting all the simulated bad points and the corresponding optimization areas in the design layout. When correcting the graphics at the simulated bad point of the design layout, if the graphics in the surrounding area related to it, that is, the optimization area, do not change accordingly, the graphics will lose their relevance. Therefore, selecting the optimization area for optimization together can optimize the graphics around the bad point together, thereby ensuring the relevance and continuity of the geometric figures, and the optimization area can buffer the correction of the graphics at the bad point to avoid a large gap with the initial design layout.

[0018] 3. The correction method of the simulated bad pixel of the present invention is a progressive optimization process for correcting all the simulated bad pixels and the corresponding optimized areas in the design layout, which specifically includes: optimizing based on the simulated bad pixels and the corresponding optimized areas; judging whether the optimized design layout has been repaired; if the repair is completed, exiting the repair process; if the repair is not completed, iterating the above optimization process for the simulated bad pixels and the corresponding optimized areas until the simulated bad pixels are completely repaired and exiting the repair process. The progressive optimization can optimize layer by layer until all the simulated bad pixels are repaired, ensuring the comprehensiveness of the overall optimization, while enhancing the bad pixel repair capability and maintaining the locality of the repair as much as possible.

[0019] 4. The present invention also provides a neural network training method to implement the above-mentioned correction method for simulated bad spots, including: using a preset model to obtain and analyze at least one final design layout after the repair of simulated bad spots, training based on the analysis results, and providing the training results as data to the preset model for learning; obtaining the initial design layout to be optimized and the mask layout to be optimized, and obtaining the simulated bad spots of the mask layout to be optimized based on the learning results; using a preset repair tool to repair the simulated bad spots of the initial design layout, and obtaining a new design layout after preliminary repair. The neural network training method has the same beneficial effects as the above-mentioned correction method for simulated bad spots, which will not be described in detail here.

[0020] 5. The neural network training method of the present invention uses a preset model to obtain and analyze at least one final design layout after the repair of simulated bad spots is completed, trains based on the analysis results, and provides the preset model with the training results as data for learning. The training is specifically carried out using the following method: the final design layout and the mask layout obtained after correction are each subjected to lithography simulation verification, and the bad spot optimization results are analyzed and compared; the bad spot optimization results of the final design layout are compared with the mask layout, and the bad spot optimization results that exceed the preset error range are defined as new bad spots; new bad spots that exceed the preset standard are filtered out to obtain new bad spots within the preset standard; new bad spots within the preset standard are classified, and multiple candidate new bad spots are selected from each category; preset weights are given based on the selected candidate new bad spots, and they are brought into the optimization process of the design layout for iteration until the optimization of the candidate new bad spots is completed; the optimized candidate new bad spots are replaced with other candidate new bad spots of the same type that have not been optimized, the optimization is completed, and the optimization results are recorded as the training results of the preset model for learning. The preset model can verify the results, perform process training and learning on the final design layout after the repair of lithography bad spots is completed, thereby ensuring that the final training result is the most comprehensive optimization result, and recording and learning the optimization process. When encountering the same type of simulated bad spots, the optimization process can be directly called up for optimization, thereby achieving the effect of quickly and efficiently correcting simulated bad spots.

[0021] 6. The neural network training method of the present invention, the preset model is an AI neural network training model, the initial design layout to be optimized is obtained, and the graphic contour line in the initial design layout is formed on the mask layout based on the initial design layout, and the mask layout to be optimized specifically includes: embedding the AI ​​neural network training model into the optical proximity correction module; during simulation, the initial design layout is divided into multiple simulation slices based on the AI ​​neural network training model; each simulation slice is divided into smaller secondary slices, and the secondary slices are spliced ​​to form new simulation slices using the AI ​​neural network training model, and the new simulation slices are spliced ​​to form graphic contour lines on the mask layout to be optimized. The simulation slices and smaller secondary slices obtained by this method can have a faster operation rate than the slices obtained by the traditional optical proximity correction module, and the AI ​​neural network training model can be run as a whole on the mask layout because the training and learning process obtains the optimization process and results of the bad points, so it can be obtained. The bad points in the whole mask layout, while the traditional optical proximity correction module can only be operated locally, and the neural network training method has a wider range of applications.

[0022] 7. The present invention also provides a storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method for correcting simulated bad pixels as described above is implemented, which has the same beneficial effects as the method for correcting simulated bad pixels as described above and will not be elaborated herein.

Brief Description of the Drawings

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0024] Figure 1 It is a flowchart of the steps of a method for correcting a simulated bad pixel provided by the first embodiment of the present invention.

[0025] Figure 2 It is a flowchart of step S2 in a method for correcting a simulated bad pixel provided by the first embodiment of the present invention.

[0026] Figure 3 It is a flow chart of step S22 in a method for correcting simulated bad pixels provided by the first embodiment of the present invention.

[0027] Figure 4 It is a schematic diagram of a specific optimization result of a simulated bad pixel of a method for correcting a simulated bad pixel provided by the first embodiment of the present invention.

[0028] Figure 5It is a flowchart of the steps of a neural network training method provided by the second embodiment of the present invention.

[0029] Figure 6 It is a flowchart of step S1 in a neural network training method provided by the second embodiment of the present invention.

[0030] Figure 7 It is a flowchart of step S2 in a neural network training method provided by the second embodiment of the present invention.

[0031] Figure 8 It is a flowchart of step S21 in a neural network training method provided by the second embodiment of the present invention.

[0032] Fig. 9 It is a schematic diagram of the sharding structure of an AI neural network training model in a neural network training method provided in the second embodiment of the present invention.

[0033] Fig.10 It is a schematic diagram of the structure of a storage medium provided by the third embodiment of the present invention.

[0034] Description of the accompanying drawings:

[0035] 1. Storage medium;

[0036] 11. Memory; 12. Processor; 13. Computer program. [Specific implementation method]

[0037] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and implementation examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0038] See also Figure 1 The first embodiment of the present invention provides a method for correcting a simulated bad pixel, the method comprising:

[0039] S1: providing a mask layout, obtaining simulated bad points and corresponding positions in the mask layout;

[0040] S2: Obtain a design layout corresponding to the mask layout, obtain and correct the corresponding simulated bad point pattern in the design layout, and obtain a corrected new design layout;

[0041] S3: Perform optical proximity correction on the new design layout to obtain new mask data;

[0042] S41: performing lithography simulation verification on the simulated bad pixel position based on the new mask data. If the simulated bad pixel still exists, continuously correcting the pattern at the simulated bad pixel of the design layout until the simulated bad pixel is completely repaired.

[0043] S42: If there is no simulated bad pixel, the bad pixel has been solved and the final design layout is output.

[0044] It should be noted that the existing technology essentially corrects the bad pixels that are not solved by the macro-calibration optical proximity correction (OPC recipe) by partially modifying the mask. Even if there are more advanced practices on how to correct the mask, some bad pixels may be caused by inappropriate design layouts. For example, the two lines in the design layout are very close, and due to the influence of the complex surrounding environment, although the design rules are met locally, the graphic topology naturally leads to poor imaging quality at this location. In this case, it is difficult to find a better solution by repeatedly trying to optimize the mask. It is very likely that after many rounds of attempts, the bad pixel problem still cannot be solved, or it will cost a lot to eliminate it. In this case, by breaking through the information barriers between design and manufacturing, making some changes on the design side instead of blindly modifying the mask, it is entirely possible to achieve twice the result with half the effort.

[0045] In addition, the correction of the graphics at the corresponding simulated bad points in the design layout is done by fine-tuning to avoid affecting the continuity of the overall graphics.

[0046] It can be understood that the present invention constructs a bad pixel repair mechanism based on local modification of the design layout, thereby solving the bad pixels caused by inappropriate design layout, and solving the problem of simulation bad pixels in a more comprehensive and efficient manner; on the other hand, the OPC methodology is creatively fed forward to the physical design stage, and corrections are made on the layout integrated circuit files that have passed the physical design sign-off, thereby preventively eliminating potential OPC bad pixels caused by inappropriate design during the design stage.

[0047] See also Figure 2 , further, obtaining the design layout corresponding to the mask layout, obtaining and correcting the corresponding simulated bad point pattern in the design layout, and obtaining the corrected new design layout specifically includes a distributed processing process for the simulated bad point, specifically including:

[0048] S21: Taking the position of the simulated bad pixel in the design layout as the center, obtaining an area within a preset range as an optimization area;

[0049] S22: Completely correct all simulation bad points and corresponding optimization areas in the design layout.

[0050] Specifically, the optimization region includes an optimization variable region surrounding the simulated bad point and a fixed variable region surrounding the optimization variable region. In practice, the bad points are initially distributed out of the optimization region centered on the bad point position and processed in a distributed manner.

[0051] Preferably, the variable area is a rectangular area centered on the bad pixel.

[0052] It should be noted that directly fine-tuning the graphics at the bad pixel can produce immediate results, so that the repair range remains highly localized, but there is an obvious problem: although the graphics corresponding to the bad pixel in the design layout must have led to the formation of the bad pixel, perhaps the cutting edges of other surrounding graphics are the main reason. Continuously modifying this cutting edge may be counterproductive and cannot effectively solve the current bad pixel. Moreover, if the mask error enhancement factor (MEEF) at the bad pixel is relatively large, a larger change to the cutting edge will be required to be effective, which can easily cause unreasonable mask graphics and even affect other locations and produce new bad pixels.

[0053] There are many ways to optimize the simulation bad pixels and variable areas in the design layout. The graphics fine-tuning at the bad pixels can be classified and partially optimized. The optimized variable areas in the same type of bad pixels can then replace the unoptimized variable areas to improve the optimization rate of the simulation bad pixels. Therefore, the simulation bad pixels and the surrounding variable areas need to be cut and optimized separately before being replaced in the entire design layout. Therefore, designing the variable area as a rectangle can ensure sufficient optimization range around the simulation bad pixels, and replacement can be more efficient.

[0054] There is no absolute restriction on the shape of the variable region. It can be designed as a circle or other polygon based on the optimization method.

[0055] Optionally, the variable region can be rectangular or square.

[0056] Normally, the extended value of the side length of the fixed variable region corresponds to the value of the side length of the optimized variable region. In a specific embodiment of the present invention, the optimized variable region is a rectangular region with a side length of 2-3um, and the fixed variable region is extended by 2-3um at both ends based on the side length of the optimized variable region. There is no restriction on the side length or area of ​​the optimized variable region and the fixed variable region. It is subject to the actual situation and adjusted with the change of the design layout size. The above values ​​only correspond to the design layout size in this embodiment.

[0057] It should be noted that when correcting the graphics at the bad spots in the design layout simulation, if the graphics in the surrounding area related to it, that is, the graphics in the optimization area, are not changed accordingly, the graphics will lose their relevance.

[0058] It can be understood that selecting the optimized area for joint optimization can optimize the graphics around the bad point together to ensure the relevance and continuity of the geometric figures, and the optimized area can buffer the correction of the graphics at the bad point to avoid a large gap with the initial design layout.

[0059] For further information, see Figure 3, correcting all simulation bad points and corresponding optimization areas in the design layout is a completely progressive optimization process, including:

[0060] S221: Optimizing based on simulated bad pixels and corresponding optimization areas;

[0061] S222a: Determine whether the optimized design layout has been repaired. If so, exit the repair process.

[0062] S222b: If the repair is not completed, iterate the above optimization process for the simulated bad pixel and the corresponding optimized area until the simulated bad pixel is completely repaired and exit the repair process.

[0063] It should be noted that for bad pixels found in the full-chip lithography simulation test (Lithography Rule Check, LRC for short), the local mask repair method is first used for the design layout. If it can be solved directly, the processing of the bad pixel is completed. If it cannot be solved, the bad pixel is solved by modifying the design locally. For example, if there are 1,000 bad pixels at the beginning, a considerable part of them, such as 500, may have been solved in the first step of local mask repair. Only the remaining 500 will enter the next step of local design modification, and then after multiple stages of gradual optimization, the original 1,000 bad pixels will be completely solved.

[0064] It can be understood that by using progressive optimization, layer by layer optimization can be performed until all simulated bad pixels are repaired, thereby ensuring the comprehensiveness of the overall optimization, while enhancing the bad pixel repair capability while maintaining the locality of the repair as much as possible.

[0065] See also Figure 4 The figure shows an example of how mask repair and local correction of design layout are used in practice to further improve the effect of solving bad pixels in lithography simulation.

[0066] The optimization in the figure shows that, assuming that the mask layout has been verified by lithography simulation, it is confirmed that there are 12477 simulated bad pixels. After the preliminary optimization of local mask repair, 3522 bad pixels are solved, and 8955 bad pixels remain. At this time, the preliminary optimization of local design layout correction (Local Design Optimization) is performed on the design layout corresponding to the mask layout, which can solve 3150 bad pixels again. The final number of simulated bad pixels is 5805.

[0067] It can be seen that the method for correcting simulated bad pixels provided by the invention proposes a local correction design layout, which can greatly improve the ability to solve simulated bad pixels and achieve the effect of eliminating bad pixels.

[0068] See also Figure 5 The second embodiment of the present invention provides a neural network training method to implement the above-mentioned simulation bad pixel correction method, including:

[0069] S1: Use a preset model to obtain and analyze at least one final design layout after the repair of simulated bad points is completed, perform training based on the analysis results, and use the training results as data to provide the preset model for learning;

[0070] S2: obtaining an initial design layout to be optimized and a mask layout to be optimized, and obtaining a simulation bad point of the mask layout to be optimized based on the learning result;

[0071] S3: Use a preset repair tool to repair the simulated bad pixels of the initial design layout to obtain a new design layout after preliminary repair.

[0072] It should be noted that the existing technology actually applies the full set of optical proximity calibration (OPC) solutions to some areas of the mask layout, so as to find bad pixels in advance based on the simulation results of the OPC solution. First, because the full set of OPC solutions is very slow, it is necessary to optimize the mask iteratively based on the feedback of the lithography simulation model. Therefore, this process is still very time-consuming even if it is only applied to local areas; secondly, because the full set of OPC solutions is very time-consuming, it is impossible to check the entire chip, and only some areas can be selected for lithography simulation detection; thirdly, the current LRC process only helps to find bad pixels in the design layout, and does not directly solve the bad pixels. Designers need to deal with the bad pixels according to the LRC report.

[0073] Therefore, a neural network training method is introduced. First, the bad pixels are found based on the rapid feedback of the artificial neural network model, and then the bad pixels are solved using the same method of locally modifying the mask layout as mentioned above, thereby preventively eliminating potential OPC yield risks caused by inappropriate design during the design stage.

[0074] Specifically, the artificial neural network model will establish a mapping from the original design board image to the final photoresist image on the silicon wafer. The simulated bad pixels can be detected in the physical design stage of the layout, and preliminary repair or optimization can be performed through the preset repair tools. The optimized design layout, that is, the new design layout, is output as the design result of the designer (FABLESS), so that the simulated bad pixels in the design layout received by the FAB are relatively fewer than usual, so that the results of the OPC Recipe can be quickly run on such a design layout, making it possible to obtain comprehensive feedback to the lithography in the physical design stage, further solving potential problems with product yield.

[0075] Specifically, in a specific embodiment of the present invention, the speed of the entire process of the neural network training method is increased to about 30 times compared to traditional OPC solutions, providing a faster response.

[0076] The neural network training method has the same beneficial effects as the above-mentioned simulation bad pixel correction method, and will not be described in detail here.

[0077] For further information, see Figure 6 , use the preset model to obtain and analyze at least one final design layout after the repair of simulated bad points is completed, train based on the analysis results, and use the training results as data to provide the preset model for learning. The specific training method is as follows:

[0078] S11: Perform lithography simulation verification on the final design layout and mask layout obtained after correction, and analyze and compare the bad pixel optimization results;

[0079] S12: comparing the bad pixel optimization result of the final design layout with the mask layout, and defining the bad pixel optimization result exceeding the preset error range as a new bad pixel;

[0080] S13: filtering out new bad pixels that exceed a preset standard, and obtaining new bad pixels within the preset standard;

[0081] S14: classifying new bad pixels within a preset standard, and selecting a plurality of candidate new bad pixels from each category;

[0082] S15: giving preset weights based on the selected candidate new bad points, bringing them into the optimization process of the design layout for iteration until the optimization of the candidate new bad points is completed;

[0083] S16: Replace the other unoptimized candidate new bad pixels of the same type with the optimized candidate new bad pixels, complete the optimization and record the optimization result as the training result of the preset model for learning.

[0084] It should be noted that the artificial neural network model establishes a mapping from the original design layout to the final photoresist topography (Resist Image), so that the photoresist graphic contour (Resist Contour) can be quickly generated from the design layout.

[0085] Specifically, the preset error and preset standard for defining a new bad pixel are not limited here, and the range is set according to actual needs.

[0086] It can be understood that the preset model can verify the results, process training and learning of the final design layout after the repair of the lithography bad spots is completed, so as to ensure that the final training result is the most comprehensive optimization result, and record and learn the optimization process. When encountering the same type of simulated bad spots, the optimization process can be directly called up for optimization, thereby achieving the effect of quickly and efficiently correcting the simulated bad spots.

[0087] For further information, see Figure 7 , obtaining the initial design layout to be optimized and the mask layout to be optimized, and obtaining the simulated bad points of the mask layout to be optimized based on the learning result specifically includes the following steps:

[0088] S21: obtaining an initial design layout to be optimized, and forming a pattern outline in the initial design layout on a mask layout based on the initial design layout to obtain a mask layout to be optimized;

[0089] S22: Using the learning result of the preset model to perform calculations on the mask layout to be optimized, and obtaining simulated bad points in the mask layout to be optimized.

[0090] Further, please combine Figure 8 and Fig. 9 , the preset model is an AI neural network training model, an initial design layout to be optimized is obtained, and a graphic contour line in the initial design layout is formed on a mask layout based on the initial design layout, and obtaining the mask layout to be optimized specifically includes:

[0091] S211: Embed the AI ​​neural network training model into the optical proximity correction module;

[0092] S212: During simulation, the initial design layout is divided into a plurality of simulation slices based on the AI ​​neural network training model;

[0093] S213: Divide each simulation slice into smaller secondary slices, use the AI ​​neural network training model to splice the secondary slices to form new simulation slices, and splice the new simulation slices on the mask layout to be optimized to form a graphic contour line.

[0094] Furthermore, the optical proximity correction module divides the initial design layout into a plurality of correction slices, and the computational size of the simulation slice is smaller than the computational size of the correction slice.

[0095] It should be noted that the simulated slices and smaller secondary slices obtained by this method have smaller computational sizes and faster computational speeds than the corrected slices obtained by the traditional optical proximity correction module. In addition, since the AI ​​neural network training model obtains the optimization process and results of bad pixels during the training and learning process, it can run as a whole on the chip to obtain bad pixels in the entire mask layout, while the traditional optical proximity correction module can only perform calculations locally. The neural network training method has a wider range of applications.

[0096] Specifically, the AI ​​neural network training model simulation application process adopts the same mechanism as the current OPC seamless connection, so that it can run directly on the OPC platform, that is, the AI ​​neural network training model is seamlessly embedded in the OPC tool. In the practice of OPC, due to the large size of the full chip, it cannot be directly processed. The general practice in the industry is to divide the entire chip into many small corrected patches (Patch). The AI ​​neural network training model will use the same patch division as OPC during simulation. Of course, the simulation patch operation size (Patch Size) of the AI ​​neural network training model is smaller than the corrected patch operation size of the normal OPC model. In practice, the secondary patches (sub patches) will continue to be divided on the OPC patch, that is, the AI ​​neural network training model is based on the smaller sub patches during operation, and then the results are spliced ​​together to obtain a patch result, so that it can be spliced ​​with the normal OPC result to form a graphic outline.

[0097] Optionally, in practice, for better splicing, an overlapping patch (patch overlap or sub patch overlap) may be formed between different sub patches to ensure the continuity of the graphic outline.

[0098] In addition, the correction method for simulating bad spots or the neural network training method provided by the present invention can realize the progressive application of the methodology of local modification of design layout to the current mask repair process, and the methodology will be advanced to the physical design stage through the AI-based fast lithography feedback model. After FABLESS obtains the initial design layout of the sign-off, the local design layout will be further optimized to eliminate potential yield risks. Any method that combines the local mask and the local modified design layout in a progressive manner and cooperates with the AI ​​model to relocate the local modified design layout to the physical design end should be regarded as an alternative to this solution.

[0099] See also Fig.10 The third embodiment of the present invention is to provide a storage medium 1, including a memory 11, a processor 12, and a computer program 13 stored in the memory 11 and executable on the processor 12. When the processor 12 executes the computer program 13, the method for correcting simulated bad pixels as described above is implemented, which has the same beneficial effects as the method for correcting simulated bad pixels as described above, and will not be elaborated herein.

[0100] It is understandable that, according to the embodiments disclosed in the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present invention include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part, and / or installed from a removable medium. When the computer program is executed by the central processing unit (CPU), the above functions defined in the method of the present application are executed. It should be noted that the computer-readable medium described in the present application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. Computer-readable storage media, for example, include but are not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection with one or more conductors, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, an apparatus or a device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in combination with an instruction execution system, an apparatus or a device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0101] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0102] In the embodiments provided by the present invention, it should be understood that "B corresponding to A" means that B is associated with A, and B can be determined according to A. However, it should also be understood that determining B according to A does not mean determining B only according to A, and B can also be determined according to A and / or other information.

[0103] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present invention. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. Those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0104] In various embodiments of the present invention, it should be understood that the size of the serial numbers of the above-mentioned processes does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0105] The flow chart and block diagram in the accompanying drawings of the present invention illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which is determined based on the functions involved. It should be particularly noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs a specified function or operation, or can be implemented by a combination of dedicated hardware and computer instructions.

[0106] Compared with the prior art, the correction method for simulated bad pixels, the neural network training method and the storage medium of the present invention have the following advantages:

[0107] 1. The correction method of the simulation bad point of the present invention comprises: providing a mask layout, obtaining the simulation bad point and the corresponding position in the mask layout; obtaining the design layout corresponding to the mask layout, obtaining and correcting the corresponding simulation bad point pattern in the design layout, and obtaining the corrected new design layout; performing optical proximity correction on the new design layout to obtain new mask data; performing lithography simulation verification on the simulation bad point position based on the new mask data, if there are still simulation bad points, then continuously correcting the simulation bad point pattern of the design layout until the simulation bad point is completely repaired; if there are no simulation bad points, the bad points have been solved, and the final design layout is output. The present invention constructs a bad point repair mechanism based on local modification of the design layout, so that the bad points caused by inappropriate design layout can be solved, and the problem of simulation bad points can be solved more comprehensively and efficiently; on the other hand, the OPC methodology is creatively fed forward to the physical design stage, and on the layout integrated circuit file that has passed the physical design sign-off, potential OPC bad points caused by inappropriate design can be preventively eliminated in the design stage.

[0108] 2. The correction method of the simulated bad point of the present invention obtains the design layout corresponding to the mask layout, obtains and corrects the graphics at the corresponding simulated bad points in the design layout, and obtains the corrected new design layout, which specifically includes a distributed processing process for the simulated bad points, specifically including: taking the position of the simulated bad point in the design layout as the center, obtaining the area within a preset range as the optimization area; and completely correcting all the simulated bad points and the corresponding optimization areas in the design layout. When correcting the graphics at the simulated bad point of the design layout, if the graphics in the surrounding area related to it, that is, the optimization area, do not change accordingly, the graphics will lose their relevance. Therefore, selecting the optimization area for optimization together can optimize the graphics around the bad point together, thereby ensuring the relevance and continuity of the geometric figures, and the optimization area can buffer the correction of the graphics at the bad point to avoid a large gap with the initial design layout.

[0109] 3. The correction method of the simulated bad pixel of the present invention is a progressive optimization process for correcting all the simulated bad pixels and the corresponding optimized areas in the design layout, which specifically includes: optimizing based on the simulated bad pixels and the corresponding optimized areas; judging whether the optimized design layout has been repaired; if the repair is completed, exiting the repair process; if the repair is not completed, iterating the above optimization process for the simulated bad pixels and the corresponding optimized areas until the simulated bad pixels are completely repaired and exiting the repair process. The progressive optimization can optimize layer by layer until all the simulated bad pixels are repaired, ensuring the comprehensiveness of the overall optimization, while enhancing the bad pixel repair capability and maintaining the locality of the repair as much as possible.

[0110] 4. The present invention also provides a neural network training method to implement the above-mentioned correction method for simulated bad spots, including: using a preset model to obtain and analyze at least one final design layout after the repair of simulated bad spots, training based on the analysis results, and providing the training results as data to the preset model for learning; obtaining the initial design layout to be optimized and the mask layout to be optimized, and obtaining the simulated bad spots of the mask layout to be optimized based on the learning results; using a preset repair tool to repair the simulated bad spots of the initial design layout, and obtaining a new design layout after preliminary repair. The neural network training method has the same beneficial effects as the above-mentioned correction method for simulated bad spots, which will not be described in detail here.

[0111] 5. The neural network training method of the present invention uses a preset model to obtain and analyze at least one final design layout after the repair of simulated bad spots is completed, trains based on the analysis results, and provides the preset model with the training results as data for learning. The training is specifically carried out using the following method: the final design layout and the mask layout obtained after correction are each subjected to lithography simulation verification, and the bad spot optimization results are analyzed and compared; the bad spot optimization results of the final design layout are compared with the mask layout, and the bad spot optimization results that exceed the preset error range are defined as new bad spots; new bad spots that exceed the preset standard are filtered out to obtain new bad spots within the preset standard; new bad spots within the preset standard are classified, and multiple candidate new bad spots are selected from each category; preset weights are given based on the selected candidate new bad spots, and they are brought into the optimization process of the design layout for iteration until the optimization of the candidate new bad spots is completed; the optimized candidate new bad spots are replaced with other candidate new bad spots of the same type that have not been optimized, the optimization is completed, and the optimization results are recorded as the training results of the preset model for learning. The preset model can verify the results, perform process training and learning on the final design layout after the repair of lithography bad spots is completed, thereby ensuring that the final training result is the most comprehensive optimization result, and recording and learning the optimization process. When encountering the same type of simulated bad spots, the optimization process can be directly called up for optimization, thereby achieving the effect of quickly and efficiently correcting simulated bad spots.

[0112] 6. The neural network training method of the present invention, the preset model is an AI neural network training model, the initial design layout to be optimized is obtained, and the graphic contour line in the initial design layout is formed on the mask layout based on the initial design layout, and the mask layout to be optimized specifically includes: embedding the AI ​​neural network training model into the optical proximity correction module; during simulation, the initial design layout is divided into multiple simulation slices based on the AI ​​neural network training model; each simulation slice is divided into smaller secondary slices, and the secondary slices are spliced ​​to form new simulation slices using the AI ​​neural network training model, and the new simulation slices are spliced ​​to form graphic contour lines on the mask layout to be optimized. The simulation slices and smaller secondary slices obtained by this method can have a faster operation rate than the slices obtained by the traditional optical proximity correction module, and the AI ​​neural network training model can be run as a whole on the mask layout because the training and learning process obtains the optimization process and results of the bad points, so it can be obtained. The bad points in the whole mask layout, while the traditional optical proximity correction module can only be operated locally, and the neural network training method has a wider range of applications.

[0113] 7. The present invention also provides a storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method for correcting simulated bad pixels as described above is implemented, which has the same beneficial effects as the method for correcting simulated bad pixels as described above and will not be elaborated herein.

[0114] The above is a detailed introduction to a simulation bad pixel correction method, a neural network training method and a storage medium disclosed in an embodiment of the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in the field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention, and any modifications, equivalent substitutions and improvements made within the principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for correcting a simulated bad pixel, characterized in that: The following steps are involved: Providing a mask layout, obtaining simulated bad points and corresponding positions in the mask layout; Obtaining a design layout corresponding to the mask layout, obtaining and correcting the graphics at the corresponding simulated bad spots in the design layout, and obtaining a corrected new design layout, wherein correcting the corresponding simulated bad spots in the design layout includes: obtaining a preset optimization area based on the position of the simulated bad spots, performing local mask optimization on the simulated bad spots, and if there are still simulated bad spots, then performing local design layout correction on the simulated bad spots; Perform optical proximity correction on the new design layout to obtain new mask data; Perform lithography simulation verification on the simulated bad pixel location based on the new mask data. If the simulated bad pixel still exists, continue to correct the graphics at the simulated bad pixel of the design layout until the simulated bad pixel is completely repaired. If there is no simulated bad pixel, the bad pixel has been solved and the final design layout is output.

2. The method for correcting a simulated bad pixel as claimed in claim 1, characterized in that: Obtaining the design layout corresponding to the mask layout, obtaining and correcting the corresponding simulated bad point pattern in the design layout, and obtaining the corrected new design layout specifically includes a distributed processing process for the simulated bad points, which specifically includes the following steps: Taking the position of the simulated bad pixel in the design layout as the center, an area within a preset range is obtained as an optimization area; The optimized areas are distributed for distributed processing to completely correct all simulation bad points and corresponding optimized areas in the design layout.

3. The method for correcting a simulated bad pixel as claimed in claim 2, characterized in that: Correcting all simulation bad points and corresponding optimization areas in the design layout is a completely progressive optimization process, which specifically includes the following steps: Optimize based on simulated bad pixels and corresponding optimization areas; Determine whether the optimized design layout has been repaired; If the repair is completed, exit the repair process; If the repair is not completed, the above optimization process for the simulated bad pixel and the corresponding optimized area is iterated until the simulated bad pixel is completely repaired and the repair process is exited.

4. The method for correcting a simulated bad pixel as claimed in claim 2, wherein: The optimization region includes an optimization variable region surrounding the simulation bad point and a fixed variable region surrounding the optimization variable region.

5. A neural network training method, which implements the method for correcting simulated bad points as described in any one of claims 1 to 4, characterized in that The steps include: Use a preset model to obtain and analyze at least one final design layout after the repair of a simulated bad point is completed, perform training based on the analysis results, and provide the training results as data to the preset model for learning; Obtaining an initial design layout to be optimized and a mask layout to be optimized, and obtaining a simulation bad point of the mask layout to be optimized based on the learning result; Use the preset repair tool to repair the simulated bad points of the initial design layout to obtain a new design layout after preliminary repair.

6. The neural network training method according to claim 5, characterized in that: Use the preset model to obtain and analyze at least one final design layout after the repair of simulated bad points is completed, perform training based on the analysis results, and use the training results as data to provide the preset model for learning. The specific training method is as follows: Perform lithography simulation verification on the final design layout and mask layout obtained after correction, and analyze and compare the bad pixel optimization results; Compare the bad pixel optimization result of the final design layout with the mask layout, and define the bad pixel optimization result beyond the preset error range as a new bad pixel; Filter out new bad pixels that exceed the preset standard and obtain new bad pixels within the preset standard; Classify new bad pixels within a preset standard and select multiple candidate new bad pixels from each category; Based on the selected candidate new bad points, a preset weight is given and brought into the optimization process of the design layout for iteration until the optimization of the candidate new bad points is completed; The optimized candidate new bad pixels are used to replace other unoptimized candidate new bad pixels of the same type, and the optimization is completed and the optimization result is recorded as the training result of the preset model for learning.

7. The neural network training method according to claim 5, characterized in that: Obtaining the initial design layout to be optimized and the mask layout to be optimized, and obtaining the simulated bad points of the mask layout to be optimized based on the learning results specifically includes the following steps: Acquire an initial design layout to be optimized, and form a pattern outline in the initial design layout on a mask layout based on the initial design layout to obtain a mask layout to be optimized; The learning result of the preset model is used to calculate the mask layout to be optimized to obtain the simulated bad points in the mask layout to be optimized.

8. The neural network training method according to claim 7, characterized in that: The preset model is an AI neural network training model, and the initial design layout to be optimized is obtained. Based on the initial design layout, the contour line of the pattern in the initial design layout is formed on the mask layout, and the mask layout to be optimized specifically includes: Embed the AI ​​neural network training model into the optical proximity correction module; During simulation, the initial design layout is divided into multiple simulation slices based on the AI ​​neural network training model; Each simulation slice is divided into smaller secondary slices, and the secondary slices are spliced ​​into new simulation slices using an AI neural network training model. The new simulation slices are spliced ​​into graphic contours on the mask layout to be optimized.

9. The neural network training method according to claim 8, characterized in that: The optical proximity correction module divides the initial design layout into a plurality of correction slices, and the computational size of the simulation slices is smaller than the computational size of the correction slices.

10. A storage medium comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method for correcting simulated bad pixels according to any one of claims 1 to 4 is implemented.

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