System and method for data comparison

Abstract

A method includes receiving, at hardware circuitry of a device, a target value corresponding to target data. The method also includes outputting, from the hardware circuitry, a first indicator indicating that source data corresponds to the target value. The method also includes outputting, from software running at the device based on the first indicator, a result indicator indicating that the source data corresponds to the target data.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to U.S. Provisional Application No. 63 / 389232, filed July 14, 2022, entitled “METHODOLOGY FOR HARDWARE ACCELERATED DB SCANS INVOLVING STRINGS”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to systems and methods for data comparison. Background Technology

[0004] Many applications, such as database applications, utilize data comparisons when performing various operations. For example, a database scan operation compares database data elements (e.g., strings) with target data elements (e.g., strings) to identify database elements that include the target data element. However, determining whether two data elements (e.g., strings) are identical can be computationally expensive.

[0005] The information disclosed in this background section is only intended to enhance the understanding of the background technology of this disclosure, and therefore may contain information that does not constitute prior art. Summary of the Invention

[0006] In various embodiments, the contents described herein include systems, methods, and apparatuses relating to resource isolation in computing storage devices.

[0007] A method includes: receiving a target value corresponding to target data at hardware circuitry of a device. The method further includes: outputting a first indicator from the hardware circuitry indicating that the source data corresponds to the target value. The method further includes: based on the first indicator, outputting a result indicator from software running at the device indicating that the source data corresponds to the target data.

[0008] A system includes hardware circuitry configured to receive a target value corresponding to target data. The hardware circuitry is further configured to output a first indicator indicating that the source data corresponds to the target value. The system also includes a processor running software configured to output a result indicator indicating that the source data corresponds to the target data, based on the first indicator.

[0009] An apparatus includes a processor and hardware circuitry configured to receive, from a compute storage application running at the processor, a target value corresponding to target data. The hardware circuitry is further configured to output, to software running at the processor, a first indicator indicating that source data corresponds to the target value. The software is configured to output, to the compute storage application based on the first indicator, a result indicator indicating that the source data corresponds to the target data. BRIEF DESCRIPTION OF DRAWINGS

[0010] The above-described aspects and other aspects of the present technology are more fully set forth with reference to the accompanying drawings, in which like numerals designate like elements throughout the several figures, and in which:

[0011] Figure 1 is a diagram of a system for performing data comparisons.

[0012] Figure 2 is a diagram of another system for performing data comparisons.

[0013] Figure 3 is a diagram of another system for performing data comparisons.

[0014] Figure 4 is a diagram of another system for performing data comparisons.

[0015] Figure 5 is a diagram of another system for performing data comparisons.

[0016] Figure 6 is a diagram showing a system performing data comparisons.

[0017] Figure 7 is a diagram showing more details of a system performing data comparisons.

[0018] Figure 8 is a flow diagram showing a method for performing data comparisons.

[0019] Figure 9 is a flow diagram showing another method for performing data comparisons.

[0020] While the present technology is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. The drawings can not be to scale. It should be understood that the drawings and detailed description thereto are not intended to limit the DETAILED DESCRIPTION

[0021] The details of one or more embodiments of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.

[0022] Various embodiments of the present disclosure will now be described more fully with reference to the accompanying drawings in which some, but not all, embodiments are shown. Indeed, the present disclosure can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. The term "or" is used herein in the sense of an "inclusive or" unless otherwise indicated. The terms "illustrative" and "exemplary" are used as examples only, and not to imply a quality level. Like numbers refer to like elements throughout. Arrows in each drawing depict bidirectional data flow and / or bidirectional data flow capability. The terms "path," "way," and "route" are used interchangeably herein.

[0023] Embodiments of the present disclosure can be implemented in a variety of ways, including as a computer program product that comprises a computer-readable storage medium. A computer program product can include a non-transitory computer-readable storage medium that stores applications, programs, program components, scripts, source code, program code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and / or the like (also referred to herein as executable instructions, instructions for execution, computer program products, program code, and / or similar terms used herein interchangeably). Such a non-transitory computer-readable storage medium includes all computer-readable media (including volatile and non-volatile media).

[0024] In one embodiment, a non-transitory computer-readable storage medium can include a floppy disk, flexible disk, hard disk, solid-state storage (SSS) (e.g., a solid state drive (SSD), solid state hybrid drive (SSHD), or other solid state memory system), solid state card (SSC), solid state module (SSM), enterprise flash drive, magnetic tape, or any other non-transitory magnetic medium, or any other non-transitory computer- readable medium that can store the desired information. The non-transitory computer- readable storage medium also can include a non-transitory physical storage medium that stores computer-readable program instructions that implement the techniques described in this disclosure. The computer-readable program instructions can be executed by one or more processors of a computer or other computing device.Further, non-volatile computer-readable storage media can include conductive- bridging random access memory (CBRAM), phase-change random access memory (PRAM), ferroelectric random-access memory (FeRAM), non-volatile random-access memory (NVRAM), magnetoresistive random-access memory (MRAM), resistive random-access memory (RRAM), Silicon-Oxide-Nitride-Oxide-Silicon memory (SONOS), floating junction gate random access memory (FJG RAM), Millipede memory, racetrack memory, and the like.

[0025] In one embodiment, a volatile computer-readable storage medium can include random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), fast page mode dynamic random access memory (FPM DRAM), extended data out dynamic random access memory (EDO DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), double data rate type two synchronous dynamic random access memory (DDR2 SDRAM), double data rate type three synchronous dynamic random access memory (DDR3 SDRAM), Rambus dynamic random access memory (RDRAM), Twin Transistor RAM (TTRAM), Thyristor RAM (T-RAM), Zero-capacitor RAM (Z-RAM), Rambus in-line memory component (RIMM), dual in-line memory component (DIMM), single in-line memory component (SIMM), video random access memory (VRAM), cache memory (including various types of cache, such as cache, level 1 cache, level 2 cache, level 3 cache, level 4 cache, and so on), and the like.VRAM), cache memory (including various levels), flash memory, register memory, etc. It should be understood that where embodiments are described as using computer-readable storage media, other types of computer-readable storage media can be substituted or used in addition to, or instead of, the above-mentioned computer-readable storage media.

[0026] It should be understood that various embodiments of the present disclosure can also be implemented as methods, apparatus, systems, computing devices, computing entities, etc. As such, embodiments of the present disclosure can take the form of an apparatus, system, computing device, computing entity, etc. that has instructions stored on computer-readable storage medium that when executed by the apparatus, system, computing device, computing entity, etc. perform certain steps or operations. As such, embodiments of the present disclosure can also take the form of a completely hardware embodiment, a completely computer program product embodiment, and / or an embodiment that comprises a combination of computer program products and hardware that perform certain steps or operations.

[0027] Embodiments of the present disclosure are described below with reference to block diagrams and flowchart illustrations. As such, it will be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by computer program instructions that are loaded onto a computing device, system, computing entity, etc. and executed by the computing device, system, computing entity, etc. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computing device, system, computing entity, etc. implement the functions / acts specified in the block diagrams and flowchart illustrations. In

[0028] As used herein, a computational storage device (CSD) refers to a storage device that supports computational tasks. For example, a CSD can include storage elements (e.g., non-volatile memory, such as flash memory, hard disk drives, etc.) and computational elements (e.g., central processor units (CPUs), graphics processor units (GPUs), field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs) such as tensor processing units, processor cores, etc.) and is configured to support storing data at the computational elements and running computational tasks at the computational elements. Accordingly, a CSD can provide storage capabilities to a host device (e.g., a computing device) and can support offloading computational tasks from the host device to the CSD device.

[0029] In some examples according to the present disclosure, a computational storage device (CSD) includes more than one computational engine and more than one storage source. Examples of storage sources include storage media (e.g., flash memory chips, such as NAND flash memory chips, packages of flash media, resistive random access memory devices, hard disk devices, etc.), storage channels (e.g., NAND flash memory channels, etc.), other groupings of storage media, etc. The computational engines receive data from the storage sources and perform computations on the data. Because a host data unit (e.g., a file) operated on by the computations can be divided across more than one storage source, the computational engines operate on the data based on locations of delimiters that indicate boundaries between host data units in the data. Specifically, a computational engine can begin performing computations on data following a first instance of a delimiter in a buffer of the computational engine. Data preceding the first delimiter can be combined with data from an input buffer of a previous computational engine and processed elsewhere. Similarly, a computational engine can detect a final instance of a delimiter in an input buffer associated with the computational engine and stop computations at the final instance until additional data is available. In some examples, data following the final instance of the delimiter can be carried over to another input buffer for processing by another computational engine.

[0030] The disclosed delimiter-aware systems and methods can provide parallel computation in a CSD despite misalignment between host data units and CSD data units. These systems and methods can be particularly useful in RAID configurations in which data is striped across several storage sources. Moreover, the present disclosure can be extended to systems that include host data stored on more than one CSD.

[0031] Systems and methods for accelerating comparisons are disclosed. These systems can be used to determine whether source data corresponds to target data (or some other data of interest). Aspects of the disclosed systems and methods involve performing a first comparison between source data and target data in hardware and performing a second comparison in software. The second comparison in software can be selectively performed based on the first comparison in hardware. The hardware comparison can be relatively faster than the software comparison, and selectively performing the software comparison can reduce the number of software comparisons performed.

[0032] The disclosed systems and methods can have applications in the database field. A database system can include a scan / filter component. This component can be configured to scan the database system for particular data and / or filter out particular data when returning results from the database system. In some examples, the scan involves performing a block data read, then extracting database pages, tuples from the pages, and column fields from the tuples. The scan / filter component can then operate on the tuples to identify a subset corresponding to a query. Specifically, hardware circuitry of the scan / filter component can perform a first filtering operation on the column fields extracted from the database pages, and a software component can selectively perform a second filtering operation based on the first filtering operation. Results from the second filtering operation can be further filtered and / or returned to a requester or another component of the database system for further processing.

[0033] It should be noted that the disclosed systems and methods are not limited to retrieval from a database. For example, the disclosed systems and methods can be used in a streaming system to quickly identify streaming data that is relevant to some criteria (e.g., a query). In some implementations, the disclosed systems and methods are implemented by a system that includes one or more computing storage devices. In such implementations, the computing storage devices can accelerate data comparison operations or portions thereof.

[0034] Reference Figure 1FIG. 1 shows a system 100 for performing data comparisons. The system 100 includes a hardware circuit 102 and a processor 104. In some examples, the hardware circuit 102 includes a field programmable gate array (FPGA), an application specific integrated circuit, another type of circuit, or any combination thereof. In some examples, the processor 104 includes a central processing unit (CPU), a graphics processing unit (GPU), a tensor processing unit (TPU), or any combination thereof. In some implementations, the hardware circuit 102 and the processor 104 are subcomponents of a single computing element (e.g., FGPA).

[0035] The hardware circuit 102 is connected to the processor 104. In some examples, the hardware circuit 102 is directly connected to the processor 104, while in other examples, the hardware circuit 102 and the processor 104 are indirectly connected to each other through a communication path that includes one or more intermediary devices. The hardware circuit 102 and the processor 104 can be configured to communicate through a serial peripheral interface (SPI) protocol, an inter-integrated circuit (I2C) protocol, an advanced extensible interface (AXI) protocol, a peripheral component interconnect (PCI) protocol, a peripheral component interconnect express (PCIe) protocol, an Ethernet protocol, a WiFi protocol, another type of protocol, or any combination thereof. It should be noted that messages between the processor 104 and the hardware circuit 102 can be encapsulated in messages of other protocols during transmission. Furthermore, the hardware circuit 102 and the processor 104 can communicate using different protocols. In such examples, the intermediary devices can translate between the different protocols.

[0036] The hardware circuit 102 is configured to generate an output value based on input data. In the illustrated example, the hardware circuit 102 receives source data 110 as the input data. The input data can have a variable length, while the output value can have a fixed length. The output value can be a transformed version of the input data. In some examples, the hardware circuit 102 applies a hash function, such as a cyclic redundancy check (CRC) 32 hash function, to the input data to generate the output value. In some examples, the hardware circuit 102 is configured to operate on string (e.g., sequence of characters) input values, although other data types can also be supported in accordance with the present disclosure.

[0037] The hardware circuit 102 is also configured to compare the output value to a target value associated with the target data to determine whether the output value corresponds to (e.g., is equal to) the target value. In the illustrated example, the hardware circuit 102 compares the target value 108, which corresponds to the target data 114, to the output value, which corresponds to the source data 110. In some examples, the hardware circuit 102 can generate the target value (e.g., the target value 108) based on the target data (e.g., the target data 114). The target data and the target value can have the same relationship to each other as the input data and the output value have (e.g., the target value can be the output of a hash function that receives the target data as input). It should be noted that the hardware circuit 102 can compare the output value to more than one target value. Furthermore, the hardware circuit 102 can compare the target value (or target values) to more than one output value. For example, the hardware circuit 102 can be used to determine which of one or more source strings corresponds to one or more target strings (e.g., has a hash value that matches a hash value of the one or more target strings).

[0038] The hardware circuit 102 can be configured to generate an indicator based on the comparison of the target value to the output value, which can indicate whether the output value corresponds to the input value, the location of the input data, or a combination thereof. For example, the hardware circuit 102 can output the location (e.g., a memory address, a database row identification identifier, a database column index, another location indicator, etc., or any combination thereof) of the plurality of source data having a value that corresponds to the target value 108. In the illustrated example, the hardware circuit 102 outputs the first indicator 112 based on the comparison of the target value 108 to the value generated from the source data 110. In some examples, the hardware circuit 102 selectively generates the indicator in response to determining that the output value corresponds to the target value.

[0039] The hardware circuit 102 can include one or more sub-circuits (e.g., FPGA blocks, etc.) configured to perform the operations described herein. For example, the hardware circuit 102 can include a hash value generation sub-circuit (e.g., an FPGA block) and a comparator sub-circuit (e.g., an FPGA block).

[0040] The processor 104 is configured to run data comparison software 106 that is configured to compare data elements to determine whether they match. In the illustrated example, the software 106 compares the source data 110 to the target data 114. In some examples, the data comparison software 106 corresponds to string comparison software. For example, the software 106 can be configured to, for each index in a first string, compare the character at that index to the character at the corresponding index in a second string. In other examples, the software 106 can implement other string comparison techniques. In addition, the software 106 can support comparison of other data types. The data comparison software 106 can be configured to selectively compare data based on an indicator received from the hardware circuit 102. Accordingly, the system 100 can conserve processing resources associated with running comparisons in the software 106 based on the output of the hardware circuit 102. The software 106 is configured to generate a result indicator based on the comparisons it performs. The result indicator can indicate whether the source data matches the target data, can indicate the location of the data that matches the target data, or a combination thereof. In the illustrated example, the software 106 generates a result indicator 116 that indicates whether the source data 110 matches the target data 114, indicates the location of the source data 110, or a combination thereof. The software 106 can selectively generate a result indicator for data that matches the target data. It should be noted that the software 106 can compare the source data to more than one element of the target data. In addition, the software 106 can compare more than one element of the source data to the target data.

[0041] Systems and devices can utilize the system 100 to identify data that matches target data. As will be described further herein, the system 100 can be used in a database system to perform filtering and / or scanning operations on a database for target data (e.g., a string). The operation of the hardware circuit 102 can be faster than the running of the software 106. Accordingly, using the hardware circuit 102 to identify elements in a database that have a value (e.g., a hash value) that matches a value (e.g., a hash value) of the target data can reduce the number of comparisons performed by the software 106. Accordingly, filtering and / or scanning operations can be performed more quickly and the processor 104 can have more time to perform other operations. While described in the context of a database system, the system 100 can also be implemented in other systems to achieve similar benefits.

[0042] Reference Figure 2FIG. 1 illustrates a computing storage system 100 that performs a data comparison. The computing storage system 100 includes a host 102 and a storage device 104 (e.g., a computing storage device). The host 102 can include a computing device, such as a server computer, a desktop computer, and the like. The storage device 104 can correspond to a solid state drive, a hard disk drive, another type of storage drive, an enclosure that includes more than one storage drive, and the like.

[0043] The storage device 104 includes a controller 106, a storage medium 108, and a compute element 112. The controller 106 can include an FPGA, an ASIC, a CPU, a GPU, another type of processor, or a combination thereof. The controller 106 is configured to control operations of the storage device 104, such as writing data to the storage medium 108 (e.g., from the host 102), reading data from the storage medium 108 (e.g., to the host 102), loading an application for execution in the compute element 112, initiating execution of an application loaded into the compute element 112, and the like. In some implementations, the controller 106 corresponds to a non-volatile memory express (NVMe) controller, an NVMe over fabrics (NVMeoF) controller, another type of controller, or a combination thereof.

[0044] The storage medium 108 can include flash memory, dynamic random access memory (DRAM), static random access memory (SRAM), a hard disk, another type of memory, or any combination thereof.

[0045] The computing element 212 includes hardware circuitry 214 and a processor 219. The hardware circuitry 214 includes a value generator 216 and a hardware comparator 218. The computing element 212 can correspond to an FPGA, and the hardware circuitry can correspond to an FPGA block or a set of FPGA blocks, while the value generator 216 and the hardware comparator 218 correspond to a block or a sub-block of the hardware circuitry 214. The processor 219 can include a CPU, a GPU, a TPU, or the like. In some examples, the processor 219 corresponds to a processor core of an FPGA. The computing element 212 can correspond to the system 100, the hardware circuitry 214 can correspond to the hardware circuitry 102, and the processor 219 can correspond to the processor 104. The value generator 216 is configured to receive data and output a value (e.g., a hash value) based on the data. The hardware comparator 218 can include an analog or digital comparator. The hardware comparator 218 is configured to receive a source value and a target value and output an indicator based on a comparison of the target value and the source value. In some implementations, the hardware comparator determines whether one or more source values are equal to one or more target values and outputs an indicator identifying which of the one or more source values are equal to one or more of the one or more target values. For example, the hardware comparator 218 can output a location (e.g., a row identifier, a column index, a memory pointer, or a combination thereof) of a data element having a source value that is equal to one or more target values.

[0046] The processor runs software 220 that includes a software comparator module 222. The software comparator module 222 can correspond to the software 106. The software comparator module 222 is configured to determine whether a source data element (or a plurality of source data elements) corresponds to (e.g., is equal to) a target data element. The software comparator module 222 can output an indicator indicating whether the source data element is equal to or includes the target data element. For example, the software comparator module 222 can output a list of source data elements that are equal to or include the target data element, can output a location indicator of a source data element that is equal to or includes the target data element, or a combination thereof.

[0047] Host 202 is connected to storage device 204. In some examples, host 202 is directly connected to storage device 204, while in other examples, host 202 and storage device 204 are indirectly connected to each other through a communication path that includes one or more intermediary devices (e.g., through a network fabric). Host 202 and storage device 204 can be configured to communicate through a serial peripheral interface (SPI) protocol, an internal integrated circuit (I2C) protocol, an advanced extensible interface (AXI) protocol, a peripheral component interconnect (PCI) protocol, a peripheral component interconnect express (PCIe) protocol, an NVMe protocol, an NVMe over Fabrics (NVMeoF) protocol, a serial attached SCSI protocol, a serial AT-attached protocol, an Ethernet protocol, a WiFi protocol, a remote direct memory access (RDMA) protocol, another type of protocol, or any combination thereof. It should be noted that messages between host 202 and storage device 204 can be encapsulated in messages of other protocols during transmission. Moreover, host 202 and storage device 204 can use different protocols for communication. In such examples, intermediary devices can translate between the different protocols.

[0048] Components of storage device 204 can communicate with each other through various protocols. The components can be directly connected to each other or indirectly connected to each other through a communication path that includes one or more intermediary devices. Components of storage device 204 can communicate through a serial peripheral interface (SPI) protocol, an internal integrated circuit (I2C) protocol, an advanced extensible interface (AXI) protocol, a peripheral component interconnect (PCI) protocol, a peripheral component interconnect express (PCIe) protocol, an Ethernet protocol, a WiFi protocol, another type of protocol, or any combination thereof. It should be noted that messages between processor 104 and hardware circuit 102 can be encapsulated in messages of other protocols during transmission. Moreover, hardware circuit 102 and processor 104 can use different protocols for communication. In such examples, intermediary devices can translate between the different protocols.

[0049] In the illustrated example, the host 202 sends target data 224 (e.g., a string) and a target value 226 to the storage device 204. The target data 224 and the target value 226 can be sent from the host 202 as part of a database filter or scan query (e.g., from a database application running at the host 202 or from an application that accesses a database application running at the storage device 204). In some implementations, the host 202 can send the target data 224 and the target value 226 as a single message, while in other implementations, they can be sent as separate messages. In still further implementations, the host 202 sends the target data 224 and the storage device derives the target value 226 (as described further below) rather than the host 202 sending the target value 226 to the storage device 204. In some examples, the host 202 can specify more than one target data element (e.g., more than one string) in a particular request. Such a request can include a target value (e.g., a hash value) for each of the target data elements, or the storage device can derive the target value for each of the target data elements.

[0050] The controller 206 receives the target data 224 and the target value 226 and forwards the target value 226 to the hardware circuit 214. It should be noted that in some implementations, the controller 206 sends the target data 224 to the hardware circuit 214 rather than the target value 226, and the value generator 216 generates the target value 226 based on the target data 224 (e.g., by applying a hash function to the target data). In examples in which the target data 224 includes more than one data element (e.g., more than one string), the target value 226 can be one of several target values sent to or derived at the hardware circuit 214 (e.g., the hardware circuit 214 can receive a vector of hash values).

[0051] The controller 206 also retrieves data 210 from the storage medium 208 and forwards the data 210 to the hardware circuit 214. The data 210 can include more than one data element (e.g., multiple rows in a database). In some implementations, the host 202 indicates particular data in a request to the controller 206 and the controller 206 retrieves the particular data from the storage medium 208 based on the request. For example, the host 202 can indicate a page or other unit of data to be compared to (e.g., to search for) the target data 224.

[0052] Based on the data 210, the value generator 216 generates source values (e.g., hash values based on the data 210). The value generator 216 can generate a source value for each element in the data 210. The hardware comparator compares 226 the source values to the target values and generates a first indicator 217 based on the comparison. In some examples, the first indicator 217 indicates locations (e.g., identifiers of rows in a database, indices of columns of a database, pointers to memory locations, another location indicator, or a combination thereof) that include data elements (e.g., strings) having source values (e.g., hash values) corresponding to the target values 226.

[0053] The controller 206 also sends the data 210 and the target data 224 to the software comparator module 222. Based on the first indicator 217, the software comparator module 222 selectively compares the target data 224 to the data 210. For example, the software comparator module 222 can compare the data at each location identified by the first indicator 217 to the target data 224. Based on these comparisons, the software 220 generates a result indicator 228. The result indicator 228 can indicate whether the data 210 corresponds to the target data 224, identify data elements within the data 210 that correspond to the target data 224, identify locations in the data 210 that correspond to the target data 224, or a combination thereof. For example, the result indicator 228 can output a string in a database that includes the target data 224. In the illustrated example, the result indicator 228 is sent by the software 220 to the controller 206, and the controller 206 sends the result indicator 228 to the host 202. In alternative implementations, the software 220 can store the result indicator 228 in the storage medium 208 or send the result indicator 228 to another application running on the storage device 204.

[0054] Because the software 220 selectively performs software comparisons on the data based on the results from the hardware circuit 214, the software 220 can perform fewer comparisons than a system that compares each data element to the target data. Accordingly, computing resources of the storage device 204 can be conserved, and average comparison time can be reduced.

[0055] It should be noted that the system 200 can include additional components beyond those illustrated. For example, the storage device 204 can include more than one storage medium 208. Similarly, although not illustrated, both the host 202 and the storage device 204 include one or more communication interfaces. As another example, the host 202 can include a processor, internal memory, and other components. Additionally, in some alternative examples, the host 202 can communicate directly with the computing element 212, rather than with the controller 206.

[0056] Referring toFigure 3 Another computing storage system 300 is shown for performing data comparisons. Figure 3 Software comparisons at one device can be selectively performed based on results of hardware comparisons at different devices, as shown. System 300 is similar to system 200. System 300 includes a host 302 corresponding to host 202 and a storage device 304 corresponding to storage device 204. Storage device 304 includes a controller 306 corresponding to controller 206, storage media 308 corresponding to storage media 208, and a computing element 312 corresponding to computing element 212. Computing element 212 includes hardware circuitry 314 corresponding to hardware circuitry 214. Hardware circuitry 314 includes a value generator 316 corresponding to value generator 216 and a hardware comparator 318 corresponding to hardware comparator 218. However, a processor 319 of host 302 runs software 320 corresponding to software 220 run by processor 219 of computing element 212 in system 200.

[0057] Host 302 and storage device 304 can communicate according to the protocols described above with respect to host 202 and storage device 204. In addition, components of host 302 and storage device 304 can communicate with each other according to the protocols described above with respect to host 202 and storage device 204.

[0058] In the example shown, host 302 sends a target value 326 to storage device 304. Controller 306 receives target value 326 and sends target value 326 to hardware circuitry 314. As described above with respect to Figure 2 target value 326 can be sent as part of a database query operation (e.g., a filter or scan request). Target value 326 corresponds to target data 324 (e.g., is a hash value or other value related thereto). The request can also identify data 310 (e.g., a page or other unit of data). Controller 306 sends target value 326 to hardware circuitry 314 for input into hardware comparator 318. As Figure 2 shown, host 302 can send target data 324 to controller 306 and target value 326 can be generated at value generator 316.

[0059] Further, the controller 306 retrieves data 310 from the storage medium 308 (e.g., based on a request from the host 302) and sends the data 310 to the value generator 316. Based on the data 310, the value generator 316 generates source values (e.g., hash values). The value generator 316 can generate a source value for each data element (e.g., each string) in the data 310. The hardware comparator 318 compares the source values to the target values 326 and generates a first indicator 317 based on the comparison. For example, the first indicator 317 can indicate whether the source values correspond to the target values 326, identify locations of each source data element in the data 310 that correspond to the target values 326, identify each source data element in the data 310 that corresponds to the target values 326, or a combination thereof.

[0060] The controller 306 sends the first indicator 317 and the data 310 to a software comparator 322 of the software 320 running at the processor 319 of the host 302. Based on the first indicator 317, the software comparator selectively compares the target data 324 to the data 310 and generates a result indicator 328 based on the comparison (or comparisons). As described above, the software comparator 322 can perform a comparison of each string in the data 310 to the target data 324 character by character, or can perform some other type of comparison operation to determine whether the target data 310 matches the target data 324. The result indicator 328 can indicate whether the data 310 corresponds to the target data 324.

[0061] Performing the comparison selectively at the software 320 based on the results from the hardware circuit 314 can reduce the number of comparisons that the software 320 performs to identify data that matches the target data 324. Further, performing the hardware comparison at the storage device 304 further reduces the total number of comparisons performed at the host. Accordingly, the computational load of an application running at the host (e.g., a database application performing a scan or filter operation) can be reduced.

[0062] Reference Figure 4FIG. 4, another system 400 for performing data comparisons is shown. In system 400, more than one storage device compares target data to source data stored at the storage devices. System 400 includes a host 402 and a storage arrangement 404. While depicted as a device, in some examples, storage arrangement 404 can correspond to a disaggregated system. Host 402 can correspond to host 202 or host 302. Storage arrangement 404 includes a first storage device 408 and a second storage device 410, as well as a system controller 406. First storage device 408 and second storage device 410 can include compute storage devices. System controller 406 can correspond to a standalone computing device, or to a processing device integrated into a server rack that includes first storage device 408 and second storage device 410. While only two storage devices are shown, storage arrangement 404 can include more than two storage devices. Storage devices 408, 410 can communicate with system controller 406 using NVMeoF, NFMe, PCIe, SAS, SATA, Ethernet, WiFi, another protocol, or a combination thereof. In some examples, storage devices 408, 410 are directly connected to system controller 406. In other examples, storage devices 408, 410 are indirectly connected to system controller 406 through a network (e.g., the Internet, a local area network, etc.).

[0063] While not shown, each of the storage devices includes hardware circuitry configured to perform a hardware comparison of the target values and the source values. Storage devices 408, 410 can have the same configuration as storage device 204 or storage device 304. These hardware circuitries can correspond to hardware circuitry 102, hardware circuitry 214, or hardware circuitry 314. In addition, storage devices 408, 410 include a processor that can correspond to processor 219.

[0064] In operation, host 402 sends target data 412 and corresponding target values 414 to system controller 406. Target data 412 and target values 414 can be sent as part of a query or request to compare target data 412 to specific source data (e.g., one or more specific database pages), and the source data can be stored across storage devices 408, 410. System controller 406 can identify locations of the source data across storage devices 408, 410, and send instructions to storage devices 408, 410 to access the data at these locations and generate result indicators (e.g., result indicators 228), as described with respect to FIG. 2 and FIG. 3. Figure 2The described. In the illustrated example, the first storage device 408 generates a first intermediate result indicator 416 and the second storage device 410 generates a second intermediate result indicator 418. The first intermediate result indicator 416 can correspond to the result indicator 228 generated by the first storage device 408 and the second intermediate result indicator 418 can correspond to the result indicator 228 generated by the second storage device 410. The system controller 406 aggregates the first intermediate result indicator 416 and the second intermediate result indicator 418 and generates a result indicator 420. The system controller 406 returns the result indicator 420 to the host 402. The result indicator 420 can include a translation of data locations in the first storage device 408 and the second storage device 410 to an address space identified by the host 402. Thus, results from multiple storage devices that perform selective software comparisons based on hardware comparisons can be combined. It should be noted that the system 400 can be modified to aggregate indicators output by hardware circuitry in a storage device, such as the storage device 304, to support selective comparisons of data stored across several storage devices at the host 402, as described with respect to the host 302 of Figure 3

[0065] Referring to Figure 5 , another system 500 for performing data comparisons is shown. In the system 500, data comparisons are performed at a storage device in response to requests from an application running at the storage device. The system 500 includes a storage device 504. The storage device 504 can generally have the same configuration as the storage device 204. Further, while not shown in Figure 5 , the storage device 504 can be connected to a host, such as the host 202, and / or included in a storage appliance, such as the storage appliance 404.

[0066] The storage device 504 includes a controller 506, a storage medium 508, and a computing element 512. These components can have similar configurations and functions as the controller 206, the storage medium 208, and the computing element 212, respectively. A hardware circuit 514 includes a value generator 516 and a hardware comparator 518, which can have similar configurations and functions as the value generator 216 and the hardware comparator 218, respectively. A processor 519 runs software 520, which includes a software comparator 522, and the software 520 and the software comparator 522 can correspond to the software 220 and the software comparator 222, respectively. Figure 2 ​software 220 and software comparator module 222. In addition, processor 519 runs a compute storage application 525. Compute storage application 525 can include a program loaded by the host into storage device 504 for near storage execution. It should be noted that storage device 504 can include additional compute elements in addition to those shown, and that software 520 and compute storage application 525 can run on different compute elements.

[0067] In operation, compute storage application 525 sends target values 526 corresponding to target data 524 to hardware circuit 514. In alternative embodiments, the compute storage application sends target data 524 to hardware circuit 514, and value generator 516 generates target values 526 based on target data 524 (e.g., by applying a hash function). Further, compute storage application 525 requests controller 506 to send data 510 stored in storage media 508 to hardware circuit 514. Value generator 516 generates source values based on data 510, and hardware comparator 518 compares the source values to target values 526. Hardware circuit outputs a first indicator 517 to software comparator 522 based on the comparison. First indicator 517 can indicate whether the source values match target values 526, identify any data elements of data 510 having corresponding values that match target values 526, identify any locations of data elements of data 510 having corresponding values that match target values 526, or a combination thereof.

[0068] Based on first indicator 517, software comparator 522 selectively compares data 510 to target data 524. For example, software comparator can compare data elements identified by first indicator 517 to target data 524. Based on this selective comparison, software comparator 522 outputs a result indicator 528 to compute storage application 525. Result indicator can identify whether data 510 matches target data 524, which data elements of data 510 match target data 524, locations of data elements of data 510 that match target data 524, or a combination thereof.

[0069] Accordingly, Figure 5 It is shown that a selective comparison of data can be performed at a storage device based on a request from an application originating from the storage device.

[0070] With reference to Figure 6FIG. 600, showing a diagram 600 that illustrates selective comparison in filtering and / or scanning operations in a database system. Diagram 600 includes a computing storage device 602 and software 604. The illustrated computing storage device 602 can correspond to hardware circuit 102, computing element 212, computing element 312, or computing element 512. The illustrated software 604 can correspond to data comparison software 106, software 220, software 320, or software 520.

[0071] In the illustrated example, column filter 606 receives tuples 608 from row filter. Each tuple can correspond to a row in a database. Each row can have several columns. Each column can include a string. The columns in a tuple can be separated by a delimiter, such as a semicolon, a comma, and the like. Column filter 606 is configured to extract each string (e.g., column) from a row (e.g., based on the delimiter location) and send the string to CRC 32 hash generator 610. CRC 32 hash generator 610 can correspond to value generator 216, value generator 316, or value generator 516. CRC 32 hash generator 610 is configured to output a 4-byte hash value 612 to hash comparison block (filter) 614 based on the input string. Hash comparison block 614 can correspond to hardware comparator 218, hardware comparator 318, or hardware comparator 518. Hash comparison block 614 compares the 4-byte hash value 612 of each string extracted from a row to a target hash value 616. Target hash value 616 can correspond to target value 108, target value 226, target value 326, or target value 526. In the illustrated implementation, target hash value 616 is a 4-byte hash value. Based on the comparison, hash comparison block 614 outputs a first binary mask 618 to indicate rows that include strings for which the 4-byte hash matches target hash value 616. For example, mask [0, 1, 1] can indicate that row 1 and row 2 include strings for which the 4-byte hash generated by CRC 32 hash generator 610 matches target hash value 616.

[0072] Combination block 622 combines first binary mask 618 with any other binary masks 624 from other filters to generate a second binary mask 626. For example, combination block 622 can include a plurality of AND gates configured to perform an AND operation on first binary mask 618 and other binary masks 624. For example, other binary masks 624 can include binary masks generated by the system shown in FIG. 600 in different iterations (e.g., other binary masks can correspond to first binary mask 618 or second binary mask 626 generated in different iterations of the process shown in FIG. 600). As another example, other binary masks 624 can include masks to select rows associated with a particular timestamp range (or timestamp), a particular device identifier, etc. One or more of the described masks can be combined into a single mask.

[0073] Picking block 628 receives 4-byte row identifiers 620 from column filters 606 of rows in a database. Based on second binary mask 626, picking block 628 selects row identifiers 630 (e.g., 4-byte row identifiers) of rows in the database that include a string corresponding to target hash value 616 (and that satisfy other binary masks 624 from any other filters), and sends row identifiers 630 to software 604. Row identifiers 630 can correspond to first indicator 112, first indicator 217, first indicator 317, or first indicator 517.

[0074] Software 604 receives row identifiers 630 and a database page 632. String extractor 634 extracts an actual string 636 stored in a row corresponding to row identifier 630 from database page 632. String comparison block 638 (e.g., a filter) receives actual string 636 and a target string 640. Target string 640 can correspond to target data 114, target data 224, target data 324, or target data 524. String comparison block 638 can correspond to data comparison software 106, software comparator module 222, software comparator 322, or software comparator 522. String comparison block 638 compares target string 640 to actual string 636. For example, string comparison block 638 can compare each character in target string 640 to each character in actual string 636. Alternatively, string comparison block 638 can perform a different type of comparison to identify actual string 636 that includes target string 640. String comparison block 638 outputs a third binary mask 642 indicating rows that include target string 640.

[0075] Combination block 644 combines (e.g., performs a logical AND operation on) the third binary mask 642 with other binary masks 646 from any other filters to generate a fourth binary mask 648. For example, the other binary masks 646 can include binary masks generated by the system shown in FIG. 600 in different iterations (e.g., the other binary masks can correspond to the third binary mask 642 or other binary masks 646 generated in different iterations of the process shown in FIG. 600). As another example, the other binary masks 646 can include masks to select rows associated with a particular timestamp range (or timestamp), a particular device identifier, etc. One or more of the described masks can be combined into a single mask. Pick block 650 then applies the fourth binary mask 648 to the actual strings 636 to identify output strings to send to database core 654. The output strings can correspond to result indicators 116, result indicators 228, result indicators 328, or result indicators 528. The database core can run on a host (e.g., host 202 or host 302) or at a storage device (e.g., as compute storage application 525).

[0076] Figure 7 FIG. 700 illustrates a specific example of the process depicted in FIG. 600. In FIG. 700, the CRC 32 hash generator generates [1234, 1111, 1234, 2222] as hash values 712 corresponding to the rows received in tuple 608. The format of the depicted hash values is [hash of row 1, hash of row 2, hash of row 3, hash of row 4]. While each row is shown as having a single hash value, it should be noted that each row can have a hash value for each column.

[0077] The target hash 716 received by hash comparison block 614 is 1234. Based on the comparison between hash values 712 and target hash 716, hash comparison block 614 outputs a first binary mask 718 [1, 0, 1, 0] to indicate that the hash values of row 1 and row 3 match the target hash 716.

[0078] Combination block 622 combines the first binary mask 718 with an additional binary mask 724 [1, 1, 1, 0] by performing a logical AND operation to generate a second binary mask 726 [1, 0, 1, 0]. Pick block 628 applies the second binary mask 726 to the vector of row identifiers 720 to output row identifiers 730 for row 1 and row 3. These row identifiers 730 are sent to software 604.

[0079] The string extractor 634 extracts strings 736 from the database page 632 based on the line identifiers 730. In the illustrated example, "mail" is extracted from line 1 and "ship" is extracted from line 3. The string comparison block 638 compares each of the strings 736 to the target string 740 ("mail") and determines that the first line includes the target string 740 and the third line does not. Accordingly, the string comparison block 638 generates a third mask 742 [1, 0]. The combination block 644 combines the third mask 742 with any other masks 746 to generate a fourth mask 748. The pick block 650 then applies the fourth mask 748 to the strings extracted by the string extractor 634 to output the result string 754 ("mail").

[0080] While Figure 6 and Figure 7 the specific examples illustrated in FIGS. 6 and 7 involve string filtering operations in a database, it should be noted that other types of data comparisons can also be supported in accordance with the present disclosure. For example, in some implementations, images can be compared. Moreover, data comparisons can be performed in other contexts.

[0081] Referring to Figure 8 , a method 800 of performing a data comparison is shown. The method 800 can be performed by a system that includes hardware circuitry and software running on a processor. For example, the method 800 can be performed by the system 100, the system 200, the system 300, the system 400, the system 500, the system illustrated in FIG. 6, or the system illustrated in FIG. 7.

[0082] The method 800 includes receiving, at 802, a target value corresponding to target data at hardware circuitry. For example, the hardware circuitry 102 can receive the target value 108 corresponding to the target data 114. In some implementations, the target value is a hash value or other value derived from the target data.

[0083] The method 800 also includes outputting, at 804, from the hardware circuitry, a first indicator indicating that source data corresponds to the target value. For example, the hardware circuitry can output the first indicator 112 indicating that the source data 110 corresponds to the target value 108. In particular, the first indicator 112 can identify a location of a particular data element (e.g., a string) that corresponds to the target value 108.

[0084] The method 800 also includes outputting, at 806, from software running at the device based on the first indicator, a result indicator indicating that the source data corresponds to the target data. For example, the data comparison software running at the processor 104 can perform a selective comparison of the target data 114 and the source data 110 based on the first indicator 112.

[0085] Performing comparisons in hardware based on results of comparisons performed in hardware can reduce the number of software comparisons performed while providing accurate and flexible results.

[0086] Referring to Figure 9 A method 900 for performing data comparisons is shown. The method 900 can be performed by a system that includes hardware circuitry and software running on a processor. For example, the method 900 can be performed by the system 100, the system 200, the system 300, the system 400, the system 500, the system shown in the diagram 600, or the system shown in the diagram 700.

[0087] The method 900 includes receiving row data from a database at a hardware circuit at 902. For example, the column filter 606 of the compute storage device 602 can receive tuples 608 (e.g., each tuple can correspond to a row) from a database. The tuples can be received in response to the compute storage device 602 receiving a command to perform a filter or scan operation on the database (or a particular portion of the database).

[0088] The method 900 also includes generating a hash value for each column in each row at 904. For example, the CRC 32 hash generator 610 can generate 4-byte hash values 612 based on each string (e.g., each column) in each row of the tuples 608.

[0089] The method 900 also includes comparing each hash value of the row to a target hash value at 906. For example, the hash comparison block 614 can compare the 4-byte hash values 612 to the target hash value 616 to identify hash values among the 4-byte hash values 612 that match the target hash value 616.

[0090] The method 900 also includes generating a first mask indicating any rows for which the column hash values match the target hash value at 908. For example, the hash comparison block 614 can output a first binary mask 618 indicating which rows include strings for which the hash values match the target hash value 616.

[0091] The method 900 also includes generating a first combined mask based on the first mask and any other filters at 910. For example, the combination block 622 can combine the first binary mask 618 with any other binary masks 624 to generate a second binary mask 626. The first binary mask 618 can be combined with the other binary masks 624 using an AND operation.

[0092] The method 900 also includes, at 912, generating filtered row data by filtering the row data based on the combined mask. For example, the pick-up block 628 can apply the second binary mask 626 to the tuples 608 to generate row identifiers 630 that identify rows in the database that have strings with hash values that match the target hash value 616 and that satisfy the other filters associated with the other binary masks 624.

[0093] The method 900 also includes, at 914, sending the filtered row data to the software module. For example, the compute storage device 602 can send the row identifiers 630 to the software 604.

[0094] The method 900 also includes, at 916, for each row in the filtered row data, using a string comparison to determine whether the target string exists in the row. For example, the string comparison block 638 can compare the actual strings 636 in each of the rows identified by the row identifiers 630 to the target string 640.

[0095] The method 900 also includes, at 918, generating a second mask that indicates any rows in which the target string exists. For example, the string comparison block 638 can output a third binary mask 642 based on the comparison of the actual strings 636 to the target string 640.

[0096] The method 900 also includes, at 920, generating a second combined mask based on the second mask and any other filters. For example, the combination block 644 can combine the third binary mask 642 with any additional binary masks 646 to generate a fourth binary mask 648.

[0097] The method 900 also includes, at 922, outputting the identified string based on the second combined mask. For example, the pick-up block 650 can output a masked output string from the actual strings 636 using the fourth binary mask 648 to output to the database core.

[0098] Accordingly, when scanning or filtering for a target string, the method 900 can selectively perform comparisons in software based on the output of a hardware comparison. Selectively using software comparisons based on the results of a hardware comparison can reduce the number of software comparisons performed while providing accuracy.

[0099] In some examples, X corresponds to Y based on X matching Y. For example, a first ID can be determined to correspond to a second ID that matches (e.g., has the same value as) the first ID. In other examples, X corresponds to Y based on X being associated with Y (e.g., X is linked to Y). For example, X can be associated with Y through a mapping data structure.

[0100] Certain embodiments can be implemented in one or more of hardware, firmware, and software. Other embodiments can also be implemented as instructions stored on a computer-readable storage device, which can be read and executed by at least one processor to perform the operations described herein. A computer- readable storage device can include any non-transitory storage medium, which can be read or otherwise accessed by a machine (e.g., a computer) to retrieve information stored on the medium. In various embodiments, computer-readable storage devices can include random access memory (RAM), read-only memory (ROM), magnetic disk storage media, optical storage media, flash memory devices, and other storage devices and media.

[0101] As used in this document, the term "communication" is intended to include both transmission, or reception, or both transmission and reception. This can be particularly useful when describing the organization of data sent by one device and received by another device, but only the functionality of one of these devices is claimed in the claims. Similarly, a two-way exchange of data between two devices (during which both devices both send and receive) can be described as a "communication," at which time the functionality of only one of these devices is claimed. The term "communication" as used herein with respect to a wireless communication signal includes transmitting the wireless communication signal and / or receiving the wireless communication signal. For example, a wireless communication unit capable of communicating a wireless communication signal can include a wireless transmitter for transmitting the wireless communication signal to at least one other wireless communication unit, and / or a wireless communication receiver for receiving the wireless communication signal from at least one other wireless communication unit.

[0102] Some embodiments can be used in conjunction with various devices and systems, for example, a Personal Computer (PC), a desktop computer, a mobile computer, a laptop computer, a notebook computer, a tablet computer, a server computer, a handheld computer, a handheld device, a Personal Digital Assistant (PDA) device, a handheld PDA device, a car device, a non-car device, a hybrid device, a vehicular device, a non-vehicular device, a mobile or portable device, a consumer device, a non-mobile or non-portable device, a wireless communication station, a wireless communication device, a wireless Access Point (AP), a wired or wireless router, a wired or wireless modem, a video device, an audio device, an audio-video (A / V) device, a wired or wireless network, a wireless area network, a Wireless Video Area Network (WVAN), a Local Area Network (LAN), a Wireless LAN (WLAN), a Personal Area Network (PAN), a Wireless PAN (WPAN), and the like.

[0103] Some embodiments can be used in conjunction with one or more types of wireless communication systems, for example, a Radio Frequency (RF), a Global Positioning System (GPS), a motion sensing system, a cellular telephone system, a cordless telephone system, a satellite communication system, a personal area network (PAN), a local area network (LAN), a personal area network (PAN), a body area network (BAN), a metropolitan area network (MAN), a wide area network (WAN), a wireless local area network (WLAN), a Wireless Area Network (WAN), a Wireless Video Area Network (WVAN), a Wireless LAN (WLAN) and the like.

[0104] Some embodiments can be used in conjunction with one or more types of wireless communication signals and / or systems that follow one or more wireless communication protocols, such as Radio Frequency (RF), Infrared (IR), Frequency-Division Multiplexing (FDM), Orthogonal FDM (OFDM), Time-Division Multiplexing (TDM), Time-Division Multiple Access (TDMA), Extended TDMA (E-TDMA), General Packet Radio Service (GPRS), Extended GPRS, Code-Division Multiple Access (CDMA), Wideband CDMA (WCDMA), CDMA 2000, Single-Carrier CDMA, Multi-Carrier CDMA, Multi-Carrier Modulation (MDM), Discrete Multi-Tone (DMT), and Bluetooth. TM Global Positioning System (GPS), Wi-Fi, Wi-Max, Purple Bee TM Ultra-Wideband (UWB), Global System for Mobile Communication (GSM), 2G, 2.5G, 3G, 3.5G, 4G, Fifth Generation (5G) mobile networks, 3GPP, Long Term Evolution (LTE), LTE Advanced, Enhanced Data Rates for GSM Evolution (EDGE), etc. Other embodiments can be used in a variety of other devices, systems, and / or networks.

[0105] Although an example processing system has been described above, embodiments of the subject matter and functional operation described herein may be implemented in other types of digital electronic circuits, or in computer software, firmware, or hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of them.

[0106] Embodiments of the subject matter and operations described herein can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the subject matter described herein can be implemented as one or more computer programs, i.e., one or more components of computer program instructions, encoded on a computer storage medium for execution by, or to control the operation of, information / data processing apparatus. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal that is generated to encode information / data for transmission to suitable receiver apparatus for execution by information / data processing apparatus. A computer storage medium can be, or be included in, a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination of one or more of them. Moreover, while a computer storage medium is not a propagated signal, a computer storage medium can be a source or destination of computer program instructions encoded in an artificially generated propagated signal. The computer storage medium can also be, or be included in, one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices).

[0107] The operations described herein can be implemented as operations performed by an information / data processing apparatus on information / data stored on one or more computer-readable storage devices or received from other sources.

[0108] The term“data processing apparatus” encompasses all kinds of apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, a system on a chip, or multiple ones of the same. The apparatus can include special purpose logic, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit). The apparatus can also include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or a combination of one or more of them. The apparatus and execution environment can realize various different computing model infrastructures, such as web services, distributed computing and grid computing infrastructures.

[0109] A computer program, which can also be referred to or referred to as a program, software, a software application, an app, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a component, subroutine, object, or other unit suitable for use in a computing environment. A computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or information / data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more components, sub programs, or portions of code). A computer program can be deployed to be run on one computer or on multiple computers that are located at one site or distributed across multiple sites and are interconnected by a communication network.

[0110] The processes and logic flows described herein can be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input information / data and generating output. Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and information / data from a read-only memory or a random access memory or both. The essential elements of a computer are a processor for performing actions in accordance with instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive information / data from or transfer information / data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer need not have such devices. Devices suitable for storing computer program instructions and information / data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0111] To provide for interaction with a user, embodiments of the subject matter described herein can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information / data to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback, e.g., visual feedback, auditory feedback, or tactile feedback; and input from the user can be received in any form, including acoustic, speech, or tactile input. In addition, a computer can interact with a user by sending documents to and receiving documents from a device that is used by the user; for example, by sending web pages to a web browser on a user’s client device in response to requests received from the web browser.

[0112] Embodiments of the subject matter described herein can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a client computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the subject matter described herein), or any combination of one or more such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital information / data communication (e.g., a communication network). Examples of communication networks include a local area network (“LAN”), a wide area network (“WAN”), the Internet (e.g., the Internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks).

[0113] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. In some embodiments, a server transmits information / data (e.g., an HTML page) to a client device (e.g., for purposes of displaying information / data to and receiving user input from a user interacting with the client device). Information / data generated at the client device (e.g., a result of the user interaction) can be received from the client device at the server.

[0114] While this specification contains many specific embodiments, these should not be construed as limiting the scope of any embodiments or of what can be claimed, but as merely describing features that can be significant to certain example embodiments. Certain features that are described in the context of separate embodiments can also be implemented in combination with each other. Conversely, various features that are described in the context of a single embodiment can also be implemented on other embodiments, alone or in any suitable subcombination. Moreover, although features can be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination and the claimed combination can be directed to a subcombination or variation of a subcombination.

[0115] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring this particular order or sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing can be advantageous. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0116] Accordingly, particular embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order or sequential order illustrated or other specific ordering in order to achieve the desired results. In certain embodiments, multitasking and parallel processing can be advantageous.

[0117] Many modifications and other embodiments of the present disclosure set forth herein will come to mind to one skilled in the art to which the disclosure pertains having the benefit of the teachings presented in the foregoing description and the associated drawings. Therefore, it is to be understood that the embodiments are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

[0118] The following statements describe examples in accordance with the present disclosure, however these statements do not limit the scope of the present disclosure.

[0119] Statement 1 : A disclosed method includes receiving, at hardware circuitry of a device, a target value corresponding to target data. The method also includes outputting, from the hardware circuitry, a first indicator indicating that source data corresponds to the target value. The method also includes outputting, from software running at the device, a result indicator indicating that the source data corresponds to the target data based on the first indicator.

[0120] Statement 2: The method of statement 1 can also include generating, at the hardware circuitry, a hash value based on the source data, wherein the first indicator is output based on the hash value corresponding to the target value.

[0121] Statement 3 : In any of the methods of statements 1 and 2, the result indicator can include a row identifier of the source data, a column address of the source data, or a combination thereof.

[0122] Statement 4: The method of any of statements 1-3 can also include selectively comparing, at the software, the source data and the target data based on the first indicator.

[0123] Statement 5 : In any of the methods of statements 1-4, the first indicator can include a row identifier of the source data in a database.

[0124] Statement 6: The method of statement 5 further includes selecting the row identifier based on a mask that is generated based on a combination of: a comparison of the target value to a value associated with the source data; and a second filter.

[0125] Statement 7 : In any of the methods of statements 1-6, the target data can be received at the hardware circuitry from a host device.

[0126] Statement 8 : In any of the methods of statements 1-6, the target data can be received at the hardware circuitry from an application running at the device.

[0127] Statement 9 : The method of any of statements 1-8 can also include comparing, at the hardware circuitry, a second value associated with second data to the target value, wherein the first indicator also indicates whether the second value corresponds to the target value.

[0128] Statement 10 : In any of the methods of statements 1-9, the device can include a compute storage device, and the hardware circuitry can include a field programmable gate array (FPGA).

[0129] Statement 11: A system can include hardware circuitry configured to receive a target value corresponding to target data and output a first indicator indicating that source data corresponds to the target value. The system can also include a processor running software configured to output, based on the first indicator, a result indicator indicating that the source data corresponds to the target data.

[0130] Statement 12: In the system of statement 11, the hardware circuitry can include a first sub-circuit configured to generate a hash value based on the source data and a second sub-circuit configured to output the first indicator based on a comparison of the hash value and the target value.

[0131] Statement 13: In the system of any of statements 11 and 12, the result indicator can include a row identifier of the source data, a column address of the source data, or a combination thereof.

[0132] Statement 14: In the system of any of statements 1-13, the hardware circuitry can be a component of a field programmable gate array (FPGA).

[0133] Statement 15: In the system of statement 14, the processor can be a component of the FPGA.

[0134] Statement 16: An apparatus can include a processor and hardware circuitry. The hardware circuitry can be configured to receive, from a compute storage application running at the processor, a target value corresponding to target data. The hardware circuitry can also be configured to output, to software running at the processor, a first indicator indicating that source data corresponds to the target value. The software can be configured to output, based on the first indicator, to the compute storage application, a result indicator indicating that the source data corresponds to the target data.

[0135] Statement 17: In the apparatus of statement 16, the hardware circuitry can include a first sub-circuit configured to generate a hash value based on the source data and a second sub-circuit configured to output the first indicator based on a comparison of the hash value and the target value.

[0136] Statement 18: In the apparatus of any of statements 16 and 17, the result indicator can include a row identifier of the source data, a column address of the source data, or a combination thereof.

[0137] Statement 19: In the apparatus of any of statements 16-18, the hardware circuitry can be a component of a field programmable gate array (FPGA).

[0138] Statement 20: In the apparatus of statement 20, the processor can be a component of the FPGA.

Claims

1. A method comprising: receiving, at a hardware circuit of a device, a target value corresponding to target data; receiving, at the hardware circuit, source data; generating, by the hardware circuit, a source value corresponding to the source data; comparing, by the hardware circuit, the source value to the target value for a first match; based on the first match, outputting, from the hardware circuit, a first indicator that the source data corresponds to the target value; and based on the output of the first indicator from the hardware circuit, comparing, by software running at the device, the source data to the target data for a second match; and outputting, from the software running at the device, a resulting indicator that the source data corresponds to the target data.

2. The method of claim 1, wherein, the generating comprises generating, at the hardware circuit, a hash value based on the source data, wherein the first indicator is output based on a hash value corresponding to the target value.

3. The method of claim 1, wherein, the resulting indicator comprises a row identifier of the source data, a column address of the source data, or a combination thereof.

4. The method of claim 1, further comprising: the source data and the target data are selectively compared at the software based on the first indicator.

5. The method of claim 1, wherein, the first indicator comprises a row identifier of the source data in a database.

6. The method of claim 5, further comprising: the row identifier is selected based on a mask, the mask being generated based on a combination of: a comparison of the target value and a value associated with the source data; and a second filter. the target data is received at the hardware circuit from a host device.

7. The method of claim 1, wherein, the target data is received at the hardware circuit from an application running at the device.

8. The method of claim 1, wherein, comparing, at the hardware circuit, a second value associated with second data to the target value, wherein the first indicator further indicates whether the second value corresponds to the target value.

9. The method of claim 1, further comprising: the device comprises a computing storage device, and the hardware circuit comprises a field programmable gate array (FPGA).

10. The method of claim 1, wherein, 11. A system comprising: a hardware circuit configured to: receive a target value corresponding to target data; receive source data; generate a source value corresponding to the source data; compare the source value to the target value for a first match; and based on the first match, output a first indicator that the source data corresponds to the target value; and a processor running software configured to: based on the output of the first indicator from the hardware circuit, compare the source data to the target data for a second match; and output a resulting indicator that the source data corresponds to the target data. the hardware circuit comprises:

12. The system of claim 11, wherein, a first sub-circuit configured to generate a hash value based on the source data, wherein the source data comprises the hash value; and a second sub-circuit configured to output a first indicator based on a comparison of the hash value to the target value. the resulting indicator comprises a row identifier of the source data, a column address of the source data, or a combination thereof.

13. The system of claim 11, wherein, the hardware circuit is a component of a field programmable gate array (FPGA).

14. The system of claim 11, wherein, the processor is a component of the FPGA.

15. The system of claim 14, wherein, 16. A device comprising: a processor; and a hardware circuit configured to: ​ ​ receiving a target value corresponding to target data from a compute storage application running at the processor; receiving source data; generating a source value corresponding to the source data; comparing the source value to the target value for a first match; and based on the first match, outputting a first indicator to software running at the processor that the source data corresponds to the target value, the software configured to compare the source data to the target data for a second match based on the output of the first indicator, and outputting a result indicator to the compute storage application that the source data corresponds to the target data.

17. The apparatus of claim 16, wherein, the hardware circuit comprises: a first sub-circuit configured to generate a hash value based on the source data, wherein the source data includes the hash value; and a second sub-circuit configured to output the first indicator based on a comparison of the hash value to the target value.

18. The apparatus of claim 16, wherein, the result indicator includes a row identifier of the source data, a column address of the source data, or a combination thereof.

19. The apparatus of claim 16, wherein, the hardware circuit is a component of a field programmable gate array (FPGA).

20. The apparatus of claim 19, wherein, the processor is a component of the FPGA. the processor is a component of the FPGA.

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