Pixel driving circuit and display panel

Abstract

The present application discloses a pixel driving circuit and display panel for controlling a light-emitting module, comprising: a first control module for providing a control signal during a light-emitting phase, the light-emitting module emitting light based on the control signal; a second control module connected to the first control module and configured to control the potential of a control terminal of the first control module during the light-emitting phase, thereby causing the first control module to provide the control signal; and a data line connected to the second control module and configured to transmit a first data signal and a second data signal; wherein the second control module controls the potential of the control terminal of the first control module based on the first data signal or the second data signal. The pixel driving circuit provided in the present application uses the first and second data signals transmitted via the data lines to enable the first control module to control the light-emitting module to emit light, thereby reducing circuit complexity, reducing the number of signals, and simplifying the layout of the pixel driving circuit.

Description

Technical Field

[0001] The present application relates to the field of liquid crystal display technology, and in particular to a pixel driving circuit and a display panel. Background Art

[0002] At present, the vast majority of existing mini LED direct display products use PAM (Pulse Amplitude Modulation) or PWM (Pulse Width Modulation) driving methods to drive the display. However, in the process of PWM driving the LED, due to the existence of a blanking area, the LED will flicker and other problems. At the same time, when PAM driving is used, there are problems of pitting and color deviation in the low-grayscale display. In order to improve the image quality, PHM (PAM+PWM) driving was created. Combining the characteristics of the two, PWM driving is used for low grayscale to increase the current flowing through the LED, and PAM driving is used for high grayscale to improve the flicker problem of the display panel. The current 4T1C, 4T2C, 7T2C, 8T3C and other PHM (Pulse Height Modulation) driving circuit structures are relatively complex, which increases the difficulty of routing and driving design, and the control logic is more complex due to the multiple signal types. Summary of the Invention

[0003] The present application provides a pixel driving circuit and a display panel to solve the technical problem in the prior art that the structure and signal types of the driving circuit are complex and diverse, which increases the difficulty of wiring and driving design.

[0004] In order to solve the above technical problems, the embodiments of the present application disclose the following technical solutions:

[0005] In a first aspect, a pixel driving circuit is provided for controlling a light-emitting module, comprising:

[0006] a first control module, the first control module being connected to the light-emitting module and configured to provide a control signal in a light-emitting stage, and the light-emitting module emits light based on the control signal;

[0007] a second control module, connected to the first control module, and configured to control the potential of the control terminal of the first control module during the light-emitting phase, so that the first control module provides the control signal;

[0008] a data line connected to the second control module, wherein the data line transmits a first data signal in response to a grayscale signal being greater than a preset grayscale threshold; and transmits a second data signal in response to the grayscale signal being less than the preset grayscale threshold;

[0009] The second control module controls the potential of the control end of the first control module according to the first data signal or the second data signal, and the light-emitting duration of the light-emitting module based on the first data signal is longer than the light-emitting duration of the light-emitting module based on the second data signal.

[0010] In combination with the first aspect, in a frame display period, the second data signal includes a first time period and a second time period;

[0011] In response to the second data signal being in the first time period, the second control module pulls up the potential of the control terminal of the first control module;

[0012] In response to the second data signal being in the second time period, the second control module pulls down the potential of the control terminal of the first control module.

[0013] In combination with the first aspect, a frame display period includes multiple subframes, and the first data signal includes a first high level, a second high level, a first low level and a second low level in each of the subframes, and the first low level is located between the first high level and the second high level; the first high level starts at the starting point of the subframe, and the second low level ends at the end point of the subframe.

[0014] In combination with the first aspect, the second data signal includes a third high level and a third low level in each subframe, the third high level starts at the start point of the subframe, and the third low level ends at the end point of the subframe.

[0015] In combination with the first aspect, the start and end time points of the third high level are the same as those of the first high level, the starting point of the third low level is the same as that of the first low level, and the end point of the third low level is the same as that of the second low level.

[0016] In combination with the first aspect, the duration of the first low level is not less than 7 μs.

[0017] In combination with the first aspect, the device further includes a maintaining module and a pull-down module, wherein two ends of the maintaining module are respectively connected to the control end and the output end of the first control module, and the pull-down module is connected to the output end of the first control module;

[0018] The control end of the second control module is connected to the first scan signal line, the control end of the pull-down module is connected to the second scan signal line, the first scan signal line transmits a first scan signal, and the second scan signal line transmits a second scan signal;

[0019] The timings of the first scanning signal and the second scanning signal are both the same as the timing of the first data signal.

[0020] In combination with the first aspect, the device further includes a selection module, the selection module is connected to the pull-down module, the selection module includes a first selection port and a second selection port, the first selection port is connected to the first drive signal line, and the second selection port is connected to the second drive signal line;

[0021] Wherein, the first driving signal line transmits a first driving signal, and the second driving signal line transmits a second driving signal;

[0022] In response to the second data signal being at a low level and the second scan signal being at a high level, the selection module is connected to the first driving signal line to obtain the first driving signal to refresh the sustaining module.

[0023] In combination with the first aspect, the grayscale signal includes any value from 0 to 255 grayscales, and the grayscale threshold includes any value from 16 to 128 grayscales.

[0024] In a second aspect, a display panel is provided, comprising the pixel driving circuit as described in any one of the first aspects.

[0025] One of the above technical solutions has the following advantages or beneficial effects:

[0026] Compared with the prior art, a pixel driving circuit of the present application is used to control a light-emitting module, including: a first control module, the first control module is connected to the light-emitting module, the first control module is used to provide a control signal during the light-emitting stage, and the light-emitting module emits light based on the first control signal; a second control module, the second control module is connected to the first control module, the second control module is used to control the potential of the control end of the first control module during the light-emitting stage so that the first control module provides the control signal; a data line, the data line is connected to the second control module, in response to a grayscale signal being greater than a preset grayscale threshold, the data line transmits a first data signal; in response to the grayscale signal being less than the preset grayscale threshold, the data line transmits a second data signal; wherein the second control module controls the potential of the control end of the first control module according to the first data signal or the second data signal, and the light-emitting duration of the light-emitting module based on the first data signal is greater than the light-emitting duration of the light-emitting module based on the second data signal. The pixel driving circuit provided in the present application can transmit the first data signal or the second data signal through the data line respectively under different grayscale signals, so that the first control module can control the light-emitting module to control the light-emitting duration of the sub-pixels with different grayscale signals, realizing the function of combining PAM and PWM, thereby reducing the complexity of the circuit, reducing the number of signal types, and making the layout of the pixel driving circuit more concise. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0028] Figure 1 A schematic diagram of module connections of a pixel driving circuit provided in an embodiment of the present application;

[0029] Figure 2 A schematic diagram showing the connection of pixel driving circuit elements provided in an embodiment of the present application;

[0030] Figure 3 A schematic diagram of the signal timing in a frame provided by an embodiment of the present application;

[0031] Figure 4 A connection diagram of the display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0033] The specific implementation of this application is described below through examples:

[0034] like Figure 1As shown, an embodiment of the present application provides a pixel driving circuit for controlling a light-emitting module, including: a first control module, the first control module is connected to the light-emitting module, the first control module is used to provide a control signal in the light-emitting stage, and the light-emitting module emits light based on the control signal; a second control module, the second control module is connected to the first control module, the second control module is used to control the potential of the control end of the first control module in the light-emitting stage, so that the first control module provides a control signal; a data line, the data line is connected to the second control module, in response to the grayscale signal being greater than a preset grayscale threshold, the data line transmits a first data signal; in response to the grayscale signal being less than a preset grayscale threshold, the data line transmits a second data signal; wherein, the second control module controls the potential of the control end of the first control module according to the first data signal or the second data signal, and the light-emitting duration of the light-emitting module based on the first data signal is greater than the light-emitting duration of the light-emitting module based on the second data signal. Specifically, as Figure 2 The figure shows a connection diagram of the pixel drive circuit components provided by the present application. The second control module includes a first transistor T1, the first control module includes a second transistor T2, and the light-emitting module includes a light-emitting unit. After the second transistor T2 is turned on, a control signal applied to the second transistor T2 acts on one end of the light-emitting unit, causing the light-emitting unit to begin emitting light under the control signal. The control end of the second transistor T2 is connected to the output end of the first transistor T1, so the on and off states of the second transistor T2 are controlled by the output of the first transistor T1. The output of the first transistor T1 includes a first data signal PAM_data and a second data signal PWM_data transmitted by the data line Data. The first data signal and the second data signal respectively pull up the potential of the control end of the second transistor T2, thereby controlling the second transistor T2 to have different on-times. By controlling the on-time of the second transistor T2, the light-emitting time of the light-emitting unit is controlled. Therefore, the pixel drive circuit provided by the present application reduces circuit complexity and the number of signal types, simplifying the layout of the pixel drive circuit while achieving light emission of the light-emitting unit.

[0035] like Figure 1 and Figure 2As shown, in an embodiment of the present application, the data line Data outputs a first data signal and a second data signal based on the grayscale signal and a preset grayscale threshold value; when the grayscale signal is greater than the preset grayscale threshold value, the data line Data outputs the first data signal; when the grayscale signal is less than or equal to the preset grayscale threshold value, the data line Data outputs the second data signal. Specifically, the timing controller compares the grayscale of the display frame image with the preset grayscale threshold value. When the grayscale value of the display frame image is greater than the grayscale threshold value, the timing controller controls the driver chip to output the first data signal, and when the grayscale value of the display frame image is less than or equal to the grayscale threshold value, the timing controller controls the driver chip to output the second data signal. It should be noted that the first data signal and the second data signal are both data signals. The grayscale threshold value is used to divide the display frame image into high and low grayscales. It can be understood that the display frame image greater than the grayscale threshold is defined as high grayscale, while the display frame image less than or equal to the grayscale threshold is defined as low grayscale. By defining high and low grayscales and generating a first data signal and a second data signal according to the high and low grayscales, respectively, the luminous duration of sub-pixels of different high and low grayscales can be controlled, thereby realizing the function of combining PAM and PWM, further avoiding the problems of color deviation and pitting in the display panel during the high and low grayscale display process, thereby simplifying the pixel driving circuit while improving the display effect of the display panel.

[0036] like Figure 1 and Figure 2 As shown, in an embodiment of the present application, during a frame display cycle, the second data signal includes a first time period and a second time period; in response to the second data signal being in the first time period, the second control module pulls up the potential of the control terminal of the first control module; in response to the second data signal being in the second time period, the second control module pulls down the potential of the control terminal of the first control module. Specifically, the potential of the control terminal of the first control module is turned on when it is pulled high, and is turned off when it is pulled low. After the second control module transmits the high-level first data signal to the control terminal of the first control module, it can pull up the potential of the control terminal of the first control module, thereby turning on the first control module and then transmitting the control signal to the light-emitting module, causing the light-emitting module to emit light; and the second data signal includes a low level. When the second control module is turned on, the second control module transmits the low-level signal in the second data signal to the control terminal of the first control module, thereby pulling down the potential of the control terminal of the first control module. By controlling the high and low levels of the first and second data signals, the light-emitting time of the light-emitting module can be better controlled, thereby preventing color shift and pitting when the display panel displays low-grayscale display frames.

[0037] like Figure 1 and Figure 3As shown, in an embodiment of the present application, a plurality of subframes are included in a frame display cycle, and the first data signal includes a first high level, a second high level, a first low level, and a second low level in each subframe, and the first low level is located between the first high level and the second high level; the first high level starts at the starting point of the subframe, and the second low level ends at the end point of the subframe, and the duration of the first low level is not less than 7μs. The second data signal includes a third high level and a third low level in each subframe, and the third high level starts at the starting point of the subframe, and the third low level ends at the end point of the subframe. The start and end time points of the third high level and the first high level are the same, the starting point of the third low level is the same as the starting point of the first low level, and the end point of the third low level is the same as the end point of the second low level. Wherein, as Figure 3 The signal timing diagram shown in the figure uses a 120Hz video signal as an example. A complete video signal frame period is divided into 12 subframes. Each subframe lasts the same duration. In the figure, PAM_data represents the first data signal, and PWM_data represents the second data signal. The first data signal PAM_data in each subframe sequentially includes a first high level, a first low level, a second high level, and a second low level. The starting point of the first high level coincides with the starting point of each frame, and the first and second high levels have equal magnitudes and durations, ensuring that the potential level and duration of the control terminal of the first control module are the same. The starting point, magnitude, and duration of the third high level in the second data signal PWM_data are the same as those of the first high level. The third high level can raise the potential of the control terminal of the first control module, while the third low level in the second data signal can lower the potential of the control terminal of the first control module, thereby controlling the display time of the display panel at low grayscales. It should be noted that in other embodiments of the present application, the duration of the first low level includes any value greater than 7μs, including: one of 7.1μs, 7.2μs, 7.3μs, 7.4μs, 7.5μs, 7.6μs, 7.7μs, 7.8μs, 7.9μs, 8.0μs, 8.1μs, 8.2μs, 8.3μs, 8.4μs, 8.5μs, 8.6μs, 8.7μs, 8.8μs, 8.9μs, and 9.0μs.

[0038] In the embodiment of the present application, the grayscale signal includes any value in the grayscale range of 0 to 255, and the grayscale threshold includes any value in the grayscale range of 16 to 128. It is understandable that any color in the display image can be obtained by controlling the proportion of the three colors of red, green and blue, and the proportion of the three colors of red, green and blue can be divided into grayscale values ​​of 0 to 255. Therefore, by setting different values ​​of the three pigments red (R), green (G) and blue (B), the various colors of the display image can be changed. The driving voltage required for different grayscale values ​​is different, so the brightness required for high grayscale is high, so the voltage is high, while the brightness of low grayscale is low and the voltage is low. Therefore, by dividing high and low grayscales, different driving methods can be adopted at different grayscales, thereby improving the color cast and pitting of the display image at low grayscale. It should be noted that the grayscale threshold includes any value of 16, 17, 18, 19, 20, 22, 25, 28, 30, 32, 35, 36, 38, 40, 42, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 100, 105, 110, 115, 120, 125, and 128. It should be noted that the grayscale threshold may also include other values ​​among the above-mentioned values, and the specific value of the grayscale threshold may be confirmed according to actual conditions.

[0039] like Figure 1 and Figure 2 As shown, in an embodiment of the present application, a holding module and a pull-down module are further included. The two ends of the holding module are respectively connected to the control terminal and the output terminal of the first control module. The holding module is used to maintain the potential of the control terminal of the first control module; the pull-down module is connected to the output terminal of the first control module, and the pull-down module is used to pull down the potential of the output terminal of the first control module. Specifically, the holding module includes a capacitor Cst, and the pull-down module includes a third transistor T3. The connection between the output terminal of the first transistor T1 and the control terminal of the second transistor T2 is point G, and the connection between the output terminal of the second transistor T2 and the forward direction of the light-emitting unit is point S. The first end of the capacitor Cst is connected to point G, the second end of the capacitor Cst is connected to point S, and the output end of the third transistor T3 is also connected to point S. When the first data signal enters a low level, the potential of point G will be pulled down. At this time, the charge stored in the capacitor Cst can temporarily maintain the potential of point G in a pulled-up state. Similarly, when the second data signal enters a low level, the charge stored in the capacitor Cst can also temporarily maintain the potential of point G in a pulled-up state. The main function of the third transistor T3 is to pull down and reset the potential of point S. This ensures that the charge amount in the capacitor Cst is sufficient to raise the potential of the G point, thereby ensuring that the second transistor T2 can be temporarily turned on and control the light-emitting module to emit light.

[0040] like Figure 1 、 Figure 2 and Figure 3 As shown, in the embodiment of the present application, the control end of the second control module is connected to the first scan signal line, the control end of the pull-down module is connected to the second scan signal line, the first scan signal line transmits the first scan signal Scan1, the first scan signal Scan1 is used to control the on and off of the second control module, the second scan signal line transmits the second scan signal Scan3, the second scan signal Scan3 is used to control the on and off of the second control module. Specifically, as Figure 3 As shown, the first scan signal Scan1 and the second scan signal Scan3 have the same timing, and both the first scan signal Scan1 and the second scan signal Scan3 include multiple rows. The first scan signal Scan1 and the second scan signal Scan3 in the next row are delayed by a certain time compared to the previous row. In the same subframe, the first scan signal Scan1 or the second scan signal Scan3 includes two high-level signals and two low-level signals. The low-level signal between the two high-level signals lasts for 7.2μs. At the same time, both high-level signals last for 7μs, and the other low-level signal covers the remaining time. The first scan signal Scan1 drives and controls the control terminal of the first transistor T1, which can input the first data signal and the second data signal to point G. Similarly, the second scan signal Scan3 drives and controls the control terminal of the third transistor T3, which can pull down and reset the potential at point S. This controls the second transistor T2 to drive the light-emitting unit to emit light, thereby improving the effect of the display panel at high and low grayscale levels.

[0041] like Figure 1 and Figure 2 As shown, in an embodiment of the present application, the input end of the first control module is connected to a first level signal line, the light-emitting module is connected to the output end of the first control module, and the light-emitting module is connected to a second level signal line. The first level signal line transmits a first level signal VDD, and the second level signal line transmits a second level signal VSS. When the first control module is turned on, the first level signal VDD and the second level signal VSS act on the two ends of the light-emitting module, respectively, to cause the light-emitting module to emit light. Specifically, the positive end of the light-emitting unit is connected to the output end of the second transistor T2, and the negative end is connected to the second level signal line to obtain the second level signal VSS. When the second transistor T2 is turned on, the first level signal VDD acts on the positive end of the light-emitting unit through the second transistor T2. Under the combined action of the first level signal VDD and the second level signal VSS, the light-emitting unit can emit light.

[0042] like Figure 1 and Figure 2As shown, in an embodiment of the present application, a selection module is further included, which is connected to the pull-down module. The selection module includes a first selection port SW1 and a second selection port SW2, wherein the first selection port is connected to the first drive signal line and the second selection port is connected to the second drive signal line; wherein the first drive signal line transmits the first drive signal Vref and the second drive signal line transmits the second drive signal ADC. Specifically, the selection module includes a selection switch, wherein the first selection port SW1 is the first switch and the second selection port SW2 is the second switch, and the two switches are respectively connected to the first drive signal line and the second drive signal line to obtain the first drive signal Vref and the second drive signal ADC respectively. Therefore, by selecting the first selection port SW1 and the second selection port SW2, the first drive signal Vref and the second drive signal ADC can be connected to the input terminal of the third transistor T3 respectively, thereby controlling the signal at the input terminal of the third transistor T3. The first drive signal Vref is a reference voltage, which is generally a high-level signal, so the first drive signal Vref is used to reset the potential of point S, while the second drive signal ADC is generally a low-level signal, so the second drive signal ADC is used to lower the potential of point S. According to the different functions required by the pixel driving circuit, the first driving signal Vref and the second driving signal ADC are controlled to control the potential of point S, thereby realizing the pull-down and reset functions of the potential of point S, and further controlling the charging of the capacitor Cst and the pull-down of the potential.

[0043] In the embodiment of the present application, according to Figure 3 The signal timing diagram of a frame of the picture shown in the figure shows the specific driving process of the pixel driving circuit at high and low grayscales:

[0044] At high grayscale (for example, if the grayscale threshold is 32, grayscales between 32 and 255 are considered high grayscale): The first data signal PAM_data is used for driving, and the first scan signal Scan1 and the third scan signal Scan3 are high. The first data signal PAM_data is written to the control terminal of the second transistor T2, i.e., point G. When the second transistor T2 is turned on, the first-level signal VDD charges the pixel unit, and the pixel unit emits light under the combined action of the first-level signal VDD and the second-level signal VSS. The first scan signal Scan1 and the third scan signal Scan3 then go low, and the voltage at point G is maintained by the capacitor Cst. However, the charge in capacitor Cst gradually leaks due to leakage current, necessitating continuous resetting and refreshing by the third transistor T3. Subsequently, the first scan signal Scan1 and the third scan signal Scan3 go high again, and the first data signal PAM_data is again written to point G. Therefore, at this grayscale signal, the total charging time for the light-emitting unit within a frame of video data is 8326 μs. The amplitude of the first data signal PAM_data varies for different high grayscales.

[0045] At low grayscale (for example, if the grayscale threshold is 32, 0-32 is low grayscale): under the condition of being driven by the second data signal PWM_data, in the first subframe, the first scan signal Scan1 and the third scan signal Scan3 are high, the second data signal PWM_data is written into the control terminal of the second transistor T2, that is, point G, the second transistor T2 is turned on, and the first level signal VDD charges the pixel unit, and the pixel unit emits light under the joint action of the first level signal VDD and the second level signal VSS; thereafter, the first scan signal Scan1 and the third scan signal Scan3 enter a low level, and the voltage at point G is maintained by the capacitor Cst. After 7.2μs, the first scan signal Scan1 and the third scan signal Scan3 are high again, and the low-level second data signal PWM_data is written into the control terminal of the second transistor T2, the potential at point G is pulled low, the second transistor T2 is turned off, and the charging of the light-emitting unit is completed; the charging time of the light-emitting unit in a subframe is 7.2μs, and the charging time of the 2nd to 12th subframes thereafter is the same as that of the 1st subframe, so the total charging time of the light-emitting unit is 7.2*12=86.4μs; therefore, it can be concluded that the low grayscale charging time is 1 / 97 of the high grayscale charging time. According to the gamma2.2 brightness calculation formula, it can be known that the brightness of the low grayscale is 1 / 8 times that of the high grayscale. Therefore, the low grayscale can call 8 times the original first data signal PAM_data to achieve the same brightness (for example, 1 grayscale calls the first data signal PAM_data of 8 grayscales, and so on, 32 grayscales can call the first data signal PAM_data of 256 grayscales). By calling, the low grayscale can call the voltage data of the high grayscale, thereby increasing the current of the light-emitting unit at low grayscale, overcoming the problem of poor light efficiency uniformity caused by too small current of the light-emitting unit at low grayscale. At the same time, dividing a frame into 12 subframes also increases the refresh rate, which can reach 2880Hz under ideal conditions, avoiding the flicker problem caused by PWM adjustment.

[0046] like Figure 4 As shown, an embodiment of the present application further provides a display panel, which includes a pixel driving circuit as provided in any one of the above embodiments.

[0047] The above is a detailed introduction to a pixel driving circuit and a display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A pixel driving circuit for controlling a light emitting module, characterized in that: include: a first control module, the first control module being connected to the light-emitting module and configured to provide a control signal in a light-emitting stage, and the light-emitting module emits light based on the control signal; a second control module, connected to the first control module, and configured to control the potential of the control terminal of the first control module during the light-emitting phase, so that the first control module provides the control signal; a data line connected to the second control module, wherein the data line transmits a first data signal in response to a grayscale signal being greater than a preset grayscale threshold; and transmits a second data signal in response to the grayscale signal being less than the preset grayscale threshold; The second control module controls the potential of the control terminal of the first control module according to the first data signal or the second data signal, and the light-emitting duration of the light-emitting module based on the first data signal is greater than the light-emitting duration of the light-emitting module based on the second data signal; A frame display cycle includes multiple subframes, and the first data signal includes a first high level, a second high level, a first low level and a second low level in each of the subframes, and the first low level is between the first high level and the second high level; the first high level starts at the starting point of the subframe, and the second low level ends at the end point of the subframe.

2. The pixel driving circuit according to claim 1, wherein: In one frame display period, the second data signal includes a first time period and a second time period; In response to the second data signal being in the first time period, the second control module pulls up the potential of the control terminal of the first control module; In response to the second data signal being in the second time period, the second control module pulls down the potential of the control terminal of the first control module.

3. The pixel driving circuit according to claim 1, wherein: The second data signal includes a third high level and a third low level in each subframe, the third high level starts at the start point of the subframe, and the third low level ends at the end point of the subframe.

4. The pixel driving circuit according to claim 3, wherein: The start and end time points of the third high level are the same as those of the first high level, the starting point of the third low level is the same as that of the first low level, and the end point of the third low level is the same as that of the second low level.

5. The pixel driving circuit according to claim 1, wherein: The duration of the first low level is not less than 7 μs.

6. The pixel driving circuit according to claim 1, wherein: It also includes a maintaining module and a pull-down module, wherein two ends of the maintaining module are respectively connected to the control end and the output end of the first control module, and the pull-down module is connected to the output end of the first control module; The control end of the second control module is connected to the first scan signal line, the control end of the pull-down module is connected to the second scan signal line, the first scan signal line transmits a first scan signal, and the second scan signal line transmits a second scan signal; The timings of the first scanning signal and the second scanning signal are both the same as the timing of the first data signal.

7. The pixel driving circuit according to claim 6, wherein: The invention also includes a selection module, the selection module is connected to the pull-down module, the selection module includes a first selection port and a second selection port, the first selection port is connected to the first drive signal line, and the second selection port is connected to the second drive signal line; Wherein, the first driving signal line transmits a first driving signal, and the second driving signal line transmits a second driving signal; In response to the second data signal being at a low level and the second scan signal being at a high level, the selection module is connected to the first driving signal line to obtain the first driving signal to refresh the sustaining module.

8. The pixel driving circuit according to claim 1, wherein: The grayscale signal includes any value from 0 to 255 grayscales, and the grayscale threshold includes any value from 16 to 128 grayscales.

9. A display panel, characterized in that: The display panel includes the pixel driving circuit according to any one of claims 1 to 8.

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