Display panel

By arranging the first power line and the second power line in the display panel and placing their input ends close to the corners of the substrate, combined with the spaced arrangement of the connecting lines, the problem of uneven brightness of the display panel is solved and the display effect is improved.

CN117525106BActive Publication Date: 2025-09-16TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202310631342.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-05-31
Publication Date
2025-09-16
Estimated Expiration
2043-05-31

AI Technical Summary

Technical Problem

The existing circuit substrates that combine MLED and TFT have large differences in VDD and VSS trace distances, resulting in large voltage differences between different pixels in the display panel, affecting the display brightness uniformity and display quality.

Method used

By arranging the first power line and the second power line in the display panel and placing their input ends close to the same corner of the substrate, combined with the spaced arrangement of multiple connection lines, the resistance and capacitance loads of each pixel unit are balanced, thereby balancing the display brightness.

Benefits of technology

The uniformity of brightness in each area of ​​the display panel is achieved, which improves the display effect.

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Abstract

The present application discloses a display panel comprising a substrate, the substrate comprising a first region and a second region located around the first region, the substrate comprising multiple corners; a plurality of pixel units disposed on the substrate and arranged in an array within the first region; a first power line disposed on the substrate and located in the second region, the first power line extending along a first direction; a plurality of first connecting lines disposed on the substrate, the plurality of first connecting lines connected to the first power line, each first connecting line electrically connected to a column of pixel units; a second power line disposed on the substrate and located in the second region; a plurality of second connecting lines disposed on the substrate, the second connecting lines connected to the second power line, each second connecting line electrically connected to a row of pixel units; the input ends of the first power lines and the input ends of the second power lines both being close to the same corner. The present application can improve the uniformity of display brightness of the display panel, thereby improving the display effect of the display panel.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] Currently, circuit substrates that combine MLED and TFT generally use 2T1C and 3T1C circuit structures. Since the input point of the VDD line and the input point of the VSS line of the same pixel are far apart, the RCLoading (resistance-capacitance load) of the VDD line and the RCLoading of the VSS line of the same pixel are quite different. As a result, the voltage difference between VDD and VSS of different pixels in the display panel is quite different, resulting in poor uniformity of the overall display brightness of the display panel, affecting the display effect. Summary of the Invention

[0003] The embodiments of the present application provide a display panel that can enhance the uniformity of display brightness of the display panel, thereby improving the display effect of the display panel.

[0004] An embodiment of the present application provides a display panel, comprising:

[0005] a substrate, the substrate comprising a first region and a second region located around the first region, the substrate comprising a plurality of corners, the plurality of corners being located on a side of the second region away from the first region;

[0006] A plurality of pixel units, wherein the plurality of pixel units are provided on the substrate and arranged in an array in the first area;

[0007] a first power line, the first power line being provided on the substrate and located in the second area, the first power line extending along a first direction;

[0008] a plurality of first connection lines, the plurality of first connection lines being disposed on the substrate and spaced apart along the first direction, the plurality of first connection lines being connected to the first power line and extending to the first region, and one first connection line being electrically connected to a column of the pixel units;

[0009] a second power line, the second power line being provided on the substrate and located in the second region, the second power line extending along a second direction perpendicular to the first direction; and

[0010] a plurality of second connection lines, the plurality of second connection lines being provided on the substrate and spaced apart along the second direction and insulated from the plurality of first connection lines, the second connection lines being connected to the second power lines and extending to the first region, and each second connection line being connected to a row of the pixel units;

[0011] The input end of the first power line and the input end of the second power line are both close to the same corner.

[0012] Optionally, in some embodiments of the present application, the distance between the intersection between the extension line of the first power line and the extension line of the second power line and the input end of the first power line is equal to the distance between the intersection and the input end of the second power line.

[0013] Optionally, in some embodiments of the present application, the cross-sectional area of ​​the first power line is equal to the cross-sectional area of ​​the second power line.

[0014] Optionally, in some embodiments of the present application, the display panel includes at least two first power lines, and the two first power lines are connected and stacked.

[0015] Optionally, in some embodiments of the present application, the first power line is provided with a plurality of first hollow holes, and the plurality of first hollow holes are sequentially arranged along an extension direction of the first power line;

[0016] The display panel further includes a first adhesive layer, and the first adhesive layer is disposed in the plurality of first hollow holes.

[0017] Optionally, in some embodiments of the present application, the display panel includes at least two second power lines, and the two second power lines are connected and stacked.

[0018] Optionally, in some embodiments of the present application, the second power cord is provided with a plurality of second hollow holes, and the plurality of second hollow holes are sequentially arranged along an extension direction of the second power cord;

[0019] The display panel further includes a second adhesive layer, and the second adhesive layer is disposed in the plurality of second hollow holes.

[0020] Optionally, in some embodiments of the present application, the display panel further includes a first collecting line, the first collecting line being provided on the substrate and located in the second area, and connected to ends of the plurality of first connecting lines away from the first power line;

[0021] And / or, the display panel further includes a second collecting line, which is provided on the substrate and located in the second area, and is connected to ends of the plurality of second connecting lines away from the second power line.

[0022] Optionally, in some embodiments of the present application, the display panel further includes a first collecting line, the first collecting line being provided on the substrate and located in the second area, and connected to ends of the plurality of first connecting lines away from the first power line;

[0023] And / or, the display panel further includes a second collecting line, which is provided on the substrate and located in the second area, and is connected to ends of the plurality of second connecting lines away from the second power line.

[0024] Optionally, in some embodiments of the present application, in the second direction, the length of the second subsegment is greater than the length of the fifth subsegment.

[0025] The display panel provided by the embodiment of the present application includes a substrate, a plurality of pixel units, a first power line, a plurality of first connection lines, a second power line and a plurality of second connection lines. By making the plurality of first connection lines spaced apart along the first direction and the plurality of second connection lines spaced apart along the second direction respectively connected to the plurality of pixel units arranged in the array, and at the same time making the input end of the first power line connected to the plurality of first connection lines and the input end of the second power line connected to the plurality of second connection lines close to the same corner of the substrate. Therefore, the resistance and capacitance load of the same pixel unit in the first power line and the first connection line and the resistance and capacitance load of the second power line and the second connection line can be similar, thereby balancing the voltage difference between the first power line and the second power line of each pixel unit, so that the display brightness of different pixel units is similar, thereby balancing the display brightness of the display panel. The technical solution of the embodiment of the present invention balances the display brightness of each area of ​​the display panel by setting the routing mode of the first power line, the second power line, the plurality of first connection lines and the plurality of second connection lines, which helps to improve the problem of uneven display brightness of the existing display panel and improve the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a schematic diagram of a display panel provided in one embodiment of the present application;

[0027] Figure 2 is a schematic diagram of the structure of a first power supply line stacked in a display panel provided by the present application;

[0028] Figure 3 It is a schematic diagram of the structure of the second power supply line of the stacked arrangement of the display panel provided by the present application. DETAILED DESCRIPTION

[0029] In this application, unless otherwise specified, directional words such as "upper" and "lower" generally refer to the upper and lower parts of the display panel in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the display panel.

[0030] Reference Figure 1One embodiment of the present application provides a display panel 100, which includes a substrate 10, a plurality of pixel units 20, a first power line 30, a plurality of first connection lines 40, a second power line 50, and a plurality of second connection lines 60. The substrate 10 includes a first region 11 and a second region 12 located around the first region 11. The substrate 10 includes a plurality of corners 13, and a plurality of the corners 13 are located on a side of the second region 12 away from the first region 11. The plurality of pixel units 20 are provided on the substrate 10 and arranged in an array within the first region 11. The first power line 30 is provided on the substrate 10 and located in the second region 12. The first power line 30 extends along a first direction. Multiple first connecting lines 40 are provided on the substrate 10 and arranged at intervals along the first direction. Multiple first connecting lines 40 are connected to the first power line 30 and extend to the first region 11. One first connecting line 40 is electrically connected to a column of pixel units 20. A second power line 50 is provided on the substrate 10 and located in the second region 12. The second power line 50 extends along a second direction, which is perpendicular to the first direction. Multiple second connecting lines 60 are provided on the substrate 10 and arranged at intervals along the second direction. They are insulated from the multiple first connecting lines 40. The second connecting lines 60 are connected to the second power lines 50 and extend to the first region 11. One second connecting line 60 is connected to a row of pixel units 20. The input ends of the first power lines 30 and the second power lines 50 are both located near the same corner 13.

[0031] The display panel 100 provided in an embodiment of the present application includes a substrate 10, a plurality of pixel units 20, a first power line 30, a plurality of first connection lines 40, a second power line 50, and a plurality of second connection lines 60. The plurality of first connection lines 40 spaced apart along a first direction and the plurality of second connection lines 60 spaced apart along a second direction are respectively connected to the plurality of pixel units 20 arranged in an array, and the input ends of the first power lines 30 connected to the plurality of first connection lines 40 and the input ends of the second power lines 50 connected to the plurality of second connection lines 60 are both located near the same corner 13 of the substrate 10. Through the above wiring layout, the resistive and capacitive loads of the same pixel unit 20 on the first power line 30 and the first connection line 40 and the resistive and capacitive loads on the second power line 50 and the second connection line 60 are similar, thereby balancing the voltage difference between the first power line 30 and the second power line 50 of each pixel unit 20, making the display brightness of different pixel units 20 similar, and thus balancing the display brightness of the display panel 100. The technical solution of the embodiment of the present invention achieves balancing the display brightness of each area of ​​the display panel 100 by setting a first power line 30, a second power line 50, multiple first connection lines 40 and multiple second connection lines 60, which helps to improve the problem of uneven display brightness of the existing display panel 100 and enhance the display effect of the display panel 100.

[0032] The first power line 30 provides a constant first voltage signal, such as a VDD voltage signal, to each pixel unit 20, and the second power line 50 provides a constant second voltage signal, such as a VSS voltage signal, to each sub-pixel unit 20. Of course, the first power line 30 may provide a VSS voltage signal, and the second power line 50 may provide a VDD voltage signal.

[0033] The substrate 10 can be a glass substrate. The glass substrate is made of a uniform material, has high transparency and low reflectivity, and has good thermal stability, so that its properties can remain stable after multiple high-temperature processes. Since many chemicals are used in the TFT manufacturing process, the glass substrate must have excellent chemical resistance. The glass substrate also needs to have sufficient mechanical strength, good precision machining properties, and excellent electrical insulation properties. The pixel unit 20 may include a light-emitting device, which includes a first electrode and a second electrode. The first electrode is one of a positive electrode and a negative electrode, and the second electrode is the other of a positive electrode and a negative electrode. The first electrode is electrically connected to the first connecting line 40, and the second electrode is electrically connected to the second connecting line 60. The light-emitting device can be a Mini-LED (submillimeter light-emitting diode) or a Micro-LED (micro light-emitting diode), which can provide higher resolution and thus enhance the display effect. In addition, the cross-sectional area of ​​the first connecting line 40 is equal to the cross-sectional area of ​​the second connecting line 60, so that the resistance and capacitance load of the first connecting line 40 and the resistance and capacitance load of the second connecting line 60 are similar. The spacing distance between two adjacent first connection lines 40 is equal to the spacing distance between two adjacent second connection lines 60. This further ensures that the RC load of the voltage signal from the first power line 30 passing through the first power line 30 and the first connection line 40 and the RC load of the voltage signal from the second power line 50 passing through the second power line 50 and the second connection line 60 in the same pixel unit 20 are similar.

[0034] Optionally, the cross-sectional area of ​​the first power line 30 is equal to the cross-sectional area of ​​the second power line 50. Since the cross-sectional area of ​​the power line affects the resistance value of the power line, by making the cross-sectional area of ​​the first power line 30 equal to the cross-sectional area of ​​the second power line 50, the RC load of the same pixel unit 20 on the first power line 30 and the first connecting line 40 and the RC load on the second power line 50 and the second connecting line 60 are further made similar.

[0035] Optionally, the distance between the intersection of the extension line of the first power line 30 and the extension line of the second power line 50 and the input end of the first power line 30 is equal to the distance between the intersection and the input end of the second power line 50. As shown in the figure, the intersection between the extension line of the first power line 30 and the extension line of the second power line 50 is located in the upper left of the figure, and the input end of the first power line 30 and the input end of the second power line 50 are equal to each other. In this way, when the cross-sections of the first power line 30, the first connecting line 40, the second power line 50, and the second connecting line 60 are equal, the resistive and capacitive loads of the same pixel unit 20 on the first power line 30 and the first connecting line 40 and the resistive and capacitive loads on the second power line 50 and the second connecting line 60 are equal.

[0036] Optionally, the display panel 100 further includes a first collecting line 70, which is provided on the substrate 10 and located in the second region 12, and is connected to ends of the plurality of first connecting lines 40 that are away from the first power line 30. The first collecting line 70 is connected to the plurality of first connecting lines 40 to collect the voltages of the first connecting lines 40, thereby distributing the resistive and capacitive loads of the plurality of first connecting lines 40, thereby further reducing the impact of the resistive and capacitive loads of the first connecting lines 40 on the pixel units 20.

[0037] Optionally, the display panel 100 further includes a second collecting line 80, which is provided on the substrate 10 and located in the second region 12, and is connected to ends of the plurality of second connecting lines 60 that are away from the second power line 50. The second collecting line 80 is connected to the plurality of second connecting lines 60 to collect the voltages of the respective second connecting lines 60, thereby distributing the resistive and capacitive loads of the plurality of second connecting lines 60, thereby further reducing the impact of the resistive and capacitive loads of the second connecting lines 60 on the pixel units 20.

[0038] Optionally, the first power line 30 includes a first sub-segment 31 and a second sub-segment 32, the first sub-segment 31 extends along the first direction, a plurality of first connecting lines 40 are connected to the first sub-segment 31, the second sub-segment 32 is bent and connected to the first sub-segment 31 and extends along the second direction, the end of the first sub-segment 31 away from the second sub-segment 32 is the input end of the first power line 30, and the end of the second sub-segment 32 away from the first sub-segment 31 is the output end of the first power line 30; the second power line 50 includes a third sub-segment 51, a first sub-segment 52, a second sub-segment 53, a second sub-segment 54, a second sub-segment 55, a second sub-segment 56, a second sub-segment 57, a second sub-segment 58, a second sub-segment 59, a second sub-segment 51, a second sub-segment 51, a second sub-segment 52 The fourth subsegment 52 and the fifth subsegment 53 are arranged such that the third subsegment 51 extends along the second direction, a plurality of second connecting lines 60 are connected to the third subsegment 51, the fourth subsegment 52 is bent and connected to the third subsegment 51 and extends along the first direction, and the fifth subsegment 53 is bent and connected to the end of the fourth subsegment 52 away from the third subsegment 51. The end of the third subsegment 51 facing away from the fourth subsegment 52 serves as the input end of the second power line 50, and the end of the fifth subsegment 53 facing away from the fourth subsegment 52 serves as the output end of the second power line 50. The fifth subsegment 53 and the second subsegment 32 are located on the same side of the first area.

[0039] The above arrangement allows the first power line 30 and the second power line 50 to be arranged circumferentially around the first zone, making the overall arrangement more compact. The output end of the first power line 30 and the output end of the second power line 50 are also located on the same side of the first zone, facilitating subsequent connections.

[0040] Furthermore, in the second direction, the length of the second sub-segment 32 is greater than the length of the fifth sub-segment 53. The first power line 30 passes through two sides of the first area, and the second power line 50 passes through three sides of the first area. To avoid a significant difference between the overall RC load of the first power line 30 and the overall RC load of the second power line 50, the length of the second sub-segment 32 is greater than the length of the fifth sub-segment 53 in the second direction. That is, they are located on the same side of the first area, increasing the length of the first power line 30 relative to the second power line 50, thereby increasing the RC load of the first power line 30 and thereby reducing the difference between the overall RC load of the first power line 30 and the overall RC load of the second power line 50.

[0041] Combined with reference Figure 1 and Figure 2 Optionally, the display panel 100 includes at least two first power lines 30, which are connected and stacked. To further reduce the RC load, the number of first power lines 30 can be increased, and multiple first power lines 30 can be stacked. This increases the current flow area to reduce resistance, thereby reducing the RC load and further reducing the impact of the RC load of the first power lines 30 on the display effect.

[0042] Furthermore, the first power line 30 is provided with a plurality of first hollow holes 33 , which are arranged in sequence along the extension direction of the first power line 30 . The display panel 100 also includes a first adhesive layer 90 a , which is provided in the plurality of first hollow holes 33 .

[0043] Among them, the shapes of the first hollow holes 33 arranged in sequence along the extension direction of the first power cord 30 can be the same pattern or different patterns. It is preferred to set a hollow pattern with the same pattern, which can facilitate the preparation of the first power cord 30. The shapes of the multiple first hollow holes 33 include any one or more of a triangle, a quadrilateral, a hexagon, a circle, and an ellipse. By providing the first hollow holes 33, the weight of the first power cord 30 stacked as a whole can be reduced. At the same time, by arranging the first adhesive layer 90a in the first hollow holes 33, the thickness of the stacked first power cord 30 is avoided from being too thick, which causes the first power cord 30 to be easily peeled off, thereby improving the stability of the stacked first power cord 30. The material of the first adhesive layer 90a can be a metal adhesive.

[0044] Combined with reference Figure 1 and Figure 3Optionally, the display panel 100 includes at least two second power lines 50, which are connected and stacked. To further reduce the RC load, the number of second power lines 50 can be increased, and multiple second power lines 50 can be stacked. This increases the current flow area to reduce resistance, thereby reducing the RC load and further reducing the impact of the RC load of the second power lines 50 on the display effect.

[0045] Furthermore, the second power cord 50 is provided with a plurality of second hollow holes 54, which are arranged sequentially along the extension direction of the second power cord 50. The display panel 100 also includes a second adhesive layer 90b, which is disposed within the plurality of second hollow holes 54. The second hollow holes 54 arranged sequentially along the extension direction of the second power cord 50 can have the same or different patterns. A consistent hollow pattern is preferred to facilitate the fabrication of the second power cord 50. The plurality of second hollow holes 54 can have any one or more shapes including triangles, quadrilaterals, hexagons, circles, and ovals. The second hollow holes 54 can reduce the weight of the stacked second power cords 50. Furthermore, the second adhesive layer 90b located within the second hollow holes 54 prevents the stacked second power cords 50 from becoming too thick, which could easily cause them to peel off, thereby improving the stability of the stacked second power cords 50. The second adhesive layer 90b can be made of a metal adhesive.

[0046] The above describes the specific embodiments of the present application in detail. The above specific embodiments disclosed in this specification are merely preferred embodiments of the present application and are not intended to limit the scope of the present application. Those skilled in the art will appreciate that many variations and improvements can be made without departing from the spirit of the present application. Such variations and improvements fall within the scope of protection defined by the claims of the present application.

Claims

1. A display panel, characterized in that: include: a substrate, the substrate comprising a first region and a second region located around the first region, the substrate comprising a plurality of corners, the plurality of corners being located on a side of the second region away from the first region; A plurality of pixel units, wherein the plurality of pixel units are provided on the substrate and arranged in an array in the first area; a first power line, the first power line being provided on the substrate and located in the second area, the first power line extending along a first direction; a plurality of first connection lines, the plurality of first connection lines being disposed on the substrate and spaced apart along the first direction, the plurality of first connection lines being connected to the first power line and extending to the first region, and one first connection line being electrically connected to a column of the pixel units; a second power line, the second power line being provided on the substrate and located in the second region, the second power line extending along a second direction perpendicular to the first direction; as well as a plurality of second connection lines, the plurality of second connection lines being provided on the substrate and spaced apart along the second direction and insulated from the plurality of first connection lines, the second connection lines being connected to the second power lines and extending to the first region, and each second connection line being connected to a row of the pixel units; The input end of the first power line and the input end of the second power line are both close to the same corner.

2. The display panel according to claim 1, wherein A distance between an intersection of an extension line of the first power line and an extension line of the second power line and an input end of the first power line is equal to a distance between the intersection and the input end of the second power line.

3. The display panel according to claim 1, wherein The cross-sectional area of ​​the first power line is equal to the cross-sectional area of ​​the second power line.

4. The display panel according to claim 1, wherein: The display panel includes at least two first power lines, and the two first power lines are connected and stacked.

5. The display panel according to claim 4, wherein: The first power line is provided with a plurality of first hollow holes, and the plurality of first hollow holes are arranged in sequence along the extension direction of the first power line; The display panel further includes a first adhesive layer, and the first adhesive layer is disposed in the plurality of first hollow holes.

6. The display panel according to claim 1, wherein: The display panel includes at least two second power lines, and the two second power lines are connected and stacked.

7. The display panel according to claim 6, wherein: The second power line is provided with a plurality of second hollow holes, and the plurality of second hollow holes are arranged in sequence along the extension direction of the second power line; The display panel further includes a second adhesive layer, and the second adhesive layer is disposed in the plurality of second hollow holes.

8. The display panel according to claim 1, wherein: The display panel further includes a first collecting line, which is provided on the substrate and located in the second area, and is connected to ends of the plurality of first connecting lines away from the first power line; And / or, the display panel further includes a second collecting line, which is provided on the substrate and located in the second area, and is connected to ends of the plurality of second connecting lines away from the second power line.

9. The display panel according to claim 1, wherein: The first power line includes a first sub-segment and a second sub-segment, the first sub-segment extends along the first direction, a plurality of first connecting lines are connected to the first sub-segment, the second sub-segment is bent and connected to the first sub-segment and extends along the second direction, an end of the first sub-segment facing away from the second sub-segment is an input end of the first power line, and an end of the second sub-segment facing away from the first sub-segment is an output end of the first power line; The second power line includes a third sub-segment, a fourth sub-segment, and a fifth sub-segment. The third sub-segment extends along the second direction. A plurality of second connecting lines are connected to the third sub-segment. The fourth sub-segment is bent and connected to the third sub-segment and extends along the first direction. The fifth sub-segment is bent and connected to an end of the fourth sub-segment away from the third sub-segment. An end of the third sub-segment facing away from the fourth sub-segment serves as an input end of the second power line. An end of the fifth sub-segment facing away from the fourth sub-segment serves as an output end of the second power line. The fifth sub-segment and the second sub-segment are located on the same side of the first region.

10. The display panel according to claim 9, wherein: In the second direction, the length of the second subsegment is greater than the length of the fifth subsegment.

Citation Information

Patent Citations

  • Display panel and display device

    CN115425052A

  • Display panel and display device

    CN215868587U