A CMP polishing liquid for polysilicon gate structure and preparation method thereof
By using alkaline rate accelerator and ammonium salt rate regulator in CMP polishing liquid, the removal rate selection ratio of polycrystalline silicon, silicon dioxide and silicon nitride is adjusted, and the balance problem between the polycrystalline silicon removal rate and the removal rate of silicon dioxide and silicon nitride is solved, efficient polycrystalline silicon planarization is achieved and metal ion contamination is avoided.
Patent Information
- Application Number
- CN202311470871.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-07
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2043-11-07
AI Technical Summary
While ensuring the removal rate of polycrystalline silicon, it is necessary to suppress the removal rate of silicon dioxide and silicon nitride, prevent chemical mechanical polishing equipment from malfunctioning and damage the protective layer, and not introduce contamination of metal ions.
By adding an appropriate amount of alkaline rate accelerator to the CMP polishing liquid or using the alkaline rate accelerator with an ammonium salt rate regulator, the removal rate selection ratio of silicon dioxide and silicon nitride is adjusted to improve the removal rate of polycrystalline silicon.
It realizes the removal rate of polycrystalline silicon without affecting the removal rate of silicon dioxide and silicon nitride, and avoids metal ion contamination. It is suitable for advanced process chemical mechanical planarization of polycrystalline silicon gate.
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Figure CN117567940B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of CMP polishing, and in particular to a CMP polishing liquid for a polysilicon gate structure and a preparation method thereof. Background Art
[0002] With the rapid development of integrated circuit technology, the size of semiconductor devices continues to shrink. When the field effect transistor channel is shortened to 22nm, the traditional planar field effect (Metal Oxide Semiconductor, MOS) transistor can no longer effectively control the current due to the short channel effect, thus producing a three-dimensional fin field effect transistor (FinField-Effect Transistor, FinFET) device.
[0003] The transition from planar CMOS transistor design to FinFET transistors has resulted in a new CMP process in virtual gate polysilicon films. In planar transistors, the deposited polysilicon film has a flat surface morphology and does not require chemical mechanical polishing (CMP); however, in FinFET design, the surface morphology of the same deposited film is uneven and must be flattened before gate etching. Whether it is a traditional bulk silicon FinFET device or a new SOI FinFET device, the CMP process includes selectively flattening the polysilicon layer on silicon dioxide and silicon nitride films. Therefore, it is critical to achieve controllable polysilicon CMP removal rate and high polysilicon removal rate selectivity to silicon dioxide and silicon nitride. In this process, higher requirements are placed on the chemical mechanical polishing liquid. The present invention is specifically optimized for the processing characteristics of the polysilicon gate structure, which is conducive to obtaining a good flattening effect. Summary of the invention
[0004] The technical problem to be solved by the present invention is: while ensuring the removal rate of polysilicon, the removal rates of silicon dioxide and silicon nitride must be suppressed to prevent the protective layer from being damaged when the chemical mechanical polishing equipment fails, and a CMP polishing liquid for a polysilicon gate structure and a preparation method thereof are provided. The present invention can adjust the rate selection ratio of silicon dioxide and silicon nitride, and can improve the removal rate of polysilicon without introducing metal ion pollution under the premise of having little effect on the removal rates of silicon dioxide and silicon nitride, and is suitable for chemical mechanical planarization of polysilicon gates in advanced processes.
[0005] In order to achieve the above objectives, the present invention is implemented by the following technical solutions:
[0006] A CMP polishing liquid for a polysilicon gate structure, comprising the following components in parts by weight: 100 parts of silica sol, 3-6 parts of an alkaline rate accelerator, 0.5-2 parts of a surfactant, 0.5-2 parts of a pH regulator, 0-0.8 parts of an ammonium salt rate regulator, 0.1-0.5 parts of a bactericide, and 90 parts of deionized water;
[0007] The pH value of the CMP polishing liquid is at least 8;
[0008] The alkaline rate accelerator is selected from at least one of 1,3-diazolyl, anhydrous piperazine, triethylenetetramine, pyridine, tetramethylguanidine, ethylenediamine, monoethanolamine, diethanolamine, triethanolamine, and diethylenetriamine.
[0009] Preferably, the alkaline rate accelerator is prepared by mixing one of 1,3-diazolyl, triethylenetetramine, pyridine, tetramethylguanidine, ethylenediamine, diethylenetriamine and anhydrous piperazine in a mass ratio of 3:2.
[0010] Furthermore, the CMP polishing liquid comprises the following ingredients in parts by weight: 100 parts of silica sol, 5 parts of alkaline rate accelerator, 1 part of surfactant, 0.6 parts of pH regulator, 0-0.6 parts of ammonium salt rate regulator, 0.4 parts, and 90 parts of deionized water; the pH value of the CMP polishing liquid is between 9-11.
[0011] Furthermore, the ammonium salt rate regulator is selected from one or more of ammonium chloride, ammonium sulfate, ammonium tartrate, ammonium carbonate, and triammonium citrate.
[0012] Furthermore, the surfactant is selected from one or more of dodecyldimethylamine oxide, polyvinyl pyrrolidone, potassium dodecyl sulfate, ammonium dodecylbenzenesulfonate, ammonium dodecyl sulfate, fatty alcohol polyoxyethylene ether, alkyl alcohol phthalamide, fatty ammonium polyoxyethylene ether, alkylphenol polyoxyethylene ether, polyethylene glycol, glycerol, and fatty alcohol polyoxyethylene ether ammonium sulfate.
[0013] Furthermore, the pH adjuster is a pH adjuster including one or more of hydrochloric acid, nitric acid, sulfuric acid, citric acid, lactic acid, potassium hydroxide, ammonia water, and tetramethylammonium hydroxide (TMAH); the bactericide is one or more of 1,2-benzisothiazolin-3-one, 2-methyl-4-isothiazolin-3-one, 2-methyl-5-chloro-4-isothiazolin-3-one, dodecyldimethylbenzyl ammonium chloride, and isothiazolinone.
[0014] Furthermore, the particle size of silicon dioxide in the silica sol is 40-80 nm, the pH value of the silica sol is between 8-11, the viscosity of the silica sol is 1.4-2.1 mPa·s, and the dispersion degree is 1-1.02.
[0015] The method for preparing the CMP polishing liquid for polysilicon gate structure comprises the following steps: adding an alkaline rate accelerator, a surfactant, a bactericide, and a pH regulator into deionized water, and uniformly mixing the materials at a speed of 300-1000 rpm at room temperature to form a premixed liquid;
[0016] The silica sol is stirred at a rotation speed of 50-200 rpm, the premixed liquid is added to the silica sol, the adding speed of the premixed liquid is controlled at 4-6 g / s, the pH value of the system is detected after mixing evenly, and the pH value of the system is adjusted to meet the requirements, so as to obtain a CMP polishing liquid for a polysilicon gate structure;
[0017] When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
[0018] Beneficial technical effects:
[0019] The present invention can adjust the rate selection ratio by adding an appropriate amount of alkaline rate accelerator or using the alkaline rate accelerator in combination with an ammonium salt rate regulator. It can improve the removal rate of polysilicon without introducing metal ion pollution under the premise of having little influence on the removal rate of silicon dioxide and silicon nitride, and is suitable for chemical mechanical planarization of polysilicon gates in advanced processes.
[0020] The polishing liquid of the present invention can effectively reduce the surface corrosion generated during chemical mechanical polishing of polysilicon through the synergistic effect of components and reasonable proportions, obtain a surface morphology with good roughness, and meet the fine processing requirements of the microelectronics industry under advanced process conditions. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 The AFM image of the surface morphology of a polysilicon gate structure wafer after polishing with the CMP polishing liquid of Example 1;
[0022] Figure 2 The surface morphology AFM image of a polysilicon gate structure wafer after polishing using the CMP polishing liquid of Example 2;
[0023] Figure 3 The surface morphology AFM image of a polysilicon gate structure wafer after polishing using the CMP polishing liquid of Example 3;
[0024] Figure 4 The AFM image of the surface morphology of a polysilicon gate structure wafer after polishing with the CMP polishing liquid of Example 4;
[0025] Figure 5 The AFM image of the surface morphology after the polysilicon gate structure wafer is polished using the CMP polishing liquid of Comparative Example 1;
[0026] Figure 6 The AFM image of the surface morphology after the polysilicon gate structure wafer is polished using the CMP polishing liquid of Comparative Example 2;
[0027] Figure 7 The CMP flow chart of the polysilicon gate structure, where (A) is the deposition of Si on the Fin channel on the BOX device 3 N 4 Or SiO 2 ; (B) is the deposition of polysilicon (Poly-Si) on the entire surface; (C) is the CMP of the excess polysilicon. DETAILED DESCRIPTION
[0028] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention and the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. All other embodiments obtained by ordinary technicians in this field without creative work based on the embodiments of the present invention are within the scope of protection of the present invention.
[0029] Unless otherwise specifically stated, the numerical value set forth in these embodiments does not limit the scope of the present invention. The technology and method known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology and method should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values.
[0030] The experimental methods in the following examples without specifying specific conditions are usually measured according to national standards; if there is no corresponding national standard, it is carried out according to the general international standards or the standard requirements proposed by relevant enterprises. Unless otherwise specified, all parts are by weight and all percentages are by weight.
[0031] Example 1
[0032] A CMP polishing liquid for a polysilicon gate structure comprises the following components in parts by weight: 500 g of silica sol (silicon dioxide particle size 400 nm, viscosity 1.4-2.1 mPa·s, dispersion 1-1.02), alkaline rate accelerator: 15 g of ethylenediamine (EDA), 10 g of anhydrous piperazine (PIZ), surfactant: 5 g of fatty alcohol polyoxyethylene ether (AEO-9), pH regulator: 3 g of tetramethylammonium hydroxide (TMAH), 0 g of ammonium salt rate regulator, bactericide: 2 g of dodecyl dimethyl benzyl ammonium chloride (ddbac), and 450 g of deionized water;
[0033] Preparation method of the above CMP polishing liquid:
[0034] Add an alkaline rate accelerator, a surfactant, a bactericide, and a pH adjuster into deionized water, and mix the materials at room temperature at a speed of 400 rpm to form a premix;
[0035] The silica sol is slowly stirred at a rotation speed of 100 rpm, and the premixed liquid is added to the silica sol. The adding speed of the premixed liquid is controlled at 5.5 g / s. After mixing evenly, the pH value of the system is detected, and the pH value of the system is adjusted to be between 9 and 11 (i.e., about 10), so as to obtain a CMP polishing liquid for a polysilicon gate structure;
[0036] When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
[0037] Example 2
[0038] A CMP polishing liquid for a polysilicon gate structure, comprising the following components in parts by weight: 500 g of silica sol (silicon dioxide particle size 400 nm, viscosity 1.4-2.1 mPa·s, dispersion 1-1.02), alkaline rate accelerator: 15 g of 1,3-diazolyl (IMZ), 10 g of anhydrous piperazine (PIZ), surfactant: 5 g of fatty alcohol polyoxyethylene ether (AEO-9), pH regulator: 3 g of tetramethylammonium hydroxide (TMAH), 0 g of ammonium salt rate regulator, bactericide: 2 g of dodecyl dimethyl benzyl ammonium chloride (ddbac), and 450 g of deionized water;
[0039] Preparation method of the above CMP polishing liquid:
[0040] Add an alkaline rate accelerator, a surfactant, a bactericide, and a pH adjuster into deionized water, and mix the above materials at a speed of 500 rpm at room temperature to form a premix;
[0041] The silica sol is slowly stirred at a rotation speed of 100 rpm, and the premixed liquid is added to the silica sol. The adding speed of the premixed liquid is controlled at 5.5 g / s. After mixing evenly, the pH value of the system is detected, and the pH value of the system is adjusted to be between 9 and 11 (i.e., about 10), so as to obtain a CMP polishing liquid for a polysilicon gate structure;
[0042] When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
[0043] Example 3
[0044] A CMP polishing liquid for a polysilicon gate structure comprises the following components in parts by weight: 500 g of silica sol (silicon dioxide particle size 400 nm, viscosity 1.4-2.1 mPa·s, dispersion 1-1.02), an alkaline rate accelerator: 15 g of triethylenetetramine (TETA), 10 g of anhydrous piperazine (PIZ), a surfactant: 5 g of polyethylene glycol (PEG2000), a pH regulator: 6 g of tetramethylammonium hydroxide (TMAH), an ammonium salt rate regulator: 3 g of ammonium sulfate (SA), a bactericide: 2 g of dodecyl dimethyl benzyl ammonium chloride (ddbac), and 450 g of deionized water;
[0045] Preparation method of the above CMP polishing liquid:
[0046] Add an alkaline rate accelerator, a surfactant, a bactericide, and a pH adjuster into deionized water, and mix the above materials at room temperature at a speed of 600 rpm to form a premix;
[0047] The silica sol is slowly stirred at a rotation speed of 100 rpm, and the premixed liquid is added to the silica sol. The adding speed of the premixed liquid is controlled at 5.5 g / s. After mixing evenly, the pH value of the system is detected, and the pH value of the system is adjusted to be between 9 and 11 (i.e., about 10), so as to obtain a CMP polishing liquid for a polysilicon gate structure;
[0048] When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
[0049] Example 4
[0050] A CMP polishing liquid for a polysilicon gate structure comprises the following components in parts by weight: 500 g of silica sol (silicon dioxide particle size 400 nm, viscosity 1.4-2.1 mPa·s, dispersion 1-1.02), alkaline rate accelerator: 15 g of pyridine (Py), 10 g of anhydrous piperazine (PIZ), surfactant: 5 g of polyethylene glycol (PEG2000), pH regulator: 6 g of tetramethylammonium hydroxide (TMAH), ammonium salt rate regulator: 3 g of ammonium sulfate (SA), bactericide: 2 g of dodecyl dimethyl benzyl ammonium chloride (ddbac), and 450 g of deionized water;
[0051] Preparation method of the above CMP polishing liquid:
[0052] Add an alkaline rate accelerator, a surfactant, a bactericide, and a pH adjuster into deionized water, and mix the above materials at a speed of 700 rpm at room temperature to form a premix;
[0053] The silica sol is slowly stirred at a rotation speed of 100 rpm, and the premixed liquid is added to the silica sol. The adding speed of the premixed liquid is controlled at 5.5 g / s. After mixing evenly, the pH value of the system is detected, and the pH value of the system is adjusted to be between 9 and 11 (i.e., about 10), so as to obtain a CMP polishing liquid for a polysilicon gate structure;
[0054] When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
[0055] Comparative Example 1
[0056] This comparative example is compared with Example 1.
[0057] A CMP polishing liquid for a polysilicon gate structure, comprising the following components in parts by weight: silica sol (silicon dioxide particle size 400nm, viscosity 1.4-2.1mm 2 / s, dispersion degree 1-1.02) 500g, alkaline rate accelerator: ethylenediamine (EDA) 10g, anhydrous piperazine (PIZ) 20g, surfactant: fatty alcohol polyoxyethylene ether (AEO-9) 5g, pH regulator: tetramethylammonium hydroxide (TMAH) 8g, ammonium salt rate regulator 0g, bactericide: dodecyl dimethyl benzyl ammonium chloride (ddbac) 2g, deionized water 450g;
[0058] The preparation method of the above CMP polishing liquid is the same as that in Example 1.
[0059] Comparative Example 2
[0060] This comparative example is compared with Example 4.
[0061] A CMP polishing liquid for a polysilicon gate structure, comprising the following components in parts by weight: silica sol (silicon dioxide particle size 400nm, viscosity 1.4-2.1mm 2 / s, dispersion degree 1-1.02) 500g, alkaline rate accelerator: pyridine (Py) 20g, anhydrous piperazine (PIZ) 10g, surfactant: polyethylene glycol (PEG2000) 5g, pH regulator: tetramethylammonium hydroxide (TMAH) 9g, ammonium salt rate regulator 3g, bactericide: dodecyl dimethyl benzyl ammonium chloride (ddbac) 2g, deionized water 450g;
[0062] The preparation method of the above CMP polishing liquid is the same as that in Example 1.
[0063] The material consumption in the above cases is shown in Table 1, and the material types used in each case are shown in Table 2.
[0064] Table 1 Material usage in each case
[0065]
[0066] Table 2 Material types in each case
[0067]
[0068]
[0069] Test example
[0070] The CMP polishing liquids in the above cases were diluted and mixed with deionized water at a mass ratio of 1:10, and then polished on different materials.
[0071] The polishing parameters are as follows: IC1000 polishing pad, A165P dresser, polishing pressure 1.5psi, polishing disc speed / polishing head speed = 60 / 60rpm, polishing liquid flow rate 250ml / min, respectively for polycrystalline silicon wafers and SiO 2 Sheet and Si 3 N 4 Polishing of polysilicon wafers, SiO 2 Sheet and Si 3 N 4 The thickness difference before and after polishing is the corresponding material removal rate, and the polishing time is fixed at 60s.
[0072] The CMP flow chart of the polysilicon gate structure is shown in Figure 7, in which the excess polysilicon layer (poly-Si) structure ( Figure 7 In (B) of FIG. 1 , CMP is performed to expose the silicon oxide layer (SiO 2 ) or silicon nitride layer (Si 3 N 4) until global flattening ( Figure 7 (A) Figure), the CMP parameters are the same as above, and the surface roughness of the polysilicon gate structure after CMP in each embodiment is shown in Figure 1. Figures 1 to 6 , specific data are shown in Table 3.
[0073] Table 3 Removal rate and surface quality of different materials in each case
[0074]
[0075] As shown in Table 3, the removal rates of polysilicon by the polishing liquids of Examples 1-4 were all high, reaching For SiO 2 and Si 3 N 4 The removal rate is less than The removal rate selectivity of polysilicon to the two is higher than 920:1, and the surface roughness Sq reaches less than 0.25nm. Comparative Example 1 Compared with Example 1, the alkaline rate accelerator is EDA and PIZ prepared in a mass ratio of 1:2, but the dosage is increased to 30g. Although the removal rate of polysilicon is improved, the removal rate of SiO 2 and Si 3 N 4 The removal rate also increased (reaching The removal rate selectivity of polysilicon to the two decreased to less than 700:1, and the selectivity decreased. Comparative Example 2 Compared with Example 4, the alkaline rate accelerator is prepared with Py and PIZ according to the mass ratio of 2:1, but the dosage is increased to 30g, the removal rate of polysilicon is slightly decreased, SiO 2 and Si 3 N 4 The removal rate increased slightly, and the overall polysilicon removal rate selectivity ratio for the two decreased, and the selectivity decreased. It can be seen that only when the alkaline rate accelerator is combined with the coordination of other materials in the polishing liquid under the appropriate composition and ratio can polysilicon be used to remove SiO 2 、Si 3 N 4 The removal rate selectivity ratios are all at a high level, and the effect of lower polysilicon surface roughness is obtained.
[0076] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. A CMP polishing liquid for a polysilicon gate structure, characterized in that: The composition comprises the following components in parts by weight: 100 parts of silica sol, 3-6 parts of alkaline rate accelerator, 0.5-2 parts of surfactant, 0.5-2 parts of pH regulator, 0-0.8 parts of ammonium salt rate regulator, 0.1-0.5 parts of bactericide, and 90 parts of deionized water; the pH value of the CMP polishing liquid is between 9 and 11; The alkaline rate accelerator is prepared by mixing one of 1,3-diazolyl, triethylenetetramine, pyridine, tetramethylguanidine, ethylenediamine, and diethylenetriamine with anhydrous piperazine in a mass ratio of 3:2; The ammonium salt rate regulator is selected from one or more of ammonium chloride, ammonium sulfate, ammonium tartrate, ammonium carbonate, and triammonium citrate; The particle size of silicon dioxide in the silica sol is 40-80 nm, the pH value of the silica sol is between 8-11, the viscosity of the silica sol is 1.4-2.1 mPa·s, and the dispersion degree is 1-1.02; The surfactant is selected from one or more of fatty alcohol polyoxyethylene ether and polyethylene glycol.
2. The CMP polishing liquid for polysilicon gate structure according to claim 1, characterized in that: The CMP polishing liquid comprises the following components in parts by weight: 100 parts of silica sol, 5 parts of alkaline rate accelerator, 1 part of surfactant, 0.6 parts of pH regulator, 0-0.6 parts of ammonium salt rate regulator, 0.4 parts of bactericide, and 90 parts of deionized water; the pH value of the CMP polishing liquid is between 9-11.
3. The CMP polishing liquid for polysilicon gate structure according to claim 2, characterized in that: The pH regulator is one or more of hydrochloric acid, nitric acid, sulfuric acid, citric acid, lactic acid, potassium hydroxide, ammonia water, and tetramethylammonium hydroxide; the bactericide is one or more of 1,2-benzisothiazolin-3-one, 2-methyl-4-isothiazolin-3-one, 2-methyl-5-chloro-4-isothiazolin-3-one, dodecyldimethylbenzyl ammonium chloride, and isothiazolinone.
4. A method for preparing a CMP polishing liquid for a polysilicon gate structure according to any one of claims 1 to 3, characterized in that: The preparation method comprises the following steps: adding an alkaline rate accelerator, a surfactant, a bactericide, and a pH regulator into deionized water, and uniformly mixing the above materials at a rotation speed of 300-1000 rpm at room temperature to form a premixed liquid; The silica sol is stirred at a rotation speed of 50-200 rpm, the premixed liquid is added to the silica sol, the adding speed of the premixed liquid is controlled at 4-6 g / s, the pH value of the system is detected after mixing evenly, and the pH value of the system is adjusted to meet the requirements, so as to obtain a CMP polishing liquid for a polysilicon gate structure; When the CMP polishing liquid is used, the CMP polishing liquid is diluted and mixed with deionized water in a mass ratio of 1:10-20 before use.
Citation Information
Patent Citations
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