Anti-fatigue ferroelectric capacitor, ferroelectric storage circuit, ferroelectric memory and chip

Abstract

The present invention belongs to the field of memories, and particularly relates to a ferroelectric capacitor resistant to fatigue, a ferroelectric storage circuit, a ferroelectric memory, and a chip. The ferroelectric capacitor includes: a top electrode layer, a top electrode layer, a ferroelectric dielectric layer, and a bottom electrode layer. The material of the ferroelectric dielectric layer is ZrO2, HfO2, or Hf x Zr 1‑x O2; a non-crystalline protective layer is further included between the top electrode layer and the ferroelectric dielectric layer; the non-crystalline protective layer uses the same matrix as the ferroelectric dielectric layer and is doped with a preset amount of elements such as Al, Si, La, Y, Nb, Ce, or Er to make the non-crystalline protective layer reach a non-crystalline state; the thickness of the non-crystalline protective layer is 10%-40% of the thickness of the ferroelectric dielectric layer. Devices such as FeFET and FRAM can be fabricated using this ferroelectric capacitor. The non-crystalline protective layer of the present invention blocks the connection of grain boundaries, reduces the overall leakage current, inhibits the formation of oxygen vacancy conductive filaments, thereby overcoming the defect of insufficient anti-fatigue characteristics of traditional devices and extending the storage life of the ferroelectric memory.

Description

Technical Field

[0001] The present invention belongs to the field of memories, and particularly relates to a ferroelectric capacitor with anti-fatigue property, a ferroelectric storage circuit, a ferroelectric memory and a non-volatile storage chip. Background Art

[0002] With the development of big data, cloud computing, Internet of Things, AI, etc., memories play an increasingly important role in the entire Internet ecological industrial chain. However, traditional memories such as dynamic random access memories (DRAM) and flash memories (NAND Flash) are facing great challenges in the current explosive growth of data. The semiconductor technology scaled according to the traditional Moore's law is facing the dilemma that the geometric size is miniaturized to the extreme, the cost required for its preparation is getting higher and higher, and the improvement of the achieved storage performance also tends to slow down. Traditional memories are limited by some problems of the process technology in terms of power consumption, data access speed, storage density, etc., and cannot keep up with the times. Under this background, a variety of new memories have emerged, for example, ferroelectric memories (FeFET), etc. Ferroelectric memories utilize the ferroelectric properties of ferroelectric materials, that is, the characteristic of polarization residue still existing after power-off, to realize the storage and reading of information.

[0003] In ferroelectric memories, hafnium zirconium oxide (HZO) FeFETs have the advantages of fast read and write speed, non-volatility, low power consumption and easy CMOS integration, and are the best choice for new memory breakthroughs. Compared with traditional perovskite oxides (such as Pb(Zr,Ti)O3 (PZT)) ferroelectric materials, the HZO system has several advantages: high scaling ability, that is, it still has sufficient ferroelectric properties even when the thickness is as low as below 10 nm; appropriate coercive field (E c ), which can optimize the switching voltage under the ultra-thin limit; and compatibility with CMOS manufacturing technology. Therefore, HZO-based ferroelectric capacitors show broad application potential in related devices such as FeFETs and ferroelectric random access memories (FRAMs).

[0004] Writing data into a ferroelectric capacitor involves switching the polarization of ferroelectric domains by applying an external electric field (E work ). E work It is necessary to use much higher than twice the coercive field (E c ) to adapt to the non-uniform distribution of E c in different devices, and the change of E c due to the wake-up effect and fatigue effect. However, the high E c of the HZO material results in E workApproaching the breakdown voltage leads to high failure rates and material degradation, namely the generation of fatigue effects, which affect the product life and hinder its path towards industrialization. Prior to this, scientists from various countries have tried various methods to improve the fatigue effects of HZO thin films, such as defect control, phase control, capping effect, and interface layer control, etc., but no completely satisfactory solution has been produced to overcome the reliability problems caused by high E work Among them, the capping technology is to add a thin insulating Al2O3 layer at the contact interface between the HZO thin film and the top electrode to enhance the anti-fatigue characteristics of the sample. This solution has a certain effect in improving fatigue, but it will also increase the equivalent oxide thickness of the dielectric, and a certain thickness is required to achieve the effect. The increase in the thickness of Al2O3 will affect the ferroelectricity of the sample, and a thicker Al2O3 layer requires a longer atomic layer deposition production time, which is not conducive to scale miniaturization and large-scale mass production; on the other hand, there is an additional interface between the capping layer and the HZO layer, and there are problems such as an additional interface defect risk. Summary of the Invention

[0005] To solve the defect of short storage life caused by insufficient anti-fatigue properties of the hafnium zirconium oxide ferroelectric memory due to the thin film structure, the present invention provides an anti-fatigue ferroelectric capacitor, a highly reliable ferroelectric storage circuit, a highly reliable ferroelectric memory, and a non-volatile storage chip.

[0006] The present invention is realized by the following technical solutions:

[0007] An anti-fatigue ferroelectric capacitor, in order from top to bottom, includes: an upper electrode layer, a top electrode layer, a ferroelectric dielectric layer, and a bottom electrode layer. The material of the ferroelectric dielectric layer is ZrO2, HfO2, or Hf x Zr 1-x O2; in particular, a non-crystalline protective layer is further included between the top electrode layer and the ferroelectric dielectric layer. The non-crystalline protective layer uses the same matrix as the ferroelectric dielectric layer and is doped with a preset amount of elements such as Al, Si, La, Y, Nb, Ce, or Er to make the non-crystalline protective layer reach the non-crystalline state. The thickness of the non-crystalline protective layer is 10%-40% of the thickness of the ferroelectric dielectric layer.

[0008] As a further improvement of the present invention, the non-crystalline protective layer is generated by atomic layer deposition technology; the doping material and the ferroelectric dielectric layer material are alternately deposited in a preset order and ratio to obtain the non-crystalline protective layer with the required preset thickness.

[0009] As a further improvement of the present invention, the growth method of the non-crystalline protective layer is as follows:

[0010] First, directly deposit 2-3 cycles of the doping material on the bottom substrate, then deposit 8 cycles of the ferroelectric dielectric layer material, and finally deposit 2-3 cycles of the doping material.

[0011] As a further improvement of the present invention, both the top electrode layer and the material of the top electrode layer are made of TiN and are formed by plasma enhanced atomic deposition process; wherein, the thickness of the top electrode layer is 10 - 20 nm; the thickness of the bottom electrode layer is 5 - 10 nm.

[0012] As a further improvement of the present invention, the material of the upper electrode layer is SiGe and is formed by electron beam evaporation technology, with a thickness of 270 - 300 nm.

[0013] As a further improvement of the present invention, the ferroelectric dielectric layer is formed by atomic layer deposition technology, with a thickness of 5 nm.

[0014] The present invention also includes a ferroelectric memory circuit, which includes a silicon substrate and a circuit structure of an anti-fatigue ferroelectric capacitor located on the silicon substrate as described above. Among them, the ferroelectric memory circuit includes two types: FeFET and FRAM.

[0015] The present invention also includes a ferroelectric memory, which is a large-scale integrated circuit composed of the aforementioned ferroelectric memory circuit as a unit circuit. The preparation method of the ferroelectric memory is as follows:

[0016] (1) Clean the silicon substrate, and use plasma enhanced atomic layer deposition technology to grow a whole layer of TiN on the surface of the silicon substrate as the bottom electrode, with a thickness of 10 - 20 nm.

[0017] (2) Use atomic layer deposition technology to grow a thin film of a whole layer of ferroelectric dielectric layer on the surface of the TiN bottom electrode, with a thickness of 5 nm.

[0018] (3) Use atomic layer deposition technology to deposit 2 - 3 cycles of doping materials on the thin film of the ferroelectric dielectric layer, then deposit 8 cycles of the material of the ferroelectric dielectric layer, and finally deposit 2 - 3 cycles of doping materials again to obtain the required amorphous protective layer, with a thickness of 1 - 1.5 nm.

[0019] (4) Use plasma enhanced atomic layer deposition to grow TiN on the amorphous protective layer to obtain a top electrode layer with a thickness of 5 - 10 nm.

[0020] (5) Use an electron beam evaporation device to continue growing a 270 - 300 nm SiGe layer on the top electrode to obtain the required upper electrode layer.

[0021] (6) Use photolithography and development process to pattern the multi-layer structure, and use an inductively coupled plasma device ICP for etching to obtain a metal-ferroelectric layer-metal circuit structure.

[0022] As a further improvement of the present invention, the material of the ferroelectric dielectric layer is ZrO2, HfO2 or Hf x Zr1-x O2. The doping materials are selected from Al, Si, La, Y, Nb, Ce or Er.

[0023] The present invention also includes a non-volatile memory chip, which is encapsulated by the ferroelectric memory as described above.

[0024] The technical solution provided by the present invention has the following beneficial effects:

[0025] The present invention provides a new thin film structure of a ferroelectric capacitor. By doping HZO thin film with elements such as Al, Si, La, Y, Nb, Ce, Er, etc., an amorphous protective layer with a certain thickness is obtained. The amorphous protective layer can interrupt the longitudinal grain boundaries of the traditional ferroelectric capacitor, block the migration of oxygen vacancies, and slow down the generation of conductive filaments, thereby achieving the technical effect of improving the anti-fatigue characteristics of the capacitor. In addition, the doping of the amorphous protective layer in the new structure will not bring redundant interfaces, ensure the stability of the ferroelectric dielectric layer performance, and can also improve the time-dependent dielectric breakdown performance of the dielectric and reduce the capacitance leakage.

[0026] The present invention belongs to an improved hafnium zirconium oxide-based ferroelectric capacitor. From the product perspective, using the thin film structure of the present invention helps to increase the number of polarization reversals of the hafnium zirconium oxide-based FeFET device, enhance the fatigue characteristics of the device, and ensure the reliability of internal data storage of the device. From the process perspective, this solution only needs to change a small link in the growth of the dielectric material and adjust part of the recipe of the ALD equipment; thus, it can be compatible with the existing production line. The ferroelectric memory provided by the present invention can be produced using the existing DRAM production process line, without the need to design a new production line or explore new processes, and is very easy to put into production and application. It can reduce the production and manufacturing cost of new products while improving performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the thin film structure of an anti-fatigue ferroelectric capacitor provided in Embodiment 1 of the present invention.

[0028] Figure 2 It is a schematic diagram of the state of the substrate without deposition in the preparation method of the ferroelectric memory of Embodiment 2 of the present invention.

[0029] Figure 3 It is a schematic diagram of the state after the bottom electrode layer is formed in the preparation method of the ferroelectric memory of Embodiment 2 of the present invention.

[0030] Figure 4 It is a schematic diagram of the state after the ferroelectric dielectric layer is formed in the preparation method of the ferroelectric memory of Embodiment 2 of the present invention.

[0031] Figure 5 It is a schematic diagram of the state after the amorphous protective layer is formed in the preparation method of the ferroelectric memory of Embodiment 2 of the present invention.

[0032] Figure 6 Schematic diagram of the state after the formation of the top electrode layer in the preparation method of the ferroelectric memory according to Embodiment 2 of the present invention.

[0033] Figure 7 Schematic diagram of the state after the formation of the upper electrode layer in the preparation method of the ferroelectric memory according to Embodiment 2 of the present invention.

[0034] Figure 8 Schematic diagram of the state of the ferroelectric memory after lithography and development in the preparation method of the ferroelectric memory according to Embodiment 2 of the present invention.

[0035] Figure 9 Structural comparison diagram of three devices in the experimental group and the control group in the performance test.

[0036] Figure 10 Remnant polarization intensity curves obtained for three device samples in the high - electric - field cycling experiment in the performance test.

[0037] Figure 11 Schematic diagram of the principle for the enhanced anti - fatigue characteristic effect generated by the solution of the present invention. Detailed implementation manners

[0038] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0039] Explanation of some technical terms related to the present invention:

[0040] Fluorite structure: In solid - state chemistry, the fluorite structure refers to a common motif of compounds with the chemical formula MX2. The X ions occupy eight tetrahedral interstitial sites, while the M ions occupy the regular sites of a face - centered cubic structure. The hafnium - zirconium - oxygen - based ferroelectric dielectric layer in the solution of the present invention belongs to the fluorite structure.

[0041] Perovskite structure: Perovskite is any material with a crystal structure that follows the formula ABX3, where A and B are two positively charged ions (i.e., cations), usually very different in size, and X is a negatively charged ion (an anion, usually an oxide) that binds to the two cations. The ferroelectric dielectrics in traditional ferroelectric capacitors use perovskite - structured materials, while in the new technology provided in this embodiment, a fluorite structure treatment of hafnium - zirconium - oxygen is adopted; the ferroelectric material of hafnium - zirconium - oxygen is a material formed by oxides of Zr and Hf, including ZrO2, HfO2 or Hf x Zr 1-x O2.

[0042] Amorphous layer: In condensed matter physics and materials science, an amorphous solid (or non-crystalline solid) is a solid that lacks the long-range order characteristic of a crystal. In the solution of the present invention, hafnium zirconium oxide ferroelectric dielectric materials are doped with Al, La, Si, Y, Nb, Ce, Er, etc., to make them in an amorphous state, obtaining an amorphous protective layer. With the development of the industry and the miniaturization of scale, a series of problems have emerged in traditional perovskite-structured ferroelectric systems, including the inability to maintain sufficient ferroelectric properties in films less than 10 nm thick; a coercive field that is too small and difficult to control (about 0.1 MV / cm), etc. The emerging fluorite-structured HZO thin film has gradually replaced perovskite materials as the material for ferroelectric memory capacitors. However, the introduction of HZO thin films has also brought certain fatigue problems. The present invention aims to improve the fatigue problem of HZO materials with a doped protective layer.

[0043] Example 1

[0044] Traditional perovskite materials have disadvantages such as too small switching voltage (±0.1 V) in the application of FeFET. With the application of fluorite-structured HZO material thin films, this problem has been effectively improved. However, while the HZO material thin film increases the switching voltage in ferroelectric capacitors, it also brings a higher coercive field E c . As the coercive field (±0.8 - 2 V) increases, the fatigue characteristics of the HZO thin film are greatly weakened. This results in: Ferroelectric memories prepared with ferroelectric capacitors using traditional perovskite materials fail after flipping about 10 15 times at the operating voltage, while ferroelectric memories prepared with ferroelectric capacitors using HZO thin films face the problem of device failure after flipping about 10 10 times at the operating voltage. The problem of too short lifespan of ferroelectric memories caused by the insufficient anti-fatigue characteristics of HZO thin films is becoming a major obstacle restricting its industrialization process.

[0045] The main reason for the failure of hafnium zirconium oxide ferroelectric storage devices is that when a voltage is applied during operation, oxygen vacancies are generated inside the dielectric. After long-term use, too many oxygen vacancies form conductive filaments in the thin film and connect into a conductive path, resulting in device failure. To overcome this problem, this example provides a new anti-fatigue ferroelectric capacitor. As Figure 1 shown, in the order from top to bottom, it includes: a top electrode layer, a top electrode layer, a ferroelectric dielectric layer, and a bottom electrode layer. The material of the ferroelectric dielectric layer is ZrO2, HfO2, or Hf x Zr 1-xO2. In particular, an amorphous protective layer is further included between the top electrode layer and the ferroelectric dielectric layer. The amorphous protective layer uses the same matrix as the ferroelectric dielectric layer and is doped with a preset amount of elements such as Al, Si, La, Y, Nb, Ce, or Er therein to make the amorphous protective layer reach an amorphous state. The newly added amorphous protective layer in this embodiment can break the longitudinal grain boundaries, block the migration of oxygen vacancies, and slow down the generation of conductive filaments, thereby achieving the effect of anti-fatigue.

[0046] In this embodiment, both the amorphous protective layer and the ferroelectric dielectric layer are formed by atomic layer deposition technology (ALD, Atomic Layer Deposition). Among them, the thickness of the ferroelectric dielectric layer is 5 nm, and the thickness of the amorphous protective layer is 10%-40% of the thickness of the ferroelectric dielectric layer. By alternately depositing the doping material and the ferroelectric dielectric layer material in a preset order and ratio, an amorphous protective layer with a required preset thickness can be obtained. Specifically, the growth method of the amorphous protective layer in this embodiment is as follows:

[0047] First, directly deposit 2-3 cycles of the doping material on the bottom substrate, then deposit 8 cycles of the ferroelectric dielectric layer material, and finally deposit 2-3 cycles of the doping material.

[0048] In this embodiment, the materials of both the top electrode layer and the top electrode layer are TiN and are formed by plasma enhanced atomic deposition process (PEALD, Plasma Enhanced Atomic Layer Deposition); among them, the thickness of the top electrode layer is 10-20 nm; the thickness of the bottom electrode layer is 5-10 nm. The material of the upper electrode layer is SiGe and is formed by electron beam evaporation technology (Ebeam), with a thickness of 270-300 nm.

[0049] Embodiment 2

[0050] Based on the new thin-film structure solution of the ferroelectric capacitor provided in Embodiment 1, this embodiment further provides a ferroelectric memory circuit, which includes a silicon substrate and a circuit structure of a ferroelectric capacitor with anti-fatigue as described above located on the silicon substrate. In actual production applications, the ferroelectric memory circuit includes two types: FeFET and FRAM.

[0051] At the same time, this embodiment also provides a ferroelectric memory, which is a large-scale integrated circuit composed of the aforementioned ferroelectric memory circuit as a unit circuit. The preparation method of the ferroelectric memory is as follows:

[0052] Prepare a silicon substrate, as Figure 2 shown, and clean the silicon substrate. Then use plasma enhanced atomic layer deposition technology to grow a whole layer of TiN on the surface of the silicon substrate as the bottom electrode, with a thickness of 10-20 nm. The state after generating the bottom electrode is asFigure 3 As shown, the bottom electrode completely covers the silicon substrate.

[0053] Next, an entire layer of ferroelectric dielectric film is grown on the surface of the TiN bottom electrode by atomic layer deposition technology, about cycles, that is, 50 - 65 cycles; the obtained ferroelectric dielectric layer is as Figure 4 shown, with a thickness of about 5 nm. At this time, the ferroelectric dielectric completely covers the bottom electrode.

[0054] Immediately afterwards, atomic layer deposition technology is used to deposit the doped material for 2 - 3 cycles on the ferroelectric dielectric film first, then deposit the material of the ferroelectric dielectric layer for 8 cycles, and finally deposit the doped material for 2 - 3 cycles again. At this time, a ferroelectric dielectric layer with an amorphous protective layer as shown in Figure 5 can be obtained. Among them, the thickness of the amorphous protective layer is 1 - 1.5 nm. In this stage, the material of the ferroelectric dielectric layer is selected from ZrO2, HfO2 or Hf x Zr 1-x O2, and the ferroelectric dielectric layer and the amorphous protective layer are made of the same material. The doped material is selected from: Al, Si, La, Y, Nb, Ce or Er.

[0055] It should be noted particularly that: the doped material and the ferroelectric dielectric layer material in this stage are alternately deposited on the ferroelectric dielectric film. And the number of cycles in each process is less, and the deposition amount of the doped material is limited, which is not enough to form a complete film of a single material. Therefore, the amorphous protective layer formed in this stage is actually a composite material in which the doped material is uniformly doped in the ferroelectric dielectric layer substrate. In addition, in the actual processing technological process, the deposition methods of the doped material and the ferroelectric dielectric material are not limited to the above-mentioned sequence and number of cycles, as long as it is ensured that the doping amount can make the deposited layer reach the amorphous state and the thickness of the obtained amorphous protective layer meets the requirements.

[0056] After that, TiN is grown on the amorphous protective layer by plasma-enhanced atomic layer deposition, as shown in Figure 6 At this time, a top electrode layer with a thickness of 5 - 10 nm can be obtained. The materials of the top electrode layer and the bottom electrode layer are the same, but the thickness of the top electrode layer is slightly thinner than that of the bottom electrode layer. The function of the top electrode layer is to maintain the crystal phase of the film. After the top electrode is formed, continue to use an electron beam evaporation device (Ebeam) to grow a 270 - 300 nm SiGe layer on the top electrode to obtain an upper electrode layer as shown in Figure 7 shown.

[0057] Finally, the multilayer structure is patterned by photolithography and development processes, and etched with an inductively coupled plasma device ICP, and a metal-ferroelectric layer-metal circuit structure as shown in Figure 8 can be obtained.

[0058] In the ferroelectric memory provided by this embodiment, a highly reliable HZO material can be obtained by inserting an AZA layer (an amorphous protective layer doped with a ferroelectric dielectric material). This method neither increases the overall thickness of the HZO thin film nor affects the ferroelectricity of the HZO thin film. It is stable and reliable, and the doping does not introduce extra interfaces, achieving three benefits at once.

[0059] The ferroelectric memory provided by this embodiment can also be launched on the market in the form of a packaged integrated circuit chip. Therefore, this embodiment also provides a non-volatile memory chip, which is encapsulated by the aforementioned ferroelectric memory.

[0060] Performance Test

[0061] In order to verify the advantages of the technical solution provided by the present invention, technical personnel designed a verification experiment. In the verification experiment, zirconium oxide doped with alumina and hafnium zirconium oxide devices with a thickness of 6nm were used as the experimental group, and devices without alumina doping were used as the control group. High-field cycling at 6MV / cm was performed on samples of the experimental group (ZAZA and HZO-AZA) and the control group (ZrO2) respectively to prove the feasibility and superiority of the solution of the present invention in the HZO system.

[0062] Among them, Figure 9 is a schematic diagram comparing the structures of a pure zirconium oxide device without alumina doping in the control group, a zirconium oxide device with an aluminum-doped protective layer film in the experimental group, and a device combining the protective layer AZA and the HZO thin film. According to the experimental data of the three groups of samples in the high-field cycling experiment, the remanent polarization intensity curve as shown in Figure 10 was plotted. Analyzing Figure 10 the data in it shows that:

[0063] The ZAZA thin film in the experimental group has a significant anti-fatigue effect. The ZrO2 device in the control group showed fatigue within 10 7 cycle times, while ZAZA did not show a fatigue trend within 10 7 cycle times, and the fatigue stage of the HZO-AZA thin film was also postponed to a certain extent. This shows that the AZA protective layer added to the traditional HZO-type device by the present invention has an obvious improvement effect on the reliability of the device. At the same time, it can also be found from the data that adding Al doping does not significantly damage the ferroelectric properties of the device, and the remanent polarization intensity is still around 10 μC / cm 2 Therefore, the experimental data prove that the solution of the present invention not only improves the anti-fatigue characteristics of the device but also does not damage the ferroelectric characteristics of the device, and the performance is very excellent.

[0064] Combined with Figure 11The principle of the excellent performance of the solution of the present invention can be analyzed. The main failure mechanism of traditional HZO thin films under high-field cycling is that the electric field causes an increase in oxygen vacancies in the thin films. For polycrystalline HZO thin films, the oxygen vacancies are distributed along the grain boundaries, gradually increasing and forming conductive filaments, resulting in device failure. However, in the solution of the invention, there is an additional amorphous protection layer, which blocks the connection of grain boundaries, reduces the overall leakage current, and thus inhibits the formation of oxygen vacancy conductive filaments.

[0065] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An anti-fatigue ferroelectric capacitor, in order from top to bottom, comprises: The upper electrode layer, the top electrode layer, the ferroelectric dielectric layer, and the bottom electrode layer, characterized in that: the material of the ferroelectric dielectric layer is a fluorite structure material ZrO2, HfO2, or Hf x Zr 1-x O2; there is also an amorphous protective layer between the top electrode layer and the ferroelectric dielectric layer; the amorphous protective layer uses the same fluorite structure matrix as the ferroelectric dielectric layer and is doped with a preset amount of Al, Si, La, Y, Nb, Ce, or Er elements to make the amorphous protective layer reach an amorphous state; the thickness of the amorphous protective layer is 10%-40% of the thickness of the ferroelectric dielectric layer.

2. The anti-fatigue ferroelectric capacitor according to claim 1, wherein: The amorphous protective layer is formed by atomic layer deposition technology; the doping material and the ferroelectric dielectric layer material are alternately deposited in a preset order and ratio to obtain the amorphous protective layer with a required preset thickness.

3. The anti-fatigue ferroelectric capacitor according to claim 2, characterized in that: The growth method of the amorphous protective layer is as follows: First, directly deposit 2 - 3 cycles of the doping material on the bottom substrate, then deposit 8 cycles of the ferroelectric dielectric layer material, and finally deposit 2 - 3 cycles of the doping material.

4. The ferroelectric capacitor with anti-fatigue property as claimed in claim 1, wherein: Both the top electrode layer and the top electrode layer are made of TiN and are formed by plasma enhanced atomic deposition process; among them, the thickness of the top electrode layer is 10 - 20 nm; the thickness of the bottom electrode layer is 5 - 10 nm.

5. The anti-fatigue ferroelectric capacitor according to claim 1, wherein The material of the upper electrode layer is SiGe and is formed by electron beam evaporation technology, with a thickness of 270 - 300 nm.

6. The anti-fatigue ferroelectric capacitor according to claim 1, wherein: The ferroelectric dielectric layer is formed by atomic layer deposition technology, with a thickness of 5 nm.

7. A ferroelectric memory circuit, characterized in that: It includes a silicon substrate and a circuit structure of an anti - fatigue ferroelectric capacitor as described in any one of claims 1 - 6 located on the silicon substrate; the ferroelectric storage circuit includes FeFET and FRAM.

8. An integrated circuit, characterized in that: It is a large - scale integrated circuit composed of the ferroelectric storage circuit as described in claim 7 as a unit circuit; the preparation method of each ferroelectric capacitor in the integrated circuit is as follows: (1) Clean the silicon substrate and grow a whole layer of TiN on the surface of the silicon substrate as the bottom electrode by plasma enhanced atomic layer deposition technology; (2) Grow a whole layer of thin film of the ferroelectric dielectric layer on the surface of the TiN bottom electrode by atomic layer deposition technology; (3) Use atomic layer deposition technology to deposit 2 - 3 cycles of the doping material on the thin film of the ferroelectric dielectric layer, then deposit 8 cycles of the material of the ferroelectric dielectric layer, and finally deposit 2 - 3 cycles of the doping material to obtain the required amorphous protective layer; (4) Use plasma enhanced atomic layer deposition to grow TiN on the amorphous protective layer to obtain the top electrode layer; (5) Use an electron beam evaporation device to continue growing a SiGe layer on the top electrode to obtain the required upper electrode layer: (6) Use photolithography and development process to pattern the multi - layer structure, and use an inductively coupled plasma device ICP for etching to obtain the metal - ferroelectric layer - metal circuit structure.

9. The integrated circuit according to claim 8, wherein: The material of the ferroelectric dielectric layer is ZrO2, HfO2 or Hf x Zr 1-x O2; The doping material is selected from Al, Si, La, Y, Nb, Ce or Er.

10. A non-volatile memory chip, characterized in that: It is encapsulated by the integrated circuit as described in claim 8 or 9.

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