Three-stage direct-current transformer starting process current limiting method and system

Abstract

The application provides a three-stage direct-current transformer starting process current limiting method and system. The starting process is divided into three stages, and the method can be realized by using three analytical formulae. The starting process is divided into three stages, and a formula for calculating the duty cycle is used in each stage to determine the value of the output duty cycle at the current time, accurately limit the peak current, and has the characteristics of simple implementation, rapid adaptation to transformer parameter changes, and small calculation amount.

Description

Technical Field

[0001] This invention belongs to the field of transformer control technology, specifically relating to a current limiting method and system for the startup process of a three-stage DC transformer. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] With the rapid development of power electronics, new energy power generation, and energy storage technologies, DC "source-load-storage" systems, represented by distributed energy, electric vehicles, and energy storage, are becoming increasingly prevalent. Compared to traditional AC systems, new power systems based on DC distribution are better suited to meet the demands of modern life for distributed energy and the future development of "source-grid-load-storage."

[0004] As the core equipment of the new power system based on DC power distribution, the DC transformer connects key equipment such as DC buses, DC loads, and energy storage at different voltage levels. Its fault ride-through capacity, start-up recovery speed, and efficiency are extremely important for the high reliability of the system.

[0005] Series Resonant Converter DC Transformer (SRC-DCT) has advantages such as simple topology, high reliability, high efficiency, rigid voltage transfer ratio, and bidirectional operation capability, and has been widely used in DC transformer or DC distribution network projects in my country.

[0006] However, traditional SRC-DCTs suffer from problems such as large overshoot of startup voltage and current, slow startup speed, and device overstress. These issues lead to problems such as easy damage to the SRC-DCT during startup, slow or even failed DC power grid voltage establishment, and slow fault ride-through recovery, severely hindering the widespread application of SRC-DCTs.

[0007] However, according to the inventors, current strategies for addressing SRC-DCT startup issues mostly employ a gradual increase in duty cycle. This method, when the duty cycle is small in the initial startup phase, fails to fully utilize the SRC-DCT's maximum allowable current, resulting in slow startup. Conversely, if the duty cycle increases rapidly, it can lead to arbitrary current overshoots during startup, easily causing overcurrent damage to the device. Currently, there is also a soft-start method that gradually increases the phase shift angle within the primary H-bridge. This method faces the same problems as the gradual increase in duty cycle method, and the phase shift angle needs to be very small in the initial startup phase, which is difficult to achieve precisely considering the dead zone of the switching devices. Furthermore, there is a frequency conversion startup method, but this is suitable for LLC converters with a large resonant inductance L. For SRC-DCTs with a small resonant inductance, to limit the resonant cavity current, the switching frequency in the initial startup phase needs to be nearly 10 times higher than the resonant frequency. Such excessively high switching frequencies are difficult to achieve in high-power SRC-DCTs.

[0008] Regarding the gradual increase of duty cycle method, the literature Yang D, Chen C, Duan S, et al. A Variable Duty Cycle Soft Start-up Strategy for LLC Series Resonant Converter Based on Optimal Current Limiting Curve[J]. IEEE Transactions on Power Electronics, 2016, 31(11):1-1, proposes a method to obtain the "optimal current limiting curve (OCC)" representing the relationship between duty cycle and output voltage by iteratively calculating the circuit model, achieving good startup performance. Based on the output voltage of the SRC-DCT, and then through the optimal current limiting curve, the duty cycle that allows the SRC-DCT to fully utilize the maximum allowable current at this output voltage can be obtained. This method can ensure that the peak current of the SRC-DCT resonant cavity remains at the maximum allowable current throughout the startup process, making full use of the device performance. However, the process of obtaining the "optimal current limiting curve" requires the establishment of a complex circuit model and mathematical model, and the numerical solution of the "optimal current limiting curve" can only be obtained through repeated iterations. The acquisition method is complex and difficult to adapt quickly to changes in topology and circuit parameters. Currently, there is little research on analytical expressions for obtaining the "optimal current limiting curve" and strategies for accurately limiting the starting current. Summary of the Invention

[0009] To address the aforementioned problems, this invention proposes a three-stage DC transformer startup current limiting method and system. This invention divides the startup process into three stages, each using a formula for calculating the duty cycle to determine the current output percentage and precisely limit the peak current. It features simple implementation, rapid adaptation to converter parameter changes, and low computational complexity.

[0010] According to some embodiments, the present invention adopts the following technical solution:

[0011] A current limiting method for the startup process of a three-stage DC transformer includes the following steps:

[0012] Obtain the resonant inductance, resonant capacitance, and transformer turns ratio of the SRC-DCT; obtain the input-side voltage and output-side voltage of the SRC-DCT.

[0013] Calculate the normalized output voltage based on the transformer turns ratio and output side voltage of the SRC-DCT;

[0014] The maximum allowable peak current is preset and normalized according to the parameters of the resonant inductor and resonant capacitor.

[0015] By combining the normalized output voltage and the normalized maximum allowable peak current, the current operating stage of the SRC-DCT can be determined.

[0016] Based on the current working stage, the model is obtained according to the corresponding analytical form of the duty cycle, and the duty cycle that SRC-DCT should work at this time is determined.

[0017] Once the duty cycle of the SRC-DCT reaches the set value, the startup process ends and the duty cycle is maintained.

[0018] As an alternative implementation method, the specific process for calculating the normalized output voltage based on the transformer turns ratio and output side voltage of the SRC-DCT includes:

[0019] v o,N =Nv o

[0020] Among them, v o The voltage is the output voltage, and N is the transformer turns ratio.

[0021] As an alternative implementation, the specific process of presetting the maximum allowable peak current includes presetting the maximum allowable peak current i based on the relationship between the turn-off current and voltage overshoot measured by the double pulse. Lr,m This ensures that the shutdown voltage is below the required safety voltage.

[0022] As an alternative implementation method, the specific process for normalizing the maximum permissible peak current includes:

[0023] Based on the resonant inductor and capacitance parameters, the characteristic impedance of the resonant cavity is obtained. For the maximum allowable peak current i Lr,m Normalization yields i Lr,N,m :

[0024]

[0025] L r C is the resonant inductance value. r This is the value of the resonant capacitance.

[0026] As an alternative implementation method, the specific process for determining the current working stage of SRC-DCT includes:

[0027]

[0028] Where, Δ v Input voltage v i With the normalized output voltage v o The difference, i Lr,N,m This is the normalized maximum allowable peak current.

[0029] As an alternative implementation method, the duty cycle calculation model is as follows:

[0030] Phase 1:

[0031] Phase 2:

[0032] Phase 3: θ k =θ k-1 +Δ θ ,θ k ≤π

[0033] Where θ is an angular quantity, and in stage 3, θ will be slowly and forcibly increased to π at a rate of Δ. θ , k and k-1 represent the values ​​of θ in the k-th and k-1-th control cycles, respectively.

[0034] As a further implementation, the duty cycle D is represented by the angle θ, with the relationship D = θ / π.

[0035] A three-stage DC transformer start-up current limiting system includes:

[0036] The parameter acquisition module is configured to acquire the SRC-DCT resonant inductance, resonant capacitance, and transformer turns ratio, as well as the input-side voltage and output-side voltage of the SRC-DCT.

[0037] The microcontroller is configured to calculate the normalized output voltage based on the transformer turns ratio and output side voltage of the SRC-DCT;

[0038] The maximum allowable peak current is preset and normalized according to the parameters of the resonant inductor and resonant capacitor.

[0039] By combining the normalized output voltage and the normalized maximum allowable peak current, the current operating stage of the SRC-DCT can be determined.

[0040] Based on the current working stage, the model is obtained according to the corresponding analytical form of the duty cycle, and the duty cycle that SRC-DCT should work at this time is determined.

[0041] Once the duty cycle of the SRC-DCT reaches the set value, the startup process ends and the duty cycle is maintained.

[0042] A computer-readable storage medium for storing computer instructions, which, when executed by a processor, perform the steps in the above method.

[0043] An electronic device includes a memory and a processor, as well as computer instructions stored in the memory and running on the processor, wherein the computer instructions, when executed by the processor, perform the steps in the method described above.

[0044] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0045] 1. This invention uses fixed-frequency starting during SRC-DCT startup, avoiding the increased cost of drive circuits and switching devices caused by the high switching frequency of variable-frequency starting. The startup strategy has a wide range of applications.

[0046] 2. This invention is simple and easy to implement. It only requires dividing the startup process into three stages and using three analytical formulas. This avoids the problems of the traditional startup method based on the "optimal current limiting curve" having a complex way of obtaining the "optimal current limiting curve", which is difficult to adapt to changes in converter parameters and difficult to calculate online. It also reduces the requirements for controller performance and can reduce the hardware cost of the controller.

[0047] 3. This invention can precisely limit and utilize the maximum allowable peak current, keeping the resonant cavity current of the SRC-DCT at the maximum allowable current during startup, fully utilizing the power transfer limit of the resonant cavity, resulting in extremely fast startup speed. Simultaneously, it avoids overcurrent damage to devices caused by excessive current, and prevents voltage spikes caused by excessive turn-off current of the resonant converter, which could lead to overvoltage damage to the devices.

[0048] 4. This invention only requires the detection of input and output voltages, and does not require high-bandwidth voltage sensors or high-bandwidth high-speed current sensors, thus reducing the demand for sensor performance and lowering the sensor cost of the converter.

[0049] 5. This invention does not require fixed input or output voltage values ​​and can be started when the converter output voltage is lower than the rated voltage. It has strong adaptability to multiple operating conditions and is suitable as a control method for distributed micro-source black start.

[0050] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0051] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0052] Figure 1 This is a typical SRC-DCT topology;

[0053] Figure 2 This is a comparison between the analytical optimal current limiting curve obtained in this embodiment and the traditional optimal current limiting curve.

[0054] Figure 3 This is a block diagram of the startup strategy in this embodiment;

[0055] Figure 4 A schematic diagram of the gate drive signal for a switching transistor with a variable duty cycle strategy;

[0056] Figure 5(a) is a schematic diagram of the startup waveform when the initial voltage on the output side is 0V;

[0057] Figure 5(b) is a schematic diagram of the startup waveform when the initial voltage on the output side is 70V;

[0058] Figure 6(a) is a schematic diagram of the startup waveform when the load suddenly decreases during the startup process;

[0059] Figure 6(b) is a schematic diagram of the startup waveform when the load suddenly increases during the startup process;

[0060] Figure 7(a) is a schematic diagram of the startup waveform when adapting to the traditional duty cycle gradual increase strategy. The traditional strategy is set to have the same peak current as the proposed strategy.

[0061] Figure 7(b) is a schematic diagram of the startup waveform when adapting to the traditional duty cycle gradual increase strategy. The traditional strategy is set to have the same startup setup time as the proposed strategy.

[0062] Figure 7(c) shows the comparison of the peak current during startup time and startup process between the proposed startup strategy and the traditional strategy. Detailed Implementation

[0063] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0064] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0065] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0066] Example 1

[0067] A precise current limiting method for the startup process of a three-stage DC transformer, such as... Figure 1 and Figure 2 As shown, specifically:

[0068] First, the SRC-DCT resonant inductance value L was measured in advance. r Resonant capacitance value C r And the transformer turns ratio N. The input voltage v of the SRC-DCT is detected by voltage and current sensors in each control cycle. i and output voltage v o The two detected voltage values ​​are transmitted to the microcontroller (DSP or MCU). To facilitate subsequent calculations and control, the output voltage v is controlled within the microcontroller. o Normalize.

[0069] v o,N =Nv o

[0070] Based on the relationship between the turn-off current and voltage overshoot measured by the double pulse, the maximum allowable peak current i is preset. Lr,m This ensures the turn-off voltage is below the voltage specified in the switching device's datasheet. Then, based on the resonant inductor and capacitor parameters, the characteristic impedance of the resonant cavity is obtained. Normalizing the maximum allowable peak current yields i Lr,N,m .

[0071]

[0072] Then, according to the program execution flowchart, based on the transformer turns ratio of the SRC-DCT, the resonant cavity parameters, and the input voltage and v at the start of stage 3... i Normalized output voltage v o The difference Δ v Normalized maximum allowable peak current i Lr,N,m First, determine whether SRC-DCT should operate in stage 3. If v i -v o,N <Δ v If the condition is met, then the work proceeds to stage 3; otherwise, the decision is made regarding whether the work should proceed to stage 1 or stage 2. The decision condition is v. o,N i Lr,N,m +v o,N <v i .

[0073]

[0074] After determining the current stage, substitute the corresponding formula into the formula to calculate the duty cycle D that the SRC-DCT should operate at. D is represented by the angle θ, and the relationship is D = θ / π.

[0075] Phase 1:

[0076] Phase 2:

[0077] Phase 3: θ k =θ k-1 +Δ θ ,θ k ≤π

[0078] In stage 3, θ will be slowly forced to increase to π at a rate of Δ. θ k and k-1 represent the values ​​of θ in the k-th and k-1-th control cycles, respectively. When the SRC-DCT duty cycle reaches 50%, the startup process ends, and the duty cycle is maintained at 50% until it no longer changes. At this point, the resonant converter enters a stable operating state.

[0079] The Rate Limiting unit limits the rate of change of θ to avoid overshoot caused by large duty cycle changes when the initial output voltage is not 0V. The θ value processed by the Rate Limiting unit will be sent to the PWM generation unit to generate a PWM wave.

[0080] Figure 3The optimal current limiting curve (OCC) generated by the proposed strategy is compared with the OCC generated by existing methods [1], [2]. It can be seen that the OCC of different methods is basically the same, while this paper only uses three simple formulas, avoiding the problem of complex modeling and iterative calculation required by traditional methods.

[0081] [1]Yang D, Chen C, Duan S, et al.A Variable Duty Cycle Soft Start-upStrategy for LLC Series Resonant Converter Based on Optimal Current LimitingCurve[J]. IEEE Transactions on Power Electronics, 2016, 31(11):1-1.

[0082] [2]L.Yu,et al.Startup control strategy of single-stage 48V / 1.8V Sigmaconverter[C].IEEE Int.Future Energy Electron.Conf.,2016 1-5.

[0083] Figure 4 This diagram illustrates the gate drive signal of a switching transistor with a variable duty cycle strategy, explaining how the PWM wave is generated.

[0084] Figure 5(a) is a schematic diagram of the startup waveform when the initial voltage on the output side is 0V. The blue waveform in Ch1 is the MOSFET v DS Voltage. The green waveform in Ch4 represents the resonant current i. r The purple waveform in Ch3 represents the resonant capacitor voltage V. Cr The blue waveform in Ch2 represents the output voltage V. o Load current R Load =800Ω, input voltage v i =375V. It can be seen that the SRC-DCT successfully started from 0V and reached a steady-state value of 200V.

[0085] Figure 5(b) shows the startup waveform when the initial output voltage is 0V. The blue waveform in Ch1 represents the MOSFET voltage. DS Voltage. The green waveform in Ch4 represents the resonant current i. r The purple waveform in Ch3 represents the resonant capacitor voltage V. Cr The blue waveform in Ch2 represents the output voltage V. o Load current R Load =800Ω, input voltage vi =375V. It can be seen that the SRC-DCT successfully started from an initial output voltage of 70V (not 0V) to a steady-state value of 200V.

[0086] Figure 6(a) shows the startup waveform when the load suddenly decreases during the startup process.

[0087] Figure 6(b) shows the startup waveform when the load power suddenly decreases during startup. The blue waveform in Ch1 represents the MOSFET voltage. DS Voltage. The green waveform in Ch4 represents the resonant current i. r The purple waveform in Ch3 represents the resonant capacitor voltage V. Cr The blue waveform in Ch2 represents the output voltage V. o Input voltage v i =375V. At 336ms, R Load The voltage jumps from 3.64Ω to 6.66Ω. This demonstrates that the SRC-DCT successfully started from 0V and reached a steady-state value of 200V.

[0088] Figure 6(b) shows the startup waveform during a sudden increase in load power. The blue waveform in Ch1 represents the MOSFET voltage. DS Voltage. The green waveform in Ch4 represents the resonant current i. r The purple waveform in Ch3 represents the resonant capacitor voltage V. Cr The blue waveform in Ch2 represents the output voltage V. o Input voltage v i =375V. At 26ms, R Load The current jumps from 800Ω to 3.88Ω. This demonstrates that the SRC-DCT successfully started up from 0V and reached a steady-state value of 200V.

[0089] Figure 7(a) shows the startup waveform when adapting to the traditional duty cycle gradual increase startup strategy. The startup waveforms of the traditional duty cycle gradual increase startup strategy and the proposed strategy with the same peak current are compared, as well as the waveforms with the same startup time as the proposed strategy.

[0090] Figure 7(b) shows the comparison of the peak current during startup time and startup process between the proposed startup strategy and the traditional duty cycle gradual increase startup strategy.

[0091] It can be seen that the proposed strategy is superior to the traditional duty cycle gradual increase startup strategy in terms of both startup time and peak current during startup.

[0092] With simple improvements, this embodiment can be applied to SRC-DCT system operating conditions with higher power and more complex applications, demonstrating strong practicality. It is not limited to LLC topologies but can also be used for resonant topologies equivalent to LLC, such as CLC, CLLC, CLLLC, and DBSRC. This makes the method widely applicable to various situations, including high and low voltage applications, exhibiting strong scalability and practicality. This method is simple to implement, highly scalable, easy to apply, and practical, showing broad prospects in the fields of power systems and renewable energy generation.

[0093] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0094] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0095] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0096] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0097] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made by those skilled in the art without creative effort within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A current-limiting method for the startup process of a three-stage DC transformer, characterized in that, Includes the following steps: Obtain the resonant inductance, resonant capacitance, and transformer turns ratio of the SRC-DCT; obtain the input-side voltage and output-side voltage of the SRC-DCT. Calculate the normalized output voltage based on the transformer turns ratio and output side voltage of the SRC-DCT; The maximum allowable peak current is preset and normalized according to the parameters of the resonant inductor and resonant capacitor. By combining the normalized output voltage and the normalized maximum allowable peak current, the current operating stage of the SRC-DCT can be determined. Based on the current working stage, the model is obtained according to the corresponding analytical form of the duty cycle, and the duty cycle that SRC-DCT should work at this time is determined. Once the duty cycle of the SRC-DCT reaches the set value, the startup process ends and the duty cycle is maintained. The specific process for determining the current working stage of SRC-DCT includes: in, For the set input voltage With normalized output voltage Threshold of difference This is the normalized maximum allowable peak current; The duty cycle calculation model is as follows: in, For angle measurement, in stage 3, It will be slowly and forcibly increased to The rate of increase is , and Representing the Subsequent In the next control cycle The value of .

2. The current limiting method for the startup process of a three-stage DC transformer as described in claim 1, characterized in that, The specific process for calculating the normalized output voltage based on the transformer turns ratio and output voltage of the SRC-DCT includes: in, For the output side voltage, N This refers to the transformer turns ratio.

3. The current limiting method for the startup process of a three-stage DC transformer as described in claim 1, characterized in that, The specific process of presetting the maximum allowable peak current includes setting the maximum allowable peak current based on the relationship between the turn-off current and voltage overshoot measured by the double pulse. This ensures that the shutdown voltage is below the required safety voltage.

4. The current limiting method for the startup process of a three-stage DC transformer as described in claim 1, characterized in that, The specific process of normalizing the maximum permissible peak current includes: Based on the resonant inductor and capacitance parameters, the characteristic impedance of the resonant cavity is obtained. For the maximum allowable peak current Normalization yields : This is the resonant inductance value. This is the value of the resonant capacitance.

5. The current limiting method for the startup process of a three-stage DC transformer as described in claim 1, characterized in that, Duty cycle Measured by angle This indicates that the relationship is... .

6. A current-limiting method for the startup process of a three-stage DC transformer as described in any one of claims 1-5, characterized in that, Topologies applicable to SRC-DCT topologies or equivalent LLC topologies, including but not limited to LLC, CLC, CLLC, CLLLC and DBSRC topologies.

7. A three-stage DC transformer start-up current limiting system, using the method described in claim 1, characterized in that, include: The parameter acquisition module is configured to acquire the SRC-DCT resonant inductance, resonant capacitance, and transformer turns ratio, as well as the input-side voltage and output-side voltage of the SRC-DCT. The microcontroller is configured to calculate the normalized output voltage based on the transformer turns ratio and output side voltage of the SRC-DCT; The maximum allowable peak current is preset and normalized according to the parameters of the resonant inductor and resonant capacitor. By combining the normalized output voltage and the normalized maximum allowable peak current, the current operating stage of the SRC-DCT can be determined. Based on the current working stage, the model is obtained according to the corresponding analytical form of the duty cycle, and the duty cycle that SRC-DCT should work at this time is determined. Once the duty cycle of the SRC-DCT reaches the set value, the startup process ends and the duty cycle is maintained.

8. An electronic device, characterized in that, It includes a memory and a processor, as well as computer instructions stored in the memory and running on the processor, which, when executed by the processor, perform the steps of the method according to any one of claims 1-6.

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