Power supply circuit and chip

Abstract

The present disclosure provides a power supply circuit and a chip using the same. The power supply circuit comprises: a constant current generation module configured to generate a first current with a positive temperature coefficient and a second current with a negative temperature coefficient, and generate a constant current according to the first current and the second current; and a voltage generation module comprising a transistor, the voltage generation module being coupled to the constant current generation module and configured to generate a temperature-related voltage according to the constant current and a transistor characteristic. The embodiments of the present disclosure can generate a voltage related to the transistor characteristic and the temperature, simplify the circuit structure, and reduce the size of the chip.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of electronic circuit, and in particular, to a power supply circuit and a chip applying the same. BACKGROUND

[0002] In chip design, the output voltage of the power supply circuit is usually set as constant. In the case where the circuit needs to be controlled according to the transistor characteristics or temperature, a detection circuit is designed separately to detect and output a control signal according to the detection result. This way results in a generally complex circuit structure.

[0003] In today's increasing demand for chip size reduction, simplifying the circuit design in the chip has become a problem urgently to be solved in the field.

[0004] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information which does not constitute prior art known to those skilled in the art. SUMMARY

[0005] The purpose of the present disclosure is to provide a power supply circuit and a chip for generating a power supply voltage related to transistor characteristics and chip temperature, thereby simplifying the setting of the control circuit in the circuit and reducing the size of the chip.

[0006] According to a first aspect of the present disclosure, a power supply circuit is provided, comprising: a constant current generation module for generating a first current with positive temperature coefficient and a second current with negative temperature coefficient, and generating a constant current according to the first current and the second current;

[0007] a voltage generation module comprising a transistor, the voltage generation module being coupled to the constant current generation module and being configured to generate a temperature-related voltage according to the constant current and transistor characteristics.

[0008] In an exemplary embodiment of the present disclosure, the voltage generation module comprises a positive temperature coefficient voltage output unit and / or a negative temperature coefficient voltage output unit.

[0009] The positive temperature coefficient voltage output unit is connected to the constant current generation module and comprises a P-type transistor monitoring module configured to output a positive temperature coefficient voltage according to the constant current and the state of the P-type transistor; and the negative temperature coefficient voltage output unit is connected to the constant current generation module and comprises an N-type transistor monitoring module configured to output a negative temperature coefficient voltage according to the constant current and the state of the N-type transistor.

[0010] In an exemplary embodiment of the present disclosure, the constant current generation module comprises:

[0011] a positive temperature coefficient current generating unit for generating the first current;

[0012] a negative temperature coefficient current generating unit connected with the positive temperature coefficient current generating unit for generating the second current.

[0013] In an exemplary embodiment of the present disclosure, the positive temperature coefficient current generating unit comprises:

[0014] a first amplifier;

[0015] a first feedback transistor, a source of the first feedback transistor connected with a power supply voltage, a gate connected with an output terminal of the first amplifier, and a drain connected with a first node;

[0016] a first bridge arm, the first bridge arm comprising a first resistor and a plurality of first PN junction units connected in parallel in series, a first end of the first resistor connected with the first node, and a second end connected with an inverting input terminal of the first amplifier, positive poles of the first PN junction units connected with the inverting input terminal of the first amplifier, and negative poles grounded;

[0017] a second bridge arm, the second bridge arm comprising a second resistor, a third resistor and a plurality of second PN junction units connected in parallel in series, a first end of the second resistor connected with the first node, and a second end connected with a non-inverting input terminal of the first amplifier; a first end of the third resistor connected with the non-inverting input terminal of the first amplifier, and a second end connected with positive poles of the second PN junction units, and negative poles grounded;

[0018] a first output transistor, a source connected with the power supply voltage, a gate connected with the output terminal of the first amplifier, and a drain for outputting the first current.

[0019] In an exemplary embodiment of the present disclosure, the first resistor and the second resistor have equal resistance values.

[0020] In an exemplary embodiment of the present disclosure, the first feedback transistor and the first output transistor constitute a current mirror, and a ratio of channel width-length ratios of the first feedback transistor and the first output transistor is 2:1.

[0021] In an exemplary embodiment of the present disclosure, the second PN junction units are N in number, and N=(M+2) 2 -M 2 , the first PN junction units are M 2 in number, wherein M is an integer greater than or equal to 1.

[0022] In an example embodiment of the present disclosure, the first PN junction unit and the second PN junction unit are implemented by self-biased transistors, the self-biased transistors are N-type transistors, and the gates and sources of the self-biased transistors are grounded.

[0023] In an example embodiment of the present disclosure, the third resistor is an adjustable resistor.

[0024] In an example embodiment of the present disclosure, the negative temperature coefficient current generation unit comprises:

[0025] The second amplifier has a non-inverting input connected to the non-inverting input of the first amplifier.

[0026] The second feedback transistor has a source connected to the power supply voltage, a gate connected to the output of the second amplifier, and a drain connected to the non-inverting input of the second amplifier.

[0027] The fourth resistor has one end connected to the non-inverting input of the second amplifier and the other end grounded.

[0028] The second output transistor has a source connected to the power supply voltage, a gate connected to the output of the second amplifier, and a drain for outputting the second current.

[0029] In an example embodiment of the present disclosure, the fourth resistor is an adjustable resistor.

[0030] In an example embodiment of the present disclosure, the resistances of the third resistor and the fourth resistor satisfy the derivative of (kT / q)*ln8 / R3+(kT / q*lnZ+V BE2 ) / R4 with respect to temperature T is zero, where R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, K is the Boltzmann constant, q is the electronic charge, T is the operating temperature of the power supply circuit, V BE2 is the voltage difference across the second PN junction unit, and Z is the number ratio of the second PN junction unit to the first PN junction unit.

[0031] In an example embodiment of the present disclosure, the adjustable resistor is implemented by a resistor string, the resistor string comprises a plurality of series-connected sub-resistors and a plurality of switch elements, the plurality of series-connected sub-resistors have a plurality of connection points, the two ends of the switch elements are respectively connected to two of the connection points, and different switch elements are connected to different connection points.

[0032] In an example embodiment of the present disclosure, the negative temperature coefficient voltage output unit comprises:

[0033] a first N-type transistor, a drain and a gate of the first N-type transistor being connected to a second node, the second node connecting a drain of the first output transistor and a drain of the second output transistor, a source of the first N-type transistor being grounded, the second node being used for outputting the negative temperature coefficient voltage.

[0034] In an exemplary embodiment of the present disclosure, the positive temperature coefficient voltage output unit comprises:

[0035] a second N-type transistor, a gate of the second N-type transistor being connected to a drain of the first output transistor and a drain of the second output transistor, a source of the second N-type transistor being grounded, the source of the second N-type transistor being connected to a third node;

[0036] a first P-type transistor, a source of the first P-type transistor being connected to a power voltage, a gate and a drain of the first P-type transistor both being connected to the third node, the third node being used for outputting the positive temperature coefficient voltage.

[0037] According to a second aspect of the present disclosure, a chip is provided, comprising the power supply circuit as claimed in any one of the above.

[0038] The embodiments of the present disclosure can generate a constant current by using a first current with a positive temperature coefficient and a second current with a negative temperature coefficient, and then generate a voltage related to the characteristics and temperature of a transistor according to the constant current and the transistor, so that the setting of a detection circuit in a chip can be reduced, the detection circuit and the power supply circuit can be combined into one, the control efficiency can be improved, and the size of the chip can be reduced.

[0039] It should be understood that the general description above and the detailed description below are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0040] The drawings herein are incorporated into the description and form part of the description, show embodiments consistent with the present disclosure, and together with the description, serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor.

[0041] Figure 1 is a structural schematic diagram of a power supply circuit in an exemplary embodiment of the present disclosure.

[0042] Figure 2 is a schematic diagram of a voltage generation module 2 in an embodiment of the present disclosure.

[0043] Figure 3 is a schematic diagram of a constant current generation module 1 in an embodiment of the present disclosure.

[0044] Figure 4 and Figure 5 is a schematic diagram of the adjustable resistor in the embodiment of the present disclosure.

[0045] Figure 6 is a schematic diagram of the voltage generating module 2 corresponding to the constant current generating module 1 shown in Figure 3 DETAILED DESCRIPTION

[0046] Example implementations are now described with reference to the drawings; however, these descriptions are not intended to limit the scope of the present disclosure, but are intended to provide examples of implementations of the present disclosure as presently contemplated. As such, descriptions of the example implementations are intended to encompass alterations, modifications, and equivalents within the scope of the present disclosure. Further, unless explicitly stated otherwise, the description of an implementation is intended to apply to other implementations as well. Those skilled in the art will recognize that the examples provided herein are non-limiting and that many variations and modifications can be possible. Also, descriptions of features or aspects within each example should typically be considered as available for use in combination with other examples or aspects. For example, unless otherwise noted, any of the examples can be implemented alone or in combination with any of the other examples. The foregoing and other examples can be readily implemented using the techniques of this disclosure.

[0047] Further, the accompanying drawings are only schematic and are non-limiting detailed descriptions of implementations, thus the description of the drawings should not be considered as limiting the scope of the present disclosure. Identical reference signs in different drawings represent identical or similar elements, thus their repeated description will be omitted. Some of the blocks in the drawings are functional entities that do not necessarily have to correspond to physically or logically independent entities. These functional entities can be implemented in software, or in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0048] The example implementations of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0049] Figure 1 is a structural schematic diagram of the power supply circuit in the example implementation of the present disclosure.

[0050] Referring to Figure 1 , the power supply circuit 100 can include:

[0051] a constant current generating module 1 configured to generate a first current I1 with a positive temperature coefficient and a second current I2 with a negative temperature coefficient, and generate a constant current I according to the first current I1 and the second current I2;

[0052] a voltage generating module 2 including a transistor, the voltage generating module 2 coupled to the constant current generating module 1 and configured to generate a temperature-dependent voltage V according to the constant current I and a characteristic of the transistor.​

[0053] Figure 1 The voltage V generated in the illustrated embodiment is related to the characteristics of the transistor. The characteristics of the transistor may, for example, include the switching speed of the transistor (Process Corner) and the temperature characteristics.

[0054] The Process Corner of the transistor can be divided into Fast (F), Slow (S), and Typical (T) according to the switching speed, wherein the Typical Process Corner is determined according to the average of the transistor driving current. The P-type transistor and the N-type transistor in the same region can correspond to the same Process Corner or different Process Corners. The threshold voltage of the transistor with different Process Corners is different. The absolute value of the threshold voltage of the transistor with the F Process Corner is the lowest, the absolute value of the threshold voltage of the transistor with the T Process Corner is in the middle, and the absolute value of the threshold voltage of the transistor with the S Process Corner is the highest. Therefore, the switching speed of the transistor with the F Process Corner is the fastest, the switching speed of the transistor with the T Process Corner is in the middle, and the switching speed of the transistor with the S Process Corner is the slowest.

[0055] The threshold voltage of the transistor is also related to the temperature. The threshold voltage of the N-type transistor decreases with the increase of the temperature, and the absolute value of the threshold voltage of the P-type transistor decreases with the increase of the temperature. Since the threshold voltage of the P-type transistor is negative, the threshold voltage of the P-type transistor decreases with the increase of the temperature. Therefore, when the constant current I is input to the transistor in the voltage generation module 2, the threshold voltage Vth of the transistor changes with the temperature, and finally the voltage output through the transistor is independent of the current and only related to the temperature.

[0056] Therefore, in the embodiment of the present disclosure, the voltage V output by the voltage generation module 2 includes the voltage output according to the characteristics of the N-type transistor and / or the voltage output according to the characteristics of the P-type transistor.

[0057] Figure 2 FIG. 1 is a schematic diagram of the voltage generation module 2 in one embodiment of the present disclosure.

[0058] Reference Figure 2 In one embodiment, the constant current generation module 1 can include:

[0059] The positive temperature coefficient current generation unit 11 is configured to generate a first current I1.

[0060] The negative temperature coefficient current generation unit 12 is connected to the positive temperature coefficient current generation unit 11 and is configured to generate a second current I2.

[0061] The first current I1 and the second current I2 jointly form the constant current I.

[0062] The voltage generation module 2 can include a negative temperature coefficient voltage output unit 21 and a positive temperature coefficient voltage output unit 22.

[0063] The negative temperature coefficient voltage output unit 21 is connected to the constant current generation module 1 and includes an N-type transistor monitoring module for outputting a negative temperature coefficient voltage Vn according to the constant current I and the state of the N-type transistor; the positive temperature coefficient voltage output unit 22 is connected to the constant current generation module 1 and includes a P-type transistor monitoring module for outputting a positive temperature coefficient voltage Vp according to the constant current I and the state of the P-type transistor.

[0064] The negative temperature coefficient voltage Vn is, for example, a voltage output according to the characteristics of the N-type transistor, and the positive temperature coefficient voltage Vp is, for example, a voltage output according to the characteristics of the P-type transistor, and the two voltages together constitute the voltage V generated by the voltage generation module 2.

[0065] Figure 3 is a schematic diagram of the constant current generation module 1 in one embodiment of the present disclosure.

[0066] Reference Figure 3 In one embodiment, the positive temperature coefficient current generation unit 11 can include:

[0067] a first amplifier AMP1;

[0068] a first feedback transistor MB1, the source of the first feedback transistor MB1 being connected to a power supply voltage VDD, the gate being connected to the output of the first amplifier AMP1, and the drain being connected to a first node N1;

[0069] a first bridge arm 111, the first bridge arm 111 including a first resistor R1 and a plurality of first PN junction units J1 connected in parallel in series, the first end of the first resistor R1 being connected to the first node N1, the second end being connected to the non-inverting input of the first amplifier AMP1 and the positive electrode of the first PN junction unit J1, and the negative electrode of the first PN junction unit J1 being grounded;

[0070] a second bridge arm 112, the second bridge arm 112 including a second resistor R2, a third resistor R3 and a second PN junction unit J2 connected in series, the first end of the second resistor R2 being connected to the first node N1, and the second end being connected to the non-inverting input of the first amplifier AMP1; the first end of the third resistor R3 being connected to the non-inverting input of the first amplifier AMP1, the second end being connected to the positive electrode of the second PN junction unit J2, and the negative electrode of the second PN junction unit J2 being grounded;

[0071] a first output transistor MO1, the source being connected to the power supply voltage VDD, the gate being connected to the output of the first amplifier AMP1, and the drain being used to output a first current I1.

[0072] Both the first feedback transistor MB1 and the first output transistor MO1 can be P-type transistors.

[0073] There can be multiple second PN junction units J2. These multiple second PN junction units J2 are connected in parallel, with the positive terminal of each second PN junction unit connected to the second terminal of the third resistor R3, and the negative terminal grounded. In one embodiment, the number of second PN junction units can be N = (M + 2). 2 -M 2 There are M units in the first PN junction. 2 There are 1, where M is an integer greater than or equal to 1. This arrangement allows the second PN junction unit J2 to surround the first PN junction unit J1 during manufacturing, forming a (M+2)*(M+2) PN junction unit array.

[0074] For example, when M=1, N=3, the number of the first PN junction unit J1 is 1, and the number of the second PN junction unit J2 is 3*3-1=8. The first PN junction unit J1 and the second PN junction unit J2 are arranged in a 3*3 array.

[0075] When M=2, N=4, the number of the first PN junction unit J1 is 4, and the number of the second PN junction unit J2 is 4*4-4=12. The first PN junction unit J1 and the second PN junction unit J2 are arranged in a 4*4 array.

[0076] When M=3, N=5, the number of first PN junction units J1 is 9, and the number of second PN junction units J2 is 5*5-9=16. The first PN junction units J1 and the second PN junction units J2 are arranged in a 5*5 array. And so on.

[0077] exist Figure 3 In the embodiment shown, for the sake of simplifying the analysis, let M=1, N=3, the number of the first PN junction unit J1 be 1, and the number of the second PN junction unit J2 be 8.

[0078] exist Figure 3 In the illustrated embodiment, the first resistor R1 and the second resistor R2 are the same. Due to the virtual short characteristic of the amplifier, the voltage difference between the first node N1 and the inverting input terminal of the first amplifier AMP1 is equal to the voltage difference between the first node N1 and the non-inverting input terminal of the first amplifier AMP1, and the first resistor R1 between the first node N1 and the inverting input terminal of the first amplifier AMP1 is equal to the second resistor R2 between the first node N1 and the non-inverting input terminal of the first amplifier AMP1. Therefore, the current on the first bridge arm 111 and the second bridge arm 112 is the same.

[0079] Continuing the inference, the voltage difference between the first node N1 and the inverting input of the first amplifier AMP1 is equal to the voltage difference between the first node N1 and the non-inverting input of the first amplifier AMP1, and the voltage difference between the first node N1 and the inverting input of the first amplifier AMP1 is equal to the PN junction voltage V of the first PN junction unit J1 BE1 , then the voltage at the first end of the third resistor R1 is V BE1 . Suppose the voltage at the second end of the third resistor R3, i.e. the positive electrode of the second PN junction unit J2, is V BE2 , according to the PN junction V-I characteristic expression, we have:

[0080]

[0081] where I D is the current of the PN junction unit, I S is the reverse saturation current of the PN junction unit (related to temperature, constant when the temperature is determined), V T is the thermal voltage, V T = kT / q, K is the Boltzmann constant, q is the electron charge, k = 1.38 x 10 - 23 J / K (Joule / Kelvin), q = 1.6 x 10 -19 C (Coulomb); T is the absolute temperature, in Kelvin. V T , also known as the voltage equivalent of temperature, refers to the potential difference in a closed circuit due to the temperature difference between two points. When T = 300 K (normal temperature), V T = kT / q ≈ 0.026 V. n is the emission coefficient, which is related to the size, material of the PN junction and the current passing through, and is between 1 and 2.

[0082] Since the currents on the first bridge arm 111 and the second bridge arm 112 are equal, the currents on the 8 parallel-connected second PN junction units J2 are equal to the current on the first PN junction unit J1. Suppose the current on each second PN junction unit J2 is I0, then the current on the first PN junction unit J1 is 8I0.

[0083] When the number of the first PN junction unit J1 and the second PN junction unit J2 is other values, suppose the current on each second PN junction unit J2 is I0, then the current on the first PN junction unit J1 is ZI0. Z is the ratio of the number of the second PN junction unit J2 to the first PN junction unit J1.

[0084] When V BE is much greater than V T , the 1 in the parentheses of formula (1) can be ignored, and n = 1, so we have:

[0085]

[0086] thereby,

[0087]

[0088] Similarly, we obtain V BE2 The formula:

[0089]

[0090] Based on the same assumptions and derivations, we obtain:

[0091]

[0092] Therefore, the voltage V across the third resistor R3 BE1 -V BE2 have:

[0093]

[0094] Therefore, the current I on the second bridge arm 112 112 have:

[0095]

[0096] Where R3 is the resistance value of the third resistor R3. Since V is fixed when N is constant... BE1 -V BE2 With V T Proportional, V T The current I on the second bridge arm 112 is proportional to the temperature T. 112 It is proportional to temperature T and has a positive temperature coefficient.

[0097] In the above formulas, when the number of the first PN junction unit J1 and the second PN junction unit J2 is other values, the number 8 in formulas (2) to (7) can be replaced by the ratio Z of the number of the second PN junction unit J2 and the first PN junction unit J1.

[0098] Since the currents on the first bridge arm 111 and the second bridge arm 112 are the same, the current in the first feedback transistor MB1 is equal to twice the current in the second bridge arm 112, which is 2V. T lnN / R3.

[0099] The first feedback transistor MB1 and the first output transistor MO1 form a current mirror. In one embodiment, the channel width-to-length ratio of the first feedback transistor MB1 and the first output transistor MO1 is 2:1. Therefore, the first current I1 output from the drain of the first output transistor MO1 is equal to half the current on the first feedback transistor MB1, and equal to the current I on the second bridge arm 112. 112 .

[0100] It can be seen that the current I1 output from the drain of the first output transistor MO1 is negatively related to the resistance of the third resistor R3, and therefore the third resistor R3 can be set as an adjustable resistor to adjust the value of the first current I1.

[0101] In Figure 3 In the embodiment shown, the first PN junction unit J1 and the second PN junction unit J2 are implemented by a self-biasing transistor, which is an N-type transistor, and the gate and the source of the self-biasing transistor are both grounded. In other embodiments of the present disclosure, the first PN junction unit J1 and the second PN junction unit J2 can also be implemented in various ways, and can also be directly implemented by a diode, which is not specially limited in the present disclosure.

[0102] Continuing to refer to Figure 3 In the embodiment shown, the negative temperature coefficient current generation unit 12 can include:

[0103] a second amplifier AMP2, the inverting input terminal of the second amplifier AMP2 being connected to the inverting input terminal of the first amplifier AMP1;

[0104] a second feedback transistor MB2, the source of the second feedback transistor MB2 being connected to the power supply voltage VDD, the gate of the second feedback transistor MB2 being connected to the output terminal of the second amplifier AMP2, and the drain of the second feedback transistor MB2 being connected to the non-inverting input terminal of the second amplifier AMP2;

[0105] a fourth resistor R4, one end of the fourth resistor R4 being connected to the non-inverting input terminal of the second amplifier AMP2, and the other end of the fourth resistor R4 being grounded;

[0106] a second output transistor MO2, the source of the second output transistor MO2 being connected to the power supply voltage VDD, the gate of the second output transistor MO2 being connected to the output terminal of the second amplifier AMP2, and the drain of the second output transistor MO2 being used to output a second current I2.

[0107] As can be analyzed, the second output transistor MO2 and the second feedback transistor MB2 constitute a current mirror. The voltages at the non-inverting input terminal and the inverting input terminal of the second amplifier AMP2 are equal, and the voltage across the fourth resistor R4 is equal to the junction voltage V BE1 of the first PN junction unit J1. Therefore, the current across the second feedback transistor MB2 is equal to V BE1 / R4. Assuming that the ratio of the channel width-length ratio of the second feedback transistor MB2 and the second output transistor MO2 is 1:1, the second current I2 output from the drain of the second output transistor MO2 has:

[0108] I2=V BE1 / R4 (8)

[0109] According to formula (6), we have:

[0110] V BE1 =V BE2 +V T ln8 (9)

[0111] Therefore, there are:

[0112]

[0113] The voltage drop generated by the PN junction when current flows through it is related to the forward current and temperature, the greater the current, the greater the voltage drop, the higher the temperature, the smaller the voltage drop. That is, the PN junction has a negative temperature coefficient voltage. Therefore, V BE2 is a negative temperature coefficient voltage, then I2 is a negative temperature coefficient current.

[0114] And the final output constant current I = I1 + I2, then the formula of the constant current I is:

[0115]

[0116] Where I1 is a positive temperature coefficient current, I2 is a negative temperature coefficient current, V T and V BE2 are values related to temperature T, adjust the resistance values of the third resistor R3 and the fourth resistor R4, when the derivative of formula (11) with respect to temperature T is zero, the constant current I is zero temperature coefficient current.

[0117] In an exemplary embodiment of the present disclosure, the adjustable resistor is implemented by a resistor string, the resistor string including a plurality of series-connected sub-resistors and a plurality of switch elements, the plurality of series-connected sub-resistors having a plurality of connection points, and the two ends of the switch elements are respectively connected to two connection points, and the connection points connected by different switch elements are not completely the same.

[0118] Figure 4 And Figure 5 is a schematic diagram of the adjustable resistor in the embodiment of the present disclosure. Whether the third resistor R3 or the fourth resistor R4 can be implemented by the scheme shown in Figure 4 or Figure 5 .

[0119] Reference Figure 4, the resistance string 401 includes a plurality of series-connected sub-resistors R01, R02, R03, R04, R05, R06, and controllable switching elements Con1, Con2, Con3 connected to the first or second end of the sub-resistors. The first and second ends of the switching element Con1 are connected to the two ends of the sub-resistor R01; the first and second ends of the switching element Con2 are connected to the second end of the sub-resistor R01 / the first end of the sub-resistor R02 / the second end of the sub-resistor R03 / the first end of the sub-resistor R04; and the first and second ends of the switching element Con3 are connected to the second end of the sub-resistor R03 / the first end of the sub-resistor R04 / the second end of the sub-resistor R06. The control terminals of the switching elements Con1, Con2, and Con3 all receive a control signal. The control signal is, for example, from a processor or a one-time programmable controller, which is not particularly limited in the present disclosure.

[0120] In Figure 4 In the embodiment shown, the switching elements are implemented by N-type transistors, and the gates of the N-type transistors serve as the control terminals. In other embodiments of the present disclosure, the switching elements can also be implemented by other elements, which are not particularly limited in the present disclosure.

[0121] Suppose the resistance values of the sub-resistors R01, R02, R03, R04, R05, and R06 are all R, and the resistance values of the resistance string 401 and the on / off states of the switching elements Con1, Con2, and Con3 are shown in Table 1:

[0122] Con1 Con2 Con3 Resistance value of resistance string 401 Off Off Off 6R On Off Off 5R On On Off 3R On Off On 2R Off On On R Off On Off 4R Off Off On 3R

[0123] Table 1

[0124] The above resistance table varies with the number of resistors across which the switching elements Con1, Con2, and Con3 are connected, and those skilled in the art can adjust the number of sub-resistors, the resistance values of the sub-resistors, the number of switching elements, and the connection relationship between the switching elements and the sub-resistors according to the principles shown in the above table, so as to achieve a variety of resistance value settings. Figure 4 The principles shown in the above table can be used to adjust the number of sub-resistors, the resistance values of the sub-resistors, the number of switching elements, and the connection relationship between the switching elements and the sub-resistors, so as to achieve a variety of resistance value settings.

[0125] Referring to Figure 5 , the resistance string 402 includes a plurality of series-connected sub-resistors R01, R02, R03, R04, the first end of the sub-resistor R01 serving as the first end of the resistance string 402, the first ends of the sub-resistors R02, R03, and R04 being connected to the second ends of the sub-resistors R01, R02, and R03, respectively, and the second ends of the sub-resistors R01, R02, and R03 being connected to the second ends of the switching elements Con1, Con2, and Con3, respectively.

[0126] The first end and the second end of the switch element Con1 are connected to two ends of the sub-resistor R01 respectively; the first end and the second end of the switch element Con2 are connected to the first end of the resistor string 402 and the second end of the sub-resistor R02 respectively; the first end and the second end of the switch element Con3 are connected to the first end of the resistor string 402 and the second end of the sub-resistor R03 respectively.

[0127] Supposing the resistance values of the sub-resistors R01, R02, R03 and R04 are all R, the resistance value of the resistor string 402 and the on state of the switch elements Con1, Con2 and Con3 are shown in Table 2:

[0128]

[0129]

[0130] Table 2

[0131] It can be known from Table 2 that, in the embodiment shown in Figure 5 , at most one switch element is controlled to be on to adjust the resistance value of the resistor string 402. Although in the embodiment shown in Figure 5 , the second ends of the two switch elements are only separated by one sub-resistor, in other embodiments of the present disclosure, the second ends of the two switch elements can also be separated by different numbers of sub-resistors, or sub-resistors with different resistance values, or sub-resistors with different numbers and different resistance values. It should be noted that the second end of the switch element with the maximum number of sub-resistors across the two ends needs to be connected to a sub-resistor to prevent the resistance value of the resistor string 402 from being 0.

[0132] Figure 6 is a schematic diagram of a voltage generation module 2 corresponding to the constant current generation module 1 shown in Figure 3

[0133] In the embodiment shown in Figure 6 , when the constant current generation module 1 is as shown in Figure 3 , the negative temperature coefficient voltage output unit 21 can include:

[0134] A first N-type transistor MN1, a drain and a gate of the first N-type transistor MN1 are connected to a second node N2, the second node N2 is connected to a drain of a first output transistor MO1 and a drain of a second output transistor MO2, a source of the first N-type transistor MN1 is grounded, and the second node N2 is used for outputting a negative temperature coefficient voltage Vn.

[0135] The positive temperature coefficient voltage output unit 22 can include:

[0136] ​A second N-type transistor MN2 has a gate connected to the drain of the first output transistor MO1 and the drain of the second output transistor MO2, a source grounded, and a source connected to a third node N3.

[0137] A first P-type transistor MP1 has a source connected to a power supply voltage VDD, a gate and a drain both connected to the third node N3, and the third node N3 for outputting a positive temperature coefficient voltage Vp.

[0138] By Figure 6 As shown in the embodiment, the power supply circuit 100 finally outputs the negative temperature coefficient voltage Vn and the positive temperature coefficient voltage Vp, which together constitute a voltage V related to the characteristics of the transistor and temperature.

[0139] Since the negative temperature coefficient voltage Vn is only affected by the constant current I and the characteristics of the first N-type transistor MN1, and the constant current I is independent of temperature, the negative temperature coefficient voltage Vn is only related to the characteristics of the first N-type transistor MN1.

[0140] According to the foregoing description, the threshold voltage (Vth) of the first N-type transistor MN1 decreases with increasing temperature, and the current flowing through the first N-type transistor MN1 is a constant current I, which is proportional to the difference between the gate-source voltage (Vgs) and the threshold voltage (Vth) of the first N-type transistor MN1. Therefore, when the constant current I is constant, the source voltage of the first N-type transistor MN1 is constant, and the threshold voltage (Vth) decreases, the gate voltage of the first N-type transistor MN1, i.e. Vn, decreases. Therefore, Vn is a negative temperature coefficient voltage, i.e. the higher the temperature, the smaller the voltage of the negative temperature coefficient voltage Vn. In addition, the faster the first N-type transistor MN1 turns on, the smaller the threshold voltage Vth, i.e. the smaller the voltage of the negative temperature coefficient voltage Vn.

[0141] In summary, Figure 6 The negative temperature coefficient voltage output unit 21 shown in the embodiment can automatically output a negative temperature coefficient voltage when the temperature changes. The negative temperature coefficient voltage Vn can be used as the N-type transistor substrate bias voltage, which is used to automatically adjust the N-type transistor substrate bias voltage when the temperature changes, so as to realize the automatic change of the N-type transistor substrate bias voltage with temperature, thereby reducing the increase of the drain current of the N-type transistor due to the increase of temperature.

[0142] In Figure 6In the positive temperature coefficient voltage output unit 22 shown, the second N-type transistor MN2 and the first N-type transistor MN1 form a current mirror, and the drain current of the second N-type transistor MN2 is proportional to the drain current of the first N-type transistor MN1. Therefore, the drain current of the first P-type transistor MP1 is also a constant current with zero temperature coefficient. In the embodiment of the present disclosure, for the purpose of simplifying analysis, the channel width-length ratio of the second N-type transistor MN2 is set to be the same as that of the first N-type transistor MN1, and thus the drain current of the first P-type transistor MP1 is equal to the constant current I on the first N-type transistor MN1.

[0143] The positive temperature coefficient voltage Vp is only affected by the constant current I and the characteristics of the first P-type transistor MP1, and the constant current I is irrelevant to temperature, and thus the positive temperature coefficient voltage Vp is only related to the characteristics of the first P-type transistor MP1.

[0144] In contrast to the N-type transistor, the threshold voltage of the P-type transistor increases with the increase of temperature, and the current on the first P-type transistor MP1 is proportional to the difference between the gate-source voltage (Vgs, negative when turned on) and the threshold voltage (Vth, negative) of the first P-type transistor MP1. Therefore, when the threshold voltage of the first P-type transistor MP1 increases with the increase of temperature, the difference between the gate-source voltage (Vgs) and the threshold voltage (Vth) of the first P-type transistor MP1 remains unchanged, and the gate-source voltage (Vgs) of the first P-type transistor MP1 increases with the increase of temperature. In the case where the source voltage of the first P-type transistor MP1 remains unchanged, the gate voltage of the first P-type transistor MP1, i.e., Vp, also increases with the increase of temperature, and Vp is the positive temperature coefficient voltage.

[0145] In addition, the faster the turn-on speed of the first P-type transistor MP1, the smaller the absolute value of the threshold voltage, and the higher the threshold voltage. In the case where the current of the first P-type transistor MP1 is a constant current I, the gate-source voltage (Vgs) of the first P-type transistor MP1, i.e., the positive temperature coefficient voltage Vp, increases with the increase of the turn-on speed of the first P-type transistor MP1.

[0146] In summary, Figure 6 The positive temperature coefficient voltage output unit 22 shown can automatically output a voltage with a positive temperature coefficient when the temperature changes, or determine the output voltage according to the process angle of the transistor. The positive temperature coefficient voltage Vp can be used as the substrate bias voltage of the P-type transistor, and can be used to automatically adjust the substrate bias voltage of the P-type transistor when the temperature of the chip changes, so as to realize the automatic change of the substrate bias voltage of the P-type transistor with the temperature, and further reduce the increase of the drain current of the P-type transistor due to the increase of temperature.

[0147] Although in the above description, the positive temperature coefficient voltage output unit 22 is used to output a positive temperature coefficient voltage Vp, the positive temperature coefficient voltage output unit 22 can also be used to output a negative temperature coefficient voltage, and the specific implementation process is similar to the above description. Figure 6The negative temperature coefficient voltage output unit 21 and the positive temperature coefficient voltage output unit 22 are provided at the same time, but in actual applications, only the negative temperature coefficient voltage output unit 21 or the positive temperature coefficient voltage output unit 22 can be provided according to needs. It should be noted that when only the positive temperature coefficient voltage output unit 22 is provided, in order to construct the current mirror, the first N-type transistor MN1 also needs to be provided.

[0148] According to a second aspect of the present disclosure, a chip is provided, comprising the power supply circuit according to any one of the above embodiments.

[0149] It should be noted that although several modules or units of the device for action execution are mentioned in the above detailed description, such division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided into embodied by multiple modules or units. Other embodiments of the present disclosure will be readily apparent to those skilled in the art upon considering the specification and practicing the invention disclosed herein. The present application is intended to cover any variations, uses, or adaptive changes to the present disclosure following the general principles of the present disclosure and including common knowledge or conventional technical means in the art that are not disclosed by the present disclosure. The specification and examples are only considered as exemplary, and the true scope and spirit of the present disclosure are indicated by the claims.

Claims

1. A power supply circuit, characterized in that, include: A constant current generation module is used to generate a first current with a positive temperature coefficient and a second current with a negative temperature coefficient, and to generate a constant current based on the first current and the second current. A voltage generation module, including a transistor, is coupled to the constant current generation module and is used to generate a temperature-dependent voltage based on the constant current and transistor characteristics; The constant current generation module includes: A positive temperature coefficient current generating unit is used to generate the first current; A negative temperature coefficient current generating unit is connected to the positive temperature coefficient current generating unit and is used to generate the second current; The positive temperature coefficient current generating unit includes: First amplifier; The first feedback transistor has its source connected to the power supply voltage, its gate connected to the output terminal of the first amplifier, and its drain connected to the first node. The first bridge arm includes a first resistor connected in series and a plurality of first PN junction units connected in parallel. The first end of the first resistor is connected to the first node, and the second end is connected to the inverting input terminal of the first amplifier. The positive terminal of the first PN junction unit is connected to the inverting input terminal of the first amplifier, and the negative terminal is grounded. The second bridge arm includes a second resistor, a third resistor, and multiple second PN junction units connected in series. The first end of the second resistor is connected to the first node, and the second end is connected to the non-inverting input terminal of the first amplifier. The first end of the third resistor is connected to the non-inverting input terminal of the first amplifier, and the second end is connected to the positive terminal of the second PN junction unit. The negative terminal of the second PN junction unit is grounded. The first output transistor has its source connected to the power supply voltage, its gate connected to the output terminal of the first amplifier, and its drain used to output the first current.

2. The power supply circuit as described in claim 1, characterized in that, The voltage generation module includes a positive temperature coefficient voltage output unit and / or a negative temperature coefficient voltage output unit; The positive temperature coefficient voltage output unit is connected to the constant current generation module and includes a P-type transistor monitoring module for outputting a positive temperature coefficient voltage based on the constant current and the state of the P-type transistor; the negative temperature coefficient voltage output unit is connected to the constant current generation module and includes an N-type transistor monitoring module for outputting a negative temperature coefficient voltage based on the constant current and the state of the N-type transistor.

3. The power supply circuit as described in claim 1, characterized in that, The resistance values ​​of the first resistor and the second resistor are equal.

4. The power supply circuit as described in claim 1, characterized in that, The first feedback transistor and the first output transistor form a current mirror, and the ratio of the channel width to length of the first feedback transistor and the first output transistor is 2:

1.

5. The power supply circuit as described in claim 1, characterized in that, The second PN junction has N units, where N = (M + 2). 2 -M 2 The number of the first PN junction units is M 2 There are 1, where M is an integer greater than or equal to 1.

6. The power supply circuit as described in claim 1, characterized in that, The first PN junction unit and the second PN junction unit are implemented by a self-biased transistor, which is an N-type transistor, and the gate and source of the self-biased transistor are both grounded.

7. The power supply circuit as described in claim 1, characterized in that, The third resistor is an adjustable resistor.

8. The power supply circuit as described in claim 2, characterized in that, The negative temperature coefficient current generating unit includes: A second amplifier, the inverting input of which is connected to the inverting input of the first amplifier; The second feedback transistor has its source connected to the power supply voltage, its gate connected to the output terminal of the second amplifier, and its drain connected to the non-inverting input terminal of the second amplifier. The fourth resistor has one end connected to the non-inverting input of the second amplifier and the other end grounded. The second output transistor has its source connected to the power supply voltage, its gate connected to the output terminal of the second amplifier, and its drain used to output the second current.

9. The power supply circuit as described in claim 8, characterized in that, The fourth resistor is an adjustable resistor.

10. The power supply circuit as described in claim 8, characterized in that, The resistance values ​​of the third resistor and the fourth resistor satisfy (kT / q)*ln8 / R3+(kT / q*lnZ+V) BE2 The derivative of R / R4 with respect to temperature T is zero, where R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, K is Boltzmann's constant, q is the electron charge, T is the operating temperature of the power supply circuit, and V is the voltage. BE2 Z is the voltage difference across the second PN junction unit, and Z is the ratio of the number of the second PN junction units to the number of the first PN junction units.

11. The power supply circuit as described in claim 7, characterized in that, The adjustable resistor is implemented by a resistor string, which includes multiple sub-resistors connected in series and multiple switching elements. The multiple sub-resistors connected in series have multiple connection points. The two ends of each switching element are connected to two of the connection points respectively. The connection points connected to different switching elements are not exactly the same.

12. The power supply circuit as described in claim 8, characterized in that, The negative temperature coefficient voltage output unit includes: A first N-type transistor, the drain and gate of the first N-type transistor are connected to a second node, the second node is connected to the drain of the first output transistor and the drain of the second output transistor, the source of the first N-type transistor is grounded, and the second node is used to output the negative temperature coefficient voltage.

13. The power supply circuit as described in claim 8, characterized in that, The positive temperature coefficient voltage output unit includes: The second N-type transistor has its gate connected to the drain of the first output transistor and the drain of the second output transistor, and its source grounded and connected to the third node. A first P-type transistor, the source of which is connected to a power supply voltage, and the gate and drain of which are both connected to the third node, the third node being used to output the positive temperature coefficient voltage.

14. A chip, characterized in that, Includes the power supply circuit as described in any one of claims 1 to 13.

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