Controller Design Method for SIDO Buck Converter Based on High-Order Filter Super-Helical ESO

Abstract

The present invention discloses a controller design method for a SIDO Buck converter based on a high-order filtering super-helical ESO, comprising step 1: establishing a mathematical model of a SIDO Buck converter; step 2: designing a high-order filtering super-helical extended state observer HOFST-ESO; step 2.1: designing a high-order super-helical extended state observer HOST-ESO; step 2.2: combining low-pass filtering and HOST-ESO to perform an order-increasing filter design; and step 3: designing an improved super-helical sliding mode controller. The present invention effectively solves the problem that when a SIDO Buck converter is subjected to load disturbance, there is a serious cross-coupling effect between branches, and at the same time, the output signal is easily affected by uncertain factors such as high-frequency measurement noise.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronic control, and in particular relates to a controller design method of a SIDO Buck converter based on a high-order filtered super-helical ESO. Background Art

[0002] The Single Inductor Dual Output (SIDO) Buck converter can provide two outputs of different voltage levels with only one inductor. It has the advantages of small size, low cost, and high efficiency, and has received extensive attention and application from researchers. Due to the special topology of the SIDO Buck converter, the two output branches are strongly coupled. The load change of one branch will affect the other output branch, and there is a cross-effect, which will affect the dynamic performance and stability of the system. Therefore, in the SIDO Buck converter system, how to suppress the cross-effect and improve the stability is a hot research issue.

[0003] The SIDO Buck converter has small output voltage ripple, small conduction loss and high conversion efficiency in continuous conduction mode (CCM). Therefore, many scholars have studied the control method of CCM SIDO Buck to suppress cross-effects. A literature proposes a cross-derivative state feedback control strategy, which is based on the ripple modeling method, derives the control and cross-coupling transfer functions, and has a voltage mode control with self-loop and cross-loop compensation. The self-loop compensator ensures the stability and dynamic response of the system, and the cross-loop compensator reduces the cross-effects. A literature proposes a digital control CCM SIDO Buck converter using a phase sequence interchange (PSI) scheme, which arranges the phase sequence according to the load conditions to reduce transient cross-regulation. Although the above two control strategies can effectively reduce the cross-effects, they rely on the accurate model of the system and are greatly affected by the perturbation of the system parameters. A literature proposes a capacitor current-capacitor voltage ripple control CCM SIDO Buck converter. This strategy is based on the characteristics that the capacitor current and capacitor voltage can respond to load changes faster to establish a control feedback circuit to indirectly suppress the cross-effects. A literature proposes V 2 Control is used to suppress the cross-effect of pseudo-continuous conduction mode SIDO Buck converter. This strategy adds a low-bandwidth error amplifier before the loop comparator to prevent high-frequency AC ripple voltage output, thereby suppressing the cross-effect. Although the above two references can further suppress coupling, the two control strategies are greatly affected by capacitor parameters and do not take into account the unmodeled part of the system.

[0004] At present, most of the control methods for SIDO Buck are similar to the linear control methods such as digital control, decoupling control, and ripple control mentioned above. Since the CCM SIDO Buck converter is a time-varying nonlinear system with strong coupling, the use of nonlinear control methods for such nonlinear systems can greatly improve the system dynamic performance and stability. However, there are few research reports on the application of nonlinear control strategies such as Active Disturbance Rejection Control (ADRC) and sliding mode control to SIDO converters. Some literature applies sliding mode control to ADRC, which effectively improves the robustness of the system, but the high-frequency switching function in the sliding mode control will cause it to vibrate and affect the dynamic performance of the system. Therefore, how to suppress the jitter in sliding mode control has become an important issue. Summary of the invention

[0005] The purpose of the present invention is to provide a controller design method for a SIDO Buck converter based on a high-order filtered super-helical ESO, which effectively solves the problem that when the SIDO Buck converter is subjected to load disturbance, there is a serious cross-coupling effect between branches, and at the same time, the output signal is easily affected by uncertain factors such as high-frequency measurement noise.

[0006] The technical solution adopted by the present invention is a controller design method for a SIDO Buck converter based on a high-order filtered super-helical ESO, which is specifically implemented in the following steps:

[0007] Step 1: Establish the mathematical model of SIDO Buck converter;

[0008] Step 2: Design of High-Order Filtered Super-Helical Expansion State Observer HOFST-ESO

[0009] Step 2.1: Design of high-order hyperspiral extended state observer HOST-ESO

[0010] First, the fitting models for the main road and branch road are established, and then HOST-ESO is established based on the fitting models respectively;

[0011] Step 2.2: Combine low-pass filtering and HOST-ESO to design an increased-order filter;

[0012] Step 3: Improved super-helical sliding mode controller design

[0013] Based on the traditional sliding mode control, a simple sliding surface is selected and combined with the super-helical sliding mode control law, and the high-frequency switching items are eliminated by the integral link.

[0014] The present invention is also characterized in that:

[0015] Step 1 is specifically as follows:

[0016] The SIDO Buck converter includes a main circuit and branches a and b with the same topological structure. According to the state space averaging method, the mathematical model of the SIDO Buck converter working in CCM mode can be established as follows:

[0017]

[0018] In formula (1), the duty ratio of the two branches satisfies d a +d b =1, V in is the input voltage, S, S a and S b They are the main power switch tube, the branch a power switch tube and the branch b power switch tube, d, d a d b They are S and S a , S b The driving signal duty cycle, i L is the current on the inductor L, C a and C b For the two-branch output capacitor, R a and R b is the load resistance, v oa and v ob The output voltage of the two branches.

[0019] Step 2.1 is as follows:

[0020] Separate the internal coupling parameter influence and external disturbance into lumped disturbance and differentiate equation (1):

[0021]

[0022] To simplify observer design and analysis, define x a1 =v oa , x b1 =v ob , Fitting it to the second-order AD rejection paradigm, equation (3) is expressed as:

[0023]

[0024] In formula (4), B a , B b is a positive real number, B a , B b are the model input gains of branch a and branch b respectively; F a 、F b are positive real numbers, representing the aggregate disturbances of branch a and branch b respectively; u m 、u bRespectively represent the driving signals of the main circuit and branch circuit switch tubes, u m 、u b Respectively with d, d b correspond;

[0025] B a , B b 、F a and F b The exact value of is expressed as:

[0026]

[0027] According to equations (4) and (5), the lumped disturbance F and the rate of change of the lumped disturbance Expanded to x3 and x4, the branch a model is reconstructed as:

[0028]

[0029] The branch b model is reconstructed as:

[0030]

[0031] In order to simplify the control, the exact value of the input gain B in equation (4) is a and B b Replace with the input gain estimate B 0a and B 0b ;

[0032] definition They are v o , F. The estimated value of z = a, b, where z = a represents branch a, and z = b represents branch b. Let the estimated error be:

[0033]

[0034] According to equations (6) and (7), the observer dynamic equation of main road control is obtained:

[0035]

[0036] Observer dynamic equation for branch control:

[0037]

[0038] In formula (9) and formula (10), ξ z1 , z2 , z3 and z4 is a positive real gain; the exponent p i=1+(i-1)μ, i=1, 2,…, r+3, μ∈(-1 / (r+2), 0), where r=2, sign(•) is the sign function.

[0039] Step 2.2 is as follows:

[0040] A low-pass filter is connected in series to the observation channel of HOST-ESO, and the observer equations of branch a and branch b are processed as follows:

[0041]

[0042] In formula (23) where f c is the cutoff frequency of the system, ω cz represents the cutoff angular frequency; transform equation (23) inversely and combine it with HOST-ESO to obtain the HOFST-ESO of branch a and branch b:

[0043]

[0044] In formula (24), u l Represents the control law, l = m, b, when l = m, that is, u m Represents the main control law. When l = b, that is, u b Represents the control law of branch b.

[0045] Step 3 is as follows:

[0046] Define the expected voltage value of branch a and branch b to be unified by v zref It means that the HOFST-ESO error state equation is constructed by equation (25):

[0047]

[0048] In formula (25), ε z and is the tracking error and its rate of change;

[0049] Select the sliding surface S z for:

[0050]

[0051] Among them, take c z >0, satisfies the Hurwitz condition;

[0052] From equation (25) and equation (26), we can get:

[0053]

[0054] Take the super helical sliding mode control law:

[0055]

[0056] In formula (28), λ z is a positive real number, κ z =2λ z ω2+ω1+4ω2 2 ;

[0057] According to equations (27) and (28), the super-helical sliding mode feedback control law is:

[0058]

[0059] The beneficial effects of the present invention are:

[0060] The SIDO Buck converter of the present invention is based on a controller design method of a high-order filtered super-helical ESO. The designed controller solves the problem that when the SIDO Buck converter is subjected to load disturbance, there is a serious cross-coupling effect between branches, and the output signal is easily affected by uncertain factors such as high-frequency measurement noise; the cross-influence suppression effect of the output branches is strong, and the load transient response speed is fast; at the same time, when subjected to input voltage disturbance, the controller of the present invention has a smaller overshoot and response time, and better suppresses chattering, improves the anti-disturbance ability of the system, and enhances the robustness of the system; the main part of the designed controller is not based on an accurate mathematical model, so the control can be transplanted to other SIDO DC-DC converters. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 This is the circuit topology diagram of SIDO Buck converter;

[0062] Figure 2 It is the block diagram of improved sliding mode active disturbance rejection control using HOFST-ESO;

[0063] Figure 3 It is the overall control block diagram of the controller designed by the controller design method of the SIDO Buck converter based on the high-order filtered super-helical ESO of the present invention;

[0064] Figure 4 It is the output voltage waveform of different control strategies under the influence of high-frequency noise;

[0065] FIG5 is a comparison diagram of the experimental results of two control strategies for branch a load disturbance, wherein FIG5(a) is a waveform diagram of the output voltage and output current under linear ADRC control, and FIG5(b) is a waveform diagram of the output voltage and output current under the control of the controller designed by the present invention;

[0066] FIG6 is a comparison diagram of the experimental results of two control strategies for branch b load disturbance, wherein FIG6(a) is a waveform diagram of the output voltage and output current under linear ADRC control, and FIG6(b) is a waveform diagram of the output voltage and output current under the control of the controller designed by the present invention;

[0067] FIG7 is a comparison diagram of the experimental results of two control strategies for input voltage disturbance, wherein FIG7(a) is a waveform diagram of the output voltage and output current under linear ADRC control, and FIG7(b) is a waveform diagram of the output voltage and output current under the control of the controller designed by the present invention. DETAILED DESCRIPTION

[0068] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0069] Example 1

[0070] This embodiment provides a controller design method for a SIDO Buck converter based on a high-order filtered super-helical ESO. First, the internal parameter influence of the converter and the external disturbance are separated into lumped disturbances, and an ADRC fitting model is established. Secondly, in view of the limited tracking accuracy and weak noise suppression ability of the traditional linear ESO, a HOFST-ESO is designed to achieve more accurate estimation and compensation of the lumped disturbance, and improve the ability to suppress cross-influence and noise. The convergence of the observer is theoretically proved based on the finite time stability theory. Then, in view of the fact that the traditional sliding mode control affects the dynamic performance of the system due to the jitter, an improved super-helical sliding mode feedback control law is designed to ensure that the sliding mode stage and the arrival stage can converge quickly, and at the same time better suppress the jitter and enhance the stability and robustness of the system. The specific implementation is as follows:

[0071] Step 1: Establish the mathematical model of SIDO Buck converter;

[0072] Step 2: Design of High-Order Filtered Super-Helical Expansion State Observer HOFST-ESO

[0073] Step 2.1: Design of high-order hyperspiral extended state observer HOST-ESO

[0074] First, the fitting models for the main road and branch road are established, and then HOST-ESO is established based on the fitting models respectively;

[0075] Step 2.2: Combine low-pass filtering and HOST-ESO to design an increased-order filter;

[0076] Step 3: Improved super-helical sliding mode controller design

[0077] Based on the traditional sliding mode control, a simple sliding surface is selected and combined with the super-helical sliding mode control law, and the high-frequency switching items are eliminated by the integral link.

[0078] Example 2

[0079] This embodiment provides a controller design method for a SIDO Buck converter based on a high-order filtered super-helical ESO. Based on Embodiment 1, the method is specifically implemented according to the following steps:

[0080] Step 1: Establish the mathematical model of SIDO Buck converter;

[0081] like Figure 1 As shown, the SIDO Buck converter includes a main circuit and branches a and b with the same topological structure. According to the state space averaging method, the mathematical model of the SIDO Buck converter working in CCM mode can be established as follows:

[0082]

[0083] In formula (1), the duty ratio of the two branches satisfies d a +d b =1, V in is the input voltage, S, S a and S b They are the main power switch tube, the branch a power switch tube and the branch b power switch tube, d, d a d b They are S and S a , S b The driving signal duty cycle, i L is the current on the inductor L, C a and C b For the two-branch output capacitor, R a and R b is the load resistance, v oa and v ob is the output voltage of the two branches, VD is the freewheeling diode;

[0084] By obtaining the idealized SIDO Buck converter DC steady-state equation at the static operating point, we can get the steady-state DC voltage gains of the two output branches:

[0085]

[0086] According to formula (2), the output voltage is not only related to the switch duty cycle and load of the branch, but also to the main switch duty cycle, the switch duty cycle of the other branch, and the load. Therefore, there is a strong coupling between the branches, and there is a large cross-influence. When designing a controller, it is necessary not only to consider improving the transient performance of the system, but also to have excellent decoupling capabilities.

[0087] Step 2: Design of High-Order Filtered Super-Helical Expansion State Observer HOFST-ESO

[0088] Step 2.1: Design of high-order hyperspiral extended state observer HOST-ESO

[0089] First, the fitting models for the main road and branch road are established, and then HOST-ESO is established based on the fitting models respectively;

[0090] Specifically:

[0091] Separate the internal coupling parameter influence and external disturbance into lumped disturbance and differentiate equation (1):

[0092]

[0093] To simplify observer design and analysis, define x a1 =v oa , x b1 =v ob , Fitting it to the second-order AD rejection paradigm, equation (3) is expressed as:

[0094]

[0095] In formula (4), B a , B b is a positive real number, B a , B b are the model input gains of branch a and branch b respectively; F a 、F b are positive real numbers, representing the aggregate disturbances of branch a and branch b respectively; u m 、u b Respectively represent the driving signals of the main circuit and branch circuit switch tubes, u m 、u b Respectively with d, d b correspond;

[0096] B a , B b 、F a and F b The exact value of is expressed as:

[0097]

[0098] According to equations (4) and (5), the lumped disturbance F and the rate of change of the lumped disturbance Expanded to x3 and x4, the branch a model is reconstructed as:

[0099]

[0100] The branch b model is reconstructed as:

[0101]

[0102] In order to simplify the control, the exact value of the input gain B in equation (4) is a and B b Replace with the input gain estimate B 0a and B 0b ;

[0103] definition They are v o , F. The estimated value of z = a, b, where z = a represents branch a, and z = b represents branch b. Let the estimated error be:

[0104]

[0105] According to equations (6) and (7), the observer dynamic equation of main road control is obtained:

[0106]

[0107] Observer dynamic equation for branch control:

[0108]

[0109] In formula (9) and formula (10), ξ z1 , z2 , z3 and z4 is a positive real gain; the exponent p i =1+(i-1)μ, i=1, 2,…, r+3, μ∈(-1 / (r+2), 0), where r=2, sign(·) is the sign function.

[0110] Step 2.2: Combine low-pass filtering and HOST-ESO to design an increased-order filter;

[0111] Since SIDO Buck converters are susceptible to various random uncertainties in practical applications, such as temperature changes, device parameter perturbations, and sensor sampling errors, Gaussian white noise will be generated when the converter samples feedback data, resulting in weak observer tracking capabilities and poor control stability. Combining low-pass filtering with HOST-ESO can solve the above problems well. At the same time, the gain range of HOST-ESO is also expanded, allowing the system to take into account both rapidity and stability.

[0112] Step 2.2 is as follows:

[0113] A low-pass filter is connected in series to the observation channel of HOST-ESO, and the observer equations of branch a and branch b are processed as follows:

[0114]

[0115] In formula (23) where f c is the cutoff frequency of the system, ω cz represents the cut-off angular frequency;

[0116] By transforming equation (23) inversely and combining it with HOST-ESO, we can get the HOFST-ESO of branch a and branch b:

[0117] In formula (24), u l Represents the control law, l = m, b, when l = m, that is, u m Represents the main control law. When l = b, that is, u b Represents the control law of branch b.

[0118] The block diagram of the improved sliding mode active disturbance rejection control using HOFST-ESO is as follows: Figure 2 shown.

[0119] It has been proved that the observer is finite time stable, and the low-pass filter connected in series on the HOST-ESO system channel can suppress the noise in the high frequency band. Adding a series correction device to the nonlinear system can eliminate the self-sustained oscillation of the system and improve the stability of the nonlinear system.

[0120] Step 3: Improved super-helical sliding mode controller design

[0121] Based on the traditional sliding mode control, a simple sliding surface is selected and combined with the super-helical sliding mode control law, and the high-frequency switching term is eliminated by the integral link, so that the control can suppress the chattering well while retaining the advantages of the traditional sliding mode.

[0122] Example 3

[0123] This embodiment provides a controller design method for a SIDO Buck converter based on a high-order filtered super-helical ESO. Based on Embodiments 1-2, the method is implemented in the following steps:

[0124] Step 1: Establish the mathematical model of SIDO Buck converter;

[0125] Step 2: Design of High-Order Filtered Super-Helical Expansion State Observer HOFST-ESO

[0126] Step 2.1: Design of high-order hyperspiral extended state observer HOST-ESO

[0127] First, the fitting models for the main road and branch road are established, and then HOST-ESO is established based on the fitting models respectively;

[0128] Step 2.2: Combine low-pass filtering and HOST-ESO to design an increased-order filter;

[0129] Step 3: Improved super-helical sliding mode controller design

[0130] On the basis of traditional sliding mode control, a simple sliding mode surface is selected and combined with the super-helical sliding mode control law, and the high-frequency switching term is eliminated by the integral link;

[0131] Specifically:

[0132] Define the expected voltage value of branch a and branch b to be unified by v zref It means that the HOFST-ESO error state equation is constructed by equation (25):

[0133]

[0134] In formula (25), ε z and is the tracking error and its rate of change;

[0135] Select the sliding surface S z for:

[0136]

[0137] Among them, take c z >0, satisfies the Hurwitz condition;

[0138] From equation (25) and equation (26), we can get:

[0139]

[0140] Take the super helical sliding mode control law:

[0141]

[0142] In formula (28), λ z is a positive real number, κ z =2λ z ω2+ω1+4ω2 2 ;

[0143] According to equations (27) and (28), the super-helical sliding mode feedback control law is:

[0144]

[0145] From the above content, it can be seen that ADRC itself has the advantages of being independent of physical models, strong anti-interference, and self-decoupling. Therefore, the present invention uses traditional ADRC as a framework to design a controller system that combines HOFST-ESO with super-spiral sliding mode feedback control law. The main strategy of the controller designed by the present invention to control the SIDO Buck converter is to collect the output voltage of branch a and feed it back to the main controller to control the main switch tube, collect the output voltage of branch b and feed it back to the branch controller to control the two branch switches, and control the stability of the output voltages of branches a and b through the coordination of the main switch tube and the branch switch tube. The overall control block diagram is as follows: Figure 3 shown.

[0146] Simulation Analysis

[0147] In order to verify the noise suppression capability of the observer proposed in this paper, a second-order linear ADRC and the control system designed by the present invention were respectively built in the MATLAB simulation software, and the SIDO Buck converter was closed-loop controlled, and the noise suppression capability of the linear third-order ESO and HOFST-ESO was compared. Secondly, in order to compare and verify the effectiveness of the control strategy of the controller designed by the present invention and the better control capability, a self-closed-loop control system of the converter based on the control strategy of the linear ADRC and the controller designed by the present invention was built based on the semi-physical simulation experimental platform of the Yuankuan Energy Simulator (MT6020), and the suppression capability of the two control methods to input disturbances and load disturbances was compared. The circuit parameters and the control parameters of the controller designed by the present invention are shown in Tables 1 and 2.

[0148] Table 1 SIDO Buck-Boost converter circuit parameters

[0149]

[0150] Table 2 Control strategy parameters of the present invention

[0151]

[0152] (I) Simulation analysis of high-frequency noise impact

[0153] In actual operation, due to various device parameter perturbations and the influence of the external environment, the signals collected by the SIDO Buck sensor usually contain high-frequency noise. Therefore, this section verifies the effectiveness of the proposed observer for noise suppression through MATLAB simulation. Figure 4 shown.

[0154] Depend on Figure 4It can be seen that when Gaussian white noise with a power spectral density (PSD) height of 0.2 and a frequency of 500kHz is added to branches a and b at the same time, the system output voltage results of the two control strategies are significantly compared. The voltage waveforms of the two branches under the traditional linear third-order ESO have large oscillations, and the fluctuation amplitude is about 2V. The oscillation amplitude of the voltage waveforms of the two branches under HOFST-ESO is small, and the fluctuation amplitude is about 0.2V. Under the control of this paper, the voltage signal has reduced burrs, smaller oscillations, and is smoother. It effectively suppresses high-frequency components, restores the original signal more, and improves the accuracy of the observer. At the same time, it can be seen from the figure that after being affected by noise, the output voltage waveform under linear ADRC has a large startup overshoot, slow response speed, and poor dynamic performance. The control strategy of the controller designed by the present invention effectively suppresses noise disturbances, so that the system starts without overshoot, has a fast response speed, and good dynamic performance, thereby verifying the correctness and effectiveness of the theory.

[0155] 2. Comparative analysis of cross-effect and disturbance experiments

[0156] In order to verify the decoupling capability and high anti-interference performance of the control method, a comparative experiment was conducted between the control strategy of the controller designed by the present invention and the second-order linear ADRC control strategy. The circuit parameters used in the simulation are the same as those in the experiment.

[0157] 1) Cross-effect and load transient performance

[0158] Figure 5 shows the experimental results of the system anti-disturbance capability and cross-branch influence of the two control strategies under the 3-fold load disturbance of branch a. Analysis shows that: under ADRC control, when the load becomes heavier and the output current changes from 1A to 3A, the output voltage of branch a drops by 1.5V, the adjustment time is 36ms, and the cross-influence of branch a on branch b causes the voltage of branch b to drop by 0.84V, and it takes 28ms to adjust to a steady state. When the load becomes lighter and the output current changes from 3A to 1A, the overshoot of the output voltage of branch a is 1.2V, the adjustment time is 36ms, and the cross-influence of branch a on branch b causes the voltage of branch b to rise by 0.8V, and it takes 20ms to adjust to a steady state; under the control of this paper, when the load becomes heavier, the output voltage of branch a only drops by 0.4V, the adjustment time is only 7ms, and the cross-influence of branch a on branch b only causes the output voltage of branch b to drop by 0.08V, and it takes 7ms to adjust to a steady state. When the load becomes lighter and the output current changes from 3A to 1A, the overshoot of the output voltage of branch a is only 0.4V, and the adjustment time is only 8ms. The cross-effect of branch a on branch b causes the voltage of branch b to rise by only 0.1V, and it takes 8ms to adjust to a steady state.

[0159] Analysis shows that: under ADRC control, when the load becomes heavier and the output current changes from 1A to 3A, the output voltage of branch b drops by 1.3V, the adjustment time is 35ms, and the cross-effect of branch b on branch a causes the voltage of branch a to drop by 1.1V, which takes 33ms to adjust to a steady state. When the load becomes lighter and the output current changes from 3A to 1A, the overshoot of the output voltage of branch b is 0.9V, the adjustment time is 44ms, and the cross-effect of branch b on branch a causes the voltage of branch a to rise by 0.7V, which takes 45ms to adjust to a steady state; under the control of the controller of the present invention, when the load becomes heavier, the output voltage of branch b only drops by 0.5V, the adjustment time is only 7ms, and the cross-effect of branch b on branch a only causes the output voltage of branch b to drop by 0.1V, which takes 7ms to adjust to a steady state. When the load becomes lighter and the output current changes from 3A to 1A, the overshoot of the output voltage of branch b is only 0.4V, and the adjustment time is only 9ms. The cross-effect of branch b on branch a causes the voltage of branch b to rise by only 0.08V, and it takes 6ms to adjust to a steady state.

[0160] It can be seen from the comparison of the above load disturbance experiments that when subjected to triple load disturbance, the output voltage change of the traditional linear ADRC control is obviously 2 to 10 times that of the control in this paper, and the adjustment time is 5 to 8 times that of the control in this paper. At the same time, the cross-influence is obviously greater than the control of the controller of the present invention. Therefore, the control strategy of the controller designed by the present invention controls the SIDOBuck converter with better anti-interference performance, more prominent cross-influence suppression ability and stronger robustness.

[0161] 2) Comparative analysis of input disturbance experiments

[0162] Figure 7 shows the experimental results of the transient performance of the system under input voltage disturbance under two control strategies. Analysis shows that: under the traditional linear ADRC control, when the input voltage changes from 30V to 40V, the output voltage overshoot of branch a is 1.5V, the adjustment time is 30ms, the voltage overshoot of branch b is 0.6V, and it takes 26ms to adjust to steady state; when the input voltage changes from 40V to 30V, the output voltage of branch a drops to 1.3V, the adjustment time is 30ms, the output voltage of branch b drops to 0.5V, and it takes 30ms to adjust to steady state; under the control of this paper, when the input voltage increases by 10V, the output voltage overshoot of branch a is only 0.4V, and the adjustment time is only 9ms. The output voltage of branch b only increases by 0.2V, and it takes only 10ms to adjust to steady state. When the input voltage drops by 10V, the output voltage of branch a drops by only 0.4V, and the adjustment time is 16ms. The voltage of branch b drops by only 0.1V, and it takes 15ms to adjust to a steady state.

[0163] It can be seen from the input disturbance experiment that when the input voltage changes, the control of the controller of the present invention has a smaller output voltage change, a shorter adjustment time, and a smaller cross-effect than the traditional linear ADRC control. Therefore, it can be seen that the control strategy of the controller designed by the present invention controls the SIDO Buck converter with more stable dynamic performance and more outstanding decoupling ability.

[0164] From the above theoretical and experimental analysis, it can be seen that: 1) The CCM SIDO Buck converter adopts the linear ADRC of the traditional ESO. After adding the influence of noise, the output voltage waveform has large burrs and severe oscillations, the noise suppression ability is not strong, and there is a large observation error; compared with the traditional ESO, the improved sliding mode anti-disturbance control CCM SIDOBuck converter based on HOFST-ESO proposed in the present invention has a smooth output voltage waveform, small oscillation, significant noise suppression ability, and strong estimation compensation ability;

[0165] 2) The cross-influence suppression effect of the output branch of the CCM SIDO Buck converter under the control of the controller designed in the present invention is stronger than that of the traditional ADRC, and the load transient response speed is fast. At the same time, when subjected to input voltage disturbances, it has smaller overshoot and response time, thereby improving the anti-disturbance ability of the system and enhancing the robustness of the system.

[0166] 3) The main part of the controller designed by the present invention is not based on an accurate mathematical model, so the control can be transplanted to other SIDO DC-DC converters.

Claims

1. A controller design method for SIDO Buck converter based on high-order filtered super-helical ESO, characterized in that: Follow the steps below to implement it: Step 1: Establish the mathematical model of SIDO Buck converter; The step 1 specifically comprises: The SIDO Buck converter includes a main circuit and branches a and b with the same topological structure. The mathematical model of the SIDO Buck converter working in CCM mode is established according to the state space averaging method: （1） In formula (1), the duty ratio of the two branches satisfies d a + d b =1, V in is the input voltage, S , S a and S b They are the main power switch tube, branch a power switch tube and branch b power switch tube respectively. d , d a , d b They are S , S a , S b The driving signal duty cycle, i L For inductance L The current on C a and C b are the two-branch output capacitors, R a and R b is the load resistance, v oa and v ob is the output voltage of the two branches; Step 2: Design of High-Order Filtered Super-Helical Expansion State Observer HOFST-ESO Step 2.1: Design of high-order hyperspiral extended state observer HOST-ESO First, the fitting models for the main road and branch road are established, and then HOST-ESO is established based on the fitting models respectively; The step 2.1 is specifically as follows: Separate the internal coupling parameter influence and external disturbance into lumped disturbance and differentiate equation (1): （3） To simplify observer design and analysis, we define , , , , fitting it into the second-order AD rejection paradigm, then equation (3) is expressed as: （4） In formula (4), B a , B b is a positive real number, B a , B b are the input gains of the branch a and branch b models respectively; F a , F b are positive real numbers, representing the lumped disturbances of branch a and branch b respectively; u m , u b Respectively represent the driving signals of the main circuit and branch circuit switches, u m , u b Respectively d , d b correspond; B a , B b , F a and F b The exact value of is expressed as: （5） According to equations (4) and (5), the lumped disturbance F and the rate of change of the lumped disturbance Expand to x 3 and x 4, then the branch a model is reconstructed as: （6） The branch b model is reconstructed as: （7） In order to simplify the control, the exact value of the input gain in equation (4) is B a and B b Replace with the input gain estimate B 0a and B 0b ; definition , , , They are , , F , The estimated value of z=a,b, where z=a represents branch a and z=b represents branch b. Let the estimated error be: （8） According to equations (6) and (7), the observer dynamic equation of main road control is obtained: （9） Observer dynamic equation for branch control: （10） In formula (9) and formula (10), , , and is a positive real gain; the exponent , i= 1, 2, ..., r +3, ,in r =2, is a symbolic function; Step 2.2: Combine low-pass filtering and HOST-ESO to design an increased-order filter; The step 2.2 is specifically as follows: A low-pass filter is connected in series to the observation channel of HOST-ESO, and the observer equations of branch a and branch b are processed as follows: （23） In formula (23), ,in f c is the cut-off frequency of the system, represents the cut-off angular frequency; By transforming equation (23) inversely and combining it with HOST-ESO, we can get the HOFST-ESO of branch a and branch b: （24） In formula (24), u l represents the control law, l =m,b, when l =m, that is u m Represents the main road control law, when l =b, that is u b represents the control law of branch b; Step 3: Improved super-helical sliding mode controller design On the basis of traditional sliding mode control, a simple sliding mode surface is selected and combined with the super-helical sliding mode control law, and the high-frequency switching term is eliminated by the integral link; The step 3 is specifically as follows: The expected voltage values ​​of branch a and branch b are defined as v zref It means that the HOFST-ESO error state equation is constructed by equation (25): （25） In formula (25), and is the tracking error and its rate of change; Select sliding surface S z for: （26） Among them, take c z >0, satisfies the Hurwitz condition; From equation (25) and equation (26), we can get: （27） Take the super helical sliding mode control law: （28） In formula (28), is a positive real number, ; According to equations (27) and (28), the super-helical sliding mode feedback control law is: （29）。

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