Static reverse bias test circuit and electronic device
By using a static reverse bias test circuit, leakage current detection of semiconductor devices under high voltage conditions is performed using reverse bias control and switching circuits. This solves the problem that leakage current characteristics cannot be evaluated in existing technologies, and enables the evaluation of the reliability and stability of device performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHENXIN TECH (SHANGHAI) CO LTD
- Filing Date
- 2023-12-18
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies cannot effectively assess the leakage current characteristics of semiconductor devices under reverse voltage, leading to problems such as increased energy consumption, degraded device performance, and thermal runaway.
A static reverse bias test circuit is adopted. The reverse bias control circuit provides a cutoff voltage to the device under test. The switching circuit controls the device to be grounded or connected to the measurement circuit. The measurement circuit outputs the leakage current detection result and combines current limiting and high-impedance clamping circuits for protection.
It enables performance testing of the device under test under continuous high voltage, ensuring the reliability and stability of the device under extreme conditions and avoiding the need for frequent fuse replacements.
Smart Images
Figure CN117741380B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of reverse bias testing technology, and in particular to a static reverse bias testing circuit and electronic device. Background Technology
[0002] Semiconductor static reverse bias testing refers to the process where a semiconductor device exhibits a certain reverse leakage current under reverse voltage. This test is primarily used to evaluate the leakage current characteristics of a semiconductor device under reverse voltage to determine its performance and reliability. In semiconductor devices, the presence of leakage current under reverse voltage can lead to increased power consumption, degraded device performance, and even thermal runaway. Therefore, evaluating the leakage current characteristics of a device under reverse voltage is crucial for ensuring its long-term stability and reliability.
[0003] Currently, referring to Figure 1 When performing static reverse bias testing on a semiconductor, the power supply provides reverse bias power to the device under test (DUT), and the voltage drop across the resistor is measured to calculate the leakage current. However, directly measuring the leakage current cannot obtain the performance of the DUT under continuous high voltage conditions. Summary of the Invention
[0004] To facilitate the testing of the reverse bias performance of the device under test under continuous high voltage conditions, this application provides a static reverse bias test circuit and electronic equipment.
[0005] Firstly, this application provides a static reverse bias test circuit, which adopts the following technical solution:
[0006] A static reverse bias test circuit, comprising:
[0007] A reverse bias control circuit is used to connect to the device under test (DUT) and provide a cutoff voltage to the DUT; the DUT is connected in series between the power supply and the switching circuit.
[0008] A switching circuit, responding to an external trigger signal, controls the device under test (DUT) to be grounded or connected to the measurement circuit; wherein, when the DUT is grounded, the power supply continuously applies a reverse bias voltage to the DUT.
[0009] The measurement circuit outputs leakage current detection results when connected to the device under test (DUT).
[0010] By adopting the above technical solution, the reverse bias control circuit ensures that the device under test (DUT) is always in a reverse bias state. At the start of the test, the switching circuit controls the DUT to be grounded, that is, a reverse bias voltage is applied across the DUT. Since the DUT is directly grounded at this time, the voltage output by the power supply is applied across the DUT. Then, the switching circuit controls the DUT to be connected to the measurement circuit. The measurement circuit outputs the leakage current detection result of the DUT under a continuous high voltage environment, thereby achieving the effect of testing the performance of the DUT under simulated extreme conditions.
[0011] Optionally, the reverse bias control circuit includes a voltage source;
[0012] The positive terminal of the voltage source is connected to one end of the device under test (DUT) and the switching circuit, and the negative terminal is connected to the control terminal of the DUT; or,
[0013] The negative terminal of the voltage source is connected to one end of the device under test (DUT) and the switching circuit, while the positive terminal is connected to the control terminal of the DUT.
[0014] By adopting the above technical solution, depending on the type of device under test (DUT), the voltage source continuously provides positive or negative voltage to the controller of the DUT so that the DUT is turned off, thereby achieving the goal of always providing a cutoff voltage to the DUT.
[0015] Optionally, the switching circuit uses a single-pole double-throw switch SW; the common terminal of the single-pole double-throw switch SW is connected to the other end of the device under test (DUT), the first contact of the single-pole double-throw switch SW is connected to the measurement circuit, and the second contact of the single-pole double-throw switch SW is grounded.
[0016] By adopting the above technical solution, the first contact of the single-pole double-throw switch SW is connected to the measurement circuit, and the second contact is grounded. The single-pole double-throw switch SW facilitates the connection of the device under test (DUT) to the measurement circuit or the grounding of the DUT, thereby realizing the switching of the working state.
[0017] Optionally, it may also include a protection circuit, which includes a high-impedance clamping sub-circuit and / or a current-limiting sub-circuit;
[0018] The current limiting sub-circuit is located between the power supply and the device under test (DUT); the high-impedance clamping sub-circuit is connected to the switching circuit and the measurement circuit to provide a high-impedance branch and clamp the voltage across the switching circuit and the measurement circuit.
[0019] By adopting the above technical solution, current limiting sub-circuit is used for current limiting, and high-impedance clamping sub-circuit is used for voltage clamping. The switching circuit and measurement circuit are protected from the two angles of current limiting and voltage clamping. This does not rely on the protection circuit through fuse blowing, thus achieving the protection function without the need for frequent fuse replacement.
[0020] Optionally, the current limiting circuit includes a depletion-type field-effect transistor Q1 and a first resistor R1;
[0021] The depletion-type field-effect transistor Q1 has its gate connected to one end of the first resistor R1 and one end of the device under test (DUT), its source connected to the other end of the first resistor R1, and its drain connected to the power supply.
[0022] By adopting the above technical solution, the gate-source voltage of the depletion-mode field-effect transistor Q1 is equal to the voltage drop of the first resistor R1. The voltage drop of the first resistor R1 is positively correlated with the current flowing through the first resistor R1. When the current flowing through the first resistor R1 is too high, the voltage drop of the first resistor R1 increases until the gate-source voltage of the depletion-mode field-effect transistor Q1 reaches the pinch-off voltage, causing the depletion-mode field-effect transistor Q1 to turn off, thereby achieving the current limiting effect.
[0023] Optionally, the current limiting circuit further includes a fuse, which is connected in series between the drain of the depletion-type field-effect transistor Q1 and the power supply.
[0024] By adopting the above technical solution and setting a fuse, the overcurrent protection becomes more reliable.
[0025] Optionally, the high-impedance clamping sub-circuit includes a clamping structure and a high-impedance structure;
[0026] The clamping structure and the high-resistivity structure are connected in series, and the clamping structure and the high-resistivity structure are connected in parallel with the switching circuit and the measurement circuit; the clamping structure is used to clamp the voltage of the switching circuit and the measurement circuit; the high-resistivity structure is used to provide a high-resistivity branch.
[0027] By adopting the above technical solution, and by setting the high-resistivity structure and the clamping structure in series, the high-resistivity structure prevents the current from passing through while clamping the voltage of the switching circuit and the measurement circuit, so that the leakage current flows to the measurement circuit, so that the measurement circuit can obtain a more accurate leakage current detection result.
[0028] Optionally, the clamping structure includes a first diode D1 and a second diode D2;
[0029] The cathode of the first diode D1 is connected to the switching circuit and the device under test (DUT), and the anode is connected to the anode of the second diode D2; the cathode of the second diode D2 is connected to the high-resistivity structure.
[0030] By adopting the above technical solution, the cathodes of the first diode D1 and the second diode D2 are connected in series. Utilizing the unidirectional conductivity of the first diode D1 and the second diode D2, the positive voltages of the first diode D1 and the second diode D2 are limited to their forward voltages, thereby achieving voltage clamping.
[0031] Optionally, the high-impedance structure includes a high-impedance operational amplifier U1, a current sensor U2, a third diode D3, and a shunt resistor R2;
[0032] The high-impedance operational amplifier U1 has its first input terminal connected to one end of the current sensor U2, the anode of the third diode D3, and one end of the shunt resistor R2. Its second input terminal is connected to the other end of the current sensor U2, the measurement circuit, and ground. Its output terminal is connected to the cathode of the third diode D3, the other end of the shunt resistor R2, and the clamping structure.
[0033] By adopting the above technical solution, when the output voltage of the high-impedance operational amplifier U1 decreases, the third diode D3 transmits current from the current sensor U2 and conducts. The shunt resistor R2 is connected in parallel with the third diode D3 to adjust the current, thereby achieving the high-impedance state and preventing leakage current from flowing through.
[0034] Secondly, this application provides an electronic device that adopts the following technical solution:
[0035] An electronic device includes a static reverse bias test circuit as described above. Attached Figure Description
[0036] Figure 1 This is a circuit diagram of reverse bias testing in related technologies.
[0037] Figure 2 This is a block diagram of a static reverse bias test circuit according to one embodiment of this application.
[0038] Figure 3 This is a connection structure diagram of a static reverse bias test circuit according to one embodiment of this application.
[0039] Figure 4 This is a connection structure diagram of a high-impedance clamping sub-circuit according to one embodiment of this application.
[0040] Explanation of reference numerals in the attached diagram: 1. Reverse bias control circuit; 2. Switching circuit; 3. Measurement circuit; 4. Current limiting sub-circuit; 5. High-impedance clamping sub-circuit; 51. Clamping structure; 52. High-impedance structure. Detailed Implementation
[0041] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0042] This application discloses a static reverse bias test circuit. (Refer to...) Figure 1 A static reverse bias test circuit includes
[0043] Reverse bias control circuit 1 is used to connect to the device under test (DUT) and provide a cutoff voltage to the DUT.
[0044] The device under test (DUT) is connected in series between the power supply and the switching circuit 2.
[0045] The device under test (DUT) can be either an N-type transistor or a P-type transistor.
[0046] The cutoff voltage refers to the voltage input to the gate (controller) of the device under test (DUT) reaching or exceeding a certain value, at which point the conductive channel between the source and drain is cut off, and no current flows between them. At this point, the DUT enters the cutoff state. It should be understood that different DUT models, structures, materials, and manufacturing processes vary, therefore the cutoff voltage of the DUT will also differ; the cutoff voltage can be positive, negative, or zero.
[0047] Switching circuit 2, in response to an external trigger signal, controls the device under test (DUT) to be grounded or connected to the measurement circuit 3; wherein, when the DUT is grounded, the power supply continuously applies a reverse bias voltage to the DUT.
[0048] Measurement circuit 3, when connected to the device under test (DUT), outputs leakage current detection results.
[0049] In the above embodiment, the reverse bias control circuit 1 ensures that the device under test (DUT) is always in a reverse bias state. At the start of the test, the switching circuit 2 controls the DUT to be grounded, that is, a reverse bias voltage is applied across the DUT. Since the DUT is directly grounded at this time, the voltage output by the power supply is applied across the DUT, providing a reverse high voltage environment for the DUT. Subsequently, the switching circuit controls the DUT to be connected to the measurement circuit 3. The measurement circuit 3 outputs the leakage current detection result of the DUT under the continuous high voltage environment, thereby achieving the effect of testing the performance of the DUT under simulated extreme conditions.
[0050] It should be understood that, as one possible implementation of measurement circuit 3, measurement circuit 3 includes a sampling resistor and a voltage measuring device. By connecting the sampling resistor in series with the device under test (DUT), and then measuring the voltage division across the sampling resistor using the voltage measuring device, the current across the sampling resistor is calculated, which is the leakage current of the DUT. When applying a reverse bias voltage to the DUT, the DUT is directly grounded instead of being connected to measurement circuit 3. This is to avoid the voltage division of the DUT by the sampling resistor in measurement circuit 3, so that all the power supply output is applied to the DUT, thereby achieving a better simulation of applying a reverse high voltage environment to the DUT.
[0051] It should also be noted that the test circuit also includes a heating device, which can be an electric heating plate or a temperature chamber; when the device under test (DUT) is grounded, the heating device raises the ambient temperature of the DUT, thereby facilitating the detection of leakage current of the DUT under extreme conditions of high temperature and high pressure.
[0052] Reference Figure 2 As one implementation of the reverse bias control circuit 1, the reverse bias control circuit 1 includes a voltage source;
[0053] The positive terminal of the voltage source is connected to one end of the device under test (DUT) and switching circuit 2, and the negative terminal is connected to the control terminal of the DUT; or,
[0054] The negative terminal of the voltage source is connected to one end of the device under test (DUT) and the switching circuit 2, while the positive terminal is connected to the control terminal of the DUT.
[0055] It should be understood that when the cutoff voltage of the device under test (DUT) is negative, the positive terminal of the voltage source is connected to one end of the DUT and the switching circuit 2, and the negative terminal is connected to the control terminal of the DUT. When the cutoff voltage of the DUT is positive, the negative terminal of the voltage source is connected to one end of the DUT and the switching circuit 2, and the positive terminal is connected to the control terminal of the DUT, thereby achieving stable pinch-off of the DUT.
[0056] In the above embodiments, depending on the type of device under test (DUT), the voltage source continuously provides positive or negative voltage to the controller of the DUT so that the DUT is turned off, thereby achieving the goal of always providing a cutoff voltage to the DUT.
[0057] Reference Figure 3 As one implementation of the switching circuit 2, the switching circuit 2 uses a single-pole double-throw switch SW; the common terminal of the single-pole double-throw switch SW is connected to the other end of the device under test (DUT), the first contact of the single-pole double-throw switch SW is connected to the measurement circuit 3, and the second contact of the single-pole double-throw switch SW is grounded.
[0058] It should be understood that when the common terminal of the single-pole double-throw switch SW is connected to the second contact, the device under test (DUT) is grounded. At this time, an aging process is performed on the DUT, which involves continuously applying a reverse high voltage to the cut-off test voltage to raise the temperature of the DUT. When the common terminal of the single-pole double-throw switch SW is connected to the first contact, the DUT is connected to the measurement circuit 3. At this time, leakage current is detected on the cut-off DUT.
[0059] In the above embodiment, the first contact of the single-pole double-throw switch SW is connected to the measurement circuit 3, and the second contact is grounded. The single-pole double-throw switch SW facilitates the connection of the device under test (DUT) to the measurement circuit 3 or the grounding of the DUT, thereby realizing the switching of the working state.
[0060] Reference Figure 3 As a further embodiment of the static reverse bias test circuit, the static reverse bias test circuit also includes a protection circuit, which includes a high-impedance clamping sub-circuit 5 and / or a current-limiting sub-circuit 4.
[0061] The current limiting sub-circuit 4 is set between the power supply and the device under test (DUT); the high-impedance clamping sub-circuit 5 is connected to the switching circuit 2 and the measurement circuit 3 to provide a high-impedance branch and clamp the voltage across the switching circuit 2 and the measurement circuit 3.
[0062] In the above implementation, current limiting sub-circuit 4 is used for current limiting, and high-impedance clamping sub-circuit 5 is used for voltage clamping. The switching circuit 2 and the measurement circuit 3 are protected from the two angles of current limiting and voltage clamping. This does not rely on the protection circuit through fuse blowing, so that the protection function can be achieved without the need for frequent fuse replacement.
[0063] As one implementation of the current limiting circuit, the current limiting circuit includes a depletion-type field-effect transistor Q1 and a first resistor R1;
[0064] The depletion-mode field-effect transistor Q1 has its gate connected to one end of the first resistor R1 and one end of the device under test (DUT), its source connected to the other end of the first resistor R1, and its drain connected to the power supply.
[0065] It should be understood that the depletion-type field-effect transistor Q1 has already formed an N-type conductive channel when UGS=0. When UGS>0, the resulting drain current ID increases; when UGS<0, the N-channel narrows, thus reducing the drain current ID. When UGS is less than its pinch-off voltage, the conductive channel disappears, and ID=0. Due to the initial channel characteristic of the depletion-type field-effect transistor Q1, a conductive channel has already been formed when UGS=0. As long as there is a drain-source voltage, there will be a drain current, meaning that the depletion-type field-effect transistor Q1 is a normally open device.
[0066] In the above embodiment, the gate-source voltage of the depletion-mode field-effect transistor Q1 is equal to the voltage drop of the first resistor R1. The voltage drop of the first resistor R1 is positively correlated with the current flowing through the first resistor R1. When the current flowing through the first resistor R1 is too high, the voltage drop of the first resistor R1 increases until the gate-source voltage of the depletion-mode field-effect transistor Q1 reaches the pinch-off voltage, causing the depletion-mode field-effect transistor Q1 to turn off, thereby achieving the current limiting effect.
[0067] As a further implementation of the current limiting circuit, the current limiting circuit also includes a fuse, which is connected in series between the drain of the depletion-type field-effect transistor Q1 and the power supply.
[0068] Fuse can be connected using either a bare-bonded or flying wire method. A bare-bonded method involves connecting the two ends of the fuse by printing or pasting wire patterns on the circuit board without using actual connecting wires. A flying wire method involves connecting the fuse using thin wires or metal wires. Both methods offer convenient fuse connections, and if a fuse needs to be replaced, simply disconnect the connection and replace it with a new fuse. The operation is simple and requires no additional tools.
[0069] It should be understood that since the depletion-mode MOSFET Q1 in the current-limiting circuit can already pinch off during overcurrent, the reliance on a fuse is relatively small, and it can be selected or not to be set up depending on the actual situation. Furthermore...
[0070] In the above embodiments, the overcurrent protection is made more reliable by setting a fuse.
[0071] As a further embodiment of the high-impedance clamping sub-circuit 5, the high-impedance clamping sub-circuit 5 includes a clamping structure 51 and a high-impedance structure 52.
[0072] The clamping structure 51 and the high-resistivity structure 52 are connected in series, and the clamping structure 51 and the high-resistivity structure 52 are connected in parallel with the switching circuit 2 and the measurement circuit 3. The clamping structure 51 is used to clamp the voltage of the switching circuit 2 and the measurement circuit 3. The high-resistivity structure 52 is used to provide a high-resistivity branch.
[0073] In the above embodiment, by connecting the high-resistivity structure 52 and the clamping structure 51 in series, the high-resistivity structure 52 prevents current from passing through while clamping the voltage of the switching circuit 2 and the measuring circuit 3, so that the leakage current flows to the measuring circuit 3, so that the measuring circuit 3 can obtain a more accurate leakage current detection result.
[0074] Reference Figure 4 As one embodiment of the clamping structure 51, the clamping structure 51 includes a first diode D1 and a second diode D2;
[0075] The cathode of the first diode D1 is connected to the switching circuit 2 and the device under test (DUT), and the anode is connected to the anode of the second diode D2; the cathode of the second diode D2 is connected to the high-resistivity structure 52.
[0076] In the above embodiment, the cathodes of the first diode D1 and the second diode D2 are connected in series. By utilizing the unidirectional conductivity of the first diode D1 and the second diode D2, the positive voltages of the first diode D1 and the second diode D2 are limited to their forward voltages, thereby achieving voltage clamping.
[0077] Reference Figure 4 As one embodiment of the high-impedance structure 52, the high-impedance structure 52 includes a high-impedance operational amplifier U1, a current sensor U2, a third diode D3, and a shunt resistor R2.
[0078] The high-impedance operational amplifier U1 has its first input terminal connected to one end of the current sensor U2, the anode of the third diode D3, and one end of the shunt resistor R2. Its second input terminal is connected to the other end of the current sensor U2, the measurement circuit 3, and ground. Its output terminal is connected to the cathode of the third diode D3, the other end of the shunt resistor R2, and the clamping structure 51.
[0079] In the above embodiment, when the output voltage of the high-impedance operational amplifier U1 decreases, the third diode D3 transmits current from the current sensor U2 and turns on. The shunt resistor R2 is connected in parallel with the third diode D3 to adjust the current, thereby achieving the high-impedance state and preventing leakage current from flowing through.
[0080] This application discloses an electronic device. The electronic device includes a static reverse bias test circuit as described above.
[0081] The electronic device provided in this application can implement the above-mentioned static reverse bias test circuit, and the specific working process of the electronic device can be referred to the corresponding process in the above method embodiment.
[0082] It should be noted that the descriptions of each embodiment in the above embodiments have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0083] The above are all preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any feature disclosed in this specification (including the abstract and drawings) may be replaced by other equivalent or similar features unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is only one example of a series of equivalent or similar features.
Claims
1. A static reverse bias test circuit, characterized in that, include: The reverse bias control circuit (1) is used to connect to the device under test (DUT) and provide a cutoff voltage to the DUT. The device under test (DUT) is connected in series between the power supply and the switching circuit (2); The switching circuit (2) responds to an external trigger signal to control the device under test (DUT) to be grounded or connected to the measurement circuit (3); wherein, when the device under test (DUT) is grounded, the power supply continuously applies a reverse bias voltage to the device under test (DUT); The measurement circuit (3) outputs the leakage current detection result when connected to the device under test (DUT); It also includes a protection circuit, which includes a high-impedance clamping sub-circuit (5) and / or a current-limiting sub-circuit (4); The current limiting sub-circuit (4) is set between the power supply and the device under test (DUT); the high-impedance clamping sub-circuit (5) is connected to the switching circuit (2) and the measurement circuit (3) to provide a high-impedance branch and clamp the voltage at both ends of the switching circuit (2) and the measurement circuit (3); The high-impedance clamping sub-circuit (5) includes a clamping structure (51) and a high-impedance structure (52); The clamping structure (51) and the high-resistivity structure (52) are connected in series, and the clamping structure (51) and the high-resistivity structure (52) are connected in parallel with the switching circuit (2) and the measurement circuit (3); the clamping structure (51) is used to clamp the voltage of the switching circuit (2) and the measurement circuit (3); the high-resistivity structure (52) is used to provide a high-resistivity branch. The high-resistivity structure (52) includes a high-resistivity operational amplifier U1, a current sensor U2, a third diode D3, and a shunt resistor R2; The high-impedance operational amplifier U1 has its first input terminal connected to one end of the current sensor U2, the anode of the third diode D3, and one end of the shunt resistor R2. Its second input terminal is connected to the other end of the current sensor U2, the measurement circuit (3), and ground. Its output terminal is connected to the cathode of the third diode D3, the other end of the shunt resistor R2, and the clamping structure (51).
2. The static reverse bias test circuit according to claim 1, characterized in that: The reverse bias control circuit (1) includes a voltage source; The positive terminal of the voltage source is connected to one end of the device under test (DUT) and the switching circuit (2), and the negative terminal is connected to the control terminal of the DUT; or, The negative terminal of the voltage source is connected to one end of the device under test (DUT) and the switching circuit (2), and the positive terminal is connected to the control terminal of the device under test (DUT).
3. The static reverse bias test circuit according to claim 1, characterized in that: The switching circuit (2) is a single-pole double-throw switch SW; the common terminal of the single-pole double-throw switch SW is connected to the other end of the device under test (DUT), the first contact of the single-pole double-throw switch SW is connected to the measurement circuit (3), and the second contact of the single-pole double-throw switch SW is grounded.
4. The static reverse bias test circuit according to claim 1, characterized in that: The current-limiting sub-circuit (4) includes a depletion-type field-effect transistor Q1 and a first resistor R1; The depletion-type field-effect transistor Q1 has its gate connected to one end of the first resistor R1 and one end of the device under test (DUT), its source connected to the other end of the first resistor R1, and its drain connected to the power supply.
5. A static reverse bias test circuit according to claim 4, characterized in that: The current limiting sub-circuit (4) also includes a fuse, which is connected in series between the drain of the depletion-type field-effect transistor Q1 and the power supply.
6. The static reverse bias test circuit according to claim 1, characterized in that: The clamping structure (51) includes a first diode D1 and a second diode D2; The cathode of the first diode D1 is connected to the switching circuit (2) and the device under test (DUT), and the anode is connected to the anode of the second diode D2; the cathode of the second diode D2 is connected to the high-resistivity structure (52).
7. An electronic device, characterized in that: Includes a static reverse bias test circuit as described in any one of claims 1-6.