Load type identification circuit, driving circuit and method for automatically identifying load type

Abstract

The present disclosure provides a load type identification circuit, a driving circuit and method for automatically identifying the load type, which can be applied to the scenario of automatically identifying the load type. The load type identification circuit includes: a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator; one end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect transistor; the gate and drain of the first field effect transistor are short-circuited, and the gate of the first field effect transistor is connected to the gate of the second field effect transistor, and the source of the first field effect transistor is grounded; one end of the resistor is respectively connected to the source of the second field effect transistor and the in-phase end of the first comparator, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to the first reference voltage; the capacitor is connected in parallel at both ends of the resistor. The present disclosure can quickly and accurately identify high and low side types of loads without adding wiring terminals, and adopt corresponding driving circuits.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic circuits and can be applied to scenarios in which load types are automatically identified. Background Art

[0002] Load driving circuits are widely used in various electronic devices in the fields of industrial automation control, robots, and household appliances. Load driving circuits can be used to drive components such as motors, solenoid valves, and relays. The load to be driven in the load driving circuit can be set as a high-side load or a low-side load according to the application scenario. A high-side load can mean that the load is connected to the power supply side, and a low-side load can mean that the load is connected to the ground side.

[0003] At present, it is necessary to independently develop corresponding drive circuits according to the load type to realize the drive of high-side load or low-side load. Or two drive circuits can be developed at the same time, and the load type can be selected through one terminal according to user needs to realize the drive of high-side load or low-side load.

[0004] However, current load driving circuits cannot automatically identify high-side or low-side loads. Summary of the invention

[0005] The present invention provides a load type identification circuit, a driving circuit and a method for automatically identifying the load type, which can quickly and accurately identify the high and low side types of loads without adding wiring terminals, and adopt corresponding driving circuits. No additional wiring terminals are required to select the load type, which reduces the risk of user misoperation while reducing the wiring terminals, making the circuit design compact, suitable for electronic devices with limited space, and able to cope with different load connection forms, making it easier to integrate in various applications.

[0006] According to a first aspect of the present disclosure, a load type identification circuit is provided, the circuit comprising: a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator.

[0007] One end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect tube.

[0008] The gate and drain of the first field effect tube are short-circuited, the gate of the first field effect tube is connected to the gate of the second field effect tube, and the source of the first field effect tube is grounded.

[0009] One end of the resistor is connected to the source of the second field effect tube and the in-phase end of the first comparator respectively, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to the first reference voltage.

[0010] The capacitor is connected in parallel across the resistor.

[0011] In some possible implementations, the bias constant current source, the first field effect transistor, and the second field effect transistor are used to form a detection current in a load type identification circuit and limit the detection current.

[0012] According to a second aspect of the present disclosure, there is provided a driving circuit for automatically identifying a load type, the driving circuit comprising: a first load circuit, a second load circuit, a first load type identification circuit, a power driving circuit, a first current detection circuit, a second current detection circuit, and a logic operation circuit;

[0013] The first load circuit and the second load circuit are respectively connected to the power driving circuit.

[0014] The first load type identification circuit is connected to the power driving circuit and is used to identify the load type in the load circuit connected to the power driving circuit and transmit a load type signal to the logic operation circuit.

[0015] The logic operation circuit is respectively connected to the first current detection circuit, the second current detection circuit, the first load type identification circuit, and the power driving circuit, and is used to perform logic operations on the received signals, determine the driving control signal, and transmit the driving control signal to the power driving circuit.

[0016] The first current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a first overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit.

[0017] The second current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a second overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit.

[0018] The power driving circuit is respectively connected to the first load circuit, the second load circuit, the load type identification circuit, the first current detection circuit, the second current detection circuit, and the logic operation circuit, and is used to drive the load according to the driving control signal.

[0019] In some possible implementations, the first load circuit includes: a switch and a first load, and the second load circuit includes: a switch and a second load, the first load is a high-side load, and the second load is a low-side load; the common end of the switch is connected to the drive port of the power drive circuit, and the other two ends of the switch are respectively connected to one end of the first load and the second load, the other end of the first load is connected to the power supply, and the other end of the second load is grounded.

[0020] In some possible implementations, the first load type identification circuit includes: a second load type identification circuit and a detection current limiting circuit; the second load type identification circuit is connected to the detection current limiting circuit; the second load type identification circuit is used to identify the load type in the load circuit connected to the power driving circuit, and transmit the load type signal to the logic operation circuit; the detection current limiting circuit is used to form a detection current, limit the detection current, and transmit the detection current to the second load type identification circuit.

[0021] In some possible implementations, the second load type identification circuit includes: a second field effect transistor, a resistor, a capacitor, and a first comparator; one end of the resistor is respectively connected to the source of the second field effect transistor and the in-phase end of the first comparator, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to the first reference voltage; the capacitor is connected in parallel across the resistor.

[0022] In some possible implementations, the detection current limiting circuit includes: a bias constant current source, a first field effect transistor, and a second field effect transistor; one end of the bias constant current source is connected to a power supply, and the other end is connected to the drain of the first field effect transistor; the gate and drain of the first field effect transistor are short-circuited, and the gate of the first field effect transistor is connected to the gate of the second field effect transistor, and the source of the first field effect transistor is grounded.

[0023] In some possible implementations, the power driving circuit includes a first power driving tube and a second power driving tube; the first power driving tube and the second power driving tube are connected.

[0024] In some possible implementations, the first current detection circuit includes a first current detection resistor and a second comparator; one end of the first current detection resistor is connected to the power supply, and the other end is respectively connected to the power driving circuit and the non-inverting end of the second comparator, and the inverting end of the second comparator is connected to the second reference voltage.

[0025] In some possible implementations, the second current detection circuit includes a second current detection resistor and a third comparator; one end of the second current detection resistor is respectively connected to the power driving circuit and the non-inverting end of the third comparator, the other end of the second current detection resistor is grounded, and the inverting end of the third comparator is connected to a third reference voltage.

[0026] In some possible implementations, the logic operation circuit includes: a drive control signal, a buffer, a first inverter, a second inverter, a three-input NAND gate, and a three-input AND gate; the output end of the three-input NAND gate is connected to the power drive circuit, the first input end of the three-input NAND gate is connected to the drive control signal, the second input end is connected to the first current detection circuit, and the third input end is connected to the output end of the first inverter; the output end of the three-input AND gate is connected to the power drive circuit, the first input end of the three-input AND gate is connected to the drive control signal, the second input end is connected to the output end of the buffer, and the third input end is connected to the output end of the second inverter; the input end of the first inverter is connected to the first load type identification circuit, the input end of the second inverter is connected to the second current detection circuit, and the input end of the buffer is connected to the first load type identification circuit.

[0027] According to a third aspect of the present disclosure, a load type identification method is provided, which is applied to a load type identification circuit, wherein the load type identification circuit includes: a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator; the method includes: the bias constant current source provides current to the first field effect transistor, and the second field effect transistor mirrors the current of the first field effect transistor; the capacitor filters out jitter and interference; the first comparator determines the voltage of the resistor according to the current of the second field effect transistor and the resistance value of the resistor; the first comparator compares the voltage of the resistor with a first reference voltage connected to the reverse end of the first comparator; when the voltage of the resistor is greater than the first reference voltage, the load type is determined to be a high-side load; or, when the voltage of the resistor is less than the first reference voltage, the load type is determined to be a low-side load.

[0028] In some possible implementations, the bias constant current source, the first field effect transistor and the second field effect transistor constitute a detection current limiting circuit, and the method also includes: the detection current limiting circuit forms a detection current in the load type identification circuit according to the current provided by the bias constant current source; and the detection current limiting circuit limits the detection current.

[0029] According to a fourth aspect of the present disclosure, a method for automatically identifying a load type is provided, wherein the drive circuit includes a first load circuit, a second load circuit, a first load type identification circuit, a power drive circuit, and a logic operation circuit; the method includes: the first load type identification circuit determines whether the power drive circuit is connected to the first load circuit or the second load circuit; the first load type identification circuit determines a load type signal according to the first load circuit or the second load circuit connected to the power drive circuit, and sends the load type signal to the logic operation circuit; the logic operation circuit receives the load type signal, determines a drive control signal according to the load type signal, and transmits the drive control signal to the power drive circuit; the power drive circuit drives the load according to the drive control signal.

[0030] In some possible implementations, the driving circuit further includes a first current detection circuit, and the method further includes: the first current detection circuit sends a first overcurrent protection signal to the logic operation circuit, and controls the state of the power driving circuit.

[0031] In some possible implementations, the driving circuit further includes a second current detection circuit, and the method further includes: the second current detection circuit sends a second overcurrent protection signal to the logic operation circuit and controls the state of the power driving circuit.

[0032] In some possible implementations, the first load type identification circuit includes a second load type identification circuit and a detection current limiting circuit, and the first load type identification circuit determines whether the power driving circuit is connected to the first load circuit or the second load circuit, including: the second load type identification circuit determines whether the power driving circuit is connected to the first load circuit or the second load circuit.

[0033] In some possible implementations, the method further includes: the detection current limiting circuit forms a detection current in the first load type identification circuit according to a current provided by a biased constant current source; and the detection current limiting circuit limits the detection current.

[0034] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.

[0036] Figure 1 A schematic diagram of a circuit for driving a low-side load in the prior art;

[0037] Figure 2 A schematic diagram of a circuit for driving a high-side load in the prior art;

[0038] Figure 3 A schematic diagram of a circuit for driving a high-side load or a low-side load in the prior art;

[0039] Figure 4 A schematic diagram of a load type identification circuit structure provided in an embodiment of the present disclosure;

[0040] Figure 5 A schematic diagram of the structure of a driving circuit for automatically identifying load types provided in an embodiment of the present disclosure;

[0041] Figure 6 Another structural schematic diagram of a driving circuit for automatically identifying load types provided by an embodiment of the present disclosure;

[0042] Figure 7A flow chart of a load type identification method provided in an embodiment of the present disclosure.

[0043] Specific figure marks: drive control signal DRV, buffer BUF1, first inverter INV1, second inverter INV2, three-input NAND gate NAND1, three-input AND gate AND1, first field effect transistor T3, second field effect transistor T4, resistor R1, capacitor C1, first comparator CMP2, second comparator CMP1, third comparator CMP3, bias constant current source Ibias, first current sensing resistor Rs1, second current sensing resistor Rs2, first power driving tube T1, second power driving tube T2, switch SW1, first load RL1, second load RL2. DETAILED DESCRIPTION

[0044] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0045] It should be understood that in the embodiments of the present disclosure, the character " / " generally indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", etc. are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0046] Load driving circuits are widely used in various electronic devices in the fields of industrial automation control, robots, and household appliances. Load driving circuits can be used to drive components such as motors, solenoid valves, and relays. The load to be driven in the load driving circuit can be set as a high-side load or a low-side load according to the application scenario. A high-side load can mean that the load is connected to the power supply side, and a low-side load can mean that the load is connected to the ground side.

[0047] At present, it is necessary to independently develop corresponding drive circuits according to the load type to realize the drive of high-side load or low-side load. Or two drive circuits can be developed at the same time, and the load type can be selected through one terminal according to user needs to realize the drive of high-side load or low-side load.

[0048] However, current load driving circuits cannot automatically identify high-side or low-side loads.

[0049] For example, in the prior art, a P-type transistor or a field effect transistor may be used as a power switch tube to drive a low-side load. Figure 1 FIG. 1 is a schematic diagram of a circuit for driving a low-side load in the prior art. Figure 1As shown, the circuit for driving the low-side load in the prior art requires three terminals. The circuit module includes a drive control signal DRV, a drive control logic module, and a P-type transistor. The on and off of the load can be controlled by controlling the switch state of the P-type transistor or the field effect tube. A resistor can also be connected in series in the drive loop to limit the current or sample the drive current to achieve the purpose of protecting the circuit and the load. Correspondingly, in the prior art, an N-type transistor or a field effect tube can be used as a power switch tube for driving the high-side load. Figure 2 FIG. 1 is a schematic diagram of a circuit for driving a high-side load in the prior art. Figure 2 As shown, the circuit for driving the high-side load in the prior art requires three terminals. The circuit module includes a drive control signal DRV, a drive control logic module, and an N-type transistor. The load can be driven by controlling the N-type transistor or the field effect tube to be turned on and off to the ground. A resistor can also be connected in series in the drive loop to limit the current or sample the drive current to achieve the purpose of protecting the circuit and the load. In different application scenarios and different user needs, the corresponding drive circuits can be developed independently for driving the high-side or low-side loads. Two drive circuits can also be developed at the same time, and selected according to user needs through a drive selection terminal SET. Figure 3 FIG. 1 is a schematic diagram of a circuit for driving a high-side load or a low-side load in the prior art. Figure 3 As shown, the circuit for driving a high-side load or a low-side load in the prior art requires five terminals. The circuit module includes a drive control signal DRV, a drive control logic module, a P-type transistor, an N-type transistor, and a drive selection terminal SET. This not only increases the number of terminals and the difficulty of operation, but also increases the risk of erroneous operation.

[0050] Against this background, the present disclosure provides a load type identification circuit that can quickly and accurately identify high-side and low-side loads without adding wiring terminals, and adopt corresponding driving circuits.

[0051] Figure 4 The load type identification circuit structure diagram provided by the embodiment of the present disclosure is shown in FIG. Figure 4 As shown, the circuit may include a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator.

[0052] One end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect tube; the gate and drain of the first field effect tube are short-circuited, and the gate of the first field effect tube is connected to the gate of the second field effect tube, and the source of the first field effect tube is grounded; one end of the resistor is respectively connected to the source of the second field effect tube and the in-phase end of the first comparator, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to the first reference voltage; the capacitor is connected in parallel at both ends of the resistor.

[0053] Exemplarily, the load type identification circuit can be connected to the power drive circuit to identify the load type connected to the power drive circuit. When the load type identification circuit is started and enters the normal working state, the bias constant current source (Ibias) can provide a constant current for its branch, and the current provided by the bias constant current source can be recorded as Ibias1. The gate and drain of the first field effect tube T3 are short-circuited to form a diode connection structure of the field effect tube, and the constant current Ibias1 can generate a stable bias voltage at the gate of the first field effect tube. Since the first field effect tube and the second field effect tube T4 constitute a current mirror structure, the second field effect tube will copy the current on the first field effect tube according to the current source proportional coefficient, and the current on the first field effect tube copied by the second field effect tube according to the current source proportional coefficient can be recorded as nIbias1, n>0, and n can represent the current source proportional coefficient.

[0054] For example, when the current of the T4 tube flows through the resistor R1, a voltage will be generated on R1. Since nIbias1 is a constant value, the voltage VR1 generated on R1 = nIbias1*R1 is also a constant value. The voltage VR1 generated on R1 is connected to the in-phase terminal of the first comparator CMP2, and the reverse terminal of the first comparator is connected to a comparison reference voltage, namely the first reference voltage. When VR1 is greater than the first reference voltage, the first comparator outputs a high level, indicating that the driving port of the current power driving circuit is connected to a high-side load. When the load type connected to the above-mentioned power driving circuit is a low-side load, because the low-side load is connected to the ground, although the drain of the T4 tube is also connected to the driving port, the driving tube only has a load connected to the ground at this time, so the T4 tube does not have a current path. That is, the current flowing through the T4 tube is 0, so the voltage VR1 on R1 is 0. VR1 is less than the first reference voltage, and the first comparator outputs a low level, indicating that the driving port of the current power driving circuit is connected to a low-side load.

[0055] The disclosed embodiment defines that the above circuit may include a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator. The high and low side types of loads can be quickly and accurately identified without adding wiring terminals, and the corresponding drive circuits can be adopted. No additional wiring terminals are required to select the load type, which reduces the risk of user misoperation while reducing the wiring terminals, making the circuit design compact, suitable for electronic devices with limited space, and able to cope with different load connection forms, making it easier to integrate in various applications.

[0056] In some embodiments, the above-mentioned bias constant current source, the first field effect transistor and the second field effect transistor are used to form a detection current in the load type identification circuit and limit the detection current.

[0057] Exemplarily, the bias constant current source, the first field effect transistor and the second field effect transistor are equivalent to forming a detection current limiting circuit. The drain of the T3 tube is connected to one end of the bias constant current source, and the other end of the bias constant current source is connected to the power supply. The gate of the T3 tube is short-circuited with the drain to form a diode connection structure of the field effect tube, and the source of the T3 tube is grounded. The current provided by the bias constant current source flows through the T3 tube, generating a constant bias voltage on the T3 tube. The gate of the T4 tube is connected to the gate of the T3 tube, and T3 and T4 form a current mirror. T4 mirrors the current of T3. That is, the bias current Ibias1 flowing through the T3 tube limits the detection current, and the detection current is limited to Ibias1.

[0058] In this embodiment, the load type identification circuit further includes a detection current limiting circuit, which includes a bias constant current source, a first field effect transistor, and a second field effect transistor. The detection current limiting circuit can be used to minimize the influence of the load type detection circuit on the external load circuit by limiting the detection current.

[0059] Figure 5 This is a schematic diagram of the structure of a driving circuit that automatically identifies load types provided by an embodiment of the present disclosure. Figure 5 As shown, the above-mentioned driving circuit may include: a first load circuit, a second load circuit, a first load type identification circuit, a power driving circuit, a first current detection circuit, a second current detection circuit, and a logic operation circuit.

[0060] The first load circuit and the second load circuit are respectively connected to the power driving circuit.

[0061] The first load type identification circuit is connected to the power driving circuit and is used to identify the load type in the load circuit connected to the power driving circuit and transmit a load type signal to the logic operation circuit.

[0062] The first current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a first overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit.

[0063] The second current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a second overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit.

[0064] The logic operation circuit is respectively connected to the first current detection circuit, the second current detection circuit, the first load type identification circuit, and the power driving circuit, and is used to perform logic operations on the received signals, determine the driving control signal, and transmit the driving control signal to the power driving circuit.

[0065] The power driving circuit is respectively connected to the first load circuit, the second load circuit, the load type identification circuit, the first current detection circuit, the second current detection circuit, and the logic operation circuit, and is used to drive the load according to the driving control signal.

[0066] Exemplarily, the first load type identification circuit is connected to the power driving circuit and can identify the type of load connected to the power driving circuit, that is, the first load type identification circuit can identify whether the power driving circuit is connected to a high-side load or a low-side load. After the first load type identification circuit identifies the type of load connected to the power driving circuit, it can send a load type signal to the logic operation circuit, and the load type signal is used to indicate the type of load connected to the power driving circuit. The logic operation circuit can receive the load type signal sent by the first load type identification circuit, determine the drive control signal according to the load type signal, and transmit the drive control signal to the power driving circuit. The power driving circuit can drive the load connected to the power driving circuit according to the drive control signal.

[0067] This embodiment defines that the driving circuit may include: a first load circuit, a second load circuit, a first load type identification circuit, a power driving circuit, a first current detection circuit, a second current detection circuit, and a logic operation circuit. The high and low side types of loads can be quickly and accurately identified without adding wiring terminals, and the corresponding driving circuit can be adopted. At the same time, the circuit can detect the external load connection form in real time during operation, and make corresponding drive adjustments in real time, thereby improving the applicability of the system. And because the circuit can adapt to different load types, manufacturers can reduce adjustments and customization work on the production line, which helps to reduce production costs and improve manufacturing efficiency. In addition, no additional wiring terminals are required to select the load type. While reducing the wiring terminals, the risk of user misoperation is reduced, making the circuit design compact and suitable for electronic devices with limited space, and able to cope with different load connection forms, making it easier to integrate in various applications.

[0068] Figure 6 Another structural schematic diagram of a driving circuit for automatically identifying load types provided by an embodiment of the present disclosure. Figure 6 As shown, the first load circuit may include: a switch and a first load, and the second load circuit may include: a switch and a second load. The common end of the switch is connected to the drive port of the power drive circuit, the other two ends of the switch are connected to one end of the first load and the second load respectively, the other end of the first load is connected to the power supply, and the other end of the second load is grounded.

[0069] Exemplarily, when the switch is located between the power supply and the load, the load is a high-side load; when the switch is located between the load and the ground, the load is a low-side load. The first load is a high-side load, and the second load is a low-side load. The first load circuit and the second load circuit are used to illustrate and illustrate the load types that the power driving circuit may drive.

[0070] In this embodiment, by limiting that the first load circuit may include: a switch, a first load, and the second load circuit may include: a switch, a second load, the circuit can be connected to different types of loads, thereby improving the convenience of production, and the circuit can adapt to different load types, thereby reducing production costs and improving manufacturing efficiency.

[0071] In some embodiments, the first load type identification circuit may include: a second load type identification circuit and a detection current limiting circuit.

[0072] The second load type identification circuit is connected to the detection current limiting circuit; the second load type identification circuit is used to identify the load type in the load circuit connected to the power driving circuit, and transmit the load type signal to the logic operation circuit. The detection current limiting circuit is used to form a detection current, limit the detection current, and transmit the detection current to the second load type identification circuit.

[0073] For example, Figure 6 As shown, the second load type identification circuit may include: a second field effect transistor, a resistor, a capacitor, and a first comparator. One end of the resistor is connected to the source of the second field effect transistor and the in-phase end of the first comparator respectively, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to the first reference voltage; the capacitor is connected in parallel at both ends of the resistor. The detection current limiting circuit may include: a bias constant current source, a first field effect transistor, and a second field effect transistor. One end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect transistor; the gate and drain of the first field effect transistor are short-circuited, and the gate of the first field effect transistor is connected to the gate of the second field effect transistor, and the source of the first field effect transistor is grounded.

[0074] Based on the above embodiment, for example, when the driving port of the power driving circuit is connected to a high-side load, that is, one end of the load is connected to the power supply and the other end is connected to the driving port, that is, when the power driving circuit is connected to the first load circuit. The detection current limiting circuit has a detection current passing through it, and the detection current is limited by the bias current source and the proportional coefficient of the current mirror. The detection current flowing through the T4 tube forms a detection voltage on the resistor R1, and the non-inverting input end of the first comparator CMP2 can be used to receive the detection voltage corresponding to the detection current. By reasonably setting the current limiting value of the resistor R1 and the detection current limiting circuit, the detection voltage is greater than the first reference voltage, and the first comparator CMP2 outputs a high level. When the driving port is connected to a low-side load, that is, one end of the load is connected to the ground and the other end is connected to the driving port, that is, when the power driving circuit is connected to the second load circuit. The detection current limiting circuit has no detection current passing through it, that is, the detection current is 0. The detection voltage formed by the detection current on the resistor R1 is 0, so that the detection voltage is less than the first reference voltage, and CMP2 outputs a low level.

[0075] In this embodiment, the first load type identification circuit is limited to include a second load type identification circuit and a detection current limiting circuit. The second load type identification circuit is used to identify the load type in the load circuit connected to the power driving circuit and transmit the load type signal to the logic operation circuit. The detection current limiting circuit is used to form a detection current, limit the detection current, and transmit the detection current to the second load type identification circuit. The abstract driving load type can be converted into a high and low state of the concrete output level of the first comparator CMP2. When the driving port is connected to a high-side load, the first comparator CMP2 outputs a high level; when the driving port is connected to a low-side load, the first comparator CMP2 outputs a low level, which can improve the efficiency of identifying high and low-side types of loads.

[0076] In some embodiments, the power driving circuit may include a first power driving tube and a second power driving tube.

[0077] The first power driving tube is connected to the second power driving tube.

[0078] For example, Figure 6 As shown, the drain of the first power driving tube T1 is connected to the first load circuit and the drain of the second power driving tube T2 respectively, and the drain of the second power driving tube is connected to the second load circuit and the drain of the first power driving tube respectively. The gate of T1 tube is connected to the high-side control signal, and the gate of T2 tube is connected to the low-side control signal. T1 tube is a high-side driving tube for driving the low-side load, and T2 tube is a low-side driving tube for driving the high-side load.

[0079] This embodiment defines a power driving circuit, which may include a first power driving tube and a second power driving tube. The first power driving tube and the second power driving tube can drive different types of loads, so that the circuit can adapt to different load types, and the manufacturer can reduce the adjustment and customization work on the production line, which helps to reduce production costs and improve manufacturing efficiency.

[0080] In some embodiments, the first current detection circuit may include a first current detection resistor and a second comparator.

[0081] One end of the first current detection resistor is connected to the power supply, and the other end is respectively connected to the source of the first power driving tube and the non-inverting end of the second comparator. The inverting end of the second comparator is connected to the second reference voltage.

[0082] For example, reference Figure 6 One end of the first current detection resistor Rs1 is connected to the power supply, and the other end is respectively connected to the source of the first power driving tube and the non-inverting end of the second comparator CMP1, and the inverting end of the second comparator is connected to the second reference voltage.

[0083] Based on the above embodiment, for example, when the driving circuit is enabled, that is, the driving control signal DRV is at a high level and drives the low-side load, the high-side driving tube is started, that is, the T1 tube is started. When the low-side load current is too large, a large voltage drop will be generated at Rs1. Since one end of Rs1 is connected to the power supply, the voltage Vrs1 at the other end of Rs1 is reduced, and the voltage point is connected to the in-phase end of the second comparator CMP1, and the reverse end of CMP1 is connected to the second reference voltage. When Vrs1 is less than the second reference voltage, CMP1 outputs a low level, indicating that the load current in the current circuit exceeds the preset current value, and the low-level signal output by CMP1 is sent to the logic operation circuit and outputs a control signal to turn off the high-side driving power tube. When Vrs1 is greater than the second reference voltage, CMP1 outputs a high level, indicating that the load current in the current circuit is within the preset current value, and the high-level signal output by CMP1 is sent to the logic operation circuit, and the logic operation circuit outputs a control signal to maintain the driving state of the high-side driving power tube.

[0084] This embodiment defines the first current detection circuit, which may include a first current detection resistor and a second comparator. The level signal output by CMP1 can be used to determine whether the driving circuit is overcurrent, maintain the driving state of the high-side driving power tube, and thus achieve an overcurrent protection function.

[0085] In some embodiments, the second current detection circuit may include a second current detection resistor and a third comparator.

[0086] One end of the second current detection resistor is connected to the power driving circuit and the non-inverting end of the third comparator respectively, the other end of the second current detection resistor is grounded, and the inverting end of the third comparator is connected to the third reference voltage.

[0087] For example, reference Figure 6 One end of the second current detection resistor (Rs2) is connected to the source of the second power driving tube and the non-inverting end of the third comparator respectively, the other end of Rs2 is grounded, and the inverting end of the third comparator is connected to the third reference voltage.

[0088] Based on the above embodiment, for example, when the drive circuit is enabled (DRV is high level) and drives the high-side load, the low-side drive tube is started. When the high-side load current is too large, a large voltage drop will be generated on the current-sensing resistor Rs2. Since one end of Rs2 is grounded, the voltage Vrs2 at the other end of Rs2 is increased, and the voltage point is connected to the in-phase end of the third comparator CMP3, and the reverse end of CMP3 is connected to the third reference voltage. When Vrs2 is greater than the third reference voltage, CMP3 outputs a high level, indicating that the load current in the current circuit exceeds the preset current value. The high-level signal output by CMP3 is sent to the logic operation circuit and outputs a control signal to turn off the low-side drive power tube. When Vrs2 is less than the third reference voltage, CMP3 outputs a low level, indicating that the load current in the current circuit is within the preset current value, and the low-level signal output by CMP3 is sent to the logic operation circuit, and the logic operation circuit outputs a control signal to maintain the driving state of the low-side drive power tube.

[0089] This embodiment uses the second current detection circuit, which may include a second current detection resistor and a third comparator, to determine whether the drive circuit is overcurrent through the level signal output by CMP3, maintain the driving state of the low-side drive power tube, and thus achieve overcurrent protection function.

[0090] In some embodiments, the logic operation circuit may include: a driving control signal, a buffer, a first inverter, a second inverter, a three-input NAND gate, and a three-input AND gate.

[0091] The output end of the three-input NAND gate is connected to the gate of the first power driving tube, the first input end of the three-input NAND gate is connected to the driving control signal, the second input end is connected to the first current detection circuit, and the third input end is connected to the output end of the first inverter.

[0092] The output end of the three-input AND gate is connected to the gate of the second power driving tube, the first input end of the three-input AND gate is connected to the driving control signal, the second input end is connected to the output end of the buffer, and the third input end is connected to the output end of the second inverter.

[0093] The input end of the first inverter is connected to the output end of the first comparator, the input end of the second inverter is connected to the output end of the second current detection circuit, and the input end of the buffer is connected to the output end of the first comparator.

[0094] Exemplarily, the logic control circuit is connected to the power driving circuit, and can determine the driving control signal according to the load type signal, and drive the power driving tube in the power driving circuit according to the driving control signal and the overcurrent protection signal, thereby driving the load connected to the power driving circuit.

[0095] Based on the above embodiment, by way of example, before the drive is enabled, the first load type identification circuit can detect the load type in advance. When driving the low-side load, CMP2 outputs a low level. After the drive is enabled, the drive control signal DRV becomes a high level. According to the connection relationship of the circuit elements, the low level output by CMP2 is connected to the second input terminal of the three-input AND gate AND1 after passing through the buffer BUF1. Regardless of the level states of the other two input ports of AND1, AND1 is forced to output a low level. The low level output by AND1 will turn off the low-side power driver tube T2. On the contrary, the low level output by CMP2 becomes a high level after passing through the first inverter INV1. The high level is connected to the third input terminal of the three-input NAND gate NAND1. The first input terminal of NAND1 is connected to DRV, and DRV is a high level at this time. The output level state of NAND1 depends on the output state of CMP1. When CMP1 is a high level, it means that the drive circuit is not overcurrent. At this time, NAND1 outputs a low level, so that the high-side driver tube T1 is started to realize the drive of the low-side load. When CMP1 is at a low level, it indicates that the driving circuit is overcurrent. At this time, NAND1 outputs a high level, so that the high-side driver tube T1 is turned off, thereby realizing the overcurrent protection function.

[0096] For example, before the drive is enabled, the first load type identification circuit can detect the load type in advance. When driving the high-side load, CMP2 outputs a high level. After the drive is enabled, DRV becomes a high level. According to the connection relationship of the circuit elements, it can be seen that the high level output by CMP2 becomes a low level after passing through INV1, and the low level is connected to the third input terminal of NAND1. Regardless of the level states of the other two input ports of NAND1, NAND1 is forced to output a high level. The high level output by NAND1 will turn off the high-side drive power tube T1. On the contrary, the high level output by CMP2 is connected to the second input terminal of AND1 after passing through BUF1, and the first input terminal of AND1 is connected to the drive control signal DRV, at which time DRV is a high level. The output level state of AND1 depends on the output state of CMP3. When CMP3 is a low level, it means that the drive circuit is not overcurrent. The low level becomes a high level after passing through INV2 and is connected to the third input terminal of AND1. At this time, all three input terminals of AND1 are high levels, and then AND1 outputs a high level, so that the low-side drive tube T2 is started to drive the high-side load. When CMP3 is at a high level, it indicates that the driving circuit is overcurrent. The high level becomes a low level after passing through INV2 and is connected to the third input terminal of AND1. At this time, the output terminal of AND1 is forced to output a low level, so that the low-side driving tube T2 is turned off to realize the overcurrent protection function.

[0097] In this embodiment, the logic operation circuit may include: a drive control signal, a buffer, a first inverter, a second inverter, a three-input NAND gate, and a three-input AND gate. The circuit can detect the external load connection form in real time during operation and make corresponding drive adjustments in real time, thereby improving the applicability of the drive circuit.

[0098] Figure 6 Another structural schematic diagram of a driving circuit for automatically identifying load types provided by an embodiment of the present disclosure. Figure 6 As shown, the above-mentioned driving circuit may include: a logic operation circuit, a first load type identification circuit, a first current detection circuit, a second current detection circuit, a power driving circuit, a first load circuit, and a second load circuit.

[0099] The logic operation circuit may include: a driving control signal DRV, a buffer BUF1, a first inverter INV1, a second inverter INV2, a three-input NAND gate NAND1, and a three-input AND gate AND1.

[0100] The first load type identification circuit may include: a second load type identification circuit and a detection current limiting circuit. The second load type identification circuit includes: a second field effect transistor T4, a resistor R1, a capacitor C1, and a first comparator CMP2; the detection current limiting circuit may include: a bias constant current source Ibias, a first field effect transistor T3, and a second field effect transistor T4.

[0101] The first current detection circuit may include: a first current detection resistor Rs1 and a second comparator CMP1.

[0102] The second current detection circuit may include: a second current detection resistor Rs2 and a third comparator CMP3.

[0103] The power driving circuit may include: a first power driving tube T1 and a second power driving tube T2.

[0104] The first load circuit may include: a switch SW1 and a first load RL1 , wherein the first load is a high-side load.

[0105] The second load circuit may include: a switch SW1 and a second load RL2; wherein the second load is a low-side load.

[0106] Exemplarily, the output end of the three-input NAND gate NAND1 is connected to the gate of the first power driving tube T1, the first input end of the three-input NAND gate NAND1 is connected to the driving control signal DRV, the second input end is connected to the output end of the second comparator CMP1, and the third input end is connected to the output end of the first inverter INV1. The output end of the three-input AND gate AND1 is connected to the gate of the second power driving tube T2, the first input end of the three-input AND gate AND1 is connected to the driving control signal DRV, the second input end is connected to the output end of the buffer BUF1, and the third input end is connected to the output end of the second inverter INV2. The input end of the first inverter INV1 is connected to the output end of the first comparator CMP2, the input end of the second inverter INV2 is connected to the output end of the third comparator CMP3, and the input end of the buffer BUF1 is connected to the output end of the first comparator CMP2.

[0107] One end of the bias constant current source Ibias is connected to the power supply, and the other end is connected to the drain of the first field effect tube. The gate and drain of the first field effect tube T3 are short-circuited, and the gate of the first field effect tube T3 is connected to the gate of the second field effect tube T4, and the source of the first field effect tube T3 is grounded; one end of the resistor R1 is respectively connected to the source of the second field effect tube T4 and the in-phase end of the first comparator CMP2, the other end of the resistor R1 is grounded, and the reverse end of the first comparator CMP2 is connected to the first reference voltage; the capacitor C1 is connected in parallel to both ends of the resistor R1.

[0108] One end of the first current detection resistor Rs1 is connected to the power supply VDD, and the other end is respectively connected to the source of the first power driving tube T1 and the non-inverting end of the second comparator CMP1. The inverting end of the second comparator CMP1 is connected to the second reference voltage.

[0109] One end of the second current detection resistor Rs2 is connected to the source of the second power driving tube T2 and the non-inverting end of the third comparator CMP3 respectively, the other end of the second current detection resistor Rs2 is grounded, and the inverting end of the third comparator CMP3 is connected to the third reference voltage.

[0110] The gate of T1 is connected to the output end of the three-input NAND gate NAND1, and the drain is connected to the external load and the drain of T2 respectively; the gate of T2 is connected to the output end of the three-input AND gate AND1, and the source of T2 is connected to one end of the second current sensing resistor Rs2.

[0111] The common end of the switch SW1 is connected to the driving port of the power driving circuit, and the other two ends of the switch are respectively connected to one end of the first load RL1 and the second load RL2. The other end of the first load RL1 is connected to the power supply, and the other end of the second load RL2 is grounded.

[0112] This embodiment limits the driving circuit to include: a logic operation circuit, a first load type identification circuit, a first current detection circuit, a second current detection circuit, a power driving circuit, a first load circuit, a second load circuit and the connection relationship between the components contained in each circuit. It can quickly and accurately identify the high and low side types of loads without adding wiring terminals, and adopt corresponding driving circuits.

[0113] Figure 7 The following is a flow chart of a load type identification method provided by an embodiment of the present disclosure. Figure 7 As shown, the method may include S701-S706.

[0114] S701. A bias constant current source provides current to a first field effect transistor, and a second field effect transistor mirrors the current of the first field effect transistor.

[0115] S702, capacitors filter out jitter and interference.

[0116] S703: The first comparator determines the voltage of the resistor according to the current of the second field effect transistor and the resistance value of the resistor.

[0117] S704: The first comparator compares the voltage of the resistor with a first reference voltage connected to the reverse terminal of the first comparator.

[0118] S705: When the voltage of the resistor is greater than the first reference voltage, determine that the load type is a high-side load.

[0119] S706: When the voltage of the resistor is less than the first reference voltage, determine that the load type is a low-side load.

[0120] Exemplarily, when the load type identification circuit is started and enters the normal working state, the bias constant current source Ibias can provide a constant current for its branch, and the current provided by the bias constant current source can be recorded as Ibias1. When the current of the T4 tube flows through the resistor R1, a voltage will be generated on R1. Since nIbias1 is a constant value, the voltage VR1=nIbias1*R1 generated on R1 is also a constant value. The voltage VR1 generated on R1 is connected to the in-phase terminal of the first comparator CMP2, and the reverse terminal of the first comparator is connected to a comparison reference voltage, namely the first reference voltage. When VR1 is greater than the first reference voltage, the first comparator outputs a high level, indicating that the driving port of the current power driving circuit is connected to a high-side load. When the load type connected to the above-mentioned power driving circuit is a low-side load, because the low-side load is connected to the ground, although the drain of the T4 tube is also connected to the driving port, the driving tube only has a load connected to the ground at this time, so the T4 tube does not have a current path. That is, the current flowing through tube T4 is 0, so the voltage VR1 on R1 is 0. VR1 is less than the first reference voltage, and the first comparator outputs a low level, indicating that the driving port of the current power driving circuit is connected to a low-side load.

[0121] This embodiment determines the voltage of the resistor according to the current provided by the bias constant current source and the resistance value of the resistor, and then compares the voltage of the resistor with the first reference voltage connected to the reverse end of the first comparator. When the voltage of the resistor is greater than the first reference voltage, the load type is determined to be a high-side load, and when the voltage of the resistor is less than the first reference voltage, the load type is determined to be a low-side load. The high and low-side types of loads can be quickly and accurately identified without adding wiring terminals, and the corresponding driving circuits can be used. No additional wiring terminals are required to select the load type, which reduces the risk of user misoperation while reducing the wiring terminals, making the circuit design compact and suitable for electronic devices with limited space, and can cope with different load connection forms, making it easier to integrate in various applications.

[0122] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.

[0123] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A driving circuit for automatically identifying load types, characterized in that: The driving circuit for automatically identifying the load type comprises: A first load circuit, a second load circuit, a first load type identification circuit, a power driving circuit, a first current detection circuit, a second current detection circuit, and a logic operation circuit; The first load circuit and the second load circuit are respectively connected to the power driving circuit; The first load type identification circuit is connected to the power driving circuit, and is used to identify the load type in the load circuit connected to the power driving circuit, and transmit a load type signal to the logic operation circuit; The logic operation circuit is connected to the first current detection circuit, the second current detection circuit, the first load type identification circuit, and the power driving circuit respectively, and is used to perform logic operations on the received signals, determine the driving control signal, and transmit the driving control signal to the power driving circuit; The first current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a first overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit; The second current detection circuit is connected to the logic operation circuit and the power driving circuit respectively, and is used to transmit a second overcurrent protection signal to the logic operation circuit and control the state of the power driving circuit; The power driving circuit is respectively connected to the first load circuit, the second load circuit, the load type identification circuit, the first current detection circuit, the second current detection circuit, and the logic operation circuit, and is used to drive the load according to the driving control signal; The first load type identification circuit comprises: a second load type identification circuit and a detection current limiting circuit; The second load type identification circuit is connected to the detection current limiting circuit; The second load type identification circuit is used to identify the load type in the load circuit connected to the power driving circuit and transmit a load type signal to the logic operation circuit; The detection current limiting circuit is used to form a detection current, limit the detection current, and transmit the detection current to the second load type identification circuit; The second load type identification circuit includes: a second field effect transistor, a resistor, a capacitor, and a first comparator; One end of the resistor is connected to the source of the second field effect transistor and the in-phase end of the first comparator respectively, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to a first reference voltage; The capacitor is connected in parallel at both ends of the resistor; The detection current limiting circuit includes: a bias constant current source, a first field effect transistor, and the second field effect transistor; One end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect transistor; The gate and drain of the first field effect tube are short-circuited, the gate of the first field effect tube is connected to the gate of the second field effect tube, and the source of the first field effect tube is grounded.

2. The circuit according to claim 1, characterized in that The first load circuit includes: a switch and a first load, and the second load circuit includes: the switch and a second load, the first load is a high-side load, and the second load is a low-side load; The common end of the switch is connected to the driving port of the power driving circuit, and the other two ends of the switch are respectively connected to one end of the first load and the second load, the other end of the first load is connected to the power supply, and the other end of the second load is grounded.

3. The circuit according to claim 2, characterized in that The power driving circuit comprises a first power driving tube and a second power driving tube; The first power driving tube is connected to the second power driving tube.

4. The circuit according to claim 1, characterized in that The first current detection circuit includes a first current detection resistor and a second comparator; One end of the first current detection resistor is connected to the power supply, and the other end is respectively connected to the power driving circuit and the non-inverting end of the second comparator, and the inverting end of the second comparator is connected to a second reference voltage.

5. The circuit according to claim 1, characterized in that The second current detection circuit includes a second current detection resistor and a third comparator; One end of the second current detection resistor is connected to the power driving circuit and the non-inverting end of the third comparator respectively, the other end of the second current detection resistor is grounded, and the inverting end of the third comparator is connected to a third reference voltage.

6. The circuit according to claim 1, characterized in that The logic operation circuit includes: a driving control signal, a buffer, a first inverter, a second inverter, a three-input NAND gate, and a three-input AND gate; The output end of the three-input NAND gate is connected to the power driving circuit, the first input end of the three-input NAND gate is connected to the driving control signal, the second input end is connected to the first current detection circuit, and the third input end is connected to the output end of the first inverter; The output end of the three-input AND gate is connected to the power driving circuit, the first input end of the three-input AND gate is connected to the driving control signal, the second input end is connected to the output end of the buffer, and the third input end is connected to the output end of the second inverter; An input end of the first inverter is connected to the first load type identification circuit, an input end of the second inverter is connected to the second current detection circuit, and an input end of the buffer is connected to the first load type identification circuit.

7. A load type identification circuit, characterized in that: The driving circuit for automatically identifying the load type according to claim 1 drives the circuit according to the identification result of the load type identification circuit, and the load type identification circuit comprises: A bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator; One end of the bias constant current source is connected to the power supply, and the other end is connected to the drain of the first field effect transistor; The gate and drain of the first field effect tube are short-circuited, the gate of the first field effect tube is connected to the gate of the second field effect tube, and the source of the first field effect tube is grounded; One end of the resistor is connected to the source of the second field effect transistor and the in-phase end of the first comparator respectively, the other end of the resistor is grounded, and the reverse end of the first comparator is connected to a first reference voltage; The capacitor is connected in parallel across the resistor.

8. The circuit according to claim 7, characterized in that The bias constant current source, the first field effect transistor and the second field effect transistor are used to form a detection current in the load type identification circuit and limit the detection current.

9. A method for automatically identifying load type, characterized in that: The method is applied to the driving circuit for automatically identifying load types as described in claim 1 above, wherein the driving circuit comprises a first load circuit, a second load circuit, a first load type identification circuit, a power driving circuit, and a logic operation circuit; the method comprises: The first load type identification circuit determines whether the power driving circuit is connected to the first load circuit or the second load circuit; The first load type identification circuit determines a load type signal according to the first load circuit or the second load circuit connected to the power driving circuit, and sends the load type signal to the logic operation circuit; The logic operation circuit receives the load type signal, determines a drive control signal according to the load type signal, and transmits the drive control signal to the power drive circuit; The power driving circuit drives the load according to the driving control signal.

10. A method for identifying a load type, characterized in that: The method is applied to the load type identification circuit as described in claim 7, wherein the load The type identification circuit includes: a bias constant current source, a first field effect transistor, a second field effect transistor, a resistor, a capacitor, and a first comparator; the method includes: The bias constant current source provides current to the first field effect transistor, and the second field effect transistor mirrors the current of the first field effect transistor; The capacitor filters out jitter and interference; The first comparator determines the voltage of the resistor according to the current of the second field effect transistor and the resistance value of the resistor; The first comparator compares the voltage of the resistor with a first reference voltage connected to the reverse terminal of the first comparator; When the voltage of the resistor is greater than the first reference voltage, the load type is determined to be a high-side load; or when the voltage of the resistor is less than the first reference voltage, the load type is determined to be a low-side load.

Images