A hot-swap control circuit for VPX DC power supply module
By designing a hot-swap control circuit of VPX DC power module including hot-swap circuit, DC/DC module, power-on control circuit and redundant circuit, the problem of reduced system reliability and repairability caused by inrush current during the hot-swap process of VPX DC power module is solved, and higher system reliability and repairability are achieved.
Patent Information
- Application Number
- CN202410044983.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-12
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2044-01-12
AI Technical Summary
During the hot-swap process, existing VPX DC power modules are prone to chassis power failure and damage to the backplane connector, resulting in reduced system reliability and maintenance.
A VPX DC power supply module hot-swap control circuit including hot-swap circuit, DC/DC module, power-on control circuit and redundant circuit is designed. This circuit detects the input voltage and controls the enable switch of the DC/DC module through anti-reverse circuit, hot-swap switch main circuit and power-on control circuit to ensure that the power module does not generate large surge current during hot-swap.
It effectively prevents the damage to the system by inrush current during hot swap, improves the reliability and repairability of the system, and avoids the safety work area (SOA) problems of the power FET and the erroneous shutdown problems when peak overcurrent flows.
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Figure CN117856430B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of power supply, and in particular to a hot-swap control circuit of a VPX direct current power supply module. Background Art
[0002] For some high-reliability systems that need to work uninterruptedly for a long time, such as base station communication equipment and servers, a set of high-reliability power supply is often required. Redundant power supply design plays an important role in high-reliability power supply systems. Redundant power supply systems are generally equipped with more than two DC power modules (hereinafter referred to as "power modules"). When one power module fails, other power modules can be put into use immediately without interrupting the normal operation of the system. Hot-swap technology can provide high-reliability applications to ensure that the system automatically isolates the faulty board while running uninterrupted. The hot-swap design allows fault recovery and the addition of functional modules without stopping the system or with little operator involvement, so that the faulty board can be repaired or functional modules can be added without affecting the system operation.
[0003] At present, the commonly used VPX (VITA46) standard chassis is designed to solve the scalability and performance defects on both sides of the bus-to-bus bridging technology. The structure has the advantages of tight connection and low insertion loss, but it is thermally
[0004] There are no mandatory requirements for plugging and unplugging, and there are no mandatory requirements or recommendations for the capacitance of the power bus on the backplane. However, users often have the need for hot plugging during use and maintenance. If the plug-in circuit is not heated, the chassis is prone to power failure and backplane connector damage when the system is powered on to replace the board, resulting in reduced system reliability and maintainability indicators. Since the input connector specified in the standard does not have a long or short pin design, the hot-plug dedicated chip used on the CPCI power module has requirements for the long and short pins of the connector, which is not applicable to the VPX chassis.
[0005] Figure 4 The figure shows a schematic diagram of hot-swappable power modules, where the left side represents the total power input and load. There is a capacitor Cin1 at the total input power end, and a capacitor Co2 at the output end of the load. There are two power modules on the right side, and there are also capacitors Cin3, Co3, Cin4, and Co4 at the input and output ends of the power modules. When the power module is plugged into the backplane with power on, the backplane will charge the input and output filter capacitors on the power module, which will generate a large surge current, which is several times or even dozens of times larger than the normal operating current of the system. These large surge currents may cause damage to the board edge plugs, wiring and capacitors. Large surge currents can also cause the output voltage to oscillate instantaneously, causing the output voltage to be unstable. If the surge current exceeds the system's tolerance, the input voltage may drop instantly, causing the entire system to reset and restart.
[0006] Conventional hot-swap circuits generally have two methods: one method is to control the gate voltage of the MOS tube through a peripheral discrete device, so that the on-resistance of the MOS tube gradually decreases, and the slow start effect of the capacitive load is improved. The defect of this solution is that it does not control the delayed start of the subsequent load. The lack of load delay during hot-swap will cause the SOA of the MOS tube to fail when it works in the amplification area;
[0007] Another way is to control the conduction of the power MOS by detecting the load current through a dedicated control chip or CPU. The disadvantage of this solution is that the control is complex, the input has no reverse connection protection, over-voltage and under-voltage protection functions, and it is easy to cause false shutdown when a large peak current flows through the load. The maximum input voltage is greatly affected by the maximum supply voltage of the chip. When the input voltage has a transient high voltage, the control chip is easily damaged. Summary of the invention
[0008] The present invention aims to solve at least one of the technical problems existing in the prior art.
[0009] The technical solution of the present invention is: a hot-swap control circuit of a VPX direct current power supply module, comprising a hot-swap circuit, a DC / DC module, a power-on control circuit and a redundant circuit.
[0010] One end of the hot-swap circuit is connected to the power module, and the other end is connected to the input end of the DC / DC module;
[0011] The power-on control circuit is used to detect that the input terminal voltage is within the specified range, thereby turning on the enable switch of the DC / DC module;
[0012] The output end of the DC / DC module is output to the backplane through a redundant circuit, thereby supplying power to the entire machine load.
[0013] The hot-swap circuit includes an anti-reverse connection circuit, a hot-swap switch main circuit and a hot-swap control circuit.
[0014] The anti-reverse connection circuit includes a MOS tube V8, a resistor R6, a voltage regulator tube V12 and a capacitor C4. The positive and negative input electrodes of the power module are respectively connected to the positive input IN+ and the negative input IN- of the anti-reverse connection circuit.
[0015] The two ends of the capacitor C4 are connected to the positive input IN+ and the negative input IN- respectively.
[0016] The resistor R6 is connected to the voltage regulator tube V12, the outer end of the resistor R6 is connected to the positive input IN+, and the outer end of the voltage regulator tube V12 is connected to the negative input IN-;
[0017] The source and drain of the MOS tube V8 are connected to the voltage regulator tube V12 and the capacitor C4 respectively, and the gate of the MOS tube V8 is connected between the resistor R6 and the voltage regulator tube V12;
[0018] The hot-swap switch main circuit includes a resistor R10, capacitors C2 and C3, a transient suppression diode V23 and a MOS tube V9.
[0019] The source of the MOS tube V9 is connected to the negative input IN-, and the drain is connected to the GND terminal of the DC / DC module.
[0020] The gate of the MOS tube V9 is connected between the positive input IN+ and the VIN+ terminal of the DC / DC module.
[0021] One end of the capacitor C2 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0022] One end of the capacitor C3 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0023] One end of the transient suppression diode V23 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0024] One end of the resistor R10 is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module, and the other end is connected between the source of the MOS tube V9 and the negative input IN-;
[0025] The hot-swap switch control circuit includes resistors R1-5, R7-9, capacitors C1, C5, C6, diode V1, voltage regulator tubes V3, V6, V7, V10, V11, transistor V2, MOS tubes V4, V5,
[0026] The resistor R3, the voltage regulator tube V3 and the capacitor C5 are connected in sequence, the outer end of the resistor R3 is connected to the positive input IN+, and the outer end of the capacitor C5 is connected to the negative input IN-.
[0027] The diode V1 is connected to the capacitor C6, the outer end of the diode V1 is connected to the positive input IN+, and the outer end of the capacitor C6 is grounded;
[0028] The resistor R2, the voltage regulator tube V6 and the resistor R9 are connected in sequence, the outer end of the resistor R2 is connected between the resistor R3 and the diode V1, and the outer end of the resistor R9 is connected between the capacitor C5 and the capacitor C6.
[0029] The drain of the MOS tube V4, the resistor R4 and the capacitor C1 are connected in sequence, and the outer end of the capacitor C1 is connected between the resistor R2 and the resistor R3.
[0030] The source of the MOS tube V4 is connected between the resistor R9 and the capacitor C5.
[0031] The gate of the MOS tube V4 is connected between the voltage regulator tube V6 and the resistor R9, and between the diode V1 and the capacitor C6;
[0032] One end of the voltage regulator tube V11 is connected between the gate of the MOS tube V4 and the resistor R9, and the other end is connected between the resistor R9 and the source of the MOS tube V4.
[0033] The resistor R1 and the capacitor C1 are connected in parallel, one end of which is connected to the emitter of the transistor V2, and the other end is connected to the base of the transistor V2;
[0034] The emitter of the transistor V2 is connected to the positive input IN+, the collector of the transistor V2 is connected to the resistor R5, and the outer end of the resistor R5 is connected to the gate of the MOS transistor V9;
[0035] The voltage regulator tube V10, the resistor R7 and the capacitor C5 are connected in parallel, one end of which is connected between the gate of the voltage regulator tube V3 and the MOS tube V5, and the other end of which is connected to the source of the MOS tube V5;
[0036] The source of the MOS transistor V5 is connected to the source of the MOS transistor V9, and the drain of the MOS transistor V5 is connected to one end of the resistor R5 and the gate of the MOS transistor V9;
[0037] The resistor R8 and the voltage regulator tube V7 are connected in parallel, one end of which is connected to the gate of the MOS tube V9, and the other end of which is connected to the source of the MOS tube V9.
[0038] The power-on control circuit includes an input over-voltage and under-voltage protection circuit and a power-on delay circuit.
[0039] The input over-voltage and under-voltage protection circuit includes resistors R11-24, capacitors C7-9, diodes V13, V15, V16, V18, voltage regulator V14, optocoupler V17, reference chip N2, operational amplifier N1A, operational amplifier N1B,
[0040] One end of the resistor R11 is connected between the resistor R10 and the negative input IN-, and the other end is connected to one end of the voltage regulator tube V14.
[0041] The other end of the voltage regulator tube V14 is connected to the pin 7 of the operational amplifier N1B through the diode V18, and the pin 5 of the operational amplifier N1B is connected to the pin 2 of the operational amplifier N1A through the resistor R18.
[0042] The resistor R19 is connected to the diode V15, the outer end of the resistor R19 is connected to the diode V18 and the pin 7 of the operational amplifier N1B, and the diode V15 is connected between the pin 5 of the operational amplifier N1B and the resistor R18.
[0043] The other end of the voltage regulator tube V14 is also connected to the diode V16, the resistor R15, the resistor R14, the reference chip N2 in sequence, and is grounded;
[0044] One end of the resistor R24 is connected to the diode V18 and the pin 7 of the operational amplifier N1B, and the other end is connected between the resistor R15 and the resistor R14.
[0045] The resistor R12 and the diode V13 are connected in sequence, the outer end of the resistor R12 is connected between the diode V16 and the resistor R15, and the pin 1 of the operational amplifier N1A is connected between the resistor R12 and the resistor R15.
[0046] The outer end of the diode V13 is connected between the resistor R22 and the pin 3 of the operational amplifier N1A.
[0047] The Vcc terminal of the operational amplifier N1A is connected between the resistor R15 and the resistor R14, and is connected to 5V;
[0048] The GND terminal of the operational amplifier N1A is connected between the A terminal of the reference chip N2 and the ground;
[0049] The resistor R16, the resistor R20 and the capacitor C9 are connected in sequence, the outer end of the resistor R16 is connected to the positive input IN+, and the outer end of the capacitor C9 is connected between the A end of the reference chip N2 and the ground;
[0050] The resistor R17 is connected to the resistor R21, the outer end of the resistor R17 is connected between the resistor R16 and the positive input IN+, the outer end of the resistor R21 is connected between the resistor R22 and the 3rd pin of the operational amplifier N1A, and the outer end of the resistor R22 is connected between the capacitor C9 and the ground.
[0051] One end of the resistor R23 is connected to pin 6 of the operational amplifier N1B, and the other end is connected between the capacitor C9 and the ground.
[0052] One end of the capacitor C7 is connected between the GND end of the operational amplifier N1A and the A end of the reference chip N2, and the other end is connected between the resistor R14 and the K end of the reference chip N2. The R end of the reference chip N2 is connected between the capacitor C7 and the resistor R14.
[0053] Pin 2 of the operational amplifier N1A is connected between the capacitor C7 and the resistor R14;
[0054] One end of the capacitor C8 is connected between the capacitor C9 and the ground, and the other end is connected between the resistor R21 and the resistor R22.
[0055] Pin 1 on one side of the optical coupler V17 is connected to one end of the resistor R13, the other end of the resistor R13 is connected between the resistor R14 and the resistor R15, and pin 2 is connected between the voltage regulator tube V14 and the diode V18.
[0056] Pin 3 on the other side is grounded, and pin 4 is connected to the Ctrl terminal of the DC / DC module;
[0057] The power-on delay circuit includes resistors R25-29, capacitors C10 and C11, a diode V19, transistors V20-22,
[0058] One end of the resistor R25 is connected between the positive input IN+ and the VIN+ terminal in the DC / DC module, and the other end is connected to the collector of the transistor V20. The emitter of the transistor V20 is connected between the emitter of the transistor V22 and the capacitor C10 and is grounded. The diode V19 is connected to the capacitor C11, and the base of the transistor V20 is connected between the diode V19 and the capacitor C11.
[0059] The base of the transistor V22 is connected between the resistor R25 and the collector of the transistor V20, and the collector of the transistor V22 is connected between the Ctrl terminal in the DC / DC module and the pin 4 of the optical coupler V17;
[0060] The outer end of the capacitor C11 is connected between the emitter of the transistor V20 and the capacitor C10.
[0061] The outer end of the diode V19 is connected to the enable signal through the resistor R27, the resistor R26 and the resistor R28 in sequence, and the resistor R27 and the resistor R26 are connected with an external 5V.
[0062] The collector of the transistor V21 is connected between the diode V19 and the resistor R27, the emitter is connected between the capacitor C11 and the capacitor C10, and the base is connected between the resistor R26 and the resistor R28;
[0063] The outer end of the capacitor C10 is connected between the resistor R26 and the resistor R28;
[0064] One end of the resistor R29 is connected between the diode V19 and the resistor R27 , and the other end is connected between the diode V19 and the capacitor C11 .
[0065] The model of the reference chip N2 is TL431.
[0066] The redundant circuit is a circuit composed of TPS2412 produced by TI.
[0067] The model of the operational amplifier N1A is LM193, and the model of the operational amplifier N1B is LM193.
[0068] The model of the optical coupler V17 is PS2811.
[0069] The model of the transient suppressor V23 is SMCJ36A.
[0070] During operation, the power module input is connected to the input end of the DC / DC module through a hot-swap circuit, the power-on control circuit turns on the enable switch of the DC / DC module when detecting that the input end voltage is within a specification range, and the output end of the DC / DC module is output to the backplane through a redundant circuit to supply power to the entire machine load.
[0071] When power is turned off, the enable switch is turned off first, and then the hot-swap circuit is cut off. This not only prevents the input capacitor from impacting the backplane and the power supply of the entire system, but also prevents hard switching of the main channel power devices, which can lead to safe operating area (SOA) problems of the power FET and false shutdown problems when peak overcurrent flows through. BRIEF DESCRIPTION OF THE DRAWINGS
[0072] In order to more clearly illustrate the specific implementation of the present invention or the technical solution in the prior art, the following briefly introduces the drawings required for the specific implementation or the prior art description. In the drawings, each part is not necessarily drawn according to the actual scale.
[0073] Figure 1 It is a principle block diagram of the present invention.
[0074] Figure 2 is a hot-swap control circuit diagram of the present invention,
[0075] Figure 3 is a comparison diagram in the embodiment,
[0076] Figure 4 It is a principle block diagram in the prior art. DETAILED DESCRIPTION
[0077] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0078] In the description of the present invention, it should be understood that the terms "upper", "lower", "left", "right", "vertical", "horizontal", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as limiting the present invention. In the description of the present invention, unless otherwise specified, "plurality" means two or more.
[0079] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0080] The present invention Figure 1-2 As shown, a hot-swap control circuit of a VPX direct current power supply module includes a hot-swap circuit, a DC / DC module, a power-on control circuit and a redundant circuit.
[0081] One end of the hot-swap circuit is connected to the power module, and the other end is connected to the input end of the DC / DC module;
[0082] The power-on control circuit is used to detect that the input terminal voltage is within the specified range, thereby turning on the enable switch of the DC / DC module;
[0083] The output end of the DC / DC module is output to the backplane through a redundant circuit, thereby supplying power to the entire machine load.
[0084] During operation, the power module input is connected to the input end of the DC / DC module through a hot-swap circuit, the power-on control circuit turns on the enable switch of the DC / DC module when detecting that the input end voltage is within a specification range, and the output end of the DC / DC module is output to the backplane through a redundant circuit to supply power to the entire machine load.
[0085] When power is turned off, the enable switch is turned off first, and then the hot-swap circuit is cut off. This not only prevents the input capacitor from impacting the backplane and the power supply of the entire system, but also prevents hard switching of the main channel power devices, which can lead to safe operating area (SOA) problems of the power FET and false shutdown problems when peak overcurrent flows through.
[0086] The hot-swap circuit includes an anti-reverse connection circuit, a hot-swap switch main circuit and a hot-swap control circuit.
[0087] The anti-reverse connection circuit includes a MOS tube V8, a resistor R6, a voltage regulator tube V12 and a capacitor C4. The positive and negative input electrodes of the power module are respectively connected to the positive input IN+ and the negative input IN- of the anti-reverse connection circuit.
[0088] The two ends of the capacitor C4 are connected to the positive input IN+ and the negative input IN- respectively.
[0089] The resistor R6 is connected to the voltage regulator tube V12, the outer end of the resistor R6 is connected to the positive input IN+, and the outer end of the voltage regulator tube V12 is connected to the negative input IN-;
[0090] The source and drain of the MOS tube V8 are connected to the voltage regulator tube V12 and the capacitor C4 respectively, and the gate of the MOS tube V8 is connected between the resistor R6 and the voltage regulator tube V12;
[0091] First, high-frequency filtering is performed through capacitor C4. If the input polarity is normal, a positive voltage is generated through the current limiting and voltage regulation of resistor R6 and voltage regulator V12 to drive MOS tube V8 to conduct. If the input polarity is reversed, the gate of MOS tube V8 is clamped at about -0.7V, and MOS tube V8 will not conduct.
[0092] The hot-swap switch main circuit includes a resistor R10, capacitors C2 and C3, a transient suppression diode V23 and a MOS tube V9.
[0093] The source of the MOS tube V9 is connected to the negative input IN-, and the drain is connected to the GND terminal of the DC / DC module.
[0094] The gate of the MOS tube V9 is connected between the positive input IN+ and the VIN+ terminal of the DC / DC module.
[0095] One end of the capacitor C2 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0096] One end of the capacitor C3 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0097] One end of the transient suppression diode V23 is connected between the gate of the MOS tube V9 and the VIN+ terminal, and the other end is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module;
[0098] One end of the resistor R10 is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module, and the other end is connected between the source of the MOS tube V9 and the negative input IN-;
[0099] After the input DC power passes through the anti-reverse connection circuit, the resistor R10 first charges the input capacitor C2 of the DC / DC module (i.e., G1). When the input voltage reaches the undervoltage threshold, the gate voltage of the MOS tube V9 slowly rises, and the MOS tube V9 slowly turns on, which plays a role in suppressing the surge current generated when the capacitor C2 is powered on; when the input voltage reaches the overvoltage threshold, the MOS tube V9 is turned off; when the input voltage exceeds the protection threshold of the transient suppression diode V23, the current on the resistor R10 increases, and the voltage across the capacitor C2 is always clamped within the input range allowed by the DC / DC module, which plays a role in overvoltage protection; the capacitor C3 is added to the front end of the DC / DC module to play a role in high-frequency filtering and suppressing pulse interference.
[0100] The hot-swap switch control circuit includes resistors R1-5, R7-9, capacitors C1, C5, C6, diode V1, voltage regulator tubes V3, V6, V7, V10, V11, transistor V2, MOS tubes V4, V5,
[0101] The resistor R3, the voltage regulator tube V3 and the capacitor C5 are connected in sequence, the outer end of the resistor R3 is connected to the positive input IN+, and the outer end of the capacitor C5 is connected to the negative input IN-.
[0102] The diode V1 is connected to the capacitor C6, the outer end of the diode V1 is connected to the positive input IN+, and the outer end of the capacitor C6 is grounded;
[0103] The resistor R2, the voltage regulator tube V6 and the resistor R9 are connected in sequence, the outer end of the resistor R2 is connected between the resistor R3 and the diode V1, and the outer end of the resistor R9 is connected between the capacitor C5 and the capacitor C6.
[0104] The drain of the MOS tube V4, the resistor R4 and the capacitor C1 are connected in sequence, and the outer end of the capacitor C1 is connected between the resistor R2 and the resistor R3.
[0105] The source of the MOS tube V4 is connected between the resistor R9 and the capacitor C5.
[0106] The gate of the MOS tube V4 is connected between the voltage regulator tube V6 and the resistor R9, and between the diode V1 and the capacitor C6;
[0107] One end of the voltage regulator tube V11 is connected between the gate of the MOS tube V4 and the resistor R9, and the other end is connected between the resistor R9 and the source of the MOS tube V4.
[0108] The resistor R1 and the capacitor C1 are connected in parallel, one end of which is connected to the emitter of the transistor V2, and the other end is connected to the base of the transistor V2;
[0109] The emitter of the transistor V2 is connected to the positive input IN+, the collector of the transistor V2 is connected to the resistor R5, and the outer end of the resistor R5 is connected to the gate of the MOS transistor V9;
[0110] The voltage regulator tube V10, the resistor R7 and the capacitor C5 are connected in parallel, one end of which is connected between the positive electrode of the voltage regulator tube V3 and the gate of the MOS tube V5, and the other end of which is connected to the source of the MOS tube V5;
[0111] The source of the MOS transistor V5 is connected to the source of the MOS transistor V9, and the drain of the MOS transistor V5 is connected to one end of the resistor R5 and the gate of the MOS transistor V9;
[0112] The resistor R8 and the voltage regulator tube V7 are connected in parallel, one end of which is connected to the gate of the MOS tube V9, and the other end of which is connected to the source of the MOS tube V9.
[0113] In this circuit, the voltage regulators V7, V10, and V11 clamp the gate voltage of the MOS tube, and the resistor R1 provides the B and E pole biases of the transistor V2, so that V2 can be reliably cut off. The resistors R7, R8, and R9 reduce the resistance between the G and S poles of the MOS tubes V5, V9, and V4, respectively, and play the role of voltage division and discharge.
[0114] When the input voltage reaches the undervoltage threshold, the voltage regulator tube V6 is turned on, and the gate voltage of the MOS tube V4 is charged through R2, C6 and V6 and slowly rises to V GS(th) (threshold voltage), V4 slowly turns on, the B pole of the triode V2 slowly becomes low through R4 and C1 charging, and the gate voltage of the MOS tube V9 slowly rises through V2 and R5. When the input voltage reaches the overvoltage threshold, the voltage regulator tube V3 turns on, and the G pole voltage of the MOS tube V5 rises to V after the resistor R3 limits the current, C5 and V6 filter. GS(th) When , V5 is turned on and the gate voltage of MOS tube V9 drops rapidly.
[0115] The power-on control circuit includes an input over-voltage and under-voltage protection circuit and a power-on delay circuit.
[0116] The input over-voltage and under-voltage protection circuit includes resistors R11-24, capacitors C7-9, diodes V13, V15, V16, V18, voltage regulator V14, optocoupler V17, reference chip N2, operational amplifier N1A, operational amplifier N1B,
[0117] One end of the resistor R11 is connected between the resistor R10 and the negative input IN-, and the other end is connected to one end of the voltage regulator tube V14.
[0118] The other end of the voltage regulator tube V14 is connected to the pin 7 of the operational amplifier N1B through the diode V18, and the pin 5 of the operational amplifier N1B is connected to the pin 2 of the operational amplifier N1A through the resistor R18.
[0119] The resistor R19 is connected to the diode V15, the outer end of the resistor R19 is connected to the diode V18 and the pin 7 of the operational amplifier N1B, and the diode V15 is connected between the pin 5 of the operational amplifier N1B and the resistor R18.
[0120] The other end of the voltage regulator tube V14 is also connected to the diode V16, the resistor R15, the resistor R14, the reference chip N2 in sequence, and is grounded;
[0121] One end of the resistor R24 is connected to the diode V18 and the pin 7 of the operational amplifier N1B, and the other end is connected between the resistor R15 and the resistor R14.
[0122] The resistor R12 and the diode V13 are connected in sequence, the outer end of the resistor R12 is connected between the diode V16 and the resistor R15, and the pin 1 of the operational amplifier N1A is connected between the resistor R12 and the resistor R15.
[0123] The outer end of the diode V13 is connected between the resistor R22 and the pin 3 of the operational amplifier N1A.
[0124] The Vcc terminal of the operational amplifier N1A is connected between the resistor R15 and the resistor R14, and is connected to 5V;
[0125] The GND terminal of the operational amplifier N1A is connected between the A terminal of the reference chip N2 and the ground;
[0126] The resistor R16, the resistor R20 and the capacitor C9 are connected in sequence, the outer end of the resistor R16 is connected to the positive input IN+, and the outer end of the capacitor C9 is connected between the A end of the reference chip N2 and the ground;
[0127] The resistor R17 is connected to the resistor R21, the outer end of the resistor R17 is connected between the resistor R16 and the positive input IN+, the outer end of the resistor R21 is connected between the resistor R22 and the 3rd pin of the operational amplifier N1A, and the outer end of the resistor R22 is connected between the capacitor C9 and the ground.
[0128] One end of the resistor R23 is connected to pin 6 of the operational amplifier N1B, and the other end is connected between the capacitor C9 and the ground.
[0129] One end of the capacitor C7 is connected between the GND end of the operational amplifier N1A and the A end of the reference chip N2, and the other end is connected between the resistor R14 and the K end of the reference chip N2. The R end of the reference chip N2 is connected between the capacitor C7 and the resistor R14.
[0130] Pin 2 of the operational amplifier N1A is connected between the capacitor C7 and the resistor R14;
[0131] One end of the capacitor C8 is connected between the capacitor C9 and the ground, and the other end is connected between the resistor R21 and the resistor R22.
[0132] Pin 1 on one side of the optical coupler V17 is connected to one end of the resistor R13, the other end of the resistor R13 is connected between the resistor R14 and the resistor R15, and pin 2 is connected between the voltage regulator tube V14 and the diode V18.
[0133] Pin 3 on the other side is grounded, and pin 4 is connected to the Ctrl terminal of the DC / DC module;
[0134] In this circuit, the functions of R14, N2, C7 and R18 are to generate a reference voltage and send it to the 2nd and 5th pins of the comparator; the functions of R16, R20, R23 and C9 are to divide and filter the input voltage and send it to the 6th pin of the comparator to provide an input overvoltage sampling signal; the functions of R17, R21, R22 and C8 are to divide and filter the input voltage and send it to the 3rd pin of the comparator to provide an input undervoltage sampling signal; the functions of V16 and V18 are to make the outputs of the two comparators form an AND gate circuit, and V17 will not act only when the outputs of the two comparators are both high. The functions of V13, V15 and R12, R19 are to make the two comparators become hysteresis comparators respectively, to ensure that the comparators will not be in an oscillating state and to ensure the stability of the circuit; R15 and R24 play a relatively strong pull-up role; R13 plays a current limiting role, to ensure that the input current of V17 is in a suitable current range.
[0135] When the input voltage is over-voltage or under-voltage, the output terminals 7 and 1 of op amp N1 (i.e., comparator, including op amps N1A and N1B) output low level, V17 is turned on, the Ctrl terminal of G1 inputs low level, and resistors R12, R19 and diodes V13, V15 play the role of over-voltage and under-voltage hysteresis.
[0136] The power-on delay circuit includes resistors R25-29, capacitors C10 and C11, a diode V19, transistors V20-22,
[0137] One end of the resistor R25 is connected between the positive input IN+ and the VIN+ terminal in the DC / DC module, and the other end is connected to the collector of the transistor V20. The emitter of the transistor V20 is connected between the emitter of the transistor V22 and the capacitor C10 and is grounded. The diode V19 is connected to the capacitor C11, and the base of the transistor V20 is connected between the diode V19 and the capacitor C11.
[0138] The base of the transistor V22 is connected between the resistor R25 and the collector of the transistor V20, and the collector of the transistor V22 is connected between the Ctrl terminal in the DC / DC module and the pin 4 of the optical coupler V17;
[0139] The outer end of the capacitor C11 is connected between the emitter of the transistor V20 and the capacitor C10.
[0140] The outer end of the diode V19 is connected to the enable signal through the resistor R27, the resistor R26 and the resistor R28 in sequence, and the resistor R27 and the resistor R26 are connected with an external 5V.
[0141] The collector of the transistor V21 is connected between the diode V19 and the resistor R27, the emitter is connected between the capacitor C11 and the capacitor C10, and the base is connected between the resistor R26 and the resistor R28;
[0142] The outer end of the capacitor C10 is connected between the resistor R26 and the resistor R28;
[0143] One end of the resistor R29 is connected between the diode V19 and the resistor R27 , and the other end is connected between the diode V19 and the capacitor C11 .
[0144] In this circuit, the functions of R26, R27 and R25 are to provide an upper bias voltage to transistors V21, V20 and V22 respectively, and provide base current to each transistor, so that transistor V21 can be turned on reliably; the functions of R28 and C10 are to provide RC filtering to provide a stable lower bias voltage to transistor V21, so that transistor V21 can be cut off reliably; the functions of R29 and C11 are to provide RC delay to delay the turn-on of transistor V20, and the function of V19 is to cut off V20 quickly.
[0145] When the enable signal is at a low level, V20 is turned on with a delay, V22 is turned off with a delay, and the Ctrl terminal is pulled up to a high level internally. When the enable signal is at a high level, V20 is turned off quickly, V22 is turned on, and the Ctrl terminal input is at a low level. When the DC / DC module (G1) is at a low level at the Ctrl terminal, the DC / DC module is turned off, and when it is at a high level or floating, the DC / DC module has output.
[0146] The power-on control circuit in the present invention controls the gate drive through the voltage at the output end of the hot-swap switch. When the input is undervoltage or the output load is too large, the hot-swap switch will not be turned on. When the input is overvoltage, the hot-swap switch will not be turned on, and the S end of V9 is a negative potential relative to the D end. Due to the voltage drop across the resistor R10, the overvoltage circuit of N1 will not operate when the input voltage of G1 does not reach the overvoltage threshold after V9 is turned off. The S end potential of V9 is led to the negative end of the input diode of the optocoupler V17 through R11 and the voltage regulator tube V14. V17 is turned on, the Ctrl end of G1 inputs a low level, and the DC / DC module is turned off to prevent the DC / DC module from constantly starting and restarting when overvoltage occurs.
[0147] The model of the reference chip N2 is TL431.
[0148] The model of the operational amplifier N1A is LM193, and the model of the operational amplifier N1B is LM193.
[0149] The model of the optical coupler V17 is PS2811.
[0150] The model of the transient suppressor V23 is SMCJ36A.
[0151] The redundant circuit uses a circuit composed of TPS2412 from TI. The output power supply solution composed of TPS2412 from TI is used in the design of the output redundant circuit. The output of each module simulates the "OR output" of a diode by externally controlling a MOSFET. The circuit has a relatively low threshold and can use a MOSFET tube with low on-resistance to make an output redundant circuit, which improves the efficiency and reliability of the power module.
[0152] The present invention does not use direct hard switch main channel power devices for switch control, but first powers up the DC / DC module input and then controls the enable switch of the DC / DC module to ensure that no large current flows through the main channel power devices when the switch is switched. The present invention also has input reverse connection protection, over-voltage and under-voltage protection functions, and output end hot-swap functions.
[0153] The VPX power module contains an isolated DC / DC module. Given that the DC / DC module has an overcurrent protection function, the hot-swap circuit only needs to select an input power that meets the input power of the entire module and does not switch the power switch under load.
[0154] The design is based on the connector port capacitance required by the CPCI standard for hot-swap power modules. The input and output connector port capacitances of the power module are 1uF and 0.1uF respectively, meeting the design requirements for hot-swap input and output ports.
[0155] The whole working process of the present invention is as follows: during hot plugging, the input direct current first charges the input capacitor of the DC / DC module through R10, and when the charging voltage reaches the opening threshold of V4, V9 is turned on, and the input main circuit is powered normally. At the same time, the enable signal ("0" enable) is delayed for 50ms after passing through the power-on delay circuit, causing V22 to be turned off, and the Ctrl end of G1 is at a high level due to the internal pull-up, and the DC / DC module enables output. The over- and under-voltage thresholds of the main circuit are wider than the thresholds of N1. When there is a slight over- or under-voltage, N1 outputs a low level and turns off the DC / DC module (G1); when there is a serious over- or under-voltage, the main circuit MOS tube V9 is turned off, the DC / DC module turns off the output, and the transient suppression diode V23 clamps the input voltage of G1 within the maximum input range. A large load current will appear in the circuit only after the main power switch V9 is turned on. Since the DC / DC module itself has an overcurrent protection function, as long as the MOSFET selection current is greater than the maximum working current of the module and the on-resistance is low enough, there will be no overpower damage.
[0156] like Figure 3 As shown, curve 1 is the input voltage and input current waveform of the power module during the plug-in process when the hot-swap function circuit is not added. It can be seen that during the hot-swap process, the current amplitude is very large and the rising rate is very large, such as Figure 3 As shown in point B, the system voltage amplitude is reduced, as shown in point A in the figure. Curve 2 is the voltage and current waveform of the conventional hot-swap circuit. It can be seen from the figure that the output current waveform amplitude is much reduced and the output voltage is much more stable. However, since there is no power-on control circuit, there will be load current at the moment of hot plugging, and the MOS tube is prone to SOA problems. The present invention will not have load current at the moment of hot plugging, so the MOS tube will not have SOA problems and false shutdown of overcurrent protection. In addition, since no dedicated hot-swap control chip is used for control, the input range will not be limited by the maximum supply voltage of the chip.
[0157] The present invention proposes the actual demand for the hot-swap circuit design of a DC power supply module and provides a specific practical circuit, which effectively suppresses the device damage and system restart problems caused by hot-swap.
[0158] Regarding the contents disclosed in this case, there are a few points that need to be explained:
[0159] (1) The drawings of the embodiments disclosed in this case only involve the structures involved in the embodiments disclosed in this case. Other structures can refer to the general design;
[0160] (2) In the absence of conflict, the embodiments and features of the embodiments disclosed in this case may be combined with each other to obtain new embodiments;
[0161] The above are only specific implementation methods disclosed in this case, but the protection scope of the present disclosure is not limited thereto. The protection scope disclosed in this case should be based on the protection scope of the claims.
Claims
1. A hot-swap control circuit for a VPX DC power module, characterized in that: Including hot-swap circuit, DC / DC module, power-on control circuit and redundant circuit, One end of the hot-swap circuit is connected to the power module, and the other end is connected to the input end of the DC / DC module; The power-on control circuit is used to detect that the input terminal voltage is within the specified range, thereby turning on the enable switch of the DC / DC module; The output end of the DC / DC module is output to the backplane through a redundant circuit, thereby supplying power to the entire machine load; When power is off, first turn off the enabling switch, then cut off the hot-swap circuit; The hot-swap circuit includes a hot-swap switch main circuit and a hot-swap control circuit. The hot-swap switch main circuit includes a resistor R10, capacitors C2 and C3, a transient suppression diode V23 and a MOS tube V9. The source of the MOS tube V9 is connected to the negative input IN-, and the drain is connected to the GND terminal of the DC / DC module. The gate of the MOS tube V9 is connected between the positive input IN+ and the VIN+ terminal of the DC / DC module through the resistor R5 and the transistor V2 in sequence. One end of the capacitor C2, one end of the capacitor C3, and one end of the transient suppression diode V23 are all connected between the emitter of the transistor V2 and the VIN+ terminal of the DC / DC module, and the other end of the capacitor C2, the other end of the capacitor C3, and the other end of the transient suppression diode V23 are all connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module; One end of the resistor R10 is connected between the drain of the MOS tube V9 and the GND terminal in the DC / DC module, and the other end is connected between the source of the MOS tube V9 and the negative input IN-; The hot-swap switch control circuit includes resistors R1-R5, R7-R9, capacitors C1, C5, C6, diode V1, voltage regulator tubes V3, V6, V7, V10, V11, transistor V2, MOS tubes V4, V5, The resistor R3, the voltage regulator tube V3 and the capacitor C5 are connected in sequence, the outer end of the resistor R3 is connected to the positive input IN+, and the outer end of the capacitor C5 is connected to the negative input IN-. The diode V1 is connected to the capacitor C6, the outer end of the diode V1 is connected to the positive input IN+, and the outer end of the capacitor C6 is grounded; The resistor R2, the voltage regulator tube V6 and the resistor R9 are connected in sequence, the outer end of the resistor R2 is connected between the resistor R3 and the diode V1, and the outer end of the resistor R9 is connected between the capacitor C5 and the capacitor C6. The drain of the MOS tube V4, the resistor R4 and the capacitor C1 are connected in sequence, and the outer end of the capacitor C1 is connected between the resistor R2 and the resistor R3. The source of the MOS tube V4 is connected between the resistor R9 and the capacitor C5. The gate of the MOS tube V4 is connected between the voltage regulator tube V6 and the resistor R9, and between the diode V1 and the capacitor C6; One end of the voltage regulator tube V11 is connected between the gate of the MOS tube V4 and the resistor R9, and the other end is connected between the resistor R9 and the source of the MOS tube V4. The resistor R1 and the capacitor C1 are connected in parallel, one end of which is connected to the emitter of the transistor V2, and the other end is connected to the base of the transistor V2; The emitter of the transistor V2 is connected to the positive input IN+, the collector of the transistor V2 is connected to one end of the resistor R5, and the other end of the resistor R5 is connected to the gate of the MOS transistor V9; The voltage regulator tube V10, the resistor R7 and the capacitor C5 are connected in parallel, one end of which is connected between the gate of the voltage regulator tube V3 and the MOS tube V5, and the other end of which is connected to the source of the MOS tube V5; The source of the MOS transistor V5 is connected to the source of the MOS transistor V9, and the drain of the MOS transistor V5 is connected between the other end of the resistor R5 and the gate of the MOS transistor V9; The resistor R8 and the voltage regulator tube V7 are connected in parallel, one end of which is connected to the gate of the MOS tube V9, and the other end of which is connected to the source of the MOS tube V9.
2. The hot-swap control circuit of a VPX DC power supply module according to claim 1, characterized in that: The hot-swap circuit also includes an anti-reverse connection circuit. The anti-reverse connection circuit includes a MOS tube V8, a resistor R6, a voltage regulator tube V12 and a capacitor C4. The positive and negative input electrodes of the power module are respectively connected to the positive input IN+ and the negative input IN- of the anti-reverse connection circuit. The two ends of the capacitor C4 are connected to the positive input IN+ and the negative input IN- respectively. The resistor R6 is connected to the voltage regulator tube V12, the outer end of the resistor R6 is connected to the positive input IN+, and the outer end of the voltage regulator tube V12 is connected to the negative input IN-; The source and drain of the MOS tube V8 are connected to the voltage regulator tube V12 and the capacitor C4 respectively, and the gate of the MOS tube V8 is connected between the resistor R6 and the voltage regulator tube V12.
3. The hot-swap control circuit of a VPX DC power supply module according to claim 1, characterized in that: The power-on control circuit includes an input over-voltage and under-voltage protection circuit and a power-on delay circuit. The input over-voltage and under-voltage protection circuit includes resistors R11-R24, capacitors C7-C9, diodes V13, V15, V16, V18, voltage regulator V14, optocoupler V17, reference chip N2, operational amplifier N1A, operational amplifier N1B, One end of the resistor R11 is connected between the resistor R10 and the negative input IN-, and the other end is connected to one end of the voltage regulator tube V14. The other end of the voltage regulator tube V14 is connected to the pin 7 of the operational amplifier N1B through the diode V18, and the pin 5 of the operational amplifier N1B is connected to the pin 2 of the operational amplifier N1A through the resistor R18. The resistor R19 is connected to the diode V15, the outer end of the resistor R19 is connected between the diode V18 and the pin 7 of the operational amplifier N1B, and one end of the diode V15 is connected between the pin 5 of the operational amplifier N1B and the resistor R18. The other end of the voltage regulator tube V14 is also connected to the diode V16, the resistor R15, the resistor R14, the reference chip N2 in sequence, and is grounded; One end of the resistor R24 is connected between the diode V18 and the pin 7 of the operational amplifier N1B, and the other end is connected between the resistor R15 and the resistor R14. The resistor R12 and the diode V13 are connected in sequence, the outer end of the resistor R12 is connected between the diode V16 and the resistor R15, and the pin 1 of the operational amplifier N1A is connected between the resistor R12 and the resistor R15. The outer end of the diode V13 is connected between the resistor R22 and the pin 3 of the operational amplifier N1A. The Vcc terminal of the operational amplifier N1A is connected between the resistor R15 and the resistor R14, and is connected to a 5V power supply; The GND terminal of the operational amplifier N1A is connected between the A terminal of the reference chip N2 and the ground terminal; The resistor R16, the resistor R20 and the capacitor C9 are connected in sequence, the outer end of the resistor R16 is connected to the positive input IN+, and the outer end of the capacitor C9 is connected between the A end of the reference chip N2 and the ground end; The resistor R17 is connected to the resistor R21, the outer end of the resistor R17 is connected between the resistor R16 and the positive input IN+, the outer end of the resistor R21 is connected between the resistor R22 and the 3rd pin of the operational amplifier N1A, and the outer end of the resistor R22 is connected between the capacitor C9 and the ground terminal. One end of the resistor R23 is connected to the pin 6 of the operational amplifier N1B, and the other end is connected between the capacitor C9 and the ground terminal. One end of the capacitor C7 is connected between the GND end of the operational amplifier N1A and the A end of the reference chip N2, and the other end is connected between the resistor R14 and the K end of the reference chip N2. The R end of the reference chip N2 is connected between the capacitor C7 and the resistor R14. Pin 2 of the operational amplifier N1A is connected between the capacitor C7 and the resistor R14; One end of the capacitor C8 is connected between the capacitor C9 and the ground terminal, and the other end is connected between the resistor R21 and the resistor R22. Pin 1 on one side of the optical coupler V17 is connected to one end of the resistor R13, the other end of the resistor R13 is connected between the resistor R14 and the resistor R15, and pin 2 is connected between the voltage regulator tube V14 and the diode V18. Pin 3 on the other side of the optocoupler V17 is grounded, and pin 4 is connected to the Ctrl terminal of the DC / DC module; The power-on delay circuit includes resistors R25-R29, capacitors C10 and C11, a diode V19, transistors V20-V22, One end of the resistor R25 is connected between the positive input IN+ and the VIN+ terminal in the DC / DC module, and the other end is connected to the collector of the transistor V20. The emitter of the transistor V20 is connected between the emitter of the transistor V22 and the capacitor C10 and is grounded. The diode V19 is connected to the capacitor C11, and the base of the transistor V20 is connected between the diode V19 and the capacitor C11. The base of the transistor V22 is connected between the resistor R25 and the collector of the transistor V20, and the collector of the transistor V22 is connected between the Ctrl terminal in the DC / DC module and the pin 4 of the optical coupler V17; The outer end of the capacitor C11 is connected between the emitter of the transistor V20 and the capacitor C10. The outer end of the diode V19 is connected to the enable signal through the resistor R27, the resistor R26 and the resistor R28 in sequence, and a 5V power supply is externally connected between the resistor R27 and the resistor R26. The collector of the transistor V21 is connected between the diode V19 and the resistor R27, the emitter is connected between the capacitor C11 and the capacitor C10, and the base is connected between the resistor R26 and the resistor R28; The outer end of the capacitor C10 is connected between the resistor R26 and the resistor R28; One end of the resistor R29 is connected between the diode V19 and the resistor R27 , and the other end is connected between the diode V19 and the capacitor C11 .
4. The hot-swap control circuit of a VPX DC power supply module according to claim 3, characterized in that: The model of the reference chip N2 is TL431.
5. The hot-swap control circuit of a VPX DC power supply module according to claim 3, characterized in that: The model of the operational amplifier N1A is LM193, and the model of the operational amplifier N1B is LM193.
6. The hot-swap control circuit of a VPX DC power supply module according to claim 3, characterized in that: The model of the optical coupler V17 is PS2811.
7. The hot-swap control circuit of a VPX DC power supply module according to claim 3, characterized in that: The model of the transient suppressor V23 is SMCJ36A.
8. A hot-swap control circuit for a VPX DC power supply module according to any one of claims 1 to 7, characterized in that: The redundant circuit is a circuit composed of TPS2412.
Citation Information
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