Pixel array driving circuit and display device

Abstract

Embodiments of the present application relate to a pixel array driving circuit and a display device. The circuit comprises a pixel array, a first preset number of data lines, a second preset number of scan lines, a data line driving module and a scan line driving module. Each row of the pixel array corresponds to two scan lines. Each pixel in the pixel array comprises a plurality of sub-pixels. Each data line of the first preset number of data lines corresponds to a column of sub-pixels. Each row comprises a third preset number of pixel sets. Each pixel set comprises two pixel sub-sets. The first pixel sub-set and the second pixel sub-set each comprise one-to-one corresponding pixels. Corresponding pixels each comprise same-color sub-pixels. Data lines corresponding to the same-color sub-pixels are connected to each other. Embodiments of the present application help to realize HSR and other functions on the basis of time sequence DRD display. The time sequence control and data arrangement process of data display are also made more convenient, thereby helping to improve the display efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display panel, in particular to a pixel array driving circuit and a display device. BACKGROUND

[0002] In the technical field of display panel, since the cost of source driver for outputting data to the pixel of liquid crystal panel is high, in order to save cost, the design of doubling the number of scanning lines in the scanning driving circuit (i.e. gate driving circuit) and reducing the number of data lines is usually adopted at present, which is DRD (Double Rate Driving) technology.

[0003] The DRD technology can drive two sub-pixel units by the same data line, so as to reduce the number of data lines. This way can realize less source IC to drive the display panel to display, thereby reducing the cost.

[0004] In the existing DRD technology, the same data line is often connected with sub-pixel units of different colors, that is, the same column of sub-pixels can be connected to different data lines, therefore, the driving voltage on the data line must be changed line by line during a frame of image display. When the function of HSR (Hardware Super Resolution) or other functions which need to display data of some rows and their adjacent rows mixed is needed to be realized, it causes that different rows cannot share the voltage on the data line, and such functions cannot be realized. SUMMARY

[0005] In view of this, in order to solve the above-mentioned part or all of the technical problems, the embodiments of the present application provide a pixel array driving circuit and a display device.

[0006] In a first aspect, the embodiments of the present application provide a pixel array driving circuit, which comprises: a pixel array, a first preset number of data lines, a second preset number of scan lines, a data line driving module and a scan line driving module, the data line driving module is connected with the first preset number of data lines, the scan line driving module is connected with the second preset number of scan lines, each row in the pixel array corresponds to two scan lines, each pixel in the pixel array comprises a plurality of sub-pixels; each data line in the first preset number of data lines corresponds to a column of sub-pixels respectively, and is used for outputting a display signal to the corresponding column of sub-pixels; for each row in the pixel array, the row comprises a third preset number of pixel sets, each pixel set comprises two pixel sub-sets, and each pixel sub-set comprises at least one pixel; a first pixel sub-set and a second pixel sub-set in the two pixel sub-sets are driven through a first scan line and a second scan line in the two scan lines corresponding to the row respectively; the pixels included in the first pixel sub-set and the second pixel sub-set correspond to each other one by one, and the same color sub-pixels included in the corresponding pixels are connected with each other respectively through the data lines corresponding to the same color sub-pixels.

[0007] In a possible implementation, the circuit further comprises a timing controller, the timing controller is connected with the scan line driving module; the pixel array comprises first type pixel rows and second type pixel rows which are staggered in sequence; the timing controller is used for: in response to an operation of triggering to start a first scanning mode, controlling the scan driving module to sequentially output scan driving signals to the scan lines corresponding to the first type pixel rows according to corresponding timing; and for each second type pixel row included in the pixel array, controlling the scan driving module to output scan driving signals to the second type pixel row during a display driving period of a previous first type pixel row adjacent to the second type pixel row; and controlling the scan driving module to output scan driving signals to the second type pixel row during a display driving period of a next first type pixel row adjacent to the second type pixel row.

[0008] In a possible implementation, for each second type pixel row included in the pixel array, during a display driving period of a previous first type pixel row adjacent to the second type pixel row, the first scan line corresponding to the second type pixel row and the first scan line corresponding to the previous first type pixel row simultaneously receive scan driving signals, and the second scan line corresponding to the second type pixel row and the second scan line corresponding to the previous first type pixel row simultaneously receive scan driving signals; and during a display driving period of a next first type pixel row adjacent to the second type pixel row, the first scan line corresponding to the second type pixel row and the first scan line corresponding to the next first type pixel row simultaneously receive scan driving signals, and the second scan line corresponding to the second type pixel row and the second scan line corresponding to the next first type pixel row simultaneously receive scan driving signals.

[0009] In a possible implementation, for each second-type pixel row included in the pixel array, a driving time length of a scan driving signal received by a first scan line corresponding to the second-type pixel row is less than or equal to a driving time length of a scan driving signal received by a first scan line corresponding to a previous first-type pixel row, a driving time length of a scan driving signal received by a second scan line corresponding to the second-type pixel row is less than or equal to a driving time length of a scan driving signal received by a second scan line corresponding to the previous first-type pixel row, and a driving time length of a scan driving signal received by the first scan line corresponding to the second-type pixel row is less than or equal to a driving time length of a scan driving signal received by a first scan line corresponding to a next first-type pixel row, and a driving time length of a scan driving signal received by the second scan line corresponding to the second-type pixel row is less than or equal to a driving time length of a scan driving signal received by a second scan line corresponding to the next first-type pixel row.

[0010] In a possible implementation, the timing controller is further configured to: receive input original image data; extract, from the original image data, to-be-displayed data corresponding to each first-type pixel row, and rearrange the extracted to-be-displayed data; and sequentially send, to the data line driving module, the to-be-displayed data corresponding to each first-type pixel row based on the timing corresponding to the first scanning mode command.

[0011] In a possible implementation, the timing controller is configured to: in response to an operation of triggering starting of the second scanning mode, control the scan driving module to sequentially output, to each of the second preset number of scan lines, a scan driving signal according to the timing corresponding to the second scanning mode command.

[0012] In a possible implementation, the timing controller is further configured to: receive input original image data; rearrange the original image data to obtain to-be-displayed data corresponding to each of the second preset number of scan lines; and sequentially send, to the data line driving module, the to-be-displayed data corresponding to each of the scan lines based on the timing corresponding to the second scanning mode command.

[0013] In a possible implementation, during display of the same image frame, the reference voltages corresponding to each column of sub-pixels in the pixel array are of the same polarity.

[0014] In a possible implementation, the first pixel sub-set and the second pixel sub-set each include two pixels.

[0015] In a second aspect, the embodiments of the present application provide a display device, comprising: the pixel array driving circuit, the display panel, the panel frame, the power module and the data receiving module as described in the first aspect; the pixel array driving circuit is arranged on the display panel, the display panel is mounted on the panel frame, the power supply end of the display panel is connected with the power module, and the signal receiving end of the display panel is connected with the data receiving module.

[0016] The pixel array driving circuit and the display device provided by the embodiments of the present application can realize that the same column of sub-pixels are driven by one data line and the two columns of sub-pixels connected by the same data line have the same color by dividing each row of pixels in the pixel array into a plurality of pixel sets, dividing each pixel set into two pixel sub-sets, driving the first pixel sub-set and the second pixel sub-set in each row of pixels through the first scan line and the second scan line in the two scan lines corresponding to the row of pixels respectively, and connecting the data lines corresponding to the same color sub-pixels in the corresponding pixels in the first pixel sub-set and the second pixel sub-set respectively, which can help to realize the HSR function and the like. In addition, the same color of the sub-pixels connected by the same data line can make the timing control and data arrangement process of data display more convenient, thereby helping to improve the display efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which are incorporated herein and constitute part of the specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced as follows, and obviously, other drawings can also be obtained by those skilled in the art without any creative labor under the premise of the drawings.

[0019] One or more embodiments are illustrated by the pictures in the drawings corresponding to the embodiments, and the illustrative description does not constitute a limitation on the embodiments, and the elements with the same reference numerals in the drawings represent similar elements, unless otherwise specified, and the drawings do not constitute a proportional limitation.

[0020] Figure 1 A structural schematic diagram of a pixel array driving circuit provided by the embodiments of the present application is shown in the figure;

[0021] Figure 2 A structural schematic diagram of another pixel array driving circuit provided by the embodiments of the present application is shown in the figure;

[0022] Figure 3A timing diagram of the scan driving signal in the second scan mode provided by the embodiment of the present application;

[0023] Figure 4 A data arrangement schematic diagram in the first scan mode provided by the embodiment of the present application;

[0024] Figure 5 A timing diagram of the scan driving signal in the second scan mode provided by the embodiment of the present application;

[0025] Figure 6 A data arrangement schematic diagram in the second scan mode provided by the embodiment of the present application;

[0026] Figure 7 A structure schematic diagram of a display device provided by the embodiment of the present application.

[0027] Reference signs:

[0028] 100-pixel array driving circuit; 101-pixel array; 1011-first pixel sub-set; 1012-second pixel sub-set; 102-data line driving module; 103-scan line driving module; 104-timing controller; 700-display array; 701-display panel; 702-panel frame; 703-power module; 704-data receiving module. DETAILED DESCRIPTION

[0029] Various exemplary embodiments of the present application will now be described in detail by referring to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. It should be noted that the relative arrangement, numerical expression and values of the components and steps set forth in these embodiments do not limit the scope of the present application, unless otherwise specifically stated.

[0030] Those skilled in the art can understand that the terms "first", "second" and the like in the embodiments of the present application are only used to distinguish different steps, devices or modules, and do not represent any specific technical meaning, nor represent the logical order between them.

[0031] It should also be understood that in the present embodiment, "a plurality of" can mean two or more, and "at least one" can mean one, two or more.

[0032] It should also be understood that for any component, data or structure mentioned in the embodiments of the present application, it can be understood as one or more in general, without explicit limitation or in the context of the opposite indication.

[0033] In addition, the term "and / or" in the present application is only used to describe the association relationship of associated objects, which means that there can be three relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.

[0034] It should also be understood that the description of the various embodiments in the present application focuses on the differences between the various embodiments, and the same or similar parts can be referred to each other, and will not be repeated here for the sake of brevity.

[0035] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the application or its application or uses.

[0036] Techniques, circuits, and devices known to those of ordinary skill in the relevant art can not be discussed in detail, but should be considered part of the specification where appropriate.

[0037] It should be noted that similar reference numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0038] It should be noted that the embodiments and features in the present application can be combined with each other without conflict. In order to understand the embodiments of the present application, the following will be described in detail with reference to the drawings and in combination with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0039] Figure 1 A structure schematic diagram of a pixel array driving circuit 100 provided by the embodiments of the present application is provided, which is commonly applied to a display panel, and the circuit specifically comprises: a pixel array 101, a first preset number of data lines, a second preset number of scan lines, a data line driving module 102 and a scan line driving module 103.

[0040] In the present embodiment, the data line driving module 102 is connected with the first preset number of data lines, the scan line driving module 103 is connected with the second preset number of scan lines, each row in the pixel array 101 corresponds to two scan lines, and each pixel in the pixel array 101 comprises a plurality of sub-pixels.

[0041] As Figure 1As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display. Figure 1 As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display.

[0042] In this embodiment, each of the first preset number of data lines corresponds to a column of sub-pixels, and is used to output a display signal to the corresponding column of sub-pixels. As shown in FIG. 1, the same column of sub-pixels is connected to the corresponding data line through the TFT switch. When the scan driving signal output by the scan line controls the TFT switch to be turned on, the sub-pixel receives the data driving voltage from the corresponding data line. Figure 1 As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display. Figure 1 As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display.

[0043] In this embodiment, each row in the pixel array 101 includes a third preset number of pixel sets, each pixel set includes two pixel sub-sets, and each pixel sub-set includes at least one pixel. A first pixel sub-set and a second pixel sub-set in the two pixel sub-sets are driven by a first scan line and a second scan line in two scan lines corresponding to the row, respectively.

[0044] Optionally, the first pixel sub-set and the second pixel sub-set each include two pixels. As shown in FIG. 1, each pixel set in each row of pixels includes four pixels, and the four pixels form two pixel sub-sets. Figure 1 As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display. Figure 1 As shown in FIG. 1, the pixel array 101 includes M rows and N columns of pixels, and each pixel includes R, G, and B sub-pixels. R11, G11, B11, and the like in the figure represent the row and column numbers of the pixels. Each sub-pixel is connected to a corresponding scan line (such as G1, G2, G3, and the like in FIG. 1) through a switching element such as a TFT switch (a TFT switch is composed of a thin film transistor and a common transistor, and realizes a controlled switching function), and the scan line can output a scan driving signal to control the TFT switch to be turned on or turned off, so that each sub-pixel receives a driving voltage from a corresponding data line for display.

[0045] For Figure 1The first row in the first column, 1011, 1012 is a first pixel sub-set and a second pixel sub-set. The scanning lines G1, G2 are a first scanning line and a second scanning line corresponding to the first row, each sub-pixel included in the first pixel sub-set 1011 is driven by the scanning line G1, and each sub-pixel included in the second pixel sub-set 1012 is driven by the scanning line G2.

[0046] In the embodiment, the first pixel sub-set and the second pixel sub-set each include pixels in one-to-one correspondence, and the same-color sub-pixels included in the corresponding pixels each correspond to a data line connected to each other.

[0047] As shown in Figure 1 The pixel composed of the sub-pixels R11, G11 and B11 in the first pixel sub-set 1011 corresponds to the pixel composed of the sub-pixels R13, G13 and B13 in the second pixel sub-set 1012, R11 and R13 are the same-color pixels, the data lines corresponding to the two respectively are connected, and the driving voltage input from the S1 port is received.

[0048] When displaying a frame of image, the scanning line driving module 103 outputs the scanning driving signal to each scanning line through the pre-set time sequence, drives the corresponding sub-pixels to be connected to the corresponding data line, and then displays the corresponding color according to the driving voltage input from the data line. For example, when the circuit operates in the HSR mode, at the first time, G1 and G3 can simultaneously output the scanning driving signal to drive the corresponding pixel sub-sets in the first row and the second row to display; at the second time, G2 and G4 can simultaneously output the scanning driving signal to drive the corresponding pixel sub-sets in the first row and the second row to display; at the third time, G3 and G5 can simultaneously output the scanning driving signal to drive the corresponding pixel sub-sets in the second row and the third row to display; at the fourth time, G4 and G6 can simultaneously output the scanning driving signal to drive the corresponding pixel sub-sets in the second row and the third row to display, and so on, so as to complete the display of a frame of image.

[0049] The pixel array driving circuit provided by the embodiment of the present application divides each row of pixels in the pixel array into a plurality of pixel sets, each pixel set is divided into two pixel sub-sets, the first pixel sub-set and the second pixel sub-set in each row are driven by the first scanning line and the second scanning line in the two scanning lines corresponding to the row, the same-color sub-pixels included in the corresponding pixels in the first pixel sub-set and the second pixel sub-set are connected to each other, so that the same-column sub-pixels are driven by one data line, and the two columns of sub-pixels connected by the same data line have the same color, the circuit structure can make a row of pixels share the data with the adjacent pixels, so as to help realize the HSR function and the like. In addition, since the sub-pixels connected by the same data line have the same color, the time sequence control and the data arrangement process of the data display can be more convenient, so as to help improve the display efficiency.

[0050] In some optional implementations of the embodiment, as shown in Figure 2 The circuit further includes a timing controller 104 connected with the scan line driving module 103. The timing controller 104 can be a device with a logic processing function, such as a microcontroller unit (MCU), a system on chip (SOC), etc.

[0051] The pixel array 101 includes first type pixel rows and second type pixel rows staggered in sequence. As shown in Figure 1 or Figure 2 The first, third, fifth, etc. odd rows can be the first type pixel rows, and the second, fourth, sixth, etc. even rows can be the second type pixel rows.

[0052] The timing controller 104 is configured to:

[0053] In response to triggering an operation of starting the first scan mode, control the scan driving module to sequentially output scan driving signals to the scan lines corresponding to the first type pixel rows according to a corresponding timing.

[0054] The first scan mode can be a mode in which adjacent rows share data voltages output on data lines, such as an HSR mode. The first scan mode can be triggered by a user manually performing a mode adjustment operation, or can be a fixed setting mode that automatically enters the first scan mode after the display panel is started.

[0055] As an example, when the odd rows of the pixel array 101 are the first type pixel rows, the timing controller 104 can sequentially send scan driving signals to the first, third, fifth, etc. odd rows after triggering the first scan mode. As shown in Figure 3 the timing diagram of the scan driving signals output by each scan line of the embodiment of the present application is shown. In the figure, the timing corresponding to Data represents the output period of the driving voltage output by the data line driving module 102, and in each output period, each scan line outputs a scan driving signal. For example, in the first output period, G1 and G2 corresponding to the first row sequentially output scan driving signals; in the second output period, G5 and G6 corresponding to the third row sequentially output scan driving signals, and so on. Figure 3 The output of a high-level signal on each scan line in the above-mentioned period is the scan driving signal, and during the high-level duration, the corresponding switching elements such as TFT switches can turn on the connected sub-pixels and data lines.

[0056] Further, for each second-type pixel row included in the pixel array 101, during a display period of a previous first-type pixel row adjacent to the second-type pixel row, the scan driving module is controlled to output a scan driving signal to the second-type pixel row; and during a display period of a next first-type pixel row adjacent to the second-type pixel row, the scan driving module is controlled to output a scan driving signal to the second-type pixel row.

[0057] As shown in FIG. 1, the second row is a second-type pixel row, and the first and third rows are two first-type pixel rows. During a display period of the first row driven by the scan driving signal, the second row can be simultaneously driven by the scan driving signal and display the same color as the first row; and then, during a display period of the third row driven by the scan driving signal, the second row can also be simultaneously driven by the scan driving signal and display the same color as the third row. Figure 1 Figure 2 As shown in FIG. 1, the second row is a second-type pixel row, and the first and third rows are two first-type pixel rows. During a display period of the first row driven by the scan driving signal, the second row can be simultaneously driven by the scan driving signal and display the same color as the first row; and then, during a display period of the third row driven by the scan driving signal, the second row can also be simultaneously driven by the scan driving signal and display the same color as the third row.

[0058] The embodiment divides each row in the pixel array into a first-type pixel row and a second-type pixel row, so that the second-type pixel row shares data on a data line with a first-type pixel row during a display period of the first-type pixel row, thereby helping to realize a function of HSR and other functions that require some rows to share data, and further improving the application flexibility of the circuit.

[0059] In some optional implementations of the embodiment, for each second-type pixel row included in the pixel array 101, during a display period of a previous first-type pixel row adjacent to the second-type pixel row, the first scan line corresponding to the second-type pixel row and the first scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal, and the second scan line corresponding to the second-type pixel row and the second scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal; and

[0060] In some optional implementations of the embodiment, for each second-type pixel row included in the pixel array 101, during a display period of a previous first-type pixel row adjacent to the second-type pixel row, the first scan line corresponding to the second-type pixel row and the first scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal, and the second scan line corresponding to the second-type pixel row and the second scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal; and

[0061] In some optional implementations of the embodiment, for each second-type pixel row included in the pixel array 101, during a display period of a previous first-type pixel row adjacent to the second-type pixel row, the first scan line corresponding to the second-type pixel row and the first scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal, and the second scan line corresponding to the second-type pixel row and the second scan line corresponding to the previous first-type pixel row simultaneously receive a scan driving signal; and Figure 3 ​As shown, the scan lines G3 and G4 are respectively the first scan line and the second scan line corresponding to the second row, which is a second-type pixel row. The first-type pixel row adjacent to the second row is the first row. During the period in which the scan driving signal (i.e., the high-level signal) is output by G1 corresponding to the first row, the scan driving signal is also output by G3, which drives the first pixel subsets in the second row to display at the same time as the first pixel subsets in the first row. During the period in which the scan driving signal is output by G2, the scan driving signal is also output by G4, which drives the second pixel subsets in the second row to display at the same time as the second pixel subsets in the first row.

[0062] The first-type pixel row adjacent to the second row is the third row. During the period in which the scan driving signal is output by G5 corresponding to the third row, the scan driving signal is also output by G3, which drives the first pixel subsets in the second row to display at the same time as the first pixel subsets in the third row. During the period in which the scan driving signal is output by G6, the scan driving signal is also output by G4, which drives the second pixel subsets in the second row to display at the same time as the second pixel subsets in the third row.

[0063] The embodiment achieves time-sharing control of the pixels included in each row to display by causing the two scan lines corresponding to each second-type pixel row to output the scan driving signal at the same time as the scan line corresponding to the first-type pixel row according to the timing, can combine the DRD driving mode and the HSR driving mode, and thus further improves the application flexibility of the circuit and enriches the application scenarios of the circuit.

[0064] In some optional implementations of the embodiment, for each second-type pixel row included in the pixel array 101, the driving duration of the scan driving signal received by the first scan line corresponding to the second-type pixel row is less than or equal to the driving duration of the scan driving signal received by the first scan line corresponding to the previous first-type pixel row, and the driving duration of the scan driving signal received by the second scan line corresponding to the second-type pixel row is less than or equal to the driving duration of the scan driving signal received by the second scan line corresponding to the previous first-type pixel row; and

[0065] The driving duration of the scan driving signal received by the first scan line corresponding to the second-type pixel row is less than or equal to the driving duration of the scan driving signal received by the first scan line corresponding to the next first-type pixel row, and the driving duration of the scan driving signal received by the second scan line corresponding to the second-type pixel row is less than or equal to the driving duration of the scan driving signal received by the second scan line corresponding to the next first-type pixel row.

[0066] The specific value of the driving duration of the scan driving signal output by the scan line corresponding to each second-type pixel row can be set arbitrarily.

[0067] As Figure 3As shown, the scan lines G3 and G4 are the first scan line and the second scan line corresponding to the second row of pixels, respectively. In the first output period of the Data signal, the high-level duration of G3 is the driving time of the output scan driving signal. In the first half of the first output period, the high-level duration of G3 can be less than or equal to the high-level duration of G1 (as shown in the figure, the case of less than is shown). Similarly, in the second half of the first output period, the high-level duration of G4 can be less than or equal to the high-level duration of G2.

[0068] In the first half of the second output period, the high-level duration of G3 can be less than or equal to the high-level duration of G5. Similarly, in the second half of the second output period, the high-level duration of G4 can be less than or equal to the high-level duration of G6.

[0069] It should be noted that, in order to avoid the display of the second type of pixel row from conflicting with the display of other rows, the end time of the scan driving signal output by the scan line of each second type of pixel row should be no later than the end time of the scan driving signal output by the scan line of the corresponding first type of pixel row. As shown in the figure, Figure 3 the corresponding time of the falling edge of the first high-level pulse output by G3 is no later than the corresponding time of the falling edge of the first high-level pulse output by G1.

[0070] By setting the driving time of the scan driving signal corresponding to the second type of pixel row to be less than or equal to the driving time of the scan driving signal corresponding to the second type of pixel row, the embodiment achieves the reduction of the output power of the scan line of the second type of scan row without affecting the display effect, and further reduces the overall power consumption of the display panel.

[0071] In some optional implementation manners of the embodiment, the timing controller 104 is further configured to:

[0072] receive input original image data; extract the to-be-displayed data corresponding to each first type of pixel row from the original image data, and rearrange the extracted to-be-displayed data; and send the to-be-displayed data corresponding to each first type of pixel row to the data line driving module 102 in sequence based on the timing corresponding to the first scan mode command.

[0073] Specifically, the timing controller 104 can rearrange the color data of each pixel included in the original image data in the first scan mode to adapt to the display mode of the first scan mode.

[0074] As an example, as shown in the figure, Figure 4 the display data corresponding to the pixels included in the original image data is as shown in the figure. Figure 4Each cell in the table shown in 401 represents the to-be-displayed data of one sub-pixel. Each row of data in 401 corresponds to each row of sub-pixels of the pixel array 101, and each column of data in 401 corresponds to each column of sub-pixels of the pixel array 101. The odd-numbered row data extracted from 401 by the timing controller 104 is the to-be-displayed data. As shown in Figure 4 the table 402 in 401, that is, the extracted odd-numbered row data is the to-be-displayed data. The timing corresponding to the first scanning mode command is as shown in Figure 3 that is, the even-numbered row shares the to-be-displayed data with the adjacent odd-numbered row.

[0075] As shown in Figure 4 the table 403 in 401 is the rearranged to-be-displayed data, in which T1, T2, T3, and the like represent the time when the data driving module outputs the to-be-displayed data, and the data corresponding to each time is the data output by the data driving module. As can be seen, under the action of the scanning driving signal shown in Figure 3 at T1, the first pixel subset included in the first row and the second row of the pixel array 101 is simultaneously driven, that is, simultaneously displayed according to the same data; at T2, the second pixel subset included in the first row and the second row is simultaneously displayed according to the same data; at T3, the first pixel subset included in the second row and the third row of the pixel array 101 is simultaneously displayed according to the same data; at T4, the second pixel subset included in the second row and the third row is simultaneously displayed according to the same data, and so on.

[0076] The data line driving module 102 is configured to:

[0077] convert the received to-be-displayed data into a display signal corresponding to each data line of the first preset number of data lines, and output the corresponding display signal through each data line of the first preset number of data lines.

[0078] Specifically, the display signal corresponding to each data line is usually a voltage signal, and the to-be-displayed data can usually be converted into a display signal by a DAC (Digital to Analog Convertor) in the data line driving module 102. According to the timing as shown in Figure 3 the adjacent first-type pixel row and the second-type pixel row can share the display signal in each data output period of the data line driving module 102.

[0079] In this embodiment, by rearranging the original image data by the timing controller in the first scanning mode, and sending the to-be-displayed data to the data line driving module according to the corresponding timing, accurate driving of the pixel array to display data in the first scanning mode is realized.

[0080] In some optional implementations of this embodiment, the timing controller 104 is used for:

[0081] In response to the operation of triggering the start of the second scanning mode, the control scanning drive module outputs scanning drive signals to the second preset number of scanning lines one by one in accordance with the corresponding timing sequence.

[0082] Specifically, the second scan mode is the line-by-line scan mode, and its corresponding timing is as follows: Figure 5 As shown. Figure 5 In the first output cycle of the data line driver module 102, G1 and G2 corresponding to the first row output scan drive signals in sequence; in the second output cycle, G3 and G4 corresponding to the second row output scan drive signals in sequence; in the third output cycle, G5 and G6 corresponding to the third row output scan drive signals in sequence, and so on. Figure 5 The high-level signal output on each scan line is the scan drive signal. During the high-level period, the corresponding TFT switch and other switching elements can connect the connected sub-pixel to the data line.

[0083] This embodiment enables the circuit to be applied to more scenarios by controlling the output of the scan drive signal of the scan line in the second scan mode through the timing controller, which enriches the driving method of the pixel array and further expands the application range of the circuit.

[0084] In some optional implementations of this embodiment, the timing controller 104 is further configured to:

[0085] Receive the input raw image data; rearrange the raw image data to obtain the data to be displayed corresponding to each scan line in the second preset number of scan lines; based on the timing corresponding to the second scan mode command, send the data to be displayed corresponding to each scan line to the data line driver module 102 in sequence.

[0086] like Figure 6 As shown in Figure 601, each row of the table contains data corresponding to each row of pixels in pixel array 101. Figure 6 602 in the sequence represents the rearranged data to be displayed. The timing controller 104 will rearrange the data to be displayed corresponding to G1, G2, G3, etc., according to... Figure 5 The timing sequence shown is sent sequentially to the data line driver module 102.

[0087] Data cable driver module 102 is used for:

[0088] The received data to be displayed is converted into a display signal corresponding to each of the first preset number of data lines, and the corresponding display signal is output through each of the first preset number of data lines.

[0089] likeFigure 5 As shown in the timing, the data line driving module 102 outputs display signals corresponding to the scanning lines G1, G2, G3, etc. in sequence, so that the corresponding sub-pixels display the corresponding colors according to the signals received from the data lines.

[0090] In this embodiment, the original image data is rearranged by the timing controller in the second scanning mode, and the data to be displayed is sent to the data line driving module according to the corresponding timing, so that each row of the pixel array displays colors according to different data, which realizes accurate driving of the pixel array to display data in the row-by-row scanning mode.

[0091] In some optional implementations of this embodiment, the polarities of the reference voltages corresponding to each column of sub-pixels in the pixel array 101 are the same during the display of the same image frame.

[0092] Specifically, the driving mode of the reference voltages of each column of sub-pixels in this embodiment is Column inversion driving mode. In the Column inversion driving mode, the polarities of the reference voltages of each column of sub-pixels are the same, the polarities of the reference voltages of adjacent columns are opposite, and the polarities of the reference voltages of each column are reversed after changing the image frame.

[0093] For example, during the display of the first frame, the polarity of the reference voltage of the first column is +, the polarity of the reference voltage of the second column is -, the polarity of the reference voltage of the third column is +, and so on; during the display of the second frame, the polarity of the reference voltage of the first column is changed to -, the polarity of the reference voltage of the second column is changed to +, the polarity of the reference voltage of the third column is changed to -, and so on.

[0094] In this embodiment, the polarities of the reference voltages of each column of sub-pixels are the same, so that the polarities of the voltages output by each data line are the same, thereby reducing the voltage variation amplitude when the data line changes the output voltage, and further helping to reduce the power consumption of the pixel array and avoiding the problem of insufficient charging of the pixel caused by the change of the output voltage of the data line, and improving the display effect.

[0095] Figure 7 A structure schematic diagram of a display device 700 provided in this embodiment is shown in the figure. Figure 7 As shown in the figure, the display device 700 includes:

[0096] The pixel array driving circuit 100, the display panel 701, the panel frame 702, the power supply module 703, and the data receiving module 704 described above;

[0097] ​The pixel array driving circuit 100 is arranged on the display panel 701, the display panel 701 is mounted on the panel frame 702, the power supply end of the display panel 701 is connected with the power supply module 703, and the signal receiving end of the display panel 701 is connected with the data receiving module 704.

[0098] The power supply module 703 can provide the display panel 701 with power required during operation, the data receiving module 704 can receive input data, and the display panel 701 displays corresponding colors according to the received data to drive corresponding pixels.

[0099] In addition, the display device can further include a memory for storing data and programs, a processor for running application programs, a data transmission bus, various data interfaces (for example, a network interface, a user interface), and the like, in addition to the parts shown in the drawings. Figure 7

[0100] The display device provided by the embodiment of the present application can realize that the same column sub-pixels are driven by one data line, and the colors of the two column sub-pixels connected by the same data line are the same, the display device can make a certain row of pixels share data with adjacent pixels, thereby helping to realize HSR and other functions. In addition, since the colors of the sub-pixels connected by the same data line are the same, the timing control and data arrangement process of data display can be more convenient, thereby helping to improve the display efficiency.

[0101] Those skilled in the art should further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed in the present text can be realized by electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been described in the above description in general terms. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different circuits to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0102] The circuit or algorithm steps described in combination with the embodiments disclosed in the present text can be implemented by hardware, software modules executed by a processor, or a combination of both. The software modules can be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0103] ​It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also mean including the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The circuit steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of execution is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0104] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A pixel array driving circuit, characterized in that, The circuit includes: a pixel array, a first preset number of data lines, a second preset number of scan lines, a data line driving module, and a scan line driving module. The data line driving module is connected to the first preset number of data lines, and the scan line driving module is connected to the second preset number of scan lines. Each row in the pixel array corresponds to two scan lines, and each pixel in the pixel array includes multiple sub-pixels. Each data line in the first preset number of data lines corresponds to a column of sub-pixels and is used to output display signals to the corresponding column of sub-pixels; For each row in the pixel array, the row includes a third preset number of pixel sets, each pixel set includes two pixel subsets, and each pixel subset includes at least one pixel; The first and second pixel subsets of the two pixel subsets are driven by the first and second scan lines of the two scan lines corresponding to the row, respectively. The pixels included in the first pixel subset and the second pixel subset are in one-to-one correspondence, and the data lines corresponding to the sub-pixels of the same color included in the corresponding pixels are connected to each other. The circuit further includes a timing controller, which is connected to the scan line driving module. The pixel array includes a first type of pixel rows and a second type of pixel rows that are arranged alternately in sequence. The timing controller is used for: In response to the operation of triggering the start of the first scanning mode, the control scanning drive module outputs scanning drive signals sequentially to the scan lines corresponding to the first type of pixel rows according to the corresponding timing; and For each second type of pixel row included in the pixel array, during the period when the previous first type of pixel row adjacent to the second type of pixel row is driven for display, the scanning driving module is controlled to output a scanning driving signal to the second type of pixel row; during the period when the next first type of pixel row adjacent to the second type of pixel row is driven for display, the scanning driving module is controlled to output a scanning driving signal to the second type of pixel row.

2. The circuit according to claim 1, characterized in that, For each second type of pixel row included in the pixel array, during the period when the previous first type of pixel row adjacent to the second type of pixel row is driven for display, the first scan line corresponding to the second type of pixel row and the first scan line corresponding to the previous first type of pixel row simultaneously receive scan drive signals, and the second scan line corresponding to the second type of pixel row and the second scan line corresponding to the previous first type of pixel row simultaneously receive scan drive signals. as well as During the display of the next first-type pixel row adjacent to the second-type pixel row, the first scan line corresponding to the second-type pixel row and the first scan line corresponding to the next first-type pixel row simultaneously receive scan drive signals, and the second scan line corresponding to the second-type pixel row and the second scan line corresponding to the next first-type pixel row simultaneously receive scan drive signals.

3. The circuit according to claim 2, characterized in that, For each second type of pixel row included in the pixel array, the driving duration of the scan driving signal received by the first scan line corresponding to the second type of pixel row is less than or equal to the driving duration of the scan driving signal received by the first scan line corresponding to the previous first type of pixel row, and the driving duration of the scan driving signal received by the second scan line corresponding to the second type of pixel row is less than or equal to the driving duration of the scan driving signal received by the second scan line corresponding to the previous first type of pixel row. as well as The driving duration of the scan driving signal received by the first scan line corresponding to the second type of pixel row is less than or equal to the driving duration of the scan driving signal received by the first scan line corresponding to the next first type of pixel row, and the driving duration of the scan driving signal received by the second scan line corresponding to the second type of pixel row is less than or equal to the driving duration of the scan driving signal received by the second scan line corresponding to the next first type of pixel row.

4. The circuit according to claim 1, characterized in that, The timing controller is further used for: Receive the input raw image data; Extract the data to be displayed corresponding to each first-class pixel row from the original image data, and rearrange the extracted data to be displayed. Based on the timing corresponding to the first scanning mode command, the data to be displayed corresponding to each first type of pixel row is sent to the data line driver module in sequence; The data line driver module is used for: The received data to be displayed is converted into a display signal corresponding to each of the first preset number of data lines, and the corresponding display signal is output through each of the first preset number of data lines.

5. The circuit according to claim 1, characterized in that, The timing controller is used for: In response to the operation of triggering the start of the second scanning mode, the scanning drive module is controlled to output scanning drive signals to the second preset number of scanning lines one by one in a corresponding timing sequence.

6. The circuit according to claim 5, characterized in that, The timing controller is further used for: Receive the input raw image data; The original image data is rearranged to obtain the data to be displayed corresponding to each scan line in the second preset number of scan lines; Based on the timing corresponding to the second scan mode command, the data to be displayed corresponding to each scan line is sent to the data line driver module in sequence; The data line driver module is used for: The received data to be displayed is converted into a display signal corresponding to each of the first preset number of data lines, and the corresponding display signal is output through each of the first preset number of data lines.

7. The circuit according to any one of claims 1-6, characterized in that, During the display of the same image frame, the reference voltage polarity corresponding to each column of sub-pixels in the pixel array is the same.

8. The circuit according to any one of claims 1-6, characterized in that, The first pixel subset and the second pixel subset each consist of two pixels.

9. A display device, characterized in that, include: The pixel array driving circuit, display panel, panel frame, power module, and data receiving module as described in any one of claims 1-8; The pixel array driving circuit is disposed on the display panel, the display panel is mounted on the panel frame, the power supply terminal of the display panel is connected to the power module, and the signal receiving terminal of the display panel is connected to the data receiving module.

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