A current source array, digital-to-analog converter, and signal chain chip

Abstract

The present disclosure provides a current source array, a digital-to-analog converter, and a signal chain chip, wherein the current source array includes current sources arranged horizontally and vertically, the number of columns of the current source array being the total number of current sources, and the number of rows of the current source array being the total number of current source units included in the current source; a first target row in the first half of the rows of the first column of the current source array corresponds to the current source unit number arranged in the first target row based on the row number of the first target row, the number of rows and columns of the current source array, and the number of current source units arranged in the first half of the rows; a second target row in the second half of the rows of the first column of the current source array corresponds to the current source unit number arranged in the second target row based on the row number of the second target row, the number of rows and columns of the current source array, and the number of current source units arranged in the first half of the rows; the current source unit number determined based on the previous column corresponds to the current source unit number arranged in the next column, forming an overall layout. The present disclosure can reduce the overall area and reduce the gradient error.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a current source array, a digital-to-analog converter, and a signal chain chip. Background Art

[0002] Current source structure and distribution are crucial components in the design and application of digital-to-analog converter (DAC) modules. The key and challenging aspects lie in overcoming system mismatches and reducing the effects of parasitic capacitance. As a modular circuit that relies heavily on layout design, the layout of the current source is crucial and directly impacts the performance of the DAC module.

[0003] In the existing technology, as chip integration increases and layout area changes, the impact of systematic mismatch on circuits becomes increasingly serious, and the increase in devices will also generate larger parasitic capacitance.

[0004] However, current source arrays in the prior art can only solve one of the problems of systematic mismatch or parasitic capacitance reduction, but lack a solution to simultaneously improve both the poor matching and the performance impact of parasitic capacitance. Summary of the Invention

[0005] The embodiments of the present disclosure provide at least one current source array, a digital-to-analog converter, and a signal chain chip to improve the performance impact caused by poor matching and parasitic capacitance, and have better practicality and applicability.

[0006] In a first aspect, an embodiment of the present disclosure provides a current source array, wherein the current source array includes current sources arranged horizontally and vertically, the number of columns of the current source array is the total number of the current sources, and the number of rows of the current source array is the total number of current source units included in the current sources;

[0007] The rows of the current source array include: a first half of the rows and a second half of the rows;

[0008] A first target row in the first half of the rows of the first column of the current source array, and a label of the current source units arranged in the first target row based on the row number of the first target row and the number of rows and columns of the current source array;

[0009] A second target row in the second half of the rows of the first column of the current source array, corresponding to the number of the current source cells arranged in the second target row based on the row number of the second target row, the number of rows and columns of the current source array, and the number of the current source cells arranged in the first half of the rows;

[0010] The overall layout of the current source array is formed based on the current source unit numbers determined in the previous column corresponding to the current source unit numbers arranged in the next column.

[0011] In a possible implementation, the row number of the first target row and the number of rows and columns of the current source array corresponding to the number of current source units arranged in the first target row are specifically implemented as follows:

[0012] The current source units arranged in the first target row are numbered based on a quotient obtained by dividing the row number of the first target row by 2 and a ratio between the number of columns and the number of rows of the current source array.

[0013] In a possible implementation manner, the current source unit number I arranged in the first target row is corresponding to the following formula: i :

[0014]

[0015] Wherein, M and N represent the number of columns and rows of the current source array respectively, i represents the row number of the first target row, and i≤N / 2.

[0016] In a possible implementation, the current source unit number arranged in the second target row corresponding to the row number of the second target row, the number of rows and columns of the current source array, and the number of current source units arranged in the first half of the rows is specifically implemented as follows:

[0017] Obtaining a difference between the number of rows of the current source array and the row number of the second target row, denoted as X;

[0018] The current source units arranged in the first half of the rows are labeled I i Find the current source unit number I that matches the row corresponding to the difference X in X ;

[0019] Use the current source unit label I found X , corresponding to the number of the current source unit arranged in the second target row.

[0020] In a possible implementation manner, the current source unit number I arranged in the second target row is corresponding to the following formula: j :

[0021] I j =(M+1)-I (X+1) ;X=Mj;

[0022] Wherein, M represents the number of columns of the current source array, j represents the row number of the second target row, and j>N / 2.

[0023] In a possible implementation, the current source unit number determined based on the previous column corresponds to the current source unit number arranged in the next column, which is specifically implemented as follows:

[0024] For the third target row of the next column to be laid out, the current source unit number corresponding to the third target row is searched from the current source unit numbers corresponding to the previous column, and the current source unit number laid out for the third target row is based on the found current source.

[0025] In a possible implementation, searching for the current source unit number corresponding to the third target row from the current source unit number corresponding to the previous column, and based on the current source unit number corresponding to the third target row found, is specifically implemented as follows:

[0026] In response to the third target row belonging to the first row of the subsequent column, searching for a current source unit number corresponding to the current source unit number of the previous column and corresponding to the current source unit number arranged in the row plus 1 of the first row, and adding 1 to the found current source unit number to obtain the current source unit number arranged in the first row of the subsequent column;

[0027] In response to the third target row belonging to the second row of the subsequent column, searching the current source unit labels corresponding to the previous column for the current source unit label corresponding to the row minus 1 of the first row, adding 1 to the found current source unit label to obtain the current source unit label corresponding to the second row of the subsequent column;

[0028] In response to the third target row belonging to the third row of the subsequent column, searching for a current source unit number corresponding to the current source unit number of the previous column and arranged in the row plus 1 of the third row, subtracting 1 from the found current source unit number, and obtaining a current source unit number corresponding to the current source unit number arranged in the third row of the subsequent column;

[0029] In response to the fact that the third target row belongs to the fourth row of the latter column, the current source unit number corresponding to the current source unit number of the previous column is searched for the current source unit number corresponding to the fourth row minus 1 row, and the current source unit number found is subtracted by 1 to obtain the current source unit number corresponding to the fourth row of the latter column.

[0030] In a possible implementation, the specific implementation is as follows:

[0031] The current source units corresponding to the layout of the other rows of the latter column are labeled cyclically according to the layout of the first four rows of the latter column.

[0032] In a possible implementation manner, the multiple current source units included in the multiple current sources are numbered sequentially;

[0033] The sum of the labels of the current source units in each column layout is equal.

[0034] In a second aspect, the present disclosure further provides an analog-to-digital converter, comprising: the current source array described in the first aspect and any one of its various embodiments.

[0035] In a third aspect, the present disclosure further provides a signal chain chip, comprising: the current source array described in the first aspect and any one of its various embodiments.

[0036] The above-mentioned current source array, digital-to-analog converter, and signal chain chip are used, wherein the current source array has current sources arranged horizontally and vertically, the number of columns of the current source array is the total number of current sources, and the number of rows of the current source array is the total number of current source units included in the current source; when performing the overall layout, the current source units in the first half and the second half of the first column of the current source array are labeled in sequence, and then the current source unit labels determined based on the previous column correspond to the current source unit labels laid out in the second column to form the overall layout. By rearranging the current sources, the overall area can be reduced, the gradient error can be reduced, and thus the problems caused by systematic mismatch can be significantly reduced. At the same time, the negative impact of parasitic capacitance on the performance of the current source is avoided as much as possible, and the practicality and applicability are improved.

[0037] Other advantages of the present disclosure will be explained in more detail with reference to the following description and accompanying drawings.

[0038] It should be understood that the above description is only an overview of the technical solution of the present disclosure, so that the technical means of the present disclosure can be generally understood and then implemented in accordance with the contents of the description. In order to make the above and other purposes, features and advantages of the present disclosure more clearly understood, the following examples are used to illustrate specific embodiments of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following is a brief introduction to the drawings required for use in the embodiments. The drawings herein are incorporated into the specification and constitute a part of this specification. These drawings illustrate embodiments consistent with the present disclosure and are used together with the specification to illustrate the technical solutions of the present disclosure. It should be understood that the drawings only illustrate certain embodiments of the present disclosure and should not be regarded as limiting the scope of protection. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work. Moreover, the same reference numerals are used to represent the same components throughout the drawings. In the drawings:

[0040] Figure 1 A flow chart for determining the current source layout of the second half of the first row in a current source array provided by an embodiment of the present disclosure is shown;

[0041] Figure 2An exemplary diagram of a current source array provided by an embodiment of the present disclosure is shown;

[0042] Figure 3 A flow chart for determining the layout of current sources in the second column in a current source array provided by an embodiment of the present disclosure is shown;

[0043] Figure 4 A static performance curve diagram of a current source array provided by an embodiment of the present disclosure is shown;

[0044] Figure 5 A performance curve diagram of a current source array provided by an embodiment of the present disclosure in actual application is shown;

[0045] Figure 6 A structural schematic diagram of a signal chain chip provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0046] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0047] In the description of the embodiments of the present disclosure, it should be understood that terms such as "including" or "having" are intended to indicate the presence of the disclosed features, numbers, steps, actions, components, parts, or combinations thereof in the specification, and do not exclude the possibility of the presence of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0048] Unless otherwise specified, “ / ” means or. For example, A / B can mean A or B. “And / or” in this article is only a way to describe the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0049] The terms "first," "second," etc., are used solely to distinguish identical or similar technical features for ease of description and should not be construed as indicating or implying the relative importance or quantity of these technical features. Thus, a feature defined by "first," "second," etc., may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise specified, the term "plurality" means two or more than two.

[0050] In related technologies, the systematic error of a digital-to-analog converter (DAC), also known as gradient error, increases with the area of ​​the current source array. In particular, as DAC resolution increases, the area of ​​the current source array quadruples for every bit of DAC accuracy. Therefore, the gradient error in the current source array becomes one of the main factors limiting its accuracy.

[0051] It is known that as the layout area changes with the improvement of chip integration, the impact of systematic mismatch on the circuit becomes more and more serious, and the increase in devices will also generate larger parasitic capacitance.

[0052] In order to at least partially solve one or more of the above-mentioned problems and other potential problems, the present disclosure provides a current source array, a digital-to-analog converter and a signal chain chip to improve the adverse effects of poor system matching and parasitic capacitance, with high practicality and applicability.

[0053] To facilitate understanding of this embodiment, a current source array disclosed in an embodiment of the present disclosure is first introduced in detail. The current source array provided in the embodiment of the present disclosure mainly includes current sources arranged horizontally and vertically. The number of columns of the current source array is the total number of the current sources, and the number of rows of the current source array is the total number of current source units included in the current source.

[0054] The rows of the current source array include: a first half of the rows and a second half of the rows;

[0055] A first target row in the first half of the rows of the first column of the current source array, and a label of the current source units arranged in the first target row based on the row number of the first target row and the number of rows and columns of the current source array;

[0056] A second target row in the second half of the rows of the first column of the current source array, corresponding to the number of the current source cells arranged in the second target row based on the row number of the second target row, the number of rows and columns of the current source array, and the number of the current source cells arranged in the first half of the rows;

[0057] The overall layout of the current source array is formed based on the current source unit numbers determined in the previous column corresponding to the current source unit numbers arranged in the next column.

[0058] To facilitate understanding of the current source array provided by the embodiments of the present disclosure, the application scenarios of the current source array are first described in detail. The current source array is primarily used in DACs, particularly high-speed DACs, such as high-speed, high-precision current-steering DACs. However, the embodiments of the present disclosure are not limited to this, and the following description will primarily use current-steering DACs as examples.

[0059] Taking into account that the solutions provided by related technologies cannot take into account both the poor system matching and the performance impact caused by parasitic capacitance, the embodiments of the present disclosure provide a current source array based on current source rearrangement. This is mainly due to the fact that the gradient error increases with the increase of the current source array area, especially with the improvement of DAC resolution. For every bit of DAC accuracy increase, the area of ​​the current source array will become four times the original area. Therefore, the gradient error in the current source array becomes one of the main factors restricting its accuracy. Therefore, the embodiments of the present disclosure adopt a current source rearrangement solution to reduce the overall area and reduce the gradient error, thereby achieving better system matching while avoiding the performance impact caused by large parasitic capacitance as much as possible.

[0060] In the current source array provided by the embodiments of the present disclosure, each current source array can be reasonably arranged and distributed in different rows and columns, thereby providing technical feasibility for mitigating gradient errors. At the same time, to address gradient errors in the row direction, the number of current source units in each current source array is the same as the number of rows.

[0061] Furthermore, since the output parasitic capacitance of the current source significantly affects the dynamic performance of a high-speed DAC, such as the spurious-free dynamic range (SFDR), the number of rows should be kept small to minimize the output parasitic capacitance. The number of columns should be the same as the number of current sources. Thus, the current-steering DAC consists of current sources equal to the number of columns, or, in other words, current source units equal to the number of rows × the number of columns.

[0062] Here, in order to achieve a more preferred current source array layout, a column-by-column layout method can be adopted, that is, all rows in the first column of the current source array can be laid out first, and then all rows in the second column can be laid out, and so on, until all rows in all columns are laid out. That is, when the structure numbering is completed, the components are arranged according to the numbers in the array to form a complete circuit, that is: the corresponding current source units are placed at the corresponding numerical positions to obtain a current source array with superior performance.

[0063] The layout of the first column will directly affect the layout of subsequent columns. For the sake of clarity, the embodiment of the present disclosure first describes the layout structure of the first column of the current source array.

[0064] During layout for the first column, layout is performed for the first half of the rows and the second half of the rows of the column. When layout is performed for a first target row included in the first half of the rows of the first column, the current source unit numbers laid out in the first target row are mapped based on the row number of the first target row and the number of rows and columns of the current source array. When layout is performed for a second target row included in the second half of the rows of the first column, the current source unit numbers laid out in the second target row are mapped based on the row number of the second target row, the number of rows and columns of the current source array, and the current source unit numbers laid out in the first half of the rows.

[0065] For clarity of description, the first target row here indicates the target row in the first half of the rows, and the second target row is used to indicate the target row in the second half of the rows. For example, for an 8-row and 64-column current source array, since the labeling principle is the same, for any of the 64 columns, the first 4 rows correspond to the first target row, and the last four rows correspond to the second target row.

[0066] When actually performing layout for the first target row of the first column, the current source units laid out in the first target row are numbered based on the quotient of the row number of the first target row divided by 2 and the ratio between the number of columns and the number of rows of the current source array.

[0067] To facilitate understanding of the specific layout of the first target row, the following will provide an explanation using formulas and corresponding examples.

[0068] For ease of explanation, M and N represent the number of columns and rows of the current source array, respectively, and i represents the row number of the first target row. The current source unit number I arranged in the first target row is determined according to the following formula: i :

[0069]

[0070] For ease of arrangement, assume that the number of columns M is divisible by the number of rows N, and that both M and N are integer powers of 2. For example, for a current source array with 8 rows and 64 columns, the current source unit number in the third row (an odd row) is determined as I3 = (3 / 2) × (2 × 64 / 8 + 1) = 17.

[0071] For another example, for a current source array with 8 rows and 64 columns, determine the current source unit number of the 2nd row (an even row), the current source unit number I2 = (64 + 1) - (2 / 2) × (2 × 64 / 8) = 49.

[0072] It can be seen that, when laying out the first half of the rows in the first column, the embodiment of the present disclosure may operate on the odd rows and the even rows separately to achieve a more preferred layout strategy.

[0073] When actually laying out the second target row of the first column, the corresponding current source identifier can be specifically determined based on the current source unit label laid out in the first half of the rows. That is, the layout strategy for the second half of the first row can refer to the layout strategy for the first half of the rows. This can be achieved by the following steps. Figure 1 :

[0074] S11: Obtain a difference between the number of rows of the current source array and the row number of the second target row, denoted as X;

[0075] S12: The current source units arranged in the first half of the rows are labeled I i Find the current source unit number I that matches the row corresponding to the difference X in X ;

[0076] S13: Use the current source unit label I found X , corresponding to the number of the current source unit arranged in the second target row.

[0077] Here, in order to facilitate understanding of the specific layout of the second target row, the following will be explained in combination with formulas and corresponding examples.

[0078] Similarly, M and N are respectively the number of columns and rows of the current source array, and j is the row number of the second target row. The current source unit number I arranged in the second target row is determined according to the following formula: j :

[0079] I j =(M+1)-I (X+1) ; X=Mj

[0080] Here, we still take a current source array with 8 rows and 64 columns as an example, and determine the current source unit number I7=(64+1)-I (8-7+1) =65-I2=65-49=16.

[0081] It should be noted that the multiple current source units included in the multiple current sources in the embodiment of the present disclosure are numbered in sequence. Taking the current steering DAC as an example, the DAC is composed of M current sources (corresponding to the number of columns of the current source array), and each current source is composed of N current source units (corresponding to the number of rows of the current source array), which are respectively marked as I m1 ~I mN , where m is any integer from 0 to (M-1), and the current source identifier corresponding to the corresponding number can be determined by the order in which the current source units included in each current source are arranged.

[0082] In order to further solve the gradient error in the column direction, the column numbers of the current source array are summed to the same constant, refer to Figure 2 .

[0083] Based on the above description of the first half and the second half of the rows of the first column, the numbers of the current source units arranged in the entire first column can be determined.

[0084] Based on the current source unit number laid out in the first column, the layout number of the second column can be determined. Similarly, based on the current source unit number laid out in the second column, the layout number of the third column can be determined. The steps can be performed sequentially, such as Figure 3 As shown, this can be achieved through the following steps:

[0085] S21: for the third target row of the next column to be laid out, searching for the current source unit number corresponding to the third target row from the current source unit numbers corresponding to the previous column, and laying out the current source unit number corresponding to the third target row based on the found current source;

[0086] S22: When the third target row belongs to the first row of the next column, search the current source unit labels corresponding to the previous column for the current source unit labels corresponding to the first row plus 1, and increment the found current source unit labels by 1 (incrementing by 1) to obtain the current source unit labels corresponding to the first row of the next column;

[0087] S23: When the third target row belongs to the second row of the next column, search the current source unit labels corresponding to the previous column for the current source unit label corresponding to the first row minus one, add 1 to the found current source unit label, and obtain the current source unit label corresponding to the second row of the next column;

[0088] S24: When the third target row belongs to the third row of the next column, search the current source unit labels corresponding to the previous column for the current source unit label corresponding to the third row plus 1, subtract 1 from the found current source unit label, and obtain the current source unit label corresponding to the third row of the next column;

[0089] S25: When the third target row belongs to the fourth row of the next column, search the current source unit labels corresponding to the previous column for the current source unit labels corresponding to the fourth row minus 1, subtract 1 from the found current source unit labels, and obtain the current source unit labels corresponding to the fourth row of the next column.

[0090] Then, the current source units corresponding to the layout of the other rows of the next column are labeled cyclically according to the layout of the first four rows of the next column.

[0091] It should be noted that the third target row here is only used to indicate the target row of the column after the previous column, and is not limited to the first row, the last row, the middle row, etc.

[0092] In a specific implementation, after the first column is determined, the current source unit labels of the subsequent column are arranged according to the row number of the previous column according to the following rules, namely:

[0093] a) Row 1, row number plus 1, current source unit number plus 1;

[0094] b) Row 2, the row number is reduced by 1, and the current source unit number is increased by 1;

[0095] c) Row 3, the row number increases by 1, and the current source unit number decreases by 1;

[0096] d) Row 4, row number minus 1, current source unit number minus 1;

[0097] e) In row 5, repeat the rules of row 1. If the current source unit number reaches the maximum or minimum value after the row number is arranged, then renumber from the minimum to the maximum value.

[0098] In order to further illustrate the layout strategy provided by the embodiment of the present disclosure, two specific examples will be used for illustration.

[0099] First, taking the first 8 columns of 8 rows and 64 columns as an example, after arranging according to the above rules, the total number of current source unit numbers in each column is 260. The specific arrangement is shown in Table 1 below (corresponding to Figure 1 ).

[0100]

[0101] Table 1

[0102] Secondly, taking the first 8 columns of 4 rows and 64 columns as an example, after arrangement according to the above rules, the total number of current source unit numbers in each column is 130. The specific arrangement is shown in Table 2 below.

[0103]

[0104]

[0105] Table 2

[0106] In summary, by arranging the current sources according to the layout strategy provided in the embodiments of this disclosure, the current source units of each current source are distributed across rows and columns, effectively reducing systematic errors (such as gradients). Furthermore, by keeping the number of rows small, the parasitic capacitance of the current sources is effectively reduced, improving the dynamic performance of the DAC, such as significantly boosting SFDR.

[0107] like Figure 4 The figure shows a static performance curve of a current source array provided by an embodiment of the present disclosure. The horizontal axis of the performance curve indicates the value range, and the vertical axis indicates the least significant bit (LSB) of the performance parameter that characterizes system matching. The static performance curve shows that the embodiment of the present disclosure can significantly reduce the adverse effects of parasitic capacitance while ensuring system matching.

[0108] refer to Figure 5 The performance curve of the current source array provided by the embodiment of the present disclosure in actual application (i.e., MATLAB, INL integral nonlinearity curve) shows that it also has good system performance in actual application and has wider practicality and applicability.

[0109] Based on the current source array provided in the embodiment of the present disclosure, the embodiment of the present disclosure also provides an analog-to-digital converter, which can provide a more stable current output method through the current source array, further improving the conversion performance.

[0110] In addition, reference Figure 6 , an embodiment of the present disclosure also provides a signal chain chip including the above-mentioned current source array, which has better processing performance.

[0111] In the description of this specification, the description with reference to the terms "some possible embodiments", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure, and the above terms do not necessarily represent the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0112] About the method flow chart of the present disclosure embodiment, some operations are described as different steps performed in a certain order. Such flow chart is illustrative and not restrictive. Some steps described in this article can be grouped together and performed in a single operation, or some steps can be divided into multiple sub-steps and can be performed in an order different from that shown in this article. The various steps shown in the flow chart can be implemented in any way by any circuit structure and / or tangible mechanism (for example, by software running on a computer device, hardware (for example, the logical function implemented by a processor or chip), etc., and / or any combination thereof).

[0113] Those skilled in the art will understand that, in the method described in the above specific embodiments, the writing order of each step does not mean a strict execution order, and the specific execution order of each step should correspond to its function and possible internal logic.

[0114] Although the spirit and principles of the present disclosure have been described above with reference to several specific embodiments, it should be understood that the present disclosure is not limited to the specific embodiments disclosed, and the division into various aspects does not mean that the features of these aspects cannot be combined. The present disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A current source array, characterized in that: The current source array includes current sources arranged horizontally and vertically, the number of columns of the current source array is the total number of the current sources, and the number of rows of the current source array is the total number of current source units included in the current source; The rows of the current source array include: a first half of the rows and a second half of the rows; A first target row in the first half of the rows of the first column of the current source array, and a label of the current source units arranged in the first target row based on the row number of the first target row and the number of rows and columns of the current source array; A second target row in the second half of the rows of the first column of the current source array, corresponding to the number of the current source cells arranged in the second target row based on the row number of the second target row, the number of rows and columns of the current source array, and the number of the current source cells arranged in the first half of the rows; Based on the current source unit numbers determined in the previous column corresponding to the current source unit numbers arranged in the next column, the overall layout of the current source array is formed, so that the current source units of each current source are distributed in each row and column.

2. The current source array according to claim 1, wherein: The row number based on the first target row, and the number of rows and columns of the current source array corresponding to the number of current source units arranged in the first target row, is specifically implemented as follows: The current source units arranged in the first target row are numbered based on a quotient obtained by dividing the row number of the first target row by 2 and a ratio between the number of columns and the number of rows of the current source array.

3. The current source array according to claim 2, wherein: The current source unit number I in the first target row is corresponding to the following formula: i : Wherein, M and N represent the number of columns and rows of the current source array respectively, i represents the row number of the first target row, and i≤N / 2.

4. The current source array according to any one of claims 1 to 3, characterized in that: The current source unit number arranged in the second target row is specifically implemented as follows: Obtaining a difference between the number of rows of the current source array and the row number of the second target row, denoted as X; The current source units arranged in the first half of the rows are labeled I i Find the current source unit number I that matches the row corresponding to the difference X in X ; Use the current source unit label I found X , corresponding to the number of the current source unit arranged in the second target row.

5. The current source array according to claim 4, characterized in that: The current source unit number I in the second target row is corresponding to the following formula: j : I j =(M+1)-I (X+1) ;X=M-j; Wherein, M represents the number of columns of the current source array, j represents the row number of the second target row, and j>N / 2.

6. The current source array according to any one of claims 1 to 3, characterized in that: The current source unit number determined based on the previous column corresponds to the current source unit number arranged in the next column, which is specifically implemented as follows: For the third target row of the next column to be laid out, the current source unit number corresponding to the third target row is searched from the current source unit numbers corresponding to the previous column, and the current source unit number laid out for the third target row is based on the found current source.

7. The current source array according to claim 6, wherein: The step of searching for the current source unit number corresponding to the third target row from the current source unit numbers corresponding to the previous column, and the current source unit number corresponding to the third target row based on the found current source, is specifically implemented as follows: In response to the third target row belonging to the first row of the subsequent column, searching for a current source unit number corresponding to the current source unit number of the previous column and corresponding to the current source unit number arranged in the row plus 1 of the first row, and adding 1 to the found current source unit number to obtain the current source unit number arranged in the first row of the subsequent column; In response to the third target row belonging to the second row of the subsequent column, searching the current source unit labels corresponding to the previous column for the current source unit label corresponding to the row minus 1 of the first row, adding 1 to the found current source unit label to obtain the current source unit label corresponding to the second row of the subsequent column; In response to the third target row belonging to the third row of the subsequent column, searching for a current source unit number corresponding to the current source unit number of the previous column and arranged in the row plus 1 of the third row, subtracting 1 from the found current source unit number, and obtaining a current source unit number corresponding to the current source unit number arranged in the third row of the subsequent column; In response to the fact that the third target row belongs to the fourth row of the latter column, the current source unit number corresponding to the current source unit number of the previous column is searched for the current source unit number corresponding to the fourth row minus 1 row, and the current source unit number found is subtracted by 1 to obtain the current source unit number corresponding to the fourth row of the latter column.

8. The current source array according to claim 7, wherein: The specific implementation is: The current source units corresponding to the layout of the other rows of the latter column are labeled cyclically according to the layout of the first four rows of the latter column.

9. The current source array according to any one of claims 1 to 3, characterized in that: The multiple current source units included in the multiple current sources are numbered in sequence; The sum of the labels of the current source units in each column layout is equal.

10. An analog-to-digital converter, characterized in that: include: The current source array according to any one of claims 1 to 9.

11. A signal chain chip, characterized in that: include: The current source array according to any one of claims 1 to 9.

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