A large-delay delay line supporting on-chip multi-mode low-loss transmission

Abstract

The present invention discloses a large-delay delay line supporting on-chip multi-mode low-loss transmission. This delay line includes an input waveguide, a TE0-TE1 mode multiplexer, a TE0-TE2 mode multiplexer, a TE0-TE1 mode demultiplexer, a TE0-TE2 mode demultiplexer, and a spiral waveguide structure. After the input waveguide is connected to the bus waveguide of the TE0-TE1 mode multiplexer and the bus waveguide of the TE0-TE2 mode multiplexer, it passes through the spiral waveguide structure and is connected to the bus waveguide of the TE0-TE2 mode demultiplexer and the bus waveguide of the TE0-TE1 mode demultiplexer. The bus waveguide of the TE0-TE1 mode demultiplexer and the access waveguide are respectively connected to the access waveguide of the TE0-TE1 mode multiplexer and the access waveguide of the TE0-TE2 mode multiplexer, and output from the access waveguide of the TE0-TE2 mode demultiplexer. This delay line utilizes multi-mode light to be repeatedly transmitted in the same waveguide, adopts a wide waveguide to reduce the overlap between the mode and the waveguide sidewall, maintains low propagation loss and increases the waveguide delay per unit length, reduces the size of the long delay line, and can be used in systems such as large-scale optical delay lines and microwave photonics systems.

Description

Technical Field

[0001] The present invention belongs to an optical waveguide delay line in the field of integrated optics, and particularly relates to a delay line with a large delay amount that supports on-chip multi-mode low-loss transmission. Background Art

[0002] With the increase in communication speed, data capacity, and bandwidth requirements, traditional integrated circuits can no longer meet the requirements of modern data processing. In a smaller size, "optic in, copper out" has become an irresistible trend. As the current mature integrated platform, silicon-on-insulator is expected to integrate the entire optical link, such as lasers, modulators, passive devices, detectors, etc., on a single chip and mass-produce them using the COMS process. Since light, as a gauge boson, cannot be stored in a hard disk like electrons, an on-chip delay line with a large delay amount is required as an optical storage device to achieve optical caching. Currently, there are mainly two methods to achieve optical delay. One is to achieve delay based on dispersion control, such as micro-rings, Bragg gratings, photonic crystals, etc. However, the bandwidth of the delay line achieved by this method is limited, and the delay amount is difficult to control. The second is to use a sufficiently long waveguide to achieve the corresponding delay. The delay amount achieved by this method is proportional to the waveguide length. At this time, the loss of the waveguide and the size of the entire delay line become the primary factors to be considered.

[0003] For standard silicon-based chip fabrication, the main loss source of the delay line waveguide is the scattering loss caused by the rough surface of the waveguide. The loss of a general single-mode waveguide can reach 2 - 5 dB / cm. The length of the delay line mainly depends on the delay amount and the group refractive index of the waveguide mode. Nanosecond-level delay requires a single-mode waveguide dozens of centimeters long on the chip, and the resulting loss is unacceptable. In addition, such a long waveguide also requires a large footprint and is thus more vulnerable to the influence of processing errors.

[0004] Therefore, how to achieve an on-chip optical waveguide delay line with low loss, large delay, and compact structure under standard processes is the key to the development of fields such as optical coherence tomography systems, optical gyroscopes, microwave photonic phased arrays, and quantum computing. Summary of the Invention

[0005] Aiming at the deficiencies in the background art, the present invention provides a delay line with a large delay amount that supports on-chip multi-mode low-loss transmission under standard processes.

[0006] To meet the above requirements, the technical solution adopted by the present invention is as follows:

[0007] The delay line in the present invention specifically includes:

[0008] An input waveguide, and the input end receives TE0 mode light as incident light;

[0009] The TE0-TE1 mode multiplexer is used to transmit TE0 mode light or couple and transform TE0 mode light into TE1 mode light. Its input ends are respectively connected to the output end of the input waveguide and the output end of the TE0-TE1 mode demultiplexer.

[0010] The TE0-TE2 mode multiplexer is used to transmit TE0 / TE1 mode light or couple and transform TE0 mode light into TE2 mode light. Its input ends are respectively connected to the output end of the TE0-TE1 mode multiplexer and the output end of the TE0-TE1 mode demultiplexer.

[0011] The helical waveguide structure is used to realize the transmission of TE0 / TE1 / TE2 mode light. Its input end is connected to the output end of the TE0-TE2 mode multiplexer.

[0012] The TE0-TE2 mode demultiplexer is used to transmit TE0 / TE1 mode light or couple and transform TE2 light into TE0 mode light. Its input end is connected to the output end of the helical waveguide structure, and its output ends are respectively connected to the input end of the TE0-TE1 mode demultiplexer and the input end of the output waveguide.

[0013] The TE0-TE1 mode demultiplexer is used to transmit TE0 mode light or couple and transform TE1 mode light into TE0 mode light. Its output ends are respectively connected to the input end of the TE0-TE1 mode multiplexer and the input end of the TE0-TE2 mode multiplexer.

[0014] The TE0-TE1 detour waveguide is connected between the output end of the TE0-TE1 mode demultiplexer and the input end of the TE0-TE1 mode multiplexer.

[0015] The TE0-TE2 detour waveguide is connected between the output end of the TE0-TE1 mode demultiplexer and the input end of the TE0-TE2 mode multiplexer.

[0016] The output waveguide has its input end connected to the output end of the TE0-TE2 mode demultiplexer, and outputs TE0 mode light as the outgoing light.

[0017] The described helical waveguide structure includes two arc-shaped waveguides with gradually changing width and radius, two helical wide waveguides with gradually changing radius, and one S-shaped curved waveguide with gradually changing width and radius. The two helical wide waveguides with gradually changing radius are both arranged along a planar spiral, and the planar spirals of the two helical wide waveguides with gradually changing radius are concentric and arranged alternately inside and outside to form a planar double-helix shape. The inner ends of the two helical wide waveguides with gradually changing radius are connected by the S-shaped curved waveguide with gradually changing width and radius. The outer ends of the two helical wide waveguides with gradually changing radius are respectively connected to the output end of the TE0-TE2 mode multiplexer and the input end of the TE0-TE2 mode demultiplexer through one of their respective arc-shaped waveguides with gradually changing width and radius.

[0018] The width-radius gradient arc-shaped bent waveguide, radius-gradient spiral wide waveguide, and width-radius gradient S-shaped bent waveguide mentioned above are all multimode waveguides.

[0019] The width of the width-radius gradient arc-shaped bent waveguide varies with the arc length, gradually decreasing from the inner end to the outer end, that is, gradually narrowing from the end connected to the radius-gradient spiral wide waveguide to the other end.

[0020] The bending radius of the radius-gradient coil bent waveguide changes with the bending angle and satisfies the equation of an equiangular spiral.

[0021] The bending radius of the width-radius gradient S-shaped bent waveguide satisfies the Euler curve equation, and the width changes with the arc length, gradually widening from the center to both ends, and is centrosymmetric as a whole.

[0022] The TE0-TE1 mode multiplexer and TE0-TE2 mode multiplexer mentioned above both include two bus waveguides and access waveguides arranged at intervals. The bus waveguides and access waveguides are both asymmetric width-gradient waveguides; the waveguide spacing between the bus waveguide and the access waveguide remains fixed, the length of the bus waveguide is the same as that of the access waveguide, the bus waveguide gradually widens from the input end to the output end, and the access waveguide gradually narrows from the input end to the output end;

[0023] The structure of the TE0-TE1 mode multiplexer is the same as that of the TE0-TE2 mode multiplexer, but the widths of the waveguides are different.

[0024] The structure of the TE0-TE1 mode multiplexer is the same as that of the TE0-TE1 mode demultiplexer, and the structure of the TE0-TE2 mode multiplexer is the same as that of the TE0-TE2 mode demultiplexer.

[0025] The bus waveguide includes a bus input waveguide, a bus gradient waveguide, and a bus output waveguide connected in sequence from the input end to the output end. The access waveguide includes an access input waveguide, an access gradient waveguide, and an access output waveguide connected in sequence from the input end to the output end.

[0026] Both the access gradient waveguide and the bus gradient waveguide are of width-gradient structures, and the width changes of the access gradient waveguide and the bus gradient waveguide both satisfy mode refractive index matching.

[0027] When TE-mode light is input from the input waveguide into the TE-TE mode multiplexer / TE-TE mode multiplexer, the corresponding higher-order mode light is output from the bus output waveguide; when light of other modes is input from the bus input waveguide into the TE-TE mode multiplexer / TE-TE mode multiplexer, the mode of the light does not change and is output from the bus output waveguide.

[0028] In the described delay line, the specific connection method and optical path transmission are as follows:

[0029] The input waveguide receives TE0-mode light as the incident light. The TE0-mode light sequentially passes through the output end of the input waveguide, the bus waveguide of the TE0-TE1 mode multiplexer, the bus waveguide of the TE0-TE2 mode multiplexer, the spiral waveguide structure, the bus waveguide of the TE0-TE2 mode demultiplexer, and the bus waveguide of the TE0-TE1 mode demultiplexer, and the TE0-TE1 detour waveguide. Then, it is received by the access waveguide at the input end of the TE0-TE1 mode multiplexer. The TE0-mode light is coupled and transformed into TE1-mode light in the TE0-TE1 mode multiplexer;

[0030] After the TE1-mode light is output from the bus waveguide at the output end of the TE0-TE1 mode multiplexer, it sequentially passes through the bus waveguide of the TE0-TE2 mode multiplexer, the spiral waveguide structure, and the bus waveguide of the TE0-TE2 mode demultiplexer. Then, it is received by the bus waveguide at the input end of the TE0-TE1 mode demultiplexer. The TE1-mode light is coupled and transformed into the second TE0-mode light in the TE0-TE1 mode demultiplexer;

[0031] After the second TE0-mode light is output from the access waveguide at the output end of the TE0-TE1 mode demultiplexer, it passes through the TE0-TE2 detour waveguide and is received by the access waveguide at the input end of the TE0-TE2 mode multiplexer. The second TE0-mode light is coupled and transformed into TE2-mode light in the TE0-TE2 mode multiplexer;

[0032] After the TE2-mode light is output from the bus waveguide at the output end of the TE0-TE2 mode multiplexer, it passes through the spiral waveguide structure and is received by the bus waveguide at the input end of the TE0-TE2 mode demultiplexer. The TE2-mode light is coupled and transformed into the third TE0-mode light in the TE0-TE2 mode demultiplexer;

[0033] After the third TE0-mode light is output from the access waveguide of the TE0-TE2 mode demultiplexer, it is output as the outgoing light through the output waveguide from the delay line.

[0034] The described delay line further includes an Euler multimode bend. The Euler multimode bend is arranged between the output end of the spiral waveguide structure and the input end of the TE0-TE2 mode demultiplexer. The output end of the spiral waveguide structure is a gradually changing arc-shaped bent waveguide with a width and radius.

[0035] The Euler multimode bend is an Euler bent waveguide, that is, the bending radius and bending angle change of the Euler multimode bend satisfy the Euler bending formula.

[0036] The described delay line is placed on a silicon substrate.

[0037] Through the structural settings of multiple mode (de)multiplexers, the present invention enables multiple modes to be transmitted on the same delay line, thereby increasing the delay amount within the same physical size.

[0038] By introducing a multi-mode waveguide with a gradually varying radius and helix width, the present invention reduces the propagation loss of multiple modes. Meanwhile, by introducing a gradually varying width and radius arc-shaped bending waveguide and a gradually varying width and radius S-shaped bending waveguide structure, it maintains the smooth evolution of each mode between different structures and avoids the excitation crosstalk of other modes.

[0039] On the premise of maintaining low-loss transmission of the input light, the present invention can simultaneously transmit multiple modes under the same physical size, doubling the on-chip delay amount. At the same time, it can also effectively reduce the power consumption when adjusting the delay amount by using the plasma dispersion effect and the thermo-optical effect, and can be used in systems such as on-chip microwave photonic wave speed shaping and quantum computing.

[0040] The present invention can be applied to any device and module that requires an optical delay line in the field of silicon-based photon integration.

[0041] The present invention uses a mode (de)multiplexer to enable multiple modes to be transmitted simultaneously in a single waveguide, thereby increasing the delay amount of the waveguide under the same length. By introducing a multi-mode waveguide with a gradually varying radius and helix width, it realizes low-loss transmission of multiple modes. And by designing the width, curvature, etc. of each part of the delay line waveguide, it enables smooth gradual change at the connection of each part, avoiding the excitation of other modes and resulting in crosstalk, thus realizing an on-chip delay line with low on-chip loss, small size, and large delay, and can also reduce the power consumption when adjusting the delay amount by using the plasma dispersion effect and the thermo-optical effect.

[0042] The optical waveguide of the present invention enables multiple modes to be repeatedly transmitted in the same waveguide, and uses a wide waveguide to reduce the overlap between the mode and the waveguide sidewall. On the basis of maintaining low propagation loss, it can increase the delay amount per unit length of the waveguide, reduce the occupied area required for a long delay line, and can be used in systems such as large-scale optical delay lines, microwave photonics systems, and optical coherence tomography scanners.

[0043] The beneficial effects of the present invention are as follows:

[0044] (1) By using the structural settings of multiple mode (de)multiplexers, the present invention realizes the propagation of multiple orthogonal modes in the same delay line waveguide, doubles the delay amount on the same physical scale, and can also effectively reduce the power consumption when adjusting the delay amount by using the plasma dispersion effect and the thermo-optical effect.

[0045] (2) By using a multi-mode waveguide with a gradually varying radius and helix width for mode transmission, the present invention can effectively reduce the scattering loss caused by the rough sidewall for multiple modes, thereby reducing the transmission loss of the overall waveguide and realizing low-loss propagation of multiple modes on the chip.

[0046] (3) The present invention utilizes a width-radius gradually changing arc-shaped bent waveguide and a width-radius gradually changing S-shaped bent waveguide, so that at the connection of each part of the delay line, the width and the bending radius of the waveguide are consistent, thereby avoiding the excitation of other modes during the transmission of each mode and reducing the inter-modal crosstalk.

[0047] (4) The present invention can design any required delay by finely adjusting the end-to-end interval between the coil waveguides without causing coupling crosstalk. Description of the Drawings

[0048] Figure 1 It is a schematic structural diagram of a large-delay delay line for multi-mode low-loss transmission of the present invention.

[0049] Figure 2 It is a schematic structural diagram of a mode (de)multiplexer of the present invention.

[0050] Figure 3 It is a schematic structural diagram of a width-radius gradually changing S-shaped bent waveguide of the present invention.

[0051] Figure 4 It is a schematic diagram of the working principle of a multi-mode delay line of the present invention.

[0052] Figure 5 It is an embodiment of the present invention: a schematic diagram showing the variation of the normalized total scattering loss of light of different modes in the waveguide with the waveguide width.

[0053] Figure 6 (a) It is an embodiment of the present invention: a comparison diagram of the delay amount of the present invention and a single-mode waveguide varying with the waveguide length; Figure 6 (b) It is an embodiment of the present invention: a comparison diagram of the loss of the present invention and a single-mode waveguide varying with the delay amount.

[0054] In the figure: 1. Input waveguide, 2. TE0-TE1 mode multiplexer, 3. TE0-TE2 mode multiplexer, 4. Width-radius gradually changing arc-shaped bent waveguide, 5. Radius-gradually changing spiral wide waveguide, 6. Width-radius gradually changing S-shaped bent waveguide, 7. Euler multi-mode bend, 8. TE0-TE2 mode demultiplexer, 9. TE0-TE1 mode demultiplexer, 10. TE0-TE1 detour waveguide, 11. TE0-TE2 detour waveguide, 12. Detour waveguide output waveguide. Detailed Embodiment

[0055] The present invention will be further described below in conjunction with the drawings and embodiments, but the protection scope of the present invention should not be limited thereby.

[0056] As Figure 1As shown in the figure, the device structure implemented specifically includes an input waveguide 1, a TE0-TE1 mode multiplexer 2, a TE0-TE2 mode multiplexer 3, two width-radius-gradual arc-shaped bent waveguides 4, two radius-gradual spiral-wide waveguides 5, a width-radius-gradual S-shaped bent waveguide 6, an Euler multi-mode bend 7, a TE0-TE2 mode demultiplexer 8, a TE0-TE1 mode demultiplexer 9, a TE0-TE1 detour waveguide 10, a TE0-TE2 detour waveguide 11, and an output waveguide 12.

[0057] The input waveguide 1 is sequentially connected to the bus waveguide of the TE0-TE1 mode multiplexer 2 and the bus waveguide of the TE0-TE2 mode multiplexer 3, and then connected to the radius-gradual spiral-wide waveguide 5 through the width-radius-gradual arc-shaped bent waveguide 4. After passing through the width-radius-gradual S-shaped bent waveguide 6 in the middle of the spiral, it is sequentially connected to the second radius-gradual spiral-wide waveguide 5 and the width-radius-gradual arc-shaped bent waveguide 4. After spinning out of the spiral, it is connected to the input end of the bus waveguide of the TE0-TE1 mode demultiplexer 9 through the Euler multi-mode bend 7 and the bus waveguide of the TE0-TE2 mode demultiplexer 8. The output end of the bus waveguide of the TE0-TE1 mode demultiplexer 9 and the output end of the access waveguide are respectively connected to the access waveguide of the TE0-TE1 mode multiplexer 2 and the access waveguide of the TE0-TE2 mode multiplexer 3. Finally, the system outputs from the access waveguide of the TE0-TE2 mode demultiplexer 8 through the output waveguide 12.

[0058] Among them, the two width-radius-gradual arc-shaped bent waveguides 4, the two radius-gradual spiral-wide waveguides 5, and the width-radius-gradual S-shaped bent waveguide 6 form the above-mentioned spiral structure. The two radius-gradual spiral-wide waveguides 5 are both arranged along a planar spiral, and the planar spirals of the two radius-gradual spiral-wide waveguides 5 are concentric and arranged alternately inside and outside to form a planar double-spiral shape. The inner ends of the two radius-gradual spiral-wide waveguides 5 are connected by the width-radius-gradual S-shaped bent waveguide 6, and the outer ends of the two radius-gradual spiral-wide waveguides 5 are respectively connected to the output end of the TE0-TE2 mode multiplexer 3 and the input end of the TE0-TE2 mode demultiplexer 8 through one width-radius-gradual arc-shaped bent waveguide 4 each.

[0059] Among them, the width-radius-gradual arc-shaped bent waveguide 4, the radius-gradual spiral-wide waveguide 5, and the width-radius-gradual S-shaped bent waveguide 6 are all multi-mode waveguides.

[0060] The width of the width-radius-gradual arc-shaped bent waveguide 4 changes with the arc length, and the width gradually becomes smaller from the inner end to the outer end, that is, the width gradually narrows from the end connected to the radius-gradual spiral-wide waveguide 5 to the other end.

[0061] The bending radius of the radius-gradual spiral wide waveguide 5 changes with the bending angle and satisfies the equiangular spiral formula.

[0062] The bending radius of the width-radius-gradual S-shaped bending waveguide 6 satisfies the Euler curve equation. The width changes with the arc length, gradually widening from the center to both ends, and is symmetric about the center as a whole.

[0063] The bending radius of the Euler multimode bend 7 changes with the bending angle and satisfies the Euler bending formula, aiming to enable different modes to be transmitted during bending without significant loss.

[0064] At the connection of two connected waveguides, the width and bending radius are both the same.

[0065] At the corresponding connections of the TE0-TE1 mode multiplexer 2, TE0-TE2 mode multiplexer 3, TE0-TE1 mode demultiplexer 9, TE0-TE2 mode demultiplexer 8, two width-radius-gradual arc-shaped bending waveguides 4, two radius-gradual spiral wide waveguides 5, and one width-radius-gradual S-shaped bending waveguide 6, the widths and bending radii of the two connected waveguides are both the same, ensuring that mode mismatch does not occur at the connection to excite other modes.

[0066] The TE0-TE1 mode multiplexer 2, TE0-TE2 mode multiplexer 3, TE0-TE1 mode demultiplexer 9, and TE0-TE2 mode demultiplexer 8 are all composed of two asymmetric width-gradual bus waveguides and access waveguides.

[0067] For the TE0-TE1 mode multiplexer 2 and TE0-TE2 mode multiplexer 3, the bus waveguide becomes wider from the input end to the output end, and the access waveguide becomes narrower from the input end to the output end, and the waveguide spacing between the bus waveguide and the access waveguide remains unchanged. The structure of the TE0-TE1 mode multiplexer 2 is the same as that of the TE0-TE2 mode multiplexer 3, but the widths of the waveguides are different.

[0068] The TE0-TE1 mode multiplexer 2 has the same structure as the TE0-TE1 mode demultiplexer 9, but the optical transmission direction is opposite; the TE0-TE2 mode multiplexer 3 has the same structure as the TE0-TE2 mode demultiplexer 8, but the optical transmission direction is opposite.

[0069] That is, the TE0-TE1 mode multiplexer 2 / TE0-TE2 mode multiplexer 3 and the TE0-TE1 mode demultiplexer 9 / TE0-TE2 mode demultiplexer 8 are the same device, but are input / output from different input / output ports.

[0070] Such as Figure 2As shown in the figure, the structure of the mode multiplexer in the specific implementation includes an access input waveguide 13, an access tapered waveguide 14, an access output waveguide 15, a bus input waveguide 16, a bus tapered waveguide 17, and a bus output waveguide 18.

[0071] The access input waveguide 13, the access tapered waveguide 14, and the access output waveguide 15 form the access waveguide of the mode multiplexer, and the bus input waveguide 16, the bus tapered waveguide 17, and the bus output waveguide 18 form the bus waveguide of the mode multiplexer. The distance between the access waveguide and the bus waveguide remains unchanged. The mode multiplexer and the mode demultiplexer are symmetrically distributed about the center in terms of structure. The width changes of the access tapered waveguide 14 and the bus tapered waveguide 17 satisfy the mode refractive index matching. For the mode multiplexer, when TE0 light is input into the access input waveguide 13, the corresponding higher-order mode light will be output from the bus output waveguide 18; when light of other modes is input into the bus input waveguide 16, the mode will not change, and the light of other modes will still be output from the bus output waveguide 18. For the mode demultiplexer, when the corresponding higher-order mode light is input into the bus output waveguide 18, TE0 light will be output from the access input waveguide 13; when light of other modes is input into the bus output waveguide 18, the mode will not change, and the light of other modes input will still be output from the bus input waveguide 16. The TE0-TE1 mode (de)multiplexer and the TE0-TE2 mode (de)multiplexer have the same structure, except for the waveguide width.

[0072] As Figure 3 shown in the figure, the structure of the width-radius tapered S-shaped bent waveguide in the specific implementation gradually changes from the wide waveguide 19 with a small curvature at the port to the waveguide 20 with a large curvature and then to the narrow waveguide 21 with a small curvature at the center. The radius of the width-radius tapered S-shaped bent waveguide 6 changes with the arc length and satisfies the Euler bending equation, that is, it gradually changes from the waveguide with a small curvature at the port to the waveguide with a large curvature and then to the waveguide with a small curvature at the center. The entire width-radius tapered S-shaped bent waveguide 6 is symmetrically arranged with respect to the narrow waveguide 21 with a small curvature at the center. The width-radius tapered S-shaped bent waveguide 6 enables each mode to smoothly transmit at the place where the curvature changes suddenly in the middle without exciting other modes.

[0073] The large-delay delay line for multi-mode low-loss transmission of the present invention specifically includes a TE0-TE1 mode multiplexer, a TE0-TE2 mode multiplexer, a TE0-TE1 mode demultiplexer, a TE0-TE2 mode demultiplexer, two width-radius tapered arc-shaped bent waveguides, two radius-tapered spiral wide waveguides, and a width-radius tapered S-shaped bent waveguide disposed on a silicon substrate. The substrate and the cladding are both made of silicon dioxide.

[0074] The radius-gradual spiral wide waveguide 5 is the main waveguide for realizing the delay of the delay line. Therefore, its waveguide loss is the main loss source of the large-delay delay line for multi-mode low-loss transmission. By broadening the waveguide width of the radius-gradual spiral wide waveguide 5, the main loss source of the waveguide, i.e., the scattering loss, can be effectively reduced. Substituting the electric fields on the left and right sidewalls and the upper and lower surfaces of the waveguide for different modes of light at different waveguide widths into the three-dimensional volume current formula for calculation, the total magnitude of the scattering loss can be obtained. Since the optical field distributions of different modes are different and the scattering losses are also different, it is necessary to select the optimal waveguide width and the mode to be used according to the calculated loss results.

[0075] The working process of the present invention as a large-delay delay line supporting on-chip multi-mode low-loss transmission is described below:

[0076] The working principle of the present invention is as Figure 4 shown. The input TE0 light enters the delay line system from the input waveguide 1, passes through the bus waveguides of the TE0-TE1 mode multiplexer 2 and the TE0-TE2 mode multiplexer 3, and then enters the spiral. Since the TE0 light is input from the bus waveguide of the mode multiplexer, no coupling transformation occurs, and the output is still TE0 light. In the spiral, the light is transmitted from the width-radius-gradual arc-shaped bending waveguide 4 and the radius-gradual spiral wide waveguide 5 to the middle of the spiral, passes through the width-radius-gradual S-shaped bending waveguide 6, then passes through the second radius-gradual spiral wide waveguide 5 and the width-radius-gradual arc-shaped bending waveguide 4 and exits the spiral. After passing through the Euler multi-mode bend 7, it enters the bus waveguides of the TE0-TE2 mode demultiplexer 8 and the TE0-TE1 mode demultiplexer 9. Since the TE0 light is input from the bus waveguide of the mode demultiplexer, no coupling transformation occurs, and the output is still TE0 light. The output TE0 light is connected to the access input waveguide of the TE0-TE1 mode multiplexer 2 through the TE0-TE1 detour waveguide 10, is transformed into TE1 light by the TE0-TE1 mode multiplexer and output from the bus output waveguide, passes through the bus waveguide of the TE0-TE2 mode multiplexer 3 and then enters the spiral. After exiting the spiral and passing through the Euler multi-mode bend 7 and the bus waveguide of the TE0-TE2 mode demultiplexer 8, it enters the TE0-TE1 mode demultiplexer 9 and is converted into TE0 light. The output TE0 light is connected to the access input waveguide of the TE0-TE2 mode multiplexer 3 through the TE0-TE2 detour waveguide 11, is transformed into TE2 light by the TE0-TE2 mode multiplexer and output from the bus output waveguide and then directly enters the spiral. After exiting the spiral and passing through the Euler multi-mode bend 7, it enters the TE0-TE2 mode demultiplexer 8 and is converted into TE0 light, and is output from the output waveguide 12 of the delay line system. Through multiple low-loss transmissions of multiple modes in the delay line, the delay amount can be increased on the same physical size, and at the same time, the power for adjusting the delay amount by using the plasma dispersion effect and the thermo-optic effect can be effectively reduced.

[0077] Specific embodiments of the present invention are as follows:

[0078] In this embodiment, a waveguide material based on silicon-on-insulator is adopted as a large-delay delay line for multi-mode low-loss transmission. Its core layer is silicon, the cladding layer is silicon dioxide, and the substrate is silicon. A standard 220-nm-thick standard silicon-based chip manufacturing process is used for tape-out production to verify the universality of the present invention.

[0079] First, according to the optical field distributions of different modes, the total scattering losses of TE0, TE1, TE2, and TM0 modes at different widths are calculated, as Figure 5 shown. It can be seen that as the waveguide width increases, the scattering losses of all modes gradually decrease because the scattering losses caused by the rough sidewalls gradually decrease. When the waveguide width is greater than 3 μm, the total scattering losses of all modes become insensitive to the increase in waveguide width because the modes tend to be stable at this time and the scattering losses caused by the upper and lower surfaces become dominant. As a result, it can be seen that for TE and TM light of two polarizations, when the waveguide width reaches 3 μm, the loss of TM light is still greater than that of TE light because the optical field of TE light is mainly distributed at the sidewalls of the waveguide, while the optical field of TM light is mainly distributed on the upper and lower surfaces of the waveguide. As the waveguide width increases, the overlap of the optical field of TE light with the sidewalls of the waveguide will significantly decrease, while the overlap area of the optical field of TM light with the upper and lower surfaces of the waveguide basically remains unchanged. Therefore, when the waveguide is wide enough for the scattering losses caused by the upper and lower surfaces to become the dominant losses, the loss of TM light will be significantly greater than that of TE light. Therefore, in our large-delay delay line for on-chip multi-mode low-loss transmission, we choose to use TE0, TE1, and TE2 as the propagation modes. When the waveguide width is 3 μm, their losses can be less than 0.4 dB / cm, which is less than an order of magnitude of the loss of a single-mode waveguide. The present invention has scalability and can serially connect corresponding mode (de)multiplexers in the future to increase the number of modes transmitted in the delay line and increase the delay of the delay line.

[0080] After determining the waveguide mode and waveguide width to be used, we need to use the corresponding mode (de)multiplexer according to the selected mode. Since the mode multiplexer and the mode demultiplexer are centrosymmetrically distributed in structure, only the mode multiplexer needs to be designed. The mode multiplexer is designed using the principle of mode refractive index matching, and the refractive index of the fundamental mode in the access tapered waveguide is always equal to the refractive index of the higher-order mode in the bus tapered waveguide. For the TE0-TE1 mode multiplexer, the widths of both sides of its bus tapered waveguide are 0.44 μm and 0.58 μm respectively, the widths of both sides of the access tapered waveguide are 0.29 μm and 0.14 μm respectively, the distance between the bus tapered waveguide and the access tapered waveguide is 0.16 μm, and the lengths are all 25 μm; for the TE0-TE2 mode multiplexer, the widths of both sides of its bus tapered waveguide are 0.93 μm and 1.04 μm respectively, the widths of both sides of the access tapered waveguide are 0.32 μm and 0.26 μm respectively, the distance between the bus tapered waveguide and the access tapered waveguide is 0.2 μm, and the lengths are all 50 μm.

[0081] Finally, other parameters of the delay line need to be determined according to the transmission results of the selected mode, especially the variation of the width and radius of the spiral center width radius tapered S-shaped bent waveguide structure. According to the previous results, the input width of the spiral width radius tapered arc-shaped bent waveguide is selected as 1.04 μm and gradually changes to 3 μm, and the width of the radius tapered spiral wide waveguide is selected as 3 μm. For the width radius tapered S-shaped bent waveguide, in order to ensure that each mode can be transmitted with low loss and no other modes are excited, while keeping the structure compact. After simulation optimization, we select the bending radius of the small curvature narrow waveguide 21 as 60 μm and the waveguide width as 1.2 μm, so that there is no obvious mode mismatch loss for the three modes here. The bending radius of the small curvature wide waveguide 19 is also selected as 60 μm and the waveguide width is 3 μm, which is consistent with the radius tapered spiral wide waveguide. The bending radius of the large curvature waveguide 20 is selected as 24 μm, so that the equivalent diameter of the width radius tapered S-shaped bent waveguide is 60 μm.

[0082] Figure 6 (a) shows the comparison diagram of the delay amount of the present invention and the single-mode waveguide varying with the waveguide length. It can be seen that under the condition of the same waveguide length, the delay amount of the present invention is about 3.05 times that of the ordinary waveguide. Figure 6 (b) shows the comparison diagram of the loss of the present invention and the single-mode waveguide varying with the delay amount. By comparison, it can be seen that under the same delay amount, the loss of the delay line of the present invention is about 1 / 10 of that of the ordinary waveguide.

[0083] As can be seen from the implementation, the embodiments of the present invention demonstrate the use of a mode (de)multiplexer to enable multiple modes to simultaneously transmit back and forth in a single waveguide, thereby achieving a doubling of the delay amount at the same physical length of the waveguide. At the same time, a broadened multimode waveguide is used to reduce the scattering loss of each mode. Additionally, by optimizing each device in the delay line and ensuring that the width and bending radius of each device at the connection are consistent, mode mismatch is prevented at the connection, and other modes are not excited. The present invention provides a large-delay delay line with large delay, low loss, compact structure, high scalability, and low adjustment power consumption based on standard chip manufacturing processes, which is applicable to any components and modules in the optical field that require large-delay and low-loss transmission.

[0084] The above embodiments are used to explain the present invention, rather than to limit the present invention. Any modifications and changes made to the present invention within the spirit and scope of the claims of the present invention fall within the protection scope of the present invention.

Claims

1. A large-delay delay line supporting on-chip multi-mode low-loss transmission, characterized in that, the delay line includes: an input waveguide (1), whose input end receives TE0-mode light as incident light; a TE0-TE1 mode multiplexer (2), whose input end is respectively connected to the output end of the input waveguide (1) and the output end of the TE0-TE1 mode demultiplexer (9); a TE0-TE2 mode multiplexer (3), whose input end is respectively connected to the output end of the TE0-TE1 mode multiplexer (2) and the output end of the TE0-TE1 mode demultiplexer (9); a spiral waveguide structure, whose input end is connected to the output end of the TE0-TE2 mode multiplexer (3); a TE0-TE2 mode demultiplexer (8), whose input end is connected to the output end of the spiral waveguide structure, and whose output end is respectively connected to the input end of the TE0-TE1 mode demultiplexer (9) and the input end of the output waveguide (12); a TE0-TE1 mode demultiplexer (9), whose output end is respectively connected to the input end of the TE0-TE1 mode multiplexer (2) and the input end of the TE0-TE2 mode multiplexer (3); a TE0-TE1 detour waveguide (10), connected between the output end of the TE0-TE1 mode demultiplexer (9) and the input end of the TE0-TE1 mode multiplexer (2); a TE0-TE2 detour waveguide (11), connected between the output end of the TE0-TE1 mode demultiplexer (9) and the input end of the TE0-TE2 mode multiplexer (3); an output waveguide (12), whose input end is connected to the output end of the TE0-TE2 mode demultiplexer (8), and outputs TE0-mode light as outgoing light; the TE0-TE1 mode multiplexer (2), the TE0-TE2 mode multiplexer (3), the TE0-TE1 mode demultiplexer (9) and the TE0-TE2 mode demultiplexer (8) all include two bus waveguides arranged at intervals and access waveguides; the input waveguide (1) receives TE0-mode light as incident light, and the TE0-mode light sequentially passes through the output end of the input waveguide (1), the bus waveguide of the TE0-TE1 mode multiplexer (2), the bus waveguide of the TE0-TE2 mode multiplexer (3), the spiral waveguide structure, the bus waveguide of the TE0-TE2 mode demultiplexer (8) and the bus waveguide of the TE0-TE1 mode demultiplexer (9), and the TE0-TE1 detour waveguide (10), and is received by the access waveguide at the input end of the TE0-TE1 mode multiplexer (2), and the TE0-mode light is coupled and transformed into TE1-mode light in the TE0-TE1 mode multiplexer (2); after the TE1-mode light is output from the bus waveguide at the output end of the TE0-TE1 mode multiplexer (2), it sequentially passes through the bus waveguide of the TE0-TE2 mode multiplexer (3), the spiral waveguide structure, and the bus waveguide of the TE0-TE2 mode demultiplexer (8), and is received by the bus waveguide at the input end of the TE0-TE1 mode demultiplexer (9), and the TE1-mode light is coupled and transformed into the second TE0-mode light in the TE0-TE1 mode demultiplexer (9); After the second TE0-mode light is output from the access waveguide at the output end of the TE0-TE1 mode demultiplexer (9), it is transmitted through the TE0-TE2 detour waveguide (11) and then received by the access waveguide at the input end of the TE0-TE2 mode multiplexer (3). The second TE0-mode light is coupled and transformed into TE2-mode light in the TE0-TE2 mode multiplexer (3). After the TE2-mode light is output from the bus waveguide at the output end of the TE0-TE2 mode multiplexer (3), it is transmitted through the spiral waveguide structure and then received by the bus waveguide at the input end of the TE0-TE2 mode demultiplexer (8). The TE2-mode light is coupled and transformed into the third TE0-mode light in the TE0-TE2 mode demultiplexer (8). After the third TE0-mode light is output from the access waveguide of the TE0-TE2 mode demultiplexer (8), it is output as the outgoing light through the output waveguide (12) to the delay line.

2. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 1, wherein, the spiral waveguide structure includes: two width-radius-gradual-arc-shaped curved waveguides (4), two radius-gradual spiral wide waveguides (5), and one width-radius-gradual S-shaped curved waveguide (6); the two radius-gradual spiral wide waveguides (5) are arranged along a planar spiral, and the planar spirals of the two radius-gradual spiral wide waveguides (5) are concentric and arranged alternately inside and outside to form a planar double-spiral shape. The inner ends of the two radius-gradual spiral wide waveguides (5) are connected by a width-radius-gradual S-shaped curved waveguide (6). The outer ends of the two radius-gradual spiral wide waveguides (5) are respectively connected to the output end of the TE0-TE2 mode multiplexer (3) and the input end of the TE0-TE2 mode demultiplexer (8) through one width-radius-gradual arc-shaped curved waveguide (4) each.

3. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 2, wherein: the width-radius-gradual arc-shaped curved waveguide (4), the radius-gradual spiral wide waveguide (5), and the width-radius-gradual S-shaped curved waveguide (6) are all multi-mode waveguides.

4. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 2, wherein: the width of the width-radius-gradual arc-shaped curved waveguide (4) changes with the arc length, and the width gradually narrows from the end connected to the radius-gradual spiral wide waveguide (5) to the other end; the bending radius of the radius-gradual coil curved waveguide (5) satisfies the equiangular spiral equation as the bending angle changes; the bending radius of the width-radius-gradual S-shaped curved waveguide (6) satisfies the Euler curve equation, the width changes with the arc length, and gradually widens from the center to both ends, and is overall centrosymmetric.

5. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 1, wherein: The bus waveguide and the access waveguide are both asymmetric width-graded waveguides; the waveguide spacing between the bus waveguide and the access waveguide is fixed, the bus waveguide gradually widens from the input end to the output end, and the access waveguide gradually narrows from the input end to the output end; the structure of the TE0-TE1 mode multiplexer (2) is the same as that of the TE0-TE2 mode multiplexer (3), but the widths of the waveguides are different. The structure of the TE0-TE1 mode multiplexer (2) is the same as that of the TE0-TE1 mode demultiplexer (9); the structure of the TE0-TE2 mode multiplexer (3) is the same as that of the TE0-TE2 mode demultiplexer (8).

6. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 5, characterized in that: The bus waveguide includes a bus input waveguide (16), a bus graded waveguide (17), and a bus output waveguide (18) connected in sequence from the input end to the output end. The access waveguide includes an access input waveguide (13), an access graded waveguide (14), and an access output waveguide (15) connected in sequence from the input end to the output end. The access graded waveguide (14) and the bus graded waveguide (17) are both width-graded structures, and the width changes of the access graded waveguide (14) and the bus graded waveguide (17) both satisfy mode refractive index matching.

7. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 1, characterized in that: The delay line further includes an Euler multi-mode bend (7); the Euler multi-mode bend (7) is arranged between the output end of the spiral waveguide structure and the input end of the TE0-TE2 mode demultiplexer (8), and the Euler multi-mode bend (7) is an Euler bent waveguide.

8. A large-delay delay line supporting on-chip multi-mode low-loss transmission according to claim 1, characterized in that: The delay line is placed on a silicon substrate.

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