A preparation process of intrinsic amorphous silicon passivation layer
By controlling the deposition power and hydrogen plasma treatment in stages, the epitaxial growth problem of amorphous silicon thin films in silicon heterojunction solar cells was solved, improving passivation effect and cell performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GOLD STONE (FUJIAN) ENERGY CO LTD
- Filing Date
- 2024-02-26
- Publication Date
- 2026-04-17
AI Technical Summary
In the prior art, the intrinsic amorphous silicon thin film of silicon heterojunction solar cells is prone to forming an epitaxial growth layer at the crystalline silicon interface, resulting in poor passivation quality. In addition, the hydrogen content of the thin film at the interface is insufficient, which affects the open circuit voltage and conversion efficiency of the cell.
Intrinsic amorphous silicon passivation layers were prepared using PECVD equipment. By reducing the deposition power in stages and using hydrogen plasma treatment, the growth direction and hydrogen content of the thin film were controlled, avoiding epitaxial growth and improving the quality of the interface microstructure.
It effectively suppressed the epitaxial growth of silicon, increased the hydrogen content and microstructure compactness at the interface, and improved the open-circuit voltage and conversion efficiency of the battery.
Smart Images

Figure CN118073481B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of silicon heterojunction solar cell technology, and more particularly to a process for preparing an intrinsic amorphous silicon passivation layer. Background Technology
[0002] The excellent passivation effect of intrinsic amorphous silicon thin films on crystalline silicon surfaces in silicon heterojunction solar cells results in high open-circuit voltages. The passivation effect of intrinsic amorphous silicon films on crystalline silicon surfaces is closely related to the film deposition process. Currently, the main method for preparing intrinsic amorphous silicon passivation layers is to use stacked intrinsic amorphous silicon films to passivate the crystalline silicon surface: under constant power, a first intrinsic amorphous silicon film is deposited on a crystalline silicon substrate, and a second intrinsic amorphous silicon film is deposited on top of it. During the deposition process, a large amount of hydrogen gas is introduced to dilute the silane, and hydrogen atoms are used to passivate the dangling bonds at the crystalline silicon interface to achieve a better passivation effect. This process has the following disadvantages: an epitaxial silicon growth layer easily forms at the interface between crystalline silicon and intrinsic amorphous silicon, affecting the passivation quality; the hydrogen content in the film at the crystalline silicon interface is insufficient, resulting in a less compact microstructure, higher defect state density, and lower open-circuit voltage. Summary of the Invention
[0003] To address the aforementioned problems, this invention provides a process for preparing an intrinsic amorphous silicon passivation layer that effectively suppresses silicon epitaxial growth at the interface, increases the hydrogen content at the interface, and enhances the compactness of the microstructure at the interface.
[0004] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a process for preparing an intrinsic amorphous silicon passivation layer, the preparation process comprising the following steps:
[0005] First intrinsic amorphous silicon thin films were prepared on texturized and cleaned crystalline silicon substrates using PECVD equipment. During the deposition process, the deposition power was gradually reduced in 3-5 stages, with the reduction rate in each stage being equal or unequal. The power density ranged from 50-80 mW / cm³. 2 Gradient decreases to 20-40 mW / cm 2 The deposition power in the final stage is reduced by 20%-50% compared to the deposition power in the initial stage;
[0006] Hydrogen plasma treatment was performed on the intrinsic amorphous silicon thin film.
[0007] Deposit a secondary intrinsic amorphous silicon thin film;
[0008] Deposit a third intrinsic amorphous silicon thin film.
[0009] Furthermore, the conditions for preparing the first intrinsic amorphous silicon thin film are: temperature 150-250℃, process gas: SiH4, gas pressure 50-200pa, and duration 5-10s.
[0010] Furthermore, the conditions for the hydrogen plasma treatment are: temperature 180-220℃, process gas: H2, gas pressure 50-200 Pa, power density 8-20 mW / cm³. 2 The duration is 10-60 seconds.
[0011] Furthermore, the conditions for depositing the second intrinsic amorphous silicon thin film are: temperature 180-220℃, process gas: SiH4, gas pressure 50-200pa, and power density 8-25mW / cm³. 2 The duration is 10-60 seconds.
[0012] Furthermore, the conditions for depositing the third intrinsic amorphous silicon thin film are: temperature 180-220℃, process gases: SiH4, H2, gas pressure 100-200 Pa, power density 8-25 mW / cm³. 2 The duration is 30-100 seconds.
[0013] As can be seen from the above description of the present invention, compared with the prior art, the present invention has the following advantages:
[0014] 1. In this invention, when depositing the first intrinsic amorphous silicon thin film, the deposition power gradually decreases along the film growth direction. That is, a higher power is used at the beginning of film deposition to increase the deposition rate of the film, resulting in higher disorder of the amorphous silicon film at the crystalline silicon interface, effectively avoiding the epitaxial growth of silicon. Subsequently, the deposition power is gradually reduced to avoid the film growing too thick under high-speed deposition conditions, which would lead to excessive impurities and poor quality. On the one hand, this can effectively improve the passivation effect of the amorphous silicon film interface, and on the other hand, it can improve the film quality, thereby improving the conversion efficiency of the fabricated cell.
[0015] 2. In this invention, after depositing the first intrinsic amorphous silicon thin film, a hydrogen plasma treatment is performed on it for a longer period of time, which increases the hydrogen content of the amorphous silicon thin film at the interface and improves the quality of the microstructure at the interface. Attached Figure Description
[0016] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:
[0017] Figure 1 This is a process flow diagram for the fabrication of an intrinsic amorphous silicon passivation layer according to the present invention. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0019] Example
[0020] refer to Figure 1 , one A process for fabricating an intrinsic amorphous silicon passivation layer, the process comprising the following steps:
[0021] S01. First intrinsic amorphous silicon thin films are prepared on texturized and cleaned crystalline silicon substrates using PECVD equipment. During the deposition process, the deposition power is gradually reduced in 3-5 stages, with the power reduction in each stage being equal or unequal. The power density ranges from 50-80 mW / cm³. 2 Gradient decreases to 20-40 mW / cm 2 The deposition power in the final stage is reduced by 20%-50% compared to the deposition power in the initial stage;
[0022] S02, hydrogen plasma treatment of the first intrinsic amorphous silicon thin film;
[0023] SO3, depositing a secondary intrinsic amorphous silicon thin film;
[0024] S04, depositing a third intrinsic amorphous silicon thin film.
[0025] The conditions for preparing the first intrinsic amorphous silicon thin film are: temperature 150-250℃, process gas: SiH4, gas pressure 50-200pa, and time 5-10s.
[0026] The conditions for the hydrogen plasma treatment are: temperature 180-220℃, process gas: H2, gas pressure 50-200 Pa, power density 8-20 mW / cm³. 2 The duration is 10-60 seconds.
[0027] The conditions for depositing the second intrinsic amorphous silicon thin film are: temperature 180-220℃, process gas: SiH4, gas pressure 50-200pa, power density 8-25mW / cm³. 2 The duration is 10-60 seconds.
[0028] The conditions for depositing the third intrinsic amorphous silicon thin film are: temperature 180-220℃, process gases: SiH4, H2, gas pressure 100-200 Pa, power density 8-25 mW / cm³. 2 The duration is 30-100 seconds.
[0029] In this invention, during the deposition of the first intrinsic amorphous silicon thin film, the deposition power gradually decreases along the film growth direction. Specifically, a higher power is used at the beginning of deposition to increase the deposition rate, resulting in greater disorder in the amorphous silicon film at the crystalline silicon interface and effectively preventing the epitaxial growth of silicon. Subsequently, the deposition power is gradually reduced to avoid excessively thick films due to high-speed deposition, which would lead to excessive impurities and poor quality. This effectively improves the passivation effect of the amorphous silicon film interface and enhances the film quality, thereby improving the conversion efficiency of the fabricated battery. After the deposition of the first intrinsic amorphous silicon thin film, it is subjected to a prolonged hydrogen plasma treatment, which increases the hydrogen content of the amorphous silicon film at the interface and improves the quality of the microstructure at the interface.
[0030] As shown in the table below, the crystalline silicon heterojunction battery fabricated using the amorphous silicon passivation layer of the present invention exhibits superior electrical performance.
[0031] condition Isc (A) Voc(V) FF(%) Eta(%) Example 1.0008 1.0000 1.0029 1.0039 Comparative Example 1.0000 1.0000 1.0000 1.0000
[0032] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A process for preparing an intrinsic amorphous silicon passivation layer, characterized in that: The preparation process includes the following steps: First intrinsic amorphous silicon thin films were prepared on texturized and cleaned crystalline silicon substrates using PECVD equipment. During the deposition process, the deposition power was gradually reduced in 3-5 stages, with the reduction rate in each stage being equal or unequal. The power density ranged from 50-80 mW / cm³. 2 Gradient decreases to 20-40 mW / cm 2 The deposition power in the final stage is reduced by 20%-50% compared to the deposition power in the initial stage; Hydrogen plasma treatment was performed on the intrinsic amorphous silicon thin film. Deposit a secondary intrinsic amorphous silicon thin film; Deposit a third intrinsic amorphous silicon thin film.
2. The fabrication process of an intrinsic amorphous silicon passivation layer according to claim 1, characterized in that: The conditions for preparing the first intrinsic amorphous silicon thin film are: temperature 150-250℃, process gas: SiH4, gas pressure 50-200pa, and time 5-10s.
3. The fabrication process of an intrinsic amorphous silicon passivation layer according to claim 1, characterized in that: The conditions for the hydrogen plasma treatment are: temperature 180-220℃, process gas: H2, gas pressure 50-200 Pa, power density 8-20 mW / cm³. 2 The duration is 10-60 seconds.
4. The fabrication process of an intrinsic amorphous silicon passivation layer according to claim 1, characterized in that: The conditions for depositing the second intrinsic amorphous silicon thin film are: temperature 180-220℃, process gas: SiH4, gas pressure 50-200pa, power density 8-25mW / cm³. 2 The duration is 10-60 seconds.
5. The fabrication process of an intrinsic amorphous silicon passivation layer according to claim 1, characterized in that: The conditions for depositing the third intrinsic amorphous silicon thin film are: temperature 180-220℃, process gases: SiH4, H2, gas pressure 100-200 Pa, power density 8-25 mW / cm³. 2 The duration is 30-100 seconds.
Citation Information
Patent Citations
Heterojunction solar cell and preparation method thereof
CN113113502A
Preparation method of amorphous silicon passivation layer of silicon heterojunction solar cell
CN113937192A
Method for depositing intrinsic amorphous silicon film by PECVD (Plasma Enhanced Chemical Vapor Deposition) method, battery preparation method and battery
CN115863490A