Accelerated forward-looking SAR real-time imaging method based on multi-DSP
By establishing and synchronizing the global polar coordinate system under a multi-DSP chip architecture, the problem of poor SAR imaging quality under acceleration trajectory was solved, and efficient forward-looking SAR imaging on acceleration trajectory was achieved, improving imaging quality and processing efficiency.
Patent Information
- Application Number
- CN202410377643.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-29
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2044-03-29
AI Technical Summary
Existing SAR imaging algorithms are mainly based on uniform linear trajectory models, which cannot be applied to accelerating trajectories, resulting in poor imaging quality and huge computational load, making it difficult to realize engineering applications.
Employing a multi-DSP chip architecture, forward-looking SAR imaging under acceleration trajectories is achieved through the establishment of a globally unified polar coordinate system, synchronous processing of echo data, range interpolation, sub-aperture BP coarse imaging, wavenumber spectrum center correction and regularization.
It improves the quality and processing efficiency of SAR imaging under acceleration trajectories, enables real-time acquisition of high-resolution images, and improves security and hardware resource utilization by using domestically produced chips.
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Figure CN118169687B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of SAR imaging, and particularly relates to a real-time imaging method for accelerated forward-looking squint SAR based on multiple DSPs. BACKGROUND
[0002] Radar plays an important role in many fields due to its all-weather and all-day imaging capability. In order to obtain high-resolution imaging without increasing the size of the antenna and the working frequency, the synthetic aperture radar (SAR) imaging technology is applied. However, the SAR imaging algorithm has a large amount of calculation, which causes the problem of low efficiency in engineering implementation. With the progress of science and technology, the continuous emergence of high-speed multi-core chips makes various SAR imaging algorithms widely used.
[0003] When the platform carrying the SAR system is no longer a uniform straight-line trajectory but has acceleration, the existing SAR imaging algorithm is no longer applicable. In order to solve this problem, the forward-looking squint SAR imaging algorithm based on accelerated trajectory is proposed, which can effectively deal with this challenge. However, this algorithm has not been implemented in engineering, and in order to promote its application, it is urgent to design a real-time imaging software for accelerated forward-looking squint SAR.
[0004] Modern SAR technology is committed to quickly obtaining high-resolution images, and missile-borne SAR often needs to perform forward-looking squint imaging in the high-speed stage, which causes the coupling of the frequency spectrum of the echo signal in the azimuth direction and the range direction. In this case, the traditional frequency-domain algorithm cannot accurately compensate for errors, and the imaging quality is poor. The time-domain imaging algorithm based on the back-projection (BP) algorithm can realize forward-looking squint uniform trajectory imaging, but the disadvantage is that its accumulation process of each pulse and each pixel point is complex and has a large amount of calculation, which is limited in engineering application. The accelerated fast factorized back-projection (AFBP) algorithm is a fast imaging algorithm based on the sub-aperture BP algorithm, which uses the sub-aperture image spectrum splicing method to obtain a high-resolution image. Therefore, the SAR imaging real-time processing software based on the AFBP algorithm has appeared. The design of such processing software will play an important role in promoting the development and practical application of synthetic aperture radar technology.
[0005] As a mature special-purpose digital signal processing chip, DSP (Digital Signal Processing) has high main frequency, rich hardware interface, perfect function library and high floating point operation capability, and is very suitable for engineering application of SAR imaging algorithm. Various engineering implementation schemes based on DSP chips are described in existing literatures. In the literature “Lao Danru. High-speed platform deceleration segment large forward slanting beamforming imaging and multi-core DSP software engineering implementation[D]. Xi'an University of Electronic Science and Technology, 2015.”, a diving acceleration trajectory and a beamforming PGA algorithm are used to realize engineering application by using a single TMS320C6678 DSP chip. In the literature “Li Congxin. Parallel real-time processing technology of large forward slanting SAR based on multi-core DSP[D]. Beijing University of Science and Technology, 2016.”, a 4-chip TMS320C6678 DSP chip architecture and an improved SPECAN algorithm are used to realize large forward slanting SAR imaging. In the literature “Zhang Zheng. SAR time domain imaging algorithm design and development[D]. Xi'an University of Electronic Science and Technology, 2020.”, a phase gradient autofocus algorithm processing software based on a four-chip DSP architecture is proposed, which uses a TMS320C6678 DSP chip and adopts a structure of two-by-two as a group and ping-pong cooperation between groups. In the literature “Dong Lan, Meng Xingwei, Zhu Daoyin. Large oblique SAR imaging technology based on four DSP chips[C] / / China Electronics Society Digital Signal Processing Expert Committee. Thirteenth National DSP Application Technology Academic Conference Proceedings. Nanjing University of Aeronautics and Astronautics School of Electronic Information Engineering, 2021:6.”, a three-chip TMS320C6678 DSP chip architecture is used to realize a SAR time domain imaging algorithm based on a uniform linear trajectory in a ping-pong processing mode. In the literature “Li Zelin. Sea target large forward slanting imaging and target detection engineering implementation[D]. Xi'an University of Electronic Science and Technology, 2022.”, a two-chip FT-M6678 chip is used to realize large forward slanting imaging of sea targets by using a frequency domain imaging algorithm.
[0006] However, the existing methods generally have the following problems: (1) the existing SAR imaging real-time processing software is mainly realized based on a TMS320C6678 model DSP of TI company; (2) the existing SAR imaging real-time processing software is designed based on a uniform linear trajectory model. SUMMARY
[0007] In order to solve the above problems in the prior art, the application provides a multi-chip DSP based accelerated trajectory forward slanting SAR real-time imaging method. The technical problems to be solved by the application are realized by the following technical scheme:
[0008] The application provides a multi-chip DSP based accelerated trajectory forward slanting SAR real-time imaging method, which comprises:
[0009] S1: receiving pulse compressed echo data by a single core of the first DSP chip and sending half of the echo data to the second DSP chip;
[0010] S2: establishing a global unified polar coordinate system by a single core of the first DSP chip and the second DSP chip and storing the global unified polar coordinate system to a shared memory;
[0011] S3: synchronously performing distance direction interpolation processing on echo data by multiple cores of the first DSP chip and the second DSP chip and moving the interpolated echo data to a shared memory;
[0012] S4: synchronously performing sub-aperture BP coarse imaging on echo data by multiple cores of the first DSP chip and the second DSP chip;
[0013] S5: synchronously performing wave number spectrum center correction of sub-images by multiple cores of the first DSP chip and the second DSP chip;
[0014] S6: synchronously performing wave number spectrum regularization on the wave number spectrum center corrected image by multiple cores of the first DSP chip and the second DSP chip;
[0015] S7: completing splicing of all sub-images by a single core of the first DSP chip and the second DSP chip to obtain a final SAR image.
[0016] In an embodiment of the present application, the S1 comprises:
[0017] S1.1: setting the isSemulDataRdy flag of the first DSP chip DSP1 to 0, when the host computer sends a frame of echo data to the first DSP chip DSP1 through an Ethernet interface, the core 0 of the first DSP chip DSP1 parses the frame header information;
[0018] S1.2: the first DSP chip DSP1 receives echo data, converts the echo data into 32-bit float type, and sends the echo data to a specified address of a shared memory through EDMA operation;
[0019] S1.3: the first DSP chip DSP1 sends the latter half of the echo data to the second DSP chip DSP2 through an SRIO interface;
[0020] S1.4: storing radar basic parameters in the shared memory of the first DSP chip DSP1 and the second DSP chip DSP2.
[0021] In an embodiment of the present application, the first DSP chip and the second DSP chip are both FT-M6678N type DSP chips.
[0022] In an embodiment of the present application, the S2 comprises:
[0023] S2.1: two base vectors buffer_0 and buffer_1 are respectively generated in the L2 local storage space of the first DSP chip and the second DSP chip according to the azimuth point number and the range point number;
[0024] S2.2: a radial axis buffer_R and an azimuth angle axis buffer_A are generated through operation by using length parameters and angle parameters, wherein the length parameters include a polar radius interval and a central slant distance, and the angle parameters include an angle domain interval and a front oblique viewing angle of a slant plane corresponding to each wave position;
[0025] S2.3: the radial axis buffer_R and the azimuth angle axis buffer_A are moved from the L2 local storage space to the MSM shared area of the first DSP chip and the second DSP chip respectively.
[0026] In an embodiment of the present application, the S3 comprises:
[0027] S3.1: the number of pulses interpolated by each kernel in the first DSP chip and the second DSP chip in each cycle is determined;
[0028] S3.2: each kernel in the first DSP chip and the second DSP chip moves the pulse corresponding to the echo data from the shared memory to the L2 local storage space corresponding to each kernel;
[0029] S3.3: the corresponding pulse is subjected to range FFT transformation in the corresponding L2 local storage space to obtain frequency domain data, and the frequency domain data is zero-padded; then the zero-padded frequency domain data is subjected to IFFT processing to be transformed to the time domain to obtain interpolated echo data;
[0030] S3.4: each kernel in the first DSP chip and the second DSP chip moves the interpolated echo data to the shared area MSM.
[0031] In an embodiment of the present application, the S4 comprises:
[0032] S4.1: each core of the first DSP chip DSP1 and the second DSP chip DSP2 moves radial axis buffer_R and azimuth axis buffer_A from the shared area MSM to the L2 local storage space of each core respectively, and the two vector axes form a pixel grid through multiplication operation;
[0033] S4.2: the distance and azimuth position corresponding to each pixel point are calculated point by point in the L2 local storage space of each core by using the current azimuth time radar position coordinate parameters, and the slant range from the antenna phase center to each pixel point is obtained;
[0034] S4.3: a phase compensation function is constructed according to the obtained slant range, each pixel point is multiplied by the phase compensation function and projected into the sub-aperture data, and the processing results of all pulses in each sub-aperture are accumulated to obtain a sub-image;
[0035] S4.4: the sub-image obtained in the L2 local storage space of each core is moved to the shared memory DDR;
[0036] S4.5: each core repeats steps S4.1 to S4.4 to start processing a new sub-aperture until all sub-apertures are processed.
[0037] In an embodiment of the present application, the S5 comprises:
[0038] S5.1: the sub-image generated by the current core in the L2 local storage space of each core is subjected to inverse Fourier transform in the distance direction to obtain a wave number spectrum of the sub-image;
[0039] S5.2: the wave number spectrum center K1 of the sub-image is calculated by using the sub-aperture center time, the initial speed of the aircraft, the acceleration and the sub-aperture length, and a wave number spectrum center correction function exp(j*2π*K1) is constructed by using the wave number spectrum center K1;
[0040] S5.3: the wave number spectrum center of each sub-image is compensated in the distance direction by using the wave number spectrum center correction function, and the wave number spectrum center in the azimuth direction is shifted from zero to the real spectrum center.
[0041] In an embodiment of the present application, the S6 comprises:
[0042] S6.1: a regularization function in the distance frequency domain is constructed:
[0043] K2=4π / λ i ,
[0044] wherein λ i ∈[-Nnrn / 2,Nnrn / 2-1] / Nnrn·F s, Nnrn represents the distance point number of the sub-image, F s represents the radar distance sampling frequency;
[0045] S6.2: the result of the wave number spectrum center correction is multiplied by exp(j*2π*K2) for wave number spectrum regularization, and the result of the wave number spectrum regularization is stored in the DDR.
[0046] In an embodiment of the application, the S7 comprises:
[0047] A memory space is opened in the shared memory of the first DSP chip DSP1 and the second DSP chip DSP2 for storing the full-aperture wave number spectrum matrix, and the value in the space is set to 0 after the space is opened;
[0048] One core of the first DSP chip DSP1 and the second DSP chip DSP2 is used for cyclic operation to complete the sub-image wave number spectrum splicing.
[0049] In an embodiment of the application, the cyclic operation of one core is used to complete the sub-image wave number spectrum splicing, which comprises:
[0050] The wave number spectrum data of the sub-aperture 0 is moved to the register buffer_0 of the L2 local storage space of the designated core, and the wave number spectrum data of the sub-aperture 1 is moved to the register buffer_1 of the L2 local storage space of the designated core;
[0051] The wave number spectrum data of the sub-aperture 0 and the wave number spectrum data of the sub-aperture 1 are superimposed and fused according to the sub-aperture position and the overlapping range and stored in the register buffer_2 of the L2 local storage space, and the fused spectrum is moved to the corresponding position in the memory space for storing the full-aperture wave number spectrum matrix, to complete the fusion of the two sub-apertures;
[0052] From a specific address, the wave number spectrum with the same size as the sub-image wave number spectrum is taken from the memory space for storing the full-aperture wave number spectrum matrix and stored in the register buffer_2, and then the wave number spectrum of the sub-aperture 3 is moved to the register buffer_3, and the wave number spectrum of the sub-aperture 3 is superimposed according to the sub-aperture position and the overlapping range and placed in the register buffer_4, to complete the splicing of the three sub-image wave number spectrums;
[0053] The operation is repeated until the wave number spectrums of all images are spliced.
[0054] Compared with the prior art, the application has the following beneficial effects:
[0055] 1. The method for real-time imaging of accelerated trajectory forward-looking SAR based on multiple DSPs provided by the application is based on a uniform acceleration straight line model, and can be applied to forward-looking SAR imaging under a uniform acceleration trajectory, realizes accelerated trajectory forward-looking SAR imaging, and improves imaging quality and processing efficiency.
[0056] 2. The hardware platform used in the application is integrated by multiple DSP chips of the FT-M6678N type, the chips are controllable and safe, and the available hardware resources of the multiple DSPs are greatly increased compared with single DSP, time consumption is reduced, and real-time performance is improved.
[0057] 3. The method of the application carries out the step of wave number spectrum regularization in the implementation process. The existence of acceleration can exacerbate the inclination degree of sub-image wave number spectrum, so that the wave number spectrum is folded, and gaps and overlaps appear when the full-aperture wave number spectrum is spliced. After the inclined wave number spectrum is regularized, effective fusion of the wave number spectrum can be realized, and accurate focusing is realized. The application will be further described in detail below in combination with the drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS
[0058] Figure 1 is a flowchart of a real-time imaging method for accelerated trajectory forward-looking SAR based on multiple DSPs provided by an embodiment of the application;
[0059] Figure 2 is a schematic diagram of a real-time imaging system for accelerated trajectory forward-looking SAR based on multiple DSPs provided by an embodiment of the application;
[0060] Figure 3 is a schematic diagram of a processing process of a real-time imaging method for accelerated trajectory forward-looking SAR based on multiple DSPs provided by an embodiment of the application;
[0061] Figure 4 is a schematic diagram of a general architecture of a hardware platform provided by an embodiment of the application;
[0062] Figure 5 is a schematic diagram of a process of establishing a polar coordinate system provided by an embodiment of the application;
[0063] Figure 6 is a schematic diagram of a distance interpolation process provided by an embodiment of the application;
[0064] Figure 7 is a schematic diagram of a sub-aperture imaging process provided by an embodiment of the application;
[0065] Figure 8 is a schematic diagram of a sub-image wave number spectrum center correction and regularization process provided by an embodiment of the application;
[0066] Figure 9It is a sub-image fusion process schematic diagram provided by the embodiment of the application.
[0067] Figure 10 It is a full-aperture wave number spectrum comparison chart after splicing of matlab and the processing method proposed in the application.
[0068] Figure 11 It is an imaging result comparison chart of matlab and the processing method proposed in the application.
[0069] Figure 12 It is a two-dimensional profile chart of a point target of matlab and the processing method proposed in the application.
[0070] Figure 13 It is a range profile chart of matlab and the processing method proposed in the application.
[0071] Figure 14 It is an azimuth profile chart of matlab and the processing method proposed in the application.
[0072] Figure 15 It is an error surface chart of two SAR images of matlab and the processing method proposed in the application.
[0073] Figure 16 It is a measured data chart processed by the real-time processing software for forward-looking SAR imaging based on accelerated trajectory proposed in the application. DETAILED DESCRIPTION
[0074] In order to further illustrate the technical means and effects taken by the application to achieve the predetermined purposes, the multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method according to the application is described in detail below in combination with the drawings and specific embodiments.
[0075] The foregoing and other technical contents, features and effects of the application can be clearly presented in the specific embodiment description below in combination with the drawings. Through the description of the specific embodiments, the technical means and effects taken by the application to achieve the predetermined purposes can be understood more deeply and specifically. However, the attached drawings are provided for reference and illustration only, and are not used to limit the technical solutions of the application.
[0076] It should be noted that, in this document, the terms "first" and "second" and the like are used merely as identifiers that distinguish one entity from another, and are not necessarily intended to signify chronological order, unless otherwise indicated. Furthermore, the use of terms such as "including," "containing," or "comprising," and variations thereof, is meant to encompass the inclusion of one or more elements, features, or components, but not the exclusion of any other elements, features, or components. Unless otherwise specified, the use of the indefinite article "a" or "an" does not exclude a plurality of the elements, features, or components, and "a" or "an" means "one or more."
[0077] The embodiment provides a multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method, please see Figures 1 to 3 The real-time imaging method comprises the following steps:
[0078] S1: receiving pulse compressed echo data by using a single core of a first DSP chip and sending half of the echo data to a second DSP chip.
[0079] According to the characteristics of the accelerated trajectory, first, task division is performed, under the condition of correlation and coupling analysis, the original task or program is allocated to each processor according to a certain principle, to obtain the smallest parallel overhead and the largest parallel degree. In the algorithm engineering implementation process, in order to reduce the consumption on the chip to the greatest extent, the algorithm needs to be parallel designed.
[0080] In order to further improve the real-time performance of the imaging method, the hardware resources of the signal processing platform are fully utilized, and the task allocation between the multi-DSP chips and the multi-core within the single DSP chip needs to be carefully considered. The hardware platform used in the application is composed of two FT-M6678 type DSP chips and peripheral integrated circuits, as shown in Figure 4 The FT-M6678 chip adopts a new type of KeyStone multi-core architecture and enhanced core M66x, and adopts a multi-core parallel architecture. The chip contains 8 high-performance FT-C66x cores, each core has high fixed-point and floating-point operation performance. The 8 cores of the FT-M6678 chip share 4MB of MSMC space, support external expansion of 64-bit DDR shared memory. Each core has 512KB of L2 local storage space.
[0081] In this step, before processing the echo data, it is necessary to move the echo data to the DDR shared memory designated by the first DSP chip DSP1 and DSP2, so as to facilitate the calling of all kernels. The first DSP chip DSP1 receives the echo data from the host computer through the Ethernet interface, and the second DSP chip DSP2 receives the echo data from the first DSP chip DSP1 through the SRIO interface. After the echo data is placed in the designated DDR shared memory, the radar basic parameters also need to be stored in the DDR shared memory. This process is completed by the core 0 of the first DSP chip DSP1 and the second DSP chip DSP2, and the other cores are in an idle state.
[0082] Specifically, before performing imaging processing, the first DSP chip DSP1 is in a state of waiting to receive data, and the isSemulDataRdy flag is 0. When the host computer (PC) sends a frame of data to the first DSP chip DSP1 through the Ethernet interface, the core 0 of the first DSP chip DSP1 parses the frame header information immediately, and when it is found that the header information is RSPR (a custom string indicating that the received signal is echo data), the isSemulDataRdy flag is set to 1. The first DSP chip DSP1 receives the echo data, then converts the echo data from char type to 32-bit float type, and then sends the first DSP chip to the specified address of the shared memory through the EDMA (Enhanced Direct Memory Access) operation. Finally, the flag bit and the parameter related to the received data are reset to wait for the arrival of the next data.
[0083] After the first DSP chip DSP1 receives the echo data, it sends the second half of the echo data to the second DSP chip DSP2 through the SRIO interface. The first DSP chip DSP1 and the second DSP chip DSP2 receive the data and wait for the processing of the echo data. Before processing the echo data, the first DSP chip DSP1 and the second DSP chip DSP2 need to store the radar basic parameters in the DDR shared memory, so as to facilitate the calling of all kernels. These parameters usually include the speed of light, the carrier frequency, the bandwidth, the initial speed, the front squint angle, and the track information such as the rotation factor and the inverse rotation factor.
[0084] S2: establishing a global unified polar coordinate system by using a single core of the first DSP chip and the second DSP chip, and storing the global unified polar coordinate system to the shared memory.
[0085] According to the principle of the AFBP algorithm based on the uniform acceleration trajectory, the instantaneous slant range of the radar to the target point needs to be calculated, and a global unified polar coordinate system (R, A) needs to be established. In the global unified polar coordinate system, the instantaneous slant range of the radar to each pixel point of the coordinate system is calculated, and then the echo signal of the radar is obtained according to the slant range expression. Therefore, after the initial state is set, the first DSP chip DSP1 and the second DSP chip DSP2 need to establish a unified polar coordinate system. The polar coordinate is composed of a radial axis and an azimuth axis. The radial axis vector and the azimuth axis vector are generated by the DSP1 and the DSP2 in the split side, and are stored in the MSM shared area for all kernel calls. When the coordinate system is called, the kernel moves the two vectors to the respective L2 local storage space for multiplication operation to interweave into a complete pixel grid. The coordinate system establishment process can be completed by a single core.
[0086] In this embodiment, the global unified polar coordinate system is established by the core 0 of the DSP1 and the DSP2 respectively. Please refer to Figure 5 , Figure 5 is a process diagram for establishing a polar coordinate system provided by an embodiment of the present application. Specifically, the key point of the operation is to generate two coordinate axis vectors in the L2 local storage space. First, two basic vectors buffer_0 and buffer_1 are generated in the L2 local storage space of the first DSP chip and the second DSP chip respectively according to the number of azimuth points and the number of distance points. Two coordinate axes, a radial axis buffer_R and an azimuth axis buffer_A, are generated through operation by using a length parameter and an angle parameter. The length parameter includes a polar radius interval and a central slant range, and the angle parameter includes an angle domain interval and a front oblique viewing angle of the slant plane corresponding to each wave position, which can be calculated from the basic parameters of the radar and stored in the DDR shared memory.
[0087] Specifically, the basic vector buffer_0 is multiplied by the polar radius interval parameter value, and then added with the central slant range to obtain the radial axis vector. The basic vector buffer_1 is multiplied by the angle domain interval parameter value, and then added with the front oblique viewing angle of the slant plane corresponding to each wave position to obtain the azimuth axis vector.
[0088] Finally, the radial axis buffer_R and the azimuth axis buffer_A are moved from the L2 local storage space to the MSM shared area. When the kernel uses the polar coordinate, each kernel moves the radial axis buffer_R and the azimuth axis buffer_A from the MSM shared area to the respective L2 local storage space, interweaves into the entire polar coordinate grid through multiplication operation, and the origin of the polar coordinate system is located at the center of the synthetic aperture.
[0089] S3: synchronously performing distance direction interpolation processing on the echo data by using the multiple cores of the first DSP chip and the second DSP chip, and moving the interpolated echo data to the shared memory.
[0090] According to the principle of the uniform acceleration trajectory AFBP algorithm, after a global unified polar coordinate system is established, the pulse pressure data needs to be projected onto the corresponding pixel point position. In order to obtain the accurate value of the position, distance direction interpolation needs to be performed on the pulse pressure data. The interpolation method used in the embodiment of the present application is a frequency domain interpolation method. The interpolation process is operated in units of a single pulse, and the 8 cores of DSP1 and DSP2 are synchronously processed, and the subsequent sub-aperture imaging process is connected.
[0091] In the sub-aperture BP process, the slant range values from the phase center of the radar antenna at each azimuth time to each grid pixel point are needed to index the corresponding pulse pressure data, so as to obtain the back projection values of each grid pixel point. The accuracy of the indexing can be improved by performing interpolation on the pulse pressure data in the distance direction.
[0092] The step S3 of the embodiment includes:
[0093] S3.1: Each core in the first DSP chip and the second DSP chip determines the number of pulses to be interpolated by each core in each loop according to the calculated nan_part[N] vector.
[0094] In the embodiment, the sub-aperture containing pulse number vector nan_part[N] is estimated according to the heading coordinates of the radar at each azimuth time and the length of the sub-aperture.
[0095] S3.2: Each core in the first DSP chip and the second DSP chip moves the original echo data corresponding to the pulse from the shared memory to the L2 local storage space corresponding to each core;
[0096] S3.3: Perform distance direction FFT transformation on the corresponding pulse in the corresponding L2 local storage space to obtain frequency domain data, and zero pad the frequency domain data; then perform IFFT processing on the zero-padded frequency domain data to transform to the time domain to obtain the interpolated echo data;
[0097] S3.4: Each core in the first DSP chip and the second DSP chip moves the interpolated echo data to the shared area MSM.
[0098] The interpolation process is performed synchronously by the eight cores. Due to the existence of acceleration, the number of pulses of each sub-aperture is different, so the number of pulses processed by each core in each loop is also different. Therefore, each core needs to determine the number of pulses to be interpolated in each loop according to the calculated nan_part[N] vector, wherein nan_part[N] is an array that stores the number of pulses processed by each sub-aperture. For example, nan_part[1] = 10, which means that the number of pulses processed by sub-aperture 1 is 10. Please refer to Figure 6 ,Figure 6 is a distance interpolation process schematic diagram provided by an embodiment of the present application. Taking core 1 of DSP 1 as an example, it is assumed that one of the sub-apertures processed by core 1 contains N pulses, and each pulse contains M points, then core 1 needs to be processed for N times, and after each processing, the original M points are converted into β*M points, wherein β is an interpolation multiple.
[0099] The specific interpolation process is as follows: first, the original echo data is moved from DDR to L2 register, then distance direction FFT transformation is performed to obtain frequency domain data; then (β-1)*M zeros are padded in the frequency domain data; finally, IFFT processing is performed on the zero-padded frequency domain data to transform to time domain, since the IFFT result differs from the actual result by a certain multiple, therefore, the IFFT result is multiplied by a certain constant to obtain the interpolated echo data, and the interpolated echo data is moved to shared space MSM for use by the sub-aperture imaging module.
[0100] S4: synchronously performing sub-aperture BP coarse imaging on the echo data by using the multiple cores of the first DSP chip and the second DSP chip.
[0101] In this step, the operation of sub-aperture BP coarse imaging after sub-aperture division is eight-core parallel processing, each core processes one sub-aperture at a time, and a low-resolution sub-image is obtained by performing BP integration along the azimuth direction, the entire DSP processes eight sub-apertures at a time, and eight low-resolution sub-images are obtained at a time, the number of cycles of processing is determined according to the total number of sub-apertures, and finally all sub-aperture images are obtained. The main reason for adopting this processing method is that the introduction of acceleration causes the number of pulses processed by each sub-aperture to be different, which is different from the method of simultaneously processing one sub-aperture by eight cores. This method needs to divide more sub-apertures to reduce the number of pulses contained in each sub-aperture.
[0102] The reason for such design is illustrated by the following example: the echo data type in the DSP processing process is generally a 32-bit float complex number, it is assumed that a certain sub-aperture contains 64 pulses, and each pulse contains 1024 points, then the result of slant distance calculation at each azimuth time requires 512 KB space, but the size of the L2 local storage space is only 512 KB, if each core processes each pulse separately, the intermediate process cannot be completed in the form of vector in L2, which will greatly reduce the efficiency. In the DSP 1 and DSP 2 of the present embodiment, the process is synchronously processed by eight cores.
[0103] Please refer to Figure 7 , Figure 7 is a sub-aperture imaging process schematic diagram provided by an embodiment of the present application. The specific implementation manner of this step is as follows:
[0104] S4.1: Each core of the first DSP chip DSP1 and the second DSP chip DSP2 moves the radial axis buffer_R and the azimuth axis buffer_A from the shared area MSM to the L2 local storage space of each core, and the two vector axes form a pixel grid through multiplication operation;
[0105] S4.2: In the L2 local storage space of each core, the distance and azimuth position corresponding to each pixel point are calculated point by point using the current azimuth time radar position coordinate parameters, and then the slant range from the antenna phase center to each pixel point is obtained;
[0106] S4.3: According to the obtained slant range, a phase compensation function is constructed, each pixel point is multiplied by the phase compensation function and projected into the sub-aperture data, and the processing results of all pulses in each sub-aperture are accumulated to obtain a sub-image;
[0107] S4.4: The sub-image obtained by each core in the L2 local storage space is moved to the shared memory DDR;
[0108] S4.5: Each core repeats steps S4.1 to S4.4 to start processing a new sub-aperture until all sub-apertures are processed.
[0109] It should be noted that the register for storing the accumulated data must be pre-zeroed, because after the DSP is powered on, random numbers will be generated in the storage space, and if the random numbers are accumulated into the processing results during the accumulation process, it will seriously affect the imaging results of the sub-aperture. After each core completes the above operations, the accumulated results of the L2 local storage space are moved to the shared space DDR. Then each core starts a new cycle to process a new sub-aperture until all sub-apertures are processed.
[0110] S5: The multiple cores of the first DSP chip and the second DSP chip are used to synchronize the wave number spectrum center correction of the sub-image.
[0111] After the aperture BP is imaged, the wave number spectrum center of the sub-image needs to be corrected, and the wave number spectrum of each sub-image is shifted in the azimuth direction, and the wave number spectrum center is moved from zero to the real center. After the wave number spectrum center of the sub-image is corrected, the wave number spectrum needs to be regularized. The existence of acceleration will exacerbate the inclination of the wave number spectrum of the sub-image, resulting in wave number spectrum folding, which will affect the imaging results, so the wave number spectrum of the sub-image needs to be regularized before the wave number spectrum is fused and spliced. This operation is performed sequentially after the sub-aperture imaging. In the DSP1 and DSP2 of the embodiment, the process is processed by 8 cores synchronously.
[0112] Please refer to Figure 8 , Figure 8is a sub-image wave number spectrum center correction and regularization process schematic diagram provided by an embodiment of the present application. Step S5 of the present embodiment specifically comprises:
[0113] S5.1: performing inverse distance Fourier transform on the sub-image generated by the current kernel in the L2 local storage space of each kernel, transforming from distance time domain to distance frequency domain, to obtain the sub-image wave number spectrum;
[0114] S5.2: the wave number spectrum center K1 of the sub-image is related to the sub-aperture center time, the initial speed of the aircraft, the acceleration, and the sub-aperture length, K1 is calculated using the above parameters and a wave number spectrum center correction function exp(j*2π*K1) is constructed;
[0115] S5.3: the wave number spectrum center correction function is used to compensate the wave number spectrum center of the sub-image in the distance direction, and the wave number spectrum center of each sub-image is shifted from zero to the real spectrum center in the azimuth direction.
[0116] S6: the wave number spectrum of the sub-image after the wave number spectrum center correction is regularized by the multiple cores of the first DSP chip and the second DSP chip synchronously.
[0117] The existence of the acceleration will cause the sub-image wave number spectrum to be tilted seriously so as to be folded, which will affect the imaging result, and therefore the wave number spectrum of the sub-image needs to be regularized before the wave number spectrum fusion and splicing. As shown in the following formula, the present step specifically comprises: Figure 7
[0118] S6.1: a regularization function in the distance frequency domain is constructed and is expressed as:
[0119] K2=4π / λ i ,
[0120] wherein, λ i ∈[-Nnrn / 2,Nnrn / 2-1] / Nnrn·F s , Nnrn represents the distance point number of the sub-image, and F s represents the radar distance sampling frequency.
[0121] S6.2: the result after the wave number spectrum center correction is multiplied by exp(j*2π*K2) to perform wave number spectrum regularization, to obtain the result after the wave number spectrum regularization.
[0122] S7: the splicing of all the sub-images is completed by using the single core of the first DSP chip and the second DSP chip, to obtain the final SAR image.
[0123] The fused and spliced wave number spectrum after correction can be obtained. The DSP extracts the wave number spectrum of the first sub-aperture and the wave number spectrum of the second sub-aperture from the shared memory, and the two wave number spectrums are fused into a new wave number spectrum by using a specific superposition method. In this way, the spliced wave number spectrum is obtained. In DSP1 and DSP2, the process can be processed by a single core.
[0124] Please refer to Figure 9 , Figure 9 is a sub-image fusion process schematic diagram provided by an embodiment of the application. The sub-image wave number spectrum can be seamlessly and non-overlappedly fused into a full-aperture wave number spectrum.
[0125] First, a space for storing a full-aperture wave number spectrum matrix is opened in the shared memory of the first DSP chip DSP1 and the second DSP chip DSP2, respectively, and the values in the space are set to 0 after the space is opened. The sub-image wave number spectrum splicing is operated by a kernel in a loop, and the number of loops is determined by the number of apertures. Unlike the center correction of the sub-image wave number spectrum and the wave number spectrum regularization, this step is processed in the azimuth direction.
[0126] Specifically, first, the azimuth direction data is subjected to IFFT in the L2 local storage space of each kernel to obtain the wave number spectrum data of each sub-aperture. The wave number spectrum data of the sub-aperture 0 is moved to the register buffer_0 in the L2 local storage space of the designated kernel, and the wave number spectrum data of the sub-aperture 1 is moved to the register buffer_1 in the L2 local storage space of the designated kernel. According to the sub-aperture position and the overlapping range, the wave number spectrum data of the sub-aperture 0 and the wave number spectrum data of the sub-aperture 1 are superimposed and fused and stored in the register buffer_2 in the L2 local storage space, and the fused spectrum is moved to the corresponding position in the DDR memory space for storing the full-aperture wave number spectrum, completing the fusion of the two sub-apertures. From a specific address, a wave number spectrum with the same size as the sub-image wave number spectrum is taken from the DDR memory space for storing the full-aperture wave number spectrum and stored in the register buffer_2. Then, the wave number spectrum of the sub-aperture 3 is moved to the register buffer_3, and according to the sub-aperture position and the overlapping range, it is superimposed and the result is placed in the register buffer_4, completing the splicing of the three sub-image wave number spectrums. In this way, the process is repeated until the wave number spectrums of all images are spliced.
[0127] To sum up, the execution process of the multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method proposed in the embodiments of the application is as follows: first, the host computer sends the radar echo signal after pulse compression to the DDR memory of the first DSP chip DSP1 through Ethernet, so as to obtain an NXM complex matrix, wherein N is the number of distance dimension points, and M is the number of azimuth dimension points. Then, the first DSP chip DSP1 moves the last N / 2XM data in the DDR memory thereof to the DDR memory of the second DSP chip DSP2 through the SRIO interface. Then, each DSP (the first DSP chip and the second DSP chip) moves the data in the respective DDR memory thereof to the respective L2 memory thereof through DMA, and starts to perform FFT interpolation, BP integration and wave number spectrum subgraph splicing on the data in the respective L2 memory thereof in turn. Then, the spliced wave number spectrum in the second DSP chip DSP2 is collected to the first DSP chip DSP1 through the SRIO interface, so as to obtain a complete wave number spectrum. Finally, the first DSP chip DSP1 converts the data to two-dimensional time domain, so as to obtain a high-resolution SAR image under uniform accelerated trajectory.
[0128] The effect of the multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method proposed in the application is further described through simulation experiments.
[0129] The multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method proposed in the application improves real-time performance. The processing time of each step of the SAR real-time imaging method of the application is given through the internal timing function _itoll of the DSP, as shown in Table 1 below, by comparing the time consumption of the existing implementation scheme of the uniform speed SAR imaging algorithm on the FT-M6678N type DSP chip.
[0130] Table 1. Time consumption of each step of the multi-DSP-based accelerated trajectory forward-looking SAR real-time imaging method
[0131] Module name Time consuming (ms) Parameter calculation 5.064 FFT interpolation 41.298 Low resolution submap generation 559.682 Subimage correction and splicing 48.850 Two times of inter-slice data transmission 11.087 Geometric correction 118.183 Total 784.164
[0132] As can be seen from the results in Table 1, the imaging process of the whole method takes about 784 ms, while the forward-looking SAR uniform speed imaging algorithm in the literature (Laodan T. High-speed platform deceleration segment large forward-looking imaging and multi-core DSP software engineering implementation [D]. Xi'an University of Electronic Science and Technology, 2015.) takes about 1629 ms to be implemented by using one FT-M6678N type DSP chip, and the imaging time is about 814.5 ms when converted to two DSP chips. Therefore, the imaging time of the method of the application is slightly reduced in the case of introducing acceleration, and the real-time performance is improved.
[0133] The method for accelerated trajectory forward-looking squint SAR real-time imaging based on the multi-DSPs can be applied to the uniform accelerated trajectory, which is illustrated by comparing the processing results of the method with the results processed by the matlab.
[0134] Table 2. Simulation parameters
[0135] Parameter Value Parameter Value Carrier frequency X-band Bandwidth 300 MHZ Ground pre-tilt angle 30° Pulse repetition frequency 0.5 KHZ Central slant range 10 km Platform height 5 km Platform initial velocity 300 m / s Acceleration 30 m / s 2 ]]
[0136] The simulation parameters are shown in Table 2. Figures 9 to 14 The figure for comparing the processing results of the matlab and the method is shown in Fig. 3. Figure 10 The left and right two figures in Fig. 4 are the full-aperture wave number spectra spliced by the matlab and the method respectively. Figure 11 The left and right two figures in Fig. 5 are the imaging results of the matlab and the method respectively. Figure 12 、 Figure 13 and Figure 14 The left figure in Fig. 6 is the two-dimensional profile, the range profile and the azimuth profile of the point target processed by the matlab, Figure 12 、 Figure 13 and Figure 14 The right figure in Fig. 6 is the two-dimensional profile, the range profile and the azimuth profile of the point target processed by the method. Figure 15 The error surface graphs of the two SAR images are given in Fig. 7, and it can be seen that the image error precision is in the order of 10 -4 .
[0137] Table 3 is the analysis of the peak sidelobe ratio (PSLR), the integrated sidelobe ratio (ISLR) and the impulse response width (IRW) of the point targets processed by the matlab and the method, and three point targets A, B and C are selected. It can be seen that the imaging indexes of the method are close to the imaging indexes of the matlab processing. Through the data comparison, it can be found that the method for accelerated trajectory forward-looking squint SAR real-time imaging based on the multi-DSPs can be applied to the uniform accelerated trajectory.
[0138] Table 3. Analysis of imaging indexes of simulation target points
[0139]
[0140] Table 4. Real data parameters
[0141] Parameter Value Parameter Value Carrier frequency Ku-band Bandwidth 50 MHZ Ground pre-tilt angle 21.7° Pulse repetition frequency 800 HZ Central slant range 17.85 km Platform height 4.39 km Platform initial velocity 52.88 m / s Acceleration 0.05 m / s 2 ]]
[0142] Further, the method of the present application is used to process a group of real data, and the specific parameters are shown in Table 4. The imaging results are shown in Figs. 4(a) and 4(b). Figure 16 (a) shows the corner reflection imaging diagram, and the red box marks the corner reflection, Figure 16 (b) is one of the corner reflection range images and azimuth images. The real-time imaging method of the accelerated trajectory forward-looking SAR based on multiple DSPs proposed in the present application has good focusing effect on the target region of the accelerated trajectory, and the target is clearly resolved. Table 5 shows the PSLR, ISLR and IRW imaging indexes of the corner reflection, which verifies the applicability of the method proposed in the present application to the uniform acceleration trajectory.
[0143] Table 5. Analysis of corner reflection imaging indexes
[0144]
[0145]
[0146] The real-time imaging method of the accelerated trajectory forward-looking SAR based on multiple DSPs provided by the present application is based on the uniform acceleration straight line model, and can be applied to the forward-looking SAR imaging under the uniform acceleration trajectory, realizes the accelerated trajectory forward-looking SAR imaging, and improves the imaging quality and processing efficiency. The hardware platform used in the present application is integrated by multiple DSP chips of FT-M6678N type, the chip is controllable and safe, and the hardware resources available are greatly increased, the time consumption is reduced, and the real-time performance is improved. The method of the present application carries out the wave number spectrum regularization step in the implementation process. The existence of acceleration can exacerbate the inclination degree of the sub-image wave number spectrum, so that the wave number spectrum is folded, and gaps and overlaps will appear when the full-aperture wave number spectrum is spliced. After the inclined wave number spectrum is regularized, the effective fusion of the wave number spectrum can be realized, and accurate focusing can be realized.
[0147] In the several embodiments of the present application, it should be understood that the disclosed device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, and the division of the modules is only a logical function division, and actual implementation can have another division manner, for example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed.
[0148] In addition, each function module in each embodiment of the present application can be integrated in one processing module, or each module can exist physically alone, or two or more modules can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of hardware plus software function module.
[0149] The above is a further detailed description of the present application in combination with specific preferred embodiments, and the specific implementation of the present application should not be limited to these descriptions. For ordinary skilled persons in the technical field of the present application, some simple deductions or substitutions can be made without departing from the concept of the present application, and all of them should be regarded as falling within the protection scope of the present application.
Claims
1. A multi-DSP-based accelerated forward-looking squinted SAR real-time imaging method, characterized in that, The method comprises the following steps: S1: receiving pulse compressed echo data by using a single core of a first DSP chip and sending half of the echo data to a second DSP chip; S2: establishing a global unified polar coordinate system by using a single core of the first DSP chip and the second DSP chip and storing the global unified polar coordinate system to a shared memory; S3: synchronously performing distance direction interpolation processing on echo data by using multiple cores of the first DSP chip and the second DSP chip and moving the interpolated echo data to the shared memory; S4: synchronously performing sub-aperture BP coarse imaging on echo data by using multiple cores of the first DSP chip and the second DSP chip; S5: synchronously performing wave number spectrum center correction of a sub-image by using multiple cores of the first DSP chip and the second DSP chip; S6: synchronously performing wave number spectrum regularization on the wave number spectrum center corrected image by using multiple cores of the first DSP chip and the second DSP chip; S7: completing splicing of all sub-images by using a single core of the first DSP chip and the second DSP chip to obtain a final SAR image; The S1 comprises: S1.1: setting the isSemulDataRdy flag of the first DSP chip DSP1 to 0, when a host computer sends a frame of echo data to the first DSP chip DSP1 through an Ethernet interface, the core 0 of the first DSP chip DSP1 analyzes frame header information; S1.2: the first DSP chip DSP1 receives echo data, converts the echo data into 32-bit float type, and sends the echo data to a specified address of a shared memory through EDMA operation; S1.3: the first DSP chip DSP1 sends the latter half of the echo data to the second DSP chip DSP2 through an SRIO interface; S1.4: storing radar basic parameters in the shared memory of the first DSP chip DSP1 and the second DSP chip DSP2; The first DSP chip and the second DSP chip both adopt a DSP chip of FT-M6678N type; The S4 comprises: S4.1: Utilize each core of the first DSP chip DSP1 and the second DSP chip DSP2 to transfer the radial axis buffer from the shared region MSM. and azimuth axis buffer_ The data is moved to the L2 local storage space of each kernel, and the two vector axes are multiplied to form a pixel grid. S4.2: calculating a distance direction and an azimuth direction position corresponding to each pixel point by using current azimuth time radar position coordinate parameters in the L2 local storage space of each core, to obtain a slant distance from an antenna phase center to each pixel point; S4.3: constructing a phase compensation function according to the obtained slant distance, projecting each pixel point multiplied by the phase compensation function into sub-aperture data, and accumulating the processing results of all pulses in each sub-aperture to obtain a sub-image; S4.4: moving the sub-image obtained from the L2 local storage space of each core to the shared memory DDR; S4.5: each core repeats steps S4.1 to S4.4 to start processing a new sub-aperture until all sub-apertures are processed; The S5 comprises: S5.1: performing inverse Fourier transform on the sub-image generated by the current core in the L2 local storage space of each core to obtain a sub-image wave number spectrum; S5.2: calculate the wave number spectrum center K1 of the sub-image by using the sub-aperture center time, the initial speed of the airplane, the acceleration and the sub-aperture length, and construct a wave number spectrum center correction function exp(j*2π*K1) by using the wave number spectrum center K1; S5.3: compensate the wave number spectrum center of the sub-image in the range direction by using the wave number spectrum center correction function, and shift the wave number spectrum center of each sub-image in the azimuth direction from zero to the real spectrum center.
2. The multi-DSP based accelerated forward-looking squinted SAR real-time imaging method according to claim 1, characterized in that, The S2 comprises: S2.1: generate two basic vectors buffer_0 and buffer_1 in the L2 local storage space of the first DSP chip and the second DSP chip respectively according to the number of points in the azimuth direction and the number of points in the range direction; S2.2: generating radial axis buffer and azimuth axis buffer by using length parameters and angle parameters and azimuth axis buffer wherein the length parameters include polar radius interval and central slant distance, and the angle parameters include angle domain interval and the angle of fore-oblique view of the slant plane corresponding to each wave position. S2.3: buffer the radial axis and the azimuthal axis from the L2 local memory space to the MSM shared region of the first and second DSP chips, respectively.
3. The multi-DSP based accelerated forward-looking squinted SAR real-time imaging method according to claim 1, characterized in that, The S3 comprises: S3.1: determine the number of pulses interpolated by each kernel in the first DSP chip and the second DSP chip in each cycle; S3.2: each kernel in the first DSP chip and the second DSP chip moves the pulse corresponding to the echo data from the shared memory to the L2 local storage space corresponding to each kernel; S3.3: perform the range direction FFT transformation on the corresponding pulse in the corresponding L2 local storage space to obtain the frequency domain data, and zero pad the frequency domain data; then perform IFFT processing on the zero-padded frequency domain data to transform to the time domain to obtain the interpolated echo data; S3.4: each kernel in the first DSP chip and the second DSP chip moves the interpolated echo data to the shared area MSM.
4. The multi-DSP based accelerated forward-looking squinted SAR real-time imaging method according to claim 1, characterized in that, The S6 comprises: S6.1: construct a regularization function in the range frequency domain: , wherein, , denotes the number of range direction points of the sub-image, denotes the radar range direction sampling frequency; S6.2: multiply the result after the wave number spectrum center correction by exp(j*2π*K2) to perform wave number spectrum regularization, obtain the result after the wave number spectrum regularization and store it in the DDR.
5. The multi-DSP based accelerated forward-looking squinted SAR real-time imaging method according to claim 1, characterized in that, The S7 comprises: Open a memory space in the shared memory of the first DSP chip DSP1 and the second DSP chip DSP2 for storing the full-aperture wave number spectrum matrix, and set the value in the space to 0 after opening the space; Use one kernel of the first DSP chip DSP1 and the second DSP chip DSP2 to perform a loop operation to complete the sub-image wave number spectrum splicing.
6. The multi-DSP-based accelerated forward-looking squinted SAR real-time imaging method according to claim 5, characterized in that, The loop operation using one kernel to complete the sub-image wave number spectrum splicing comprises: Move the wave number spectrum data of the sub-aperture 0 to the register buffer_0 of the L2 local storage space of the designated kernel, and move the wave number spectrum data of the sub-aperture 1 to the register buffer_1 of the L2 local storage space of the designated kernel; According to the sub-aperture position and the overlapping range, superimpose and fuse the wave number spectrum data of the sub-aperture 0 and the wave number spectrum data of the sub-aperture 1 to store in the register buffer_2 of the L2 local storage space, and move the fused frequency spectrum to the corresponding position in the memory space for storing the full-aperture wave number spectrum matrix to complete the fusion of the two sub-apertures; From the specific address, wave number spectrum with the same size as the wave number spectrum of the sub-image wave number spectrum is taken out from the memory space storing the full-aperture wave number spectrum matrix and stored in the register buffer_2, then the wave number spectrum of the sub-aperture 3 is moved to the register buffer_3, and according to the sub-aperture position and the overlapping range, the wave number spectrum is superimposed and the result is placed in the register buffer_4, and the wave number spectrum splicing of three sub-images is completed; The repeating execution is performed until the wave number spectrum splicing of all images is completed.
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