Parallel computing task division method for brain-like simulation

By using multiple processors to calculate the task size of asymmetric tasks in parallel in the field of brain-like simulation, and evenly allocating tasks according to the task size, the problem of uneven allocation of calculation tasks is solved, which significantly improves the computing efficiency and processing time.

CN118170540BActive Publication Date: 2025-05-02BEIJING ACAD OF ARTIFICIAL INTELLLIGENCE
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Patent Information

Application Number
CN202410330284.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-03-21
Publication Date
2025-05-02
Estimated Expiration
2044-03-21

AI Technical Summary

Technical Problem

In the field of brain-like simulation, the uneven allocation of asymmetric computing tasks causes the processor with the largest computing volume to slow down the overall computing progress and is less efficient.

Method used

The task size of the asymmetric task is calculated in parallel by at least two processors of all processors and tasks are assigned to each processor equally according to the task size to ensure that the total amount of tasks on each processor is relatively balanced.

Benefits of technology

It greatly improves the overall efficiency of processing asymmetric tasks, shortens the overall processing time, and significantly improves the computing efficiency through parallel computing.

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Abstract

The present invention discloses a parallel computing task division method for brain-like simulation, the method comprising: obtaining a plurality of asymmetric tasks; calculating the task size of the asymmetric tasks in parallel through at least two processors among all processors; and distributing the asymmetric tasks to corresponding processors among all processors according to the task size of the asymmetric tasks, so that the processors process the corresponding asymmetric tasks. The present invention calculates the task size of the asymmetric tasks in parallel through multiple processors among all processors, and strategically distributes the asymmetric tasks to each processor in a balanced manner according to the task size of the asymmetric tasks, so that the total amount of tasks on each processor remains relatively balanced, which can greatly improve the overall efficiency of processing asymmetric tasks and shorten the overall processing time. In addition, the calculation of the asymmetric task size is distributed to each processor among all processors for parallel calculation, which can multiply the calculation efficiency.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a parallel computing task division method for brain-like simulation. Background Art

[0002] Parallel computing refers to using multiple processors to collaboratively solve the same problem, that is, breaking the problem to be solved into several sub-problems, each of which is calculated in parallel by an independent processor. Asymmetry means that the sub-problems are of different sizes, that is, the computing time required for different sub-problems is inconsistent. In the field of brain-like simulation, the simulation tasks of multiple neurons will be assigned to multiple processors for parallel computing. Due to the differences in the biological properties of different neurons, such as inconsistent morphology and size, these differences will lead to differences in the amount of computing, and then to inconsistent computing time.

[0003] For asymmetric computing tasks, the simplest way to deal with it is to directly assign the subtasks to each processor in order according to the task number. However, because the sizes of each subtask are different, this approach can easily cause uneven distribution of computing tasks, and the processor with the largest amount of computing will slow down the overall computing progress. The optimized approach is to first calculate the size of all individual subtasks, and then, based on the size of the subtasks, distribute the subtasks to each processor as evenly as possible. In the field of brain-like simulation, if neurons are evenly distributed to multiple processors in sequence, the processor with the largest amount of neuron computing will slow down the overall running time. The optimized approach is to first obtain the computing amount of each neuron, such as the number of compartments of each neuron, because the number of compartments and the complexity of the neuron are proportional to the computing amount, which can be used as the evaluation standard of the computing amount. Next, based on the principle of balanced total compartments, neurons are assigned to each processor. It should be noted that if other attributes of neurons have a greater impact on the computing amount, other attributes can also be added as the basis for evaluating the computing amount.

[0004] However, in the prior art, when each processor independently calculates the size of all subtasks, repeated calculation operations will occur. Since the computational scale of parallel computing is often very large and the number of sub-problems is very large, repeated calculation operations will greatly increase the time cost. In the field of brain-like simulation, for a simulation task involving 200,000 neurons, the time cost for the processor to obtain the number of a neuron compartment is about 0.01 seconds to 0.1 seconds. If each processor independently obtains the number of compartments of all neurons, the time cost for this item alone will be as long as tens of minutes or even hours, which is inefficient. Summary of the invention

[0005] The present invention proposes a parallel computing task division method for brain-like simulation, aiming to solve the problem that when processing asymmetric subtasks, the processor with the largest amount of calculation will slow down the overall calculation progress and have low efficiency due to the unbalanced distribution of factor tasks.

[0006] In a first aspect, the present invention provides a method for dividing parallel computing tasks for brain-like simulation, comprising: obtaining a number of asymmetric tasks; calculating the task size of the asymmetric tasks in parallel through at least two processors among all processors; and allocating the asymmetric tasks to corresponding processors among all processors according to the task size of the asymmetric tasks, so that the processors process the corresponding asymmetric tasks.

[0007] Preferably, the task size of the asymmetric task is calculated in parallel by at least two processors among all the processors, including: obtaining the number of processors to be calculated in parallel; dividing the asymmetric task into multiple asymmetric task groups according to the number of processors to be calculated in parallel; allocating the asymmetric task group to the corresponding processors to be calculated in parallel, so that the processor calculates the task size of each asymmetric task in its corresponding asymmetric task group.

[0008] Preferably, the asymmetric task is divided into multiple asymmetric task groups according to the number of processors to be calculated in parallel, including: determining the number of asymmetric task groups according to the number of processors to be calculated in parallel; determining the ratio of the number of asymmetric tasks to the number of asymmetric task groups according to the number of asymmetric task groups and the number of asymmetric tasks; and dividing the asymmetric task evenly into multiple asymmetric task groups according to the ratio.

[0009] Preferably, according to the task size of the asymmetric task, the asymmetric task is allocated to the corresponding processor among all processors, including: for each processor among all processors, sequentially obtaining an asymmetric task carrying a task number and a task size; taking out the first element from the priority queue pre-built by the processor; calculating the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determining the new subtask size, and forming a new first element; according to the processor number carried by the first element, determining whether the processor is the processor to be processed; if so, assigning the asymmetric task to the processor and updating the new first element to the end of the priority queue; if not, updating the new first element to the end of the priority queue until all asymmetric tasks are allocated.

[0010] Preferably, according to the task size of the asymmetric task, the asymmetric task is allocated to the corresponding processor among all processors, including: sequentially obtaining the task size of the asymmetric task carrying the task number and the task size; taking out the first element from a pre-built priority queue; calculating the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determining the new subtask size, and forming a new first element; according to the processor number carried by the first element, determining the processor to be processed among all processors; allocating the asymmetric task to the processor to be processed, and updating the new first element to the end of the priority queue until all asymmetric tasks are allocated.

[0011] Preferably, allocating the asymmetric task to the processor to be processed includes: adding the task number of the asymmetric task to a task queue pre-created in the processor to be processed.

[0012] Preferably, after calculating the task size of the asymmetric task in parallel by at least two processors among all the processors, the method further comprises: adding the task number and the task size of the asymmetric task to a pre-created shared memory.

[0013] On the other hand, the present invention provides a device for processing asymmetric tasks, including: an acquisition module for acquiring a plurality of asymmetric tasks; a calculation module for calculating the task size of the asymmetric tasks in parallel through at least two processors among all processors; and a processing module for allocating the asymmetric tasks to corresponding processors among all processors according to the task size of the asymmetric tasks, so that the processors process the corresponding asymmetric tasks.

[0014] Yet another aspect of the present invention provides an electronic device, comprising a processor and a memory, wherein the memory stores a plurality of instructions, and the processor is used to read the instructions and execute the method of the first aspect.

[0015] Another aspect of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a plurality of instructions, and the plurality of instructions can be read by a processor to execute the method of the first aspect.

[0016] The beneficial effects of the present invention are as follows: for asymmetric tasks, the parallel computing task division method for brain-like simulation provided by the present invention calculates the task size of the asymmetric task in parallel by multiple processors among all processors, and strategically distributes the asymmetric task to each processor among all processors according to the task size of the asymmetric task, so that the total amount of tasks on each processor remains relatively balanced, which can greatly improve the overall efficiency of processing asymmetric tasks and shorten the overall processing time. In addition, when calculating the task size of the asymmetric task, multiple processors among all processors are used for parallel calculation, that is, the calculation task of calculating the asymmetric task size is distributed to each processor among all processors for parallel calculation, which can increase the calculation efficiency exponentially. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a flow chart of a method for processing an asymmetric task of the present invention.

[0018] Figure 2 It is a structural schematic diagram of an asymmetric task processing device of the present invention. DETAILED DESCRIPTION

[0019] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0020] The method provided by the present invention can be implemented in the following terminal environment, and the terminal may include one or more of the following components: a processor, a memory, and a display screen. The memory stores at least one instruction, and the instruction is loaded and executed by the processor to implement the method described in the following embodiment.

[0021] The processor may include one or more processing cores. The processor uses various interfaces and lines to connect various parts of the entire terminal, and executes various functions of the terminal and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory, and calling data stored in the memory.

[0022] The memory may include random access memory (RAM) or read-only memory (ROM). The memory may be used to store instructions, programs, codes, code sets or instructions.

[0023] The display screen is used to display the user interface of each application.

[0024] In addition, those skilled in the art can understand that the structure of the above terminal does not constitute a limitation on the terminal, and the terminal may include more or fewer components, or combine certain components, or arrange the components differently. For example, the terminal also includes components such as a radio frequency circuit, an input unit, a sensor, an audio circuit, and a power supply, which will not be described in detail here.

[0025] Embodiment 1

[0026] like Figure 1 As shown, the first aspect of the present invention provides a method for processing asymmetric tasks, which is applied to the field of brain-like simulation, and specifically includes: obtaining a number of asymmetric tasks; calculating the task size of the asymmetric tasks in parallel through at least two processors among all processors; and according to the task size of the asymmetric tasks, allocating the asymmetric tasks to corresponding processors among all processors, so that the processors process the corresponding asymmetric tasks.

[0027] Specifically, step S101 is to obtain several asymmetric tasks.

[0028] In practical applications, in order to improve the processing speed and efficiency of tasks and shorten the processing time of tasks, the task to be solved is usually decomposed into several subtasks. Therefore, in an embodiment of the present invention, in the process of processing asymmetric tasks, several asymmetric tasks are usually obtained.

[0029] It should be noted here that “several” can mean one or more, which can be determined according to the actual situation; an asymmetric task refers to a task to be solved being decomposed into several subtasks of inconsistent sizes, that is, the computing time required for different subtasks is inconsistent.

[0030] Step S102: using at least two processors among all processors to calculate the task size of the asymmetric task in parallel.

[0031] Since the prior art distributes subtasks to each processor in order according to their task numbers, and does not calculate the sizes of the subtasks, this will cause uneven distribution of the subtasks. Therefore, in order to solve this problem, the embodiments of the present invention calculate the sizes of several asymmetric subtasks obtained.

[0032] Furthermore, if the sizes of all asymmetric subtasks are calculated by one processor, the task processing time will inevitably be prolonged in the face of a huge number of asymmetric tasks. Therefore, in an embodiment of the present invention, in order to improve the overall efficiency of processing asymmetric tasks and shorten the overall processing time, when calculating the size of asymmetric subtasks, the embodiment of the present invention can specifically calculate the task size of the asymmetric task in parallel through at least two processors among all processors.

[0033] It should be noted here that parallel computing refers to assigning asymmetric subtasks to multiple processors, and multiple processors calculate the assigned asymmetric subtasks at the same time. Compared with the time it takes to calculate the size of all asymmetric subtasks by one processor, the time for overall task processing can be greatly shortened, and the overall efficiency of task processing can be improved. Assuming that the time it takes for a processor to calculate the size of all asymmetric subtasks is T, and the number of processors is M, in the scheme of the embodiment of the present invention, the time it takes for a processor to run T can be reduced to T / M for each processor to run, and the overall running time is reduced by T times.

[0034] It should be noted here that the at least two processors among all the processors may be all the processors or a part of all the processors, and no specific limitation is made here.

[0035] In addition, in an embodiment of the present invention, the more processors participate in the parallel calculation of asymmetric task sizes, the shorter the time for calculating the task sizes of all asymmetric tasks. That is, the processing time for all processors to participate in the parallel calculation of the task sizes of asymmetric tasks is shorter than the processing time for using some processors to parallel calculate the task sizes of asymmetric tasks.

[0036] Furthermore, the embodiment of the present invention provides a specific implementation method of calculating the task size of an asymmetric task in parallel by at least two processors among all processors, which is as follows:

[0037] Obtain the number of processors to be calculated in parallel; divide the asymmetric tasks into multiple asymmetric task groups according to the number of processors to be calculated in parallel; assign the asymmetric task groups to the corresponding processors to be calculated in parallel, so that the processors calculate the task size of each asymmetric task in their corresponding asymmetric task groups.

[0038] It should be noted here that the asymmetric task is divided into multiple asymmetric task groups according to the number of processors to be calculated in parallel. Specifically, the number of asymmetric task groups can be determined according to the number of processors to be calculated in parallel; the ratio of the number of asymmetric tasks to the number of asymmetric task groups can be determined according to the number of asymmetric task groups and the number of asymmetric tasks; and the asymmetric task is evenly divided into multiple asymmetric task groups according to the ratio. This ensures that asymmetric tasks can be evenly distributed to each processor, so that the amount of tasks on each processor is roughly the same, and the calculation progress of the task size of the entire asymmetric task will not be slowed down due to too many tasks on a certain processor.

[0039] For example, suppose there are Np asymmetric subtasks, the task number of each asymmetric subtask is Ni, i∈[0, Np-1], the task size of the corresponding asymmetric subtask is Nsi, and the time overhead of calculating each Nsi size is Nsti. The number of processors is M, and each processor is represented by Mj, j∈[0, M-1], where j is the processor number.

[0040] Obtain the number M of processors to be calculated in parallel, determine the number of asymmetric task groups as M according to the number of processors M, determine the ratio of the number of asymmetric tasks to the number of asymmetric task groups as Np / M according to the number of asymmetric task groups M and the number of asymmetric tasks Np, and divide the Np asymmetric tasks into M asymmetric task groups evenly according to the ratio Np / M. In other words, linearly divide the Np asymmetric subtasks into M asymmetric task groups, each asymmetric task group contains Np / M asymmetric subtasks, each asymmetric task group is denoted as Npmj, the asymmetric subtasks in each Npmj are numbered i∈[Np / M*j, Np / M*(j+1)], distribute Npmj to each processor Mj, and each processor calculates the size of the corresponding Np / M asymmetric subtasks respectively.

[0041] It should be noted here that the calculation time of each processor is sum(Nsti), the range of i is [Np / M*j, Np / M*(j+1)], denoted as Mstj, j is the processor number, and the overall running time here is T=max(Mstj), j∈[0, M-1], that is, the processor with the longest calculation subtask time.

[0042] Furthermore, in the process of executing the subsequent allocation of asymmetric tasks, since each processor needs to use the calculated asymmetric task size, in an embodiment of the present invention, a shared memory can be created in advance, and the task size and task number of the asymmetric task calculated in step S102 can be added to it. For example, the root processor constructs a shared memory SHM with a length of Np, which is used to store the size of each asymmetric subtask. The subscript of the shared memory is i, i∈[0, Np-1], which is consistent with the asymmetric subtask subscript. Each storage unit is denoted as SHMi, and each storage unit stores two pieces of information, the number Ni of the asymmetric subtask and the task size Nsi. Subsequently, each processor writes the task number Ni of the asymmetric subtask allocated in step S102 and the calculated task size Nsi of the asymmetric subtask into the SHMi on the root processor.

[0043] Step S103: allocating the asymmetric task to a corresponding processor among all processors according to the task size of the asymmetric task, so that the processor processes the corresponding asymmetric task.

[0044] After the embodiment of the present invention calculates the task sizes of all asymmetric tasks in parallel, it can strategically allocate them according to the task sizes of all asymmetric tasks, so that each processor in all processors can be evenly allocated to asymmetric tasks, and then the asymmetric tasks can be processed accordingly.

[0045] The embodiment of the present invention provides two specific implementation methods for allocating the asymmetric tasks to corresponding processors among all processors according to the task sizes of the asymmetric tasks, which are as follows:

[0046] The first implementation method: for each processor among all processors, sequentially obtain an asymmetric task carrying a task number and a task size; take out the first element from the priority queue pre-built for the processor; calculate the sum of the subtask size carried by the first element and the task size of the asymmetric task obtained, determine the new subtask size, and form a new first element; based on the processor number carried by the first element, determine whether the processor is the processor to be processed; if so, assign the asymmetric task to the processor and update the new first element to the end of the priority queue; if not, update the new first element to the end of the priority queue until all asymmetric tasks are assigned.

[0047] It should be noted that the sequential acquisition of the asymmetric task carrying the task number and the task size can be acquired in the storage order, or in the order of the task number, or in a pre-set order. The specific order can be determined according to the actual situation, and will not be described in detail here. In addition, the asymmetric task carrying the task number and the task size can be acquired from the pre-created shared memory.

[0048] It should also be noted here that if you want to evenly distribute asymmetric tasks to each processor among all processors according to the task size of the asymmetric tasks, you need to determine which processor has the smallest task volume after obtaining an asymmetric task, and the priority queue can achieve this goal. Therefore, the embodiment of the present invention adopts a priority queue to evenly distribute asymmetric tasks to each processor according to the task size of the asymmetric tasks.

[0049] In addition, each of all processors needs to independently build its own priority queue, which adopts a little-endian queue, that is, small values ​​are placed in front, which can ensure that the first element taken out each time is the processor with the smallest total task. Each processor needs to execute the steps in the first implementation method.

[0050] Continuing with the above example, first, each processor among all processors independently builds its own priority queue, denoted as Q, and sequentially pushes M data pairs (Msk, Mk) into Q, k∈[0, M-1], where Mk corresponds to each processor and Msk represents the sum of the subtask sizes that have been assigned to the Mkth processor. The priority queue uses a little-endian queue, that is, the smaller the value, the priority of sorting Msk>Mk, that is, the smaller Msk is in the front, and the same Msk, the smaller Mk is in the front, which means that the first element of the queue taken out each time is the processor with the smallest total task.

[0051] For each processor among all processors, SHMi is taken out from the shared memory, at this time i=0, the SHMi carries the task number and task size, and the first element is taken out from the priority queue pre-built by the processor, denoted as H1, and the sum of the subtask size Msk carried by the first element H1 and the task size Nsi of the obtained asymmetric task is calculated to determine the new subtask size and form a new first element H1'. According to the processor number Mj carried by the first element H1, it is determined whether the processor is the processor to be processed; if so, the asymmetric task is assigned to the processor, and the new first element H1' is updated to the end of the priority queue Q, if not, the new first element H1' is updated to the end of the priority queue Q. Continue to take out SHMi from the shared memory, at this time i=1, the SHMi carries the task number and task size, take out the first element from the priority queue pre-built by the processor, record it as H2, calculate the sum of the subtask size Msk carried by the first element H2 and the task size Nsi of the obtained asymmetric task, determine the new subtask size, form a new first element H2', and determine whether the processor is the processor to be processed according to the processor number Mj carried by the first element H2; if so, assign the asymmetric task to the processor, and update the new first element H2' to the end of the priority queue Q, if not, update the new first element H2' to the end of the priority queue Q. Repeat the above steps until all asymmetric tasks are assigned and the loop stops.

[0052] The second implementation method is: sequentially obtain the task size of an asymmetric task carrying a task number and a task size; take out the first element from a pre-constructed priority queue; calculate the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determine the new subtask size, and form a new first element; determine the processor to be processed among all processors according to the processor number carried by the first element; assign the asymmetric task to the processor to be processed, and update the new first element to the end of the priority queue until all asymmetric tasks are assigned.

[0053] It should be noted here that the difference between the second implementation and the first implementation is that in the first implementation, each processor among all processors will independently build its own priority queue, and each processor obtains the asymmetric subtasks that need to be processed by each processor by executing the steps in the first implementation, while the second implementation uses the root processor among all processors as the allocation processor, which executes the above steps to allocate the asymmetric subtasks to other processors, and other processors do not need to execute the above steps.

[0054] Through the above method, for asymmetric tasks, the present invention calculates the task size of the asymmetric task in parallel through multiple processors among all processors, and strategically distributes the asymmetric task to each processor among all processors according to the task size of the asymmetric task, so that the total amount of tasks on each processor remains relatively balanced, which can greatly improve the overall efficiency of processing asymmetric tasks and shorten the overall processing time. In addition, when calculating the task size of the asymmetric task, multiple processors among all processors are used for parallel calculation, that is, the calculation of the asymmetric task size is distributed to each processor among all processors for parallel calculation, which can increase the calculation efficiency by multiples.

[0055] Furthermore, in an embodiment of the present invention, the asymmetric task is assigned to the processor to be processed. Specifically, each processor independently creates an empty task queue, and adds the task number of the asymmetric task to the pre-created task queue in the processor to be processed.

[0056] Embodiment 2

[0057] Another aspect of the present invention also includes a functional module architecture that is completely consistent with the asymmetric task processing method of the aforementioned embodiment 1, that is, an asymmetric task processing device, such as Figure 2 As shown, it includes: an acquisition module 201, used to acquire a number of asymmetric tasks; a calculation module 202, used to calculate the task size of the asymmetric task in parallel through at least two processors among all processors; a processing module 203, used to distribute the asymmetric task to the corresponding processor among all processors according to the task size of the asymmetric task, so that the processor processes the corresponding asymmetric task.

[0058] The computing module 202 is specifically used to obtain the number of processors to be calculated in parallel; divide the asymmetric task into multiple asymmetric task groups according to the number of processors to be calculated in parallel; assign the asymmetric task group to the corresponding processors to be calculated in parallel, so that the processor calculates the task size of each asymmetric task in its corresponding asymmetric task group.

[0059] The computing module 202 is also used to determine the number of asymmetric task groups according to the number of processors to be calculated in parallel; determine the ratio of the number of asymmetric tasks to the number of asymmetric task groups according to the number of asymmetric task groups and the number of asymmetric tasks; and divide the asymmetric tasks evenly into multiple asymmetric task groups according to the ratio.

[0060] The processing module 203 is specifically used to, for each processor among all processors, sequentially obtain an asymmetric task carrying a task number and a task size; take out the first element from the priority queue pre-built by the processor; calculate the sum of the subtask size carried by the first element and the task size of the asymmetric task obtained, determine the new subtask size, and form a new first element; determine whether the processor is the processor to be processed based on the processor number carried by the first element; if so, assign the asymmetric task to the processor and update the new first element to the end of the priority queue; if not, update the new first element to the end of the priority queue until all asymmetric tasks are assigned.

[0061] The processing module 203 is specifically used to sequentially obtain the task size of an asymmetric task carrying a task number and a task size; take out the first element from a pre-constructed priority queue; calculate the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determine the new subtask size, and form a new first element; determine the processor to be processed among all processors according to the processor number carried by the first element; assign the asymmetric task to the processor to be processed, and update the new first element to the end of the priority queue until all asymmetric tasks are assigned.

[0062] The processing module 203 is further configured to add the task number of the asymmetric task to a task queue pre-created in the processor to be processed.

[0063] After the calculation module 202 calculates the task size of the asymmetric task in parallel through at least two processors among all the processors, the device further includes: a sharing module 204, which is used to add the task number and task size of the asymmetric task to a pre-created shared memory.

[0064] The device can be implemented by the asymmetric task processing method provided in the above-mentioned embodiment 1. The specific implementation method can be found in the description of embodiment 1, which will not be repeated here.

[0065] Embodiment 3

[0066] The present invention also provides an electronic device, including a processor and a memory, wherein the memory stores a plurality of instructions, and the processor is used to read the instructions and execute any one of the methods in the foregoing embodiment one. The processor and the memory can be connected via a bus or other means, taking the bus connection as an example. The processor can be a central processing unit (CPU). The processor can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components and other chips, or a combination of the above-mentioned various chips.

[0067] As a non-transitory computer-readable storage medium, the memory can be used to store non-transitory software programs, non-transitory computer executable programs and modules, such as program instructions / modules corresponding to the asymmetric task processing method in the embodiment of the present application. The processor executes various functional applications and data processing of the processor by running the non-transitory software programs, instructions and modules stored in the memory, that is, implementing the method in the above method embodiment.

[0068] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the processor, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0069] Embodiment 4

[0070] The present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a plurality of instructions, wherein the instructions can be loaded and executed by the processor, so that the processor can execute any one of the methods in Embodiment 1. The computer-readable storage medium can be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field.

[0071] Although preferred embodiments of the present invention have been described, additional changes and modifications may be made to these embodiments by those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention. Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A parallel computing task division method for brain-like simulation, characterized in that: include: Get several asymmetric tasks; calculating the task size of the asymmetric task in parallel by at least two processors among all the processors; According to the task size of the asymmetric task, the asymmetric task is allocated to the corresponding processor among all processors, so that the processor processes the corresponding asymmetric task; including: for each processor among all processors, an asymmetric task carrying a task number and a task size is obtained in sequence; the first element is taken out from the priority queue pre-built by the processor; the sum of the subtask size carried by the first element and the task size of the asymmetric task obtained is calculated, and the new subtask size is determined to form a new first element; according to the processor number carried by the first element, it is determined whether the processor is the processor to be processed; if so, the asymmetric task is allocated to the processor, and the new first element is updated to the priority queue The end of the queue, if not, updating the new first element to the end of the priority queue until all asymmetric tasks are assigned; or including: sequentially obtaining the task size of an asymmetric task carrying a task number and a task size; taking the first element from a pre-built priority queue; calculating the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determining the new subtask size, and forming a new first element; according to the processor number carried by the first element, determining the processor to be processed among all processors; assigning the asymmetric task to the processor to be processed, and updating the new first element to the end of the priority queue until all asymmetric tasks are assigned.

2. The method according to claim 1, characterized in that: The task size of the asymmetric task is calculated in parallel by at least two processors among all the processors, including: Get the number of processors to be parallelized; Dividing the asymmetric task into a plurality of asymmetric task groups according to the number of processors to be calculated in parallel; The asymmetric task group is allocated to the corresponding processor to be parallel-computed, so that the processor calculates the task size of each asymmetric task in the corresponding asymmetric task group.

3. The method according to claim 2, characterized in that According to the number of processors to be parallel-computed, the asymmetric task is divided into a plurality of asymmetric task groups, including: Determining the number of the asymmetric task groups according to the number of the processors to be parallel calculated; Determining a ratio of the number of the asymmetric tasks to the number of the asymmetric task groups according to the number of the asymmetric task groups and the number of the asymmetric tasks; The asymmetric tasks are evenly divided into a plurality of asymmetric task groups according to the ratio.

4. The method according to claim 1, characterized in that: Allocating the asymmetric task to a processor to be processed includes: The task number of the asymmetric task is added to a task queue pre-created in the processor to be processed.

5. The method according to claim 1, characterized in that After calculating the task size of the asymmetric task in parallel by at least two processors among all the processors, the method further includes: The task number and task size of the asymmetric task are added to the pre-created shared memory.

6. A device for processing asymmetric tasks, characterized in that: include: An acquisition module, used to acquire several asymmetric tasks; A calculation module, used for calculating the task size of the asymmetric task in parallel by at least two processors among all the processors; A processing module is used to allocate the asymmetric task to the corresponding processor among all processors according to the task size of the asymmetric task, so that the processor processes the corresponding asymmetric task; including: for each processor among all processors, sequentially obtain an asymmetric task carrying a task number and a task size; take out the first element from the priority queue pre-built by the processor; calculate the sum of the subtask size carried by the first element and the task size of the asymmetric task obtained, determine the new subtask size, and form a new first element; determine whether the processor is the processor to be processed according to the processor number carried by the first element; if so, allocate the asymmetric task to the processor, and update the new first element to The end of the priority queue, if not, updating the new first element to the end of the priority queue until all asymmetric tasks are assigned; or including: sequentially obtaining the task size of an asymmetric task carrying a task number and a task size; taking the first element from a pre-built priority queue; calculating the sum of the subtask size carried by the first element and the obtained task size of the asymmetric task, determining the new subtask size, and forming a new first element; according to the processor number carried by the first element, determining the processor to be processed among all processors; assigning the asymmetric task to the processor to be processed, and updating the new first element to the end of the priority queue until all asymmetric tasks are assigned.

7. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a plurality of instructions, and the processor is used to read the instructions and execute the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a plurality of instructions, and the plurality of instructions can be read by a processor to execute the method according to any one of claims 1 to 5.

Citation Information

Patent Citations

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    CN112130977A