A synchronous phase-locked loop based on a collaborative filter

Abstract

The present invention provides a synchronous phase-locked loop based on a collaborative filter, belonging to the technical field related to the detection and extraction of grid voltage phase signals. Aiming at the problem that conventional phase-locked loops cannot accurately lock the phase due to the influence of distorted voltages under harsh grid conditions, the present invention proposes a synchronous phase-locked loop based on a collaborative filter. To enhance the stability of the phase-locked loop, the present invention designs a new type of generalized integrator with a function of eliminating DC offset voltage, and constructs a double new type of generalized integrator with a function of eliminating DC offset voltage therefrom. At the same time, a comb filter capable of suppressing grid harmonic disturbances is introduced, and the designed double new type of generalized integrator with a function of eliminating DC offset voltage and the comb filter are combined to form a collaborative filter and incorporated into a three-phase grid-connected phase-locked loop to achieve the goal of quickly and accurately obtaining the grid phase under harsh grid conditions. The present invention is mainly used in the grid-connected synchronization process under harsh grid conditions.

Description

Technical Field

[0001] The present invention belongs to the technical field related to the detection and extraction of grid voltage phase signals, and particularly relates to a synchronous phase-locked loop based on a collaborative filter. Background Art

[0002] Currently, renewable energy can be connected through a grid-connected system and provide complete power output for various regions, and is mainly regarded as an energy solution for remote areas or an emergency alternative energy source. These energies are not only regarded as an important solution to improve the availability of the earth's energy, but also as a reliable means to address current problems such as climate change and greenhouse gas emissions. According to the development of modern power system regulations and the latest control systems, grid-connected converters and their control algorithms must be equipped with advanced functions to allow them to operate under any grid conditions.

[0003] To complete this task, the grid-connected converter control system is divided into three main modules: an external control loop module responsible for regulating the exchanged active / reactive power, an internal control loop module for current, and a synchronization module. Among them, the synchronization module is responsible for instantaneously extracting information related to the phase angle and frequency of the grid voltage, which is crucial for the accurate operation of the control loop. During severe grid disturbances, it is found that the interconnection between the grid-connected converter and related equipment is incompatible, indicating that it does not adopt a synchronization technology supported by a well-designed control strategy. The phase-locked loop synchronization technology is considered an essential process for detecting the phase, amplitude, and frequency of the grid voltage in a fast and accurate manner. In order to ensure the stable operation of the grid-connected converter under severe grid disturbances such as DC offset and harmonics, it is necessary to further design a phase-locked loop with higher reliability, stronger stability, and better anti-interference ability. Summary of the Invention

[0004] The purpose of the present invention is to solve the deficiencies of the above technologies and provide a synchronous phase-locked loop based on a collaborative filter.

[0005] To achieve the above purpose, the technical solution provided by the present invention is as follows:

[0006] The present invention proposes a synchronous phase-locked loop based on a collaborative filter, and the synchronous phase-locked loop based on a collaborative filter is composed of a Clarke transformation unit for three-phase grid voltage, a collaborative filter, a proportional controller k p , and an integral link 1 / s.

[0007] The three-phase grid voltage v abc is connected to the input end of the coordinate transformation unit, the output end of the coordinate transformation unit is connected to the input end of the collaborative filter, the output end of the collaborative filter is connected to the input end of the arctangent operation unit, and the output end of the arctangent operation unit is connected to the input end of the proportional controller k p of, the proportional controller kp The output signal and natural frequency ω ff After adding, it is input to the input end of the integral link 1 / s, and the output end of the integral link 1 / s outputs the phase estimation value The output of the integral link 1 / s is connected to the input of the coordinate transformation unit, and the output of the integral link 1 / s is added to the output of the inverse tangent operation unit to output the phase-locked result.

[0008] The collaborative filter is composed of a dual new generalized integrator (DNGI-WDC) with DC offset cancellation function and a comb filter (CF). The two need to work together to complete the filtering effect. The dual new generalized integrator (DNGI-WDC) with DC offset cancellation function can suppress the DC offset voltage in the non-ideal grid voltage, and the comb filter (CF) can suppress the various harmonic voltages in the non-ideal grid voltage.

[0009] The dual novel generalized integrator with DC offset cancellation function (DNGI-WDC) is composed of two novel generalized integrators with DC offset cancellation function (NGI-WDC) through an interleaved structure. The transfer function formula in the stationary coordinate system is:

[0010]

[0011] Where, is the resonant frequency, s represents the s domain, ξ is usually 0.7, and k is 3.

[0012] The dual new generalized integrator with DC offset cancellation (DNGI-WDC) can eliminate the DC offset voltage of the three-phase grid voltage in the stationary coordinate system, and can also fully extract the fundamental positive sequence voltage and eliminate the fundamental negative sequence voltage;

[0013] The novel generalized integrator with DC offset cancellation function (NGI-WDC) is composed of two integrators, three adders, four multipliers, a divider and three constant ratio controllers. Its transfer function formula is:

[0014] and

[0015]

[0016] Where u is the input of the new generalized integrator with DC offset cancellation (NGI-WDC), v a and v b They are the two outputs of the new generalized integrator with DC offset cancellation (NGI-WDC);

[0017] The s-domain transfer function of the collaborative filter can be obtained by the collaborative combination of the transfer function of the dual new generalized integrator with DC offset cancellation function (DNGI-WDC) in the rotating coordinate system and the comb filter (CF). The formula of its transfer function is

[0018]

[0019] In the formula, is the resonant frequency, s represents the s-domain, the value of ξ is taken as 0.7, k is taken as 3, n is taken as 1, and T w is taken as 0.0033 seconds.

[0020] The collaborative type can eliminate the DC offset voltage and harmonic voltage that have a greater impact on the phase-locked loop under non-ideal power grids, and then realize the function of accurately tracking the phases of the three-phase power grid.

[0021] Advantages of the present invention:

[0022] A synchronous phase-locked loop based on a collaborative filter proposed by the present invention can optimize the resistance ability of the phase-locked loop to power grid disturbance factors under harsh power grid conditions, and at the same time can also increase the phase locking accuracy of the phase-locked loop under harsh power grid conditions. Compared with other phase-locking methods, the invention has the advantages of short dynamic adjustment time when dealing with power grid changes and strong anti-disturbance ability. Description of the Drawings

[0023] Figure 1 is the structural diagram of the new generalized integrator with DC offset cancellation function (NGI-WDC) provided by the present invention;

[0024] Figure 2 is the Bode diagram of the transfer function of the new generalized integrator with DC offset cancellation function (NGI-WDC) provided by the present invention;

[0025] Figure 3 is the structural diagram of the dual new generalized integrator with DC offset cancellation function (DNGI-WDC) provided by the present invention;

[0026] Figure 4 is the Bode diagram of the transfer function of the dual new generalized integrator with DC offset cancellation function (DNGI-WDC) provided by the present invention;

[0027] Figure 5 is the Bode diagram of the transfer function of the dual new generalized integrator with DC offset cancellation function (dqDNGI-WDC) in the dq coordinate system provided by the present invention;

[0028] Figure 6 is the Bode diagram of the transfer function of the comb filter (CF) provided by the present invention;

[0029] Figure 7 The structural diagram of the synchronous phase-locked loop based on the collaborative filter provided by the present invention;

[0030] Figure 8 The transfer function Bode plot of the collaborative filter provided by the present invention;

[0031] Figure 9 The phase error diagram when the grid voltage has a +6Hz frequency mutation in the embodiment of the present invention;

[0032] Figure 10 The frequency estimation diagram when the grid voltage has a +6Hz frequency mutation in the embodiment of the present invention;

[0033] Figure 11 The phase error diagram when harmonic voltage is added to the grid voltage and a 35° phase jump occurs in the embodiment of the present invention;

[0034] Figure 12 The frequency estimation diagram when harmonic voltage is added to the grid voltage and a 35° phase jump occurs in the embodiment of the present invention;

[0035] Figure 13 The phase error diagram when two-phase voltage of the grid drops by 50% in the embodiment of the present invention;

[0036] Figure 14 The frequency estimation diagram when two-phase voltage of the grid drops by 50% in the embodiment of the present invention. Detailed implementation manners

[0037] To make the technical problems solved by the present invention, the technical solutions adopted and the achieved technical effects clearer, the present invention will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the convenience of description, only parts related to the present invention are shown in the drawings rather than all the content.

[0038] Aiming at the problem that the ordinary phase-locked loop has poor anti-grid disturbance ability and is vulnerable to harmonic and DC offset voltage under harsh grid conditions, a synchronous phase-locked loop based on a collaborative filter is proposed.

[0039] The implementation principle of the present invention:

[0040] The synchronous phase-locked loop based on the collaborative filter consists of a Clarke transformation unit for three-phase grid voltage, a collaborative filter, a proportional controller k p and an integral link 1 / s.

[0041] Three-phase grid voltage v abcThe input end of the coordinate transformation unit is connected to the output end of the coordinate transformation unit, the output end of the coordinate transformation unit is connected to the input end of the collaborative filter, the output end of the collaborative filter is connected to the input end of the inverse tangent operation unit, and the output end of the inverse tangent operation unit is connected to the proportional controller k p The input of the proportional controller k p The output signal and natural frequency ω ff After adding, it is input to the input end of the integral link 1 / s, and the output end of the integral link 1 / s outputs the phase estimation value The output of the integral link 1 / s is connected to the input of the coordinate transformation unit, and the output of the integral link 1 / s is added to the output of the inverse tangent operation unit to output the phase-locked result.

[0042] When the grid voltage is in a bad condition, the ordinary three-phase grid-connected phase-locked loop cannot fully suppress the disturbance factors in the grid, and is easily affected by the harmonics of the input voltage and the DC offset voltage, making it difficult to complete the conventional phase-locked function. In order to overcome the above problems under the condition that the grid contains strong disturbance interference, the present invention proposes a synchronous phase-locked loop based on a collaborative filter. First, a new generalized integrator (NGI-WDC) with a DC offset elimination function is proposed, and a dual new generalized integrator (DNGI-WDC) with a DC offset elimination function is constructed and designed. At the same time, the DNGI-WDC is combined with a comb filter (CF) filter to form a collaborative filter, and a new three-phase grid-connected phase-locked loop is designed based on the collaborative filter to achieve the purpose of precise phase locking under bad grid voltage. The specific implementation steps are as follows:

[0043] 1) Implementation of a new generalized integrator with DC offset cancellation

[0044] In order to eliminate the influence of DC offset voltage when a single-phase power grid contains mixed DC and thus accurately obtain the phase information of the power grid, the present invention proposes a new generalized integrator (NGI-WDC) with DC offset elimination function. The structure of the new generalized integrator is as follows: Figure 1 shown.

[0045] Figure 1 Where u is the input signal, v a 、v b . They are two output signals respectively. is the frequency estimation signal, ξ is the damping coefficient, and k is the gain value. Figure 1 The transfer function of NGI-WDC can be derived as follows:

[0046]

[0047]

[0048] where k can take the value of 3 and ξ takes the value of 0.7. At this time, G a (s) and G b (s) are shown in the Bode plot as Figure 2 follows. From Figure 2 and equations (1) and (2), it can be seen that the magnitude curve of G a (s) can be regarded as a second-order band-pass filter, and the magnitude curve of G b (s) can be regarded as a second-order high-pass filter. The magnitudes of G a (s) and G b (s) on the 0 Hz axis are both less than -30 dB, indicating that in a single-phase system, their combination can filter out the DC offset component. Therefore, NGI-WDC has the function of filtering out the DC offset voltage.

[0049] 2) Implementation of a dual novel generalized integrator with DC offset cancellation function

[0050] Since NGI-WDC can only be applied in a single-phase system, in order to make it applicable to a three-phase phase-locked loop system. In the application of a three-phase grid-connected system, the phase-locked loop usually uses a filtering link with two filters combined with a fundamental positive-sequence calculator to extract the fundamental positive-sequence component of the grid voltage. In the present invention, two NGI-WDC structures are used in combination with the fundamental positive-sequence calculator to form the dual novel generalized integrator with DC offset cancellation function (DNGI-WDC) proposed in the present invention. While extracting the fundamental positive-sequence component, DNGI-WDC can eliminate the fundamental negative-sequence component.

[0051] The structural diagram of the proposed DNGI-WDC is as shown in Figure 3 follows, and the mathematical relationship of DNGI-WDC is as follows

[0052]

[0053] where v α , v β are the voltage signals in the αβ coordinate system obtained after the three-phase voltage undergoes abc-αβ coordinate transformation. The and obtained after DNGI-WDC filtering, after passing through the fundamental positive-sequence calculator (PSC), output signals and that only contain the positive-sequence component of the voltage. According to the complex variable filter method, the DNGI-WDC filtering link in the αβ coordinate system can be written in the form of a complex variable transfer function

[0054]

[0055] where

[0056] [[ID=5�]]

[0057]

[0058] When k takes 3, the Bode plot of DNGI-WDC(s) is as Figure 4 shown.

[0059] Observation Figure 4 shows that in the αβ coordinate system, the amplification factor value of DNGI-WDC(s) at -50 Hz is -∞, indicating that the fundamental negative sequence component in the grid voltage can be suppressed by DNGI-WDC(s). At 50 Hz, the amplification factor of DNGI-WDC(s) is 0, and the corresponding phase is 45°. This means that DNGI-WDC can accurately extract the fundamental positive sequence component, and the 45° phase lag caused can be corrected by 45° phase compensation.

[0060] When DNGI-WDC needs to be applied to the inner loop of the phase-locked loop, it is necessary to transform DNGI-WDC into the dq coordinate system to realize dqDNGI-WDC. The transfer function of dqDNGI-WDC can be obtained by replacing s in DNGI-WDC(s), that is

[0061]

[0062] Then the Bode plot of dqDNGI-WDC is as Figure 5 shown. It can be observed from the figure that in the dq coordinate system, the amplification factor of dqDNGI-WDC at -100 Hz corresponding to the fundamental negative sequence component is -∞. Therefore, dqDNGI-WDC can also suppress the fundamental negative sequence component and can normally extract the fundamental positive and negative components.

[0063] 3) Implementation of the comb filter filtering method

[0064] To cope with the grid harmonic distortion, a comb filter (CF) is usually set in the inner loop of the phase-locked loop to eliminate multiple harmonics in the grid in the dq coordinate system. The frequency-domain transfer function of CF is

[0065]

[0066] In the present invention, the usual value of n is adopted, that is, n = 1. When T w is relatively small, Equation (8) can be approximately equivalent to a first-order inertia link, that is

[0067]

[0068] It can be seen from Equation (9) that the time constant of the CF filter is T w / 2, T wThe larger it is, the smoother the filtering is, but the longer the lag time is.

[0069] Let s = jω and substitute it into Equation (9), we get

[0070]

[0071] The amplitude-frequency characteristic of Equation (10) is

[0072]

[0073] The phase-frequency characteristic of Equation (11) is

[0074]

[0075] It can be seen from this that at the frequency points, n = 1, 2, 3..., CF presents strong attenuation notch characteristics, and does not attenuate the DC component, and the amplification factor is 0 dB. In the present invention, the time window coefficient T w is set to T / 6 = 0.0033 s, and T is the power grid period of 20 ms. Then the Bode plot of CF at this time is as Figure 6 shown.

[0076] From Figure 6 it can be seen that when T w is set to 0.0033 s, CF can filter out harmonics other than -100 Hz and -50 Hz in the dq coordinate system, that is, harmonics with frequencies such as ±300 Hz, ±600 Hz, ±900 Hz, etc.

[0077] 4) Implementation of a synchronous phase-locked loop based on a collaborative filter

[0078] In order to reduce the influence of power grid harmonics on the phase-locked loop tracking phase in a distorted environment, the present invention introduces a CF filter, cascades it with the DNGI-WDC proposed in the present invention to form a collaborative filter, and then applies this collaborative filter to the QT1-PLL, and then designs a new three-phase grid-connected phase-locked loop, the structure of which is as Figure 7 shown.

[0079] Furthermore, the mathematical expression of the transfer function of the collaborative filter in the inner loop of the phase-locked loop is

[0080]

[0081] According to formula (13), Figure 8 is the Bode plot of the proposed collaborative filter. It can be found that the collaborative filter H(s) can completely filter out the fundamental negative sequence component and main harmonic voltages such as -5th, +7th, -11th, +13th in the three-phase grid voltage. And it can directly extract the fundamental positive sequence component information of the grid voltage, indicating that it can be fully applied to the phase-locked loop under distorted conditions.

[0082] So far, the structural design of the synchronous phase-locked loop based on the collaborative filter has been completed.

[0083] The following are specific implementation cases:

[0084] To verify the performance of the phase-locked loop (PLL) proposed in the present invention, the present invention uses MATLAB / Simulink software to conduct simulation comparison experiments under three types of faults: frequency mutation, harmonic injection, and rapid voltage drop. In the simulation, the grid frequency is 50 Hz, the three-phase voltage amplitude is normalized to 1 p.u, and the sampling frequency is 10 kHz. To reflect the superiority of the PLL proposed in the present invention, two other conventional PLLs (NF-PLL and EGDSC-PLL) are introduced as comparison objects, and the control parameter kp value of the PLL proposed in the present invention is 75.

[0085] The specific implementation effects are as follows:

[0086] Figure 9 and Figure 10 are the phase error and frequency estimation diagrams when the grid voltage undergoes a +6 Hz frequency mutation in the embodiment of the present invention. From Figure 9 and Figure 10 it can be seen that the phase angle errors of these three phase-locked loops can converge to zero after experiencing a short transient process, and the frequency can also achieve accurate tracking after the transient process. The transient process of the PLL proposed in the present invention is relatively fast, and it only takes about 30 ms to converge to zero. The transient convergence time of EGDSC-PLL is the second, and the transient convergence time of NF-PLL is the slowest. In addition, compared with EGDSC-PLL and NF-PLL, the frequency estimation overshoot of the PLL proposed in the present invention is also the smallest, and it can be seen from its waveform that its curve is smoother, while the frequency estimation overshoots of EGDSC-PLL and NF-PLL are both larger.

[0087] Figure 11 and Figure 12 are the phase error and frequency estimation diagrams when harmonic voltage is added to the grid voltage and a 35° phase jump occurs in the embodiment of the present invention. From Figure 11 and Figure 12 it can be known that since the PLL proposed in the present invention can eliminate the main harmonics in the grid, its curve is relatively smooth. And EGDSC-PLL is composed of multiple DSC modules in cascade, so it has good harmonic filtering ability, and its curve is also not disturbed by the harmonic voltage and shows relatively smooth. While NF-PLL does not have a filtering function, so its frequency estimation curve and phase estimation curve are both disturbed by the harmonic voltage, and large uniform ripples can be seen from its frequency estimation curve, thus affecting the accuracy. In addition, from Figure 12It can be seen that the transient convergence time of the PLL proposed by the present invention is slightly shorter, while the dynamic convergence times of the other two PLLs are slightly longer.

[0088] Figure 13 and Figure 14 are respectively the phase error and frequency estimation diagrams when the grid voltage drops by 50% in two phases in the embodiment of the present invention. From Figure 13 it can be seen that since the PLL proposed by the present invention quickly undergoes a transient convergence process after the grid voltage drops, its dynamic time is as short as that of the EGDSC-PLL. However, since the NF-PLL is not normalized, it is greatly affected by the voltage drop, and the curve shows periodic oscillations, indicating that its performance is inferior to the PLL proposed by the present invention. In addition, from Figure 14 it can also be seen that the transient convergence time of the PLL proposed by the present invention is slightly shorter, while the dynamic convergence times of the other two PLLs are slightly longer.

[0089] Through Figures 9 - 14 comparison, it can be seen that the synchronous phase-locked loop based on the cooperative filter proposed by the present invention has good performance in terms of filtering grid disturbances and dynamic phase-locking accuracy, and can accurately and quickly complete the functions of extracting the grid phase and frequency under harsh grid conditions, and is completely applicable to the grid connection synchronization application of grid-connected converters.

[0090] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that they can still modify or equivalently replace the technical solutions of the present invention, and these modifications or equivalent replacements cannot make the modified technical solutions deviate from the spirit and scope of the technical solutions of the present invention.

Claims

1. A synchronous phase-locked loop based on a collaborative filter, characterized in that: The synchronous phase-locked loop based on the collaborative filter consists of a Clarke transformation unit for three-phase grid voltage, a collaborative filter, and a proportional controller k p , and an integral link 1 / s; Three-phase grid voltage v abc is connected to the input end of the coordinate transformation unit. The output end of the coordinate transformation unit is connected to the input end of the cooperative filter. The output end of the cooperative filter is connected to the input end of the arctangent operation unit. The output end of the arctangent operation unit is connected to the input end of the proportional controller k p The output signal of the proportional controller k p is added to the natural frequency ω ff and then input to the input end of the integral link 1 / s. The output end of the integral link 1 / s outputs the phase estimation value The output end of the integral link 1 / s is connected to the input end of the coordinate transformation unit. The output end of the integral link 1 / s is added to the output end of the arctangent operation unit to output the phase-locked result The collaborative filter consists of a dual new generalized integrator with DC offset cancellation function (DNGI-WDC) and a comb filter (CF). The two need to work together to complete the filtering function. Among them, the dual new generalized integrator with DC offset cancellation function (DNGI-WDC) can suppress the DC offset voltage in the non-ideal grid voltage, and the comb filter (CF) can suppress the harmonic voltages of each order in the non-ideal grid voltage.

2. The synchronous phase-locked loop based on the collaborative filter according to claim 1, characterized in that: The dual new generalized integrator with DC offset cancellation function (DNGI-WDC) is composed of two new generalized integrators with DC offset cancellation function (NGI-WDC) through an interleaved structure. Its transfer function formula in the stationary coordinate system is wherein, is the resonance frequency, s represents the s domain, the ξ value is usually taken as 0.7, and k is taken as 3; The dual new generalized integrator with DC offset cancellation function (DNGI-WDC) can eliminate the DC offset voltage of the three-phase grid voltage in the stationary coordinate system, and can also completely extract the fundamental positive-sequence voltage and eliminate the fundamental negative-sequence voltage.

3. The synchronous phase-locked loop based on the collaborative filter according to claim 2, characterized in that: The new generalized integrator with DC offset cancellation function (NGI-WDC) is composed of two integrators, three adders, four multipliers, one divider and three constant ratio controllers. Its transfer function formula is where \(u\) is the input of a novel generalized integrator with DC offset cancellation (NGI-WDC), and \(v\) a and \(v\) b are the two outputs of a novel generalized integrator with DC offset cancellation (NGI-WDC), respectively.

4. The synchronous phase-locked loop based on the collaborative filter according to claim 1, characterized in that: The s-domain transfer function of the collaborative filter can be obtained by the collaborative combination of the transfer function of the dual new generalized integrator with DC offset cancellation function (DNGI-WDC) in the rotating coordinate system and the comb filter (CF). Its transfer function formula is In the formula, is the resonant frequency, s represents the s domain, the ξ value is taken as 0.7, k is taken as 3, n is taken as 1, and T w is taken as 0.0033 seconds; The collaborative type can eliminate the DC offset voltage and harmonic voltage that have a greater impact on the phase-locked loop under the non-ideal grid, and then realize the function of accurately tracking the phase of the three-phase grid.

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