Tbc solar cell, back structure of tbc cell and preparation

Abstract

The application discloses a TBC solar cell, a back structure of the TBC cell and preparation. The back contact structure of the TBC solar cell provided by the application has a channel isolation area with an inclined surface in a back interdigital PN contact area, so that carriers cannot pass through a PN junction at a side edge, thereby avoiding the risk of short circuit and achieving the effect of suppressing leakage. Meanwhile, in the area of the first electrode, a multilayer tunnel oxide layer is stacked with a multilayer polysilicon passivation technology, so that the passivation effect is better than the single-layer passivation capacity of a conventional one.

Description

[0001] This application is a divisional application.

[0002] The original application number was 202311831006.9

[0003] The original application was filed on December 28, 2023.

[0004] Original application title: Photovoltaic modules and their TBC solar cells, rear structure and fabrication of TBC cells Technical Field

[0005] This invention belongs to the field of solar cell technology, and particularly relates to a TBC solar cell, the back structure of a TBC cell, and its fabrication. Background Technology

[0006] Against the backdrop of increasingly precious energy resources, solar energy, as a green and clean renewable energy source, has attracted much attention. With dwindling fossil fuel reserves, the economic and investment value of the solar energy industry is becoming increasingly prominent. Developing the photovoltaic industry is an important measure to achieve China's "dual carbon" goals. Photovoltaic modules are crucial components of photovoltaic power generation systems. Typically, photovoltaic modules are mounted on photovoltaic module supports, and multiple supports are arranged in a predetermined array and electrically connected to form a photovoltaic power generation system. To achieve higher power generation efficiency, the utilization rate of solar radiation is usually improved by optimizing the structure of the photovoltaic module supports.

[0007] To ensure installation stability, photovoltaic (PV) module mounting structures are primarily fixed. In this configuration, the PV modules have a fixed tilt angle, which, while relatively stable, doesn't maximize sunlight utilization. However, installation methods enabling single-axis adjustment are gradually emerging, allowing the PV modules to adjust their orientation according to the sun's azimuth. Nevertheless, these PV modules still face technical challenges in terms of stability and solar radiation utilization efficiency.

[0008] In addition to solar cells, one type of solar cell that makes up a solar panel is the IBC (Interdigitated back contact) solar cell. Benefiting from its grid-free front design and the interdigitated junction arrangement of the positive and negative electrodes on the back, the IBC cell is one of the most promising and efficient solar cell structures for silicon-based solar cells. To further improve the conversion efficiency of IBC solar cells, researchers often combine tunneling oxide-passivated contact (TOC) with IBC to form a tunneling oxide-passivated and interdigitated back contact (TBC) solar cell.

[0009] However, existing TBC cell fabrication methods typically involve multi-step masking and wet etching, leading to continuous silicon wafer thinning during the process. This results in performance degradation and the introduction of contamination. In particular, overlapping of the doped polycrystalline silicon layer used in interdigitated cells can occur on the back side; poor process control can lead to cell leakage. Furthermore, boron-doped polycrystalline silicon layers require a relatively thick layer to meet passivation and contact requirements. These issues mean that TBC cells still face technical risks and high costs in terms of both process implementation and structure. Summary of the Invention

[0010] 1. The problem to be solved

[0011] One objective of this invention is to provide a back contact structure for a TBC solar cell, which aims to improve the conversion efficiency of the solar cell; at the same time, this invention also provides the TBC solar cell and the fabrication process of the solar cell;

[0012] Another objective of this invention is to provide a photovoltaic module that can conveniently and simply adjust the azimuth and elevation angles of the solar panel, thereby improving the utilization rate of solar radiation and exhibiting good stability.

[0013] 2. Technical Solution

[0014] To solve the above problems, the technical solution adopted by the present invention is as follows:

[0015] According to the present invention, a first aspect provides a back contact structure for a solar cell, particularly relating to a TBC solar cell, which can be applied to a solar panel, the back contact structure comprising:

[0016] A passivation layer disposed on the back side of the base region silicon wafer, a dielectric layer disposed on the passivation layer, and an electrode that passes through the dielectric layer and contacts the passivation layer; the "passivation layer" as described herein includes a "tunneling oxide layer" disposed on the back side of the base region silicon wafer and a "doped polycrystalline silicon layer" disposed on the tunneling oxide layer.

[0017] The passivation layer includes a first passivation layer, a second passivation layer having the opposite polarity to the first passivation layer, and an isolation region located between the first passivation layer and the second passivation layer;

[0018] The electrode includes a first electrode and a second electrode, wherein the first electrode passes through the dielectric layer and contacts the first passivation layer, and the second electrode passes through the dielectric layer and contacts the second passivation layer;

[0019] The isolation zone includes a first inclined surface and a second side surface;

[0020] The first bevel is formed in the first passivation layer;

[0021] The second side is formed in the second passivation layer;

[0022] The bottom of the first inclined surface and the bottom of the second side surface intersect near the surface of the base silicon wafer, and starting from the intersection area, the first inclined surface extends outward to contact the dielectric layer, and the second side surface extends outward to contact the dielectric layer, with an included angle of 5 to 60° between the first inclined surface and the second side surface.

[0023] This can be understood as the "intersection region formed by the intersection" existing in the "tunneling oxide layer" of the "passivation layer" as described above, rather than existing on the base silicon wafer.

[0024] In any embodiment of the TBC solar cell according to the first aspect of the present invention, the back contact structure of the first bevel has a greater inclination than the second side. Furthermore, the first bevel extends outward to the contact point with the dielectric layer.

[0025] The second side extends outward to the contact point that contacts the dielectric layer;

[0026] The vertical projection distance between the two contact points in the silicon wafer direction of the base region is 20-100 μm.

[0027] In any embodiment of the first aspect of the invention, the back contact structure of a TBC solar cell has the isolation region extending to a depth of no more than 0.5 micrometers into the base silicon wafer.

[0028] Preferably, the isolation region does not come into contact with the base silicon wafer.

[0029] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the surface of the first bevel has a pyramidal or inverted pyramidal structure;

[0030] And / or, the surface of the second vertical plane has a pyramidal or inverted pyramidal structure;

[0031] The size of the pyramid shape is between 30-100 nm.

[0032] A back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the first passivation layer comprises: a bottom passivation layer in direct contact with the back of the base region silicon wafer;

[0033] A top passivation layer stacked on top of the bottom passivation layer;

[0034] The bottom passivation layer and the top passivation layer have the same polarity;

[0035] The first electrode passes through the dielectric layer and contacts the top passivation layer.

[0036] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the bottom passivation layer contains the same doped impurities as the second passivation layer but has opposite polarities.

[0037] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention includes a top passivation layer comprising a tunneling oxide layer and a doped polycrystalline silicon layer; a bottom passivation layer comprising a tunneling oxide layer and a doped polycrystalline silicon layer; and a second passivation layer comprising a tunneling oxide layer and a doped polycrystalline silicon layer.

[0038] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the doped polycrystalline silicon layer has a thickness of 30-300 nm, preferably 100-300 nm.

[0039] A back contact structure for a TBC solar cell according to any embodiment of the first aspect of the invention, wherein the doped polycrystalline silicon layer of the top passivation layer has a 3 E19 cm⁻¹ diameter. -3 ~10E19cm -3 The doping concentration.

[0040] A back contact structure for a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the doped polycrystalline silicon layer of the bottom passivation layer has a 3 E19 cm⁻¹ diameter. -3 ~10E19cm -3 The doping concentration.

[0041] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the doped polycrystalline silicon layer of the second passivation layer has a 3E20cm² diameter. -3 ~10E20cm -3 The doping concentration.

[0042] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the tunneling oxide layer has a thickness of 0.5-3 nm.

[0043] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the dielectric layer comprises one or more combinations of an oxide layer, a silicon nitride layer, and an amorphous silicon layer.

[0044] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the dielectric layer has a thickness of 3 to 90 nm.

[0045] A back contact structure for a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the dielectric layer comprises an oxide layer in contact with the passivation layer;

[0046] And, a silicon nitride layer in contact with the oxide layer;

[0047] The oxide layer has a thickness of 3-10 nm;

[0048] The silicon nitride layer has a thickness of 50-80 nm.

[0049] The back contact structure of a TBC solar cell according to any embodiment of the first aspect of the present invention, wherein the dielectric layer has a refractive index of 1.9-2.1.

[0050] According to the purpose of this invention, a second aspect of the invention provides a method for fabricating a back contact structure of a TBC solar cell as described in any embodiment of the first aspect of the invention, comprising:

[0051] Step S1: Polish the surface of the base silicon wafer;

[0052] Step S2: After the surface is processed in step S1, a bottom tunneling oxide layer, a bottom amorphous silicon layer and a doped silicon oxide layer are deposited, and diffusion doping and crystallization are performed by thermal diffusion.

[0053] Step S3: Remove the doped silicon oxide layer in the first region, and retain the doped silicon oxide layer in the second region;

[0054] Step S4: Deposit an oxide layer, a top undoped polysilicon layer, and a doped silicon oxide layer on the surface of the first region after processing in step S3; and through thermal propulsion, push the doped impurities of the doped silicon oxide layer toward the bottom tunneling oxide layer, thereby forming an inversion of the bottom tunneling oxide layer and the bottom polysilicon layer.

[0055] Simultaneously, the surface concentration of the doped silicon oxide layer in the second region is increased; wherein the area covered by the doped silicon oxide layer is smaller than the area covered by the top undoped polysilicon layer.

[0056] Step S5: Etch the top doped polysilicon layer deposited on the surface of the first region to form an isolation region with a first slope;

[0057] Step S6: Deposit oxide and hydrogenated silicon nitride layers on the surface of the base region silicon wafer;

[0058] Step S7: Print the first and second electrodes and sinter them to form an ohmic contact.

[0059] As described herein, the first and second electrodes are metal electrodes, including any one or more of the following: silver electrode, copper electrode, aluminum electrode, tin-coated copper electrode, and silver-coated copper electrode.

[0060] According to the purpose of this invention, a third aspect of the invention provides a TBC solar cell, the cell comprising a base region silicon wafer;

[0061] A back contact structure disposed on the back side of the base region silicon wafer, the back contact structure being such as the back contact structure of a TBC solar cell according to any embodiment of the first aspect, or the back contact structure of a TBC solar cell prepared by the method according to any embodiment of the second aspect; a second dielectric layer disposed on the front side of the base region silicon wafer.

[0062] A TBC solar cell according to any embodiment of the third aspect of the present invention, wherein the second dielectric layer comprises one or more combinations of an oxide layer, a silicon nitride layer, and an amorphous silicon layer.

[0063] A TBC solar cell according to any embodiment of the third aspect of the present invention, wherein the second dielectric layer comprises an oxide layer and a silicon nitride layer.

[0064] A TBC solar cell according to any embodiment of the third aspect of the present invention, wherein the second dielectric layer has a thickness of 3 to 90 nm.

[0065] According to the purpose of this invention, a fourth aspect of this invention provides a method for preparing a TBC solar cell as described in any embodiment of the third aspect of this invention, comprising: step A1: polishing the surface of a silicon wafer in the base region;

[0066] Step A2: After the surface is processed in step A1, a bottom tunneling oxide layer, a bottom amorphous silicon layer, and a doped silicon oxide layer are deposited, and diffusion doping and crystallization are performed by thermal diffusion.

[0067] Step A3: Remove the doped silicon oxide layer in the first region, and retain the doped silicon oxide layer in the second region;

[0068] Step A4: Deposit an oxide layer, a top undoped polysilicon layer, and a doped silicon oxide layer on the surface of the first region after the treatment in step A3; and through thermal propulsion, push the doped impurities of the doped silicon oxide layer toward the bottom tunneling oxide layer, while forming the inversion of the bottom tunneling oxide layer and the bottom polysilicon layer.

[0069] Simultaneously, the surface concentration of the doped silicon oxide layer in the second region is increased; wherein the area covered by the doped silicon oxide layer is smaller than the area covered by the top undoped polysilicon layer.

[0070] Step A5: Remove the hybrid structure grown on the front side of the base silicon wafer using a single-sided film removal method;

[0071] Step A6: Texturing the front side of the base silicon wafer after step A5; simultaneously, etching the top doped polysilicon layer deposited on the surface of the first region to form an isolation region with a first slope.

[0072] Step A7: Deposit oxide and silicon hydrogen nitride layers on the surface of the base region silicon wafer;

[0073] Step A8: Print the first and second electrodes on the back side of the base region silicon wafer and sinter them to form an ohmic contact.

[0074] According to a fifth aspect of the present invention, a photovoltaic module is provided, the photovoltaic module comprising a solar panel and a photovoltaic module support for supporting the solar panel; the photovoltaic module support includes a frame for fixing the solar panel;

[0075] A central support column, which is connected to the frame via a universal joint;

[0076] Support rod assembly one, the support rod assembly one includes a connecting rod and a rotating rod, one end of the connecting rod is connected to the central support column and can rotate in a plane Y parallel to the length direction of the central support column, the other end of the connecting rod is hinged to one end of the rotating rod, and the other end of the rotating rod is connected to the frame through a ring guide rail slider assembly with positioning function;

[0077] Support rod assembly two, the support rod assembly two includes a support rod, one end of the support rod is connected to the central support column and can rotate in a plane X perpendicular to the plane Y, and one end of the support rod is hinged to the frame;

[0078] According to any embodiment of the fifth aspect of the present invention, the photovoltaic module support includes a solar cell, the solar cell comprising the solar cell provided by any embodiment of the third aspect of the present invention, or the solar cell provided by any embodiment of the fourth aspect of the present invention.

[0079] According to any embodiment of the fifth aspect of the present invention, the height of the central support column is adjustable; the length of the connecting rod is adjustable; the length of the rotating rod is adjustable; and the length of the support rod is adjustable.

[0080] According to any embodiment of the fifth aspect of the present invention, the photovoltaic module support, wherein the annular guide rail slider assembly with positioning function includes a slider and an annular guide rail; the annular guide rail is formed around the connection between the central support and the frame; the rotating rod is hinged to the slider.

[0081] Beneficial effects

[0082] (1) The back contact structure of the TBC solar cell provided by the present invention has a channel isolation region with a slope in the back interdigitated PN contact area, so that the charge carriers cannot pass through the PN junction on the side, thereby avoiding the risk of short circuit and achieving the effect of suppressing leakage.

[0083] Meanwhile, in the region of the first electrode, a multilayer tunnel oxide layer superimposed with a multilayer polysilicon passivation technique is used, which makes the passivation effect superior to that of conventional single-layer passivation.

[0084] (2) Compared to the isolation zone formed by conventional polishing channels in the prior art (such as...) Figure 19As shown, the cross-sectional shape of the isolation region is close to a rectangle, i.e., both sides are almost perpendicular to the surface of the silicon substrate. The back contact structure of the TBC solar cell provided by the present invention has an isolation region with an angle of 5~60°, and the cross-sectional shape of the isolation region is closer to a sharp angle. Moreover, the inclination of the first slope of the isolation region is greater than the inclination of the second side. Based on this, the first slope and the angle of the isolation region can expose the sidewall of the isolation region, so that the passivation film can be effectively formed on the slope of the isolation region during the deposition of the surface passivation film. At the same time, the long-wavelength light transmitted through the cell can be further reflected and refracted, so as to be absorbed and utilized by the silicon substrate. This makes the TBC solar cell provided by the present invention have the advantages of high open-circuit voltage, large short-circuit current and small reverse current. Finally, the Voc and Jsc of the TBC solar cell provided by the present invention are effectively improved. At the same time, the dark state current can be controlled within 0.1A when the cell is in reverse bias -15V state.

[0085] (3) The back contact structure of the TBC solar cell provided by the present invention has an isolation region whose depth is basically consistent with the thickness of the stacked layer on the surface of the base silicon wafer. Since the depth of the isolation region on the base silicon wafer is no more than 0.5 micrometers, or even the isolation region does not form contact with the base silicon wafer, the base silicon wafer absorbs sunlight better and does not cause the base silicon wafer to be excessively exposed.

[0086] (4) The method for preparing TBC solar cells provided by the present invention utilizes the difference in reaction rate of polycrystalline silicon with different doping characteristics in the first and second regions of the base silicon wafer in an alkaline solution to spontaneously form a channel with an inclined surface as an isolation region during wet texturing in step A6, thereby achieving the isolation of the PN electrode and significantly reducing the difficulty of preparation.

[0087] The depth of the isolation region obtained by the method of this invention can be basically consistent with the thickness of the stacked layer on the surface of the base silicon wafer. Furthermore, since the depth of the isolation region on the base silicon wafer does not exceed 0.5 micrometers, or even if the isolation region does not form contact with the base silicon wafer, the mechanical load performance of the final TBC cell module product can be improved, significantly outperforming conventional methods in the prior art. Figure 20 The polishing trench shown is the base region of the silicon wafer with an etching depth of approximately 2-3 micrometers.

[0088] (5) The method for preparing TBC solar cells provided by this invention, compared with the conventional polishing trench forming isolation area in the prior art (such as...), Figure 19 , 20As shown, the isolation region has an overall shape close to a rectangle, meaning both sides are nearly perpendicular to the silicon substrate surface. The textured passivation differential polished surface, with its two perpendicular polished surfaces, makes it difficult to deposit a dielectric layer on its sides, thus failing to guarantee the deposition effect of the dielectric layer. The isolation region with polished bevels, spontaneously formed by the method of this invention, due to its shallow depth, smooth surface, and the effect of the bevel, can better guarantee the deposition effect of the dielectric layer, such as the deposition thickness, resulting in superior surface passivation.

[0089] (6) The photovoltaic module provided by the present invention has a central pillar connected to the frame of the solar panel through a universal rotary joint, and the first support rod assembly is connected to the frame through a ring guide rail slider assembly with positioning function, which enables the solar panel to rotate in a direction parallel to the plane X. One end of the support rod of the second support rod assembly is connected to the central pillar through a sleeve bearing structure, so that the second support rod assembly cooperates with the first support rod assembly to enable the solar panel to rotate in the plane X. At the same time, the design of the hinge of one end of the support rod to the frame enables the solar panel to rotate in a direction parallel to the plane Y.

[0090] (7) The photovoltaic module provided by the present invention has adjustable height of the core support, length of the connecting rod of the first support rod assembly, length of the rotating rod, and length of the support rod of the second support rod assembly, which can realize the adjustment of the height of the solar panel. Attached Figure Description

[0091] Figure 1 The back contact structure of the TBC solar cell provided in Embodiment 2 of the present invention is shown in the schematic diagram.

[0092] Figure 2 A schematic diagram of the isolation region of the back contact structure of the TBC solar cell provided in Embodiment 2 of the present invention;

[0093] Figure 3 A schematic diagram of the isolation region of the back contact structure of the TBC solar cell provided in Embodiment 2 of the present invention;

[0094] Figure 4 A schematic diagram of the structure of the TBC solar cell provided in Embodiment 3 of the present invention;

[0095] Figures 5-11 This is a schematic diagram of the fabrication process of the back contact structure of the TBC solar cell provided in Embodiment 2 of the present invention;

[0096] Figures 12-18 This is a schematic diagram of the fabrication process of the TBC solar cell structure provided in Embodiment 4 of the present invention;

[0097] Figure 19A schematic diagram of the structure of the TBC-D3 solar cell provided in the comparative example of this invention;

[0098] Figure 20 A schematic diagram of the structure of the TBC-D7 solar cell provided in the comparative example of this invention;

[0099] Figure 21 A schematic diagram illustrating the isolation region structure of the TBC solar cell back contact structure provided by the present invention;

[0100] Figure 22 A schematic diagram illustrating the isolation region structure of the TBC solar cell back contact structure provided by the present invention;

[0101] Figure 23 A schematic diagram of the structure of a photovoltaic module provided in Embodiment 1 of the present invention;

[0102] Figure 24 A schematic diagram of the rear structure of the photovoltaic module frame provided in Embodiment 1 of the present invention;

[0103] In the diagram: 100, base silicon wafer; 110, textured structure; 200, first passivation layer; 210, bottom passivation layer; 211, bottom tunnel oxide layer; 212, bottom doped polysilicon layer; 220, top passivation layer; 221, top tunnel oxide layer; 222, top doped polysilicon layer; 230, first electrode; 300, second passivation layer; 311, second tunnel oxide layer; 312, second doped polysilicon layer; 320, second electrode; 400, isolation region; 410 420. First inclined surface; 430. First side surface; 500. Intersection area; 510. Second dielectric layer; 520. Second oxide layer; 600. First dielectric layer; 610. First oxide layer; 620. First silicide layer; 001. Tunneling oxide layer; 002. Doped polycrystalline silicon layer; 003. Doped silicon oxide layer; 004. Undoped polycrystalline silicon region; 01. First region; 02. Second region; 700. Photovoltaic module bracket; 710. Frame; 720. Base; 730. Central support column; 731. Universal rotary joint; 740. Support rod assembly one; 741. Connecting rod; 742. Rotating rod; 750. Annular guide rail slider assembly with positioning function; 751. Slider; 752. Annular guide rail; 760. Support rod assembly two; 761. Support rod; 762. Sleeve. Detailed Implementation

[0104] This disclosure will be more readily understood by referring to the following description, taken in conjunction with the accompanying drawings and examples, all of which form part of this disclosure. It should be understood that this disclosure is not limited to the specific products, methods, conditions, or parameters described and / or illustrated herein. Furthermore, the terminology used herein is for the purpose of describing particular embodiments by way of example only and is not intended to be limiting, unless otherwise stated.

[0105] It should also be understood that, for clarity, certain features of this disclosure may be described herein in the context of individual embodiments, but may also be provided in combination with each other in individual embodiments. That is, unless obviously incompatible or specifically excluded, each individual embodiment is considered to be combinable with any other embodiment, and such combination is considered to represent another different embodiment. Conversely, for the sake of brevity, various features of this disclosure described in the context of individual embodiments may also be provided individually or in any sub-combination. Finally, while a particular embodiment may be described as part of a series of steps or part of a more general structure, each step or substructure may also be considered an independent embodiment in itself.

[0106] Unless otherwise stated, it should be understood that each individual element in the list and each combination of individual elements in the list will be interpreted as a different embodiment. For example, a list of embodiments denoted as "A, B, or C" should be interpreted as including embodiments "A", "B", "C", "A or B", "A or C", "B or C", or "A, B, or C".

[0107] In this disclosure, the singular forms of the articles “a,” “one,” and “the” also include the corresponding plural references, and references to a particular value include at least that particular value, unless the context clearly indicates otherwise. Thus, for example, a reference to “substance” is a reference to at least one of such substance and its equivalents.

[0108] Ordinal terms such as “first” and “second” may be used to describe various components or fluids, but these components and fluids are not limited by these terms. Therefore, without departing from the teachings of this disclosure, these terms are used only to distinguish one component / fluid from another.

[0109] When an item is described using the integrative terms “...and / or ...", the description should be understood to include any of the associated listed items and all combinations thereof; for example, A and / or B should be interpreted as an embodiment that includes “A” but not “B”, an embodiment that includes “B” but not “A”, or an embodiment that includes both “A” and “B”.

[0110] Throughout the description of this application, when a part is described as "including" a certain element, it does not mean that other elements are excluded, but rather that other elements may be included, unless otherwise expressly stated to the contrary.

[0111] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains; the terms used herein and / or include any and all combinations of one or more of the associated listed items. To facilitate the understanding and application of the technical solutions and advantages of this invention, a complete description of the technical solutions in the embodiments of this invention will be provided below.

[0112] Example 1

[0113] like Figure 23 As shown, this embodiment provides a photovoltaic module, which includes a solar panel and a photovoltaic module support 700 for supporting the solar panel.

[0114] The photovoltaic module support 700 includes a base 720 and a central support column 730 mounted on the base 720. The photovoltaic module support 700 also includes a frame 710 and support rod assembly 740 and support rod assembly 760 for cooperating with the central support column 730 to adjust the angle of the solar panels.

[0115] The frame 710 is used to fix the solar panel.

[0116] The central support column 730 is connected to the frame 710 via a universal joint 731. It should be noted that the height of the central support column 730 is adjustable.

[0117] The support rod assembly 740 includes a connecting rod 741 and a rotating rod 742. One end of the connecting rod 741 is hinged to the central support column 730, allowing the connecting rod 741 to rotate in a plane Y parallel to the length direction of the central support column 730. The other end of the connecting rod 741 is hinged to one end of the rotating rod 742, and the other end of the rotating rod 742 is connected to the frame 710 via a ring guide rail slider assembly 750 with positioning function.

[0118] like Figure 24 As shown, the annular guide rail slider assembly 750 with positioning function, as described herein, includes a slider 751 and an annular guide rail 752; wherein, the annular guide rail 752 is mounted on the back of the frame 710, and the annular guide rail 752 forms a ring around the connection point O between the central support 730 and the frame 710; the rotating rod 742 is hinged to the slider 751. Further clarified, the lengths of both the connecting rod 741 and the rotating rod 742 are adjustable.

[0119] The second support rod assembly 760 includes a support rod 761. One end of the support rod 761 is connected to the central support column 730 via a sleeve 762 (bearing) structure, allowing the support rod 761 to rotate in a plane X perpendicular to the plane Y. The support rod 761 and the sleeve 762 are also hinged. The other end of the support rod 761 is hinged to the frame 710. Furthermore, the length of the support rod 761 is adjustable.

[0120] Example 2

[0121] This invention provides a back contact structure for a TBC solar cell, which can be applied to the solar panel described in this invention to form a photovoltaic module. For ease of explanation, only the parts relevant to the embodiments of this invention are shown; see reference ______. Figure 1 , Figure 2 and Figures 5-11 As shown.

[0122] The back contact structure of the TBC solar cell provided in this embodiment of the invention includes:

[0123] A passivation layer disposed on the back side of the base region silicon wafer 100, a first dielectric layer 600 disposed on the passivation layer, and an electrode that passes through the first dielectric layer 600 and contacts the passivation layer;

[0124] The passivation layer includes a first passivation layer 200, a second passivation layer 300 having the opposite polarity to the first passivation layer 200, and an isolation region 400 located between the first passivation layer 200 and the second passivation layer 300.

[0125] The electrodes include a first electrode 230 and a second electrode 320. The first electrode 230 passes through the first dielectric layer 600 and contacts the first passivation layer 200, and the second electrode 320 passes through the first dielectric layer 600 and contacts the second passivation layer 300. The metal electrodes include any one or more of the following: silver electrode, copper electrode, aluminum electrode, tin-coated copper electrode, and silver-coated copper electrode.

[0126] The isolation region 400 includes a first inclined surface 410 that coincides with the cross-section of the first passivation layer 200 and a second side surface 420 that coincides with the cross-section of the second passivation layer 300. The bottom of the first inclined surface 410 and the bottom of the second side surface 420 intersect near the surface of the base silicon wafer 100 to form an intersection region 430. Starting from the intersection region 430, the first inclined surface 410 extends outward (the outward direction is away from the back side of the base silicon wafer 100) to the bottom of the first dielectric layer 600 (the bottom is towards the back side of the base silicon wafer 100), and the second side surface 420 extends outward to the bottom of the first dielectric layer 600. There is an angle of 5 to 60° between the first inclined surface 410 and the second side surface 420.

[0127] Regarding the included angle of the aforementioned "isolation zone 400", it is possible that it is actually as follows: Figure 21 As shown, this is the angle formed by the intersection of the extensions of the tangents (or planes) of the first inclined surface 410 and the second side surface 420. However, it can be confirmed that the inclination of the first inclined surface 410 is greater than that of the second side surface 420, i.e., as shown... Figure 22 As shown, the dashed line a is perpendicular to the surface of the base silicon wafer 100. The angle α1 between the first inclined surface 410 and the dashed line a is greater than the angle α2 between the second side surface 420 and the dashed line a, further satisfying that the angle α1 is greater than or equal to twice the angle α2. Based on this, the first inclined surface 410 extends outward to its contact point with the first dielectric layer 600, and the second side surface 420 extends outward to its contact point with the first dielectric layer 600. The vertical projection distance H between the two contact points in the base silicon wafer direction is 20-100 μm.

[0128] Furthermore, the base silicon wafer 100 has a front side facing the sun during normal operation and a back side opposite to the front side. The front side is the light-receiving surface, and the back side is located on the other side of the base silicon wafer 100 opposite to the front side. The base silicon wafer 100 can be a P-type or N-type silicon wafer, and can be a monocrystalline silicon wafer or a quasi-monocrystalline silicon wafer. The appropriate type of base silicon wafer 100 can be selected according to actual application needs. Specifically, in this embodiment, the selected base silicon wafer 100 is an N-type monocrystalline silicon wafer with a thickness of 130 μm, a resistivity of 10 ohm·cm, and a doping concentration of 4.5E14m⁻³.

[0129] like Figure 2As shown, the depth of the isolation region 400 on the base silicon wafer 100 is 0~0.5 micrometers, that is, the intersection area 430 of the first inclined surface 410 and the first side surface 420 of the isolation region 400 does not contact the base silicon wafer 100, or the depth (position) on the base silicon wafer 100 is 0~0.5 micrometers. In some preferred embodiments of the present invention, the lowest point of the intersection area 430 does not contact the base silicon wafer 100. Specifically, in this embodiment, the first inclined surface 410 and the second side surface 420 of the isolation region 400 have an angle of 45°, and the angle α1 is greater than twice the angle α2, so the isolation region 400 does not contact the base silicon wafer 100.

[0130] The first passivation layer 200 includes a bottom passivation layer 210 that is in direct contact with the back surface of the base silicon wafer 100, and a top passivation layer 220 stacked on top of the bottom passivation layer 210 (the bottom being the side relatively closer to the back surface of the base silicon wafer 100, and the top being the side relatively farther away from the back surface of the base silicon wafer 100). The bottom passivation layer 210 and the top passivation layer 220 have the same polarity. It should be noted that the bottom passivation layer and the second passivation layer contain the same doped impurities but have opposite polarities. Specifically, in this embodiment, the selected base silicon wafer 100 is an N-type single-crystal silicon wafer, so both the bottom passivation layer and the top passivation layer 200 are P-type and contain P-type impurities, specifically with a boron doping concentration of 5E19 cm⁻³. The second passivation layer is N-type and contains N-type impurities, specifically with a phosphorus doping concentration of 4E20 cm⁻³. However, it should be noted that the bottom passivation layer also contains the same doped impurities as the second passivation layer, but the concentration is only 1E19cm-3.

[0131] The top passivation layer 220 includes a top tunneled oxide layer 221 and a top doped polysilicon layer 222; the bottom passivation layer 210 includes a bottom tunneled oxide layer 211 and a bottom doped polysilicon layer 212; the second passivation layer 300 includes a second tunneled oxide layer 311 and a second doped polysilicon layer 312. Specifically, in this embodiment, the first electrode 230 passes through the first dielectric layer 600 and contacts the top doped polysilicon layer 222; the second electrode 3200 passes through the first dielectric layer 600 and contacts the second doped polysilicon layer 312.

[0132] The "tunneling oxide layer" mentioned above is mainly an ultrathin oxide layer, which has a significant impact on the properties of passivation contacts. Good contact arises from defect-assisted tunneling mechanisms or micropores in the oxide layer. Preferably, the ultrathin oxide layer is an ultrathin silicon oxide layer. Currently, the formation of the ultrathin silicon oxide layer mainly includes thermal oxidation methods (including dry oxidation and wet oxidation), chemical vapor deposition (CVD) methods (including plasma chemical vapor deposition (PECVD) and low-pressure chemical vapor deposition (LPCVD), room temperature wet oxidation methods, etc., with low-pressure chemical vapor deposition (LPCVD) being preferred. In some preferred embodiments of the present invention, the top tunneling oxide layer 221 has a thickness of 0.5-3 nm, the bottom tunneling oxide layer 211 has a thickness of 0.5-3 nm, and the second tunneling oxide layer 311 has a thickness of 0.5-3 nm.

[0133] There are two main methods for forming the "doped polycrystalline silicon layer": the first is to directly deposit the doped polycrystalline layer using LPCVD, which allows for the deposition and doping of the polycrystalline silicon thin film in one step; the second is to first deposit an intrinsic polycrystalline silicon thin film using PECVD or LPCVD, and then perform doping using processes such as ion implantation and diffusion. The various doping methods are largely similar in terms of process effectiveness. In some preferred embodiments of the present invention, the top doped polycrystalline silicon layer 222 has a thickness of 30-300 nm, the bottom doped polycrystalline silicon layer 212 has a thickness of 30-300 nm, and the second doped polycrystalline silicon layer 312 has a thickness of 30-300 nm. In other preferred embodiments of the present invention, the top doped polycrystalline silicon layer 222 has a thickness of 100-300 nm, the bottom doped polycrystalline silicon layer 212 has a thickness of 100-300 nm, and the second doped polycrystalline silicon layer 312 has a thickness of 100-300 nm. In some other preferred embodiments of the invention, the top doped polysilicon layer 222 has a 3E19cm diameter. -3 ~10E19cm -3 The doping concentration and the bottom doped polysilicon layer 212 have 3 E19cm -3 ~10E19cm -3 The doping concentration of the second doped polysilicon layer 312 is 3 E20cm. -3 ~10E20cm -3 The doping concentration.

[0134] Specifically in this embodiment:

[0135] S1. First, the surface of the base silicon wafer is polished. In this embodiment, KOH alkaline liquid reacts with the base silicon wafer 100 to remove the surface damage layer and form a polished mirror surface. However, it should be noted that this step can actually be performed using any existing method, and the various methods are not significantly different in terms of process effect.

[0136] S2. First, a tunnel oxide layer with a thickness of 1.5 nm was formed on the back side of the base silicon wafer 100 using LPCVD, and a polycrystalline silicon layer with a thickness of 130 nm was deposited; then, a first doped silicon oxide layer was deposited and crystallized using a diffusion process, such as... Figure 5 As shown, a tunneling oxide layer, a doped polysilicon layer, and a doped silicon oxide layer are sequentially formed on the surface of the base silicon wafer 100.

[0137] S3. Remove the doped silicon oxide layer in the first region 01 by patterning etching or laser treatment, while retaining the doped silicon oxide layer in the second region 02, such as... Figure 6 As shown;

[0138] S4. Using PECVD equipment, in such... Figure 6 The surface of the base silicon wafer 100 shown is first thermally oxidized to grow a silicon oxide layer with a thickness of 1 nm, a polysilicon layer with a thickness of 170 nm, and a second doped silicon oxide layer (forming a stacked multilayer structure).

[0139] Next, the multi-layer stacked structure formed in this step in the second region 02 is removed using a laser; the multi-layer stacked structure formed in this step in the first region 01 is also removed, but it is necessary to ensure that, along the length of the base silicon wafer 100, the coverage area (length) of the second doped silicon oxide layer in the first region 01 is smaller than that of the polysilicon layer, ultimately as follows. Figure 7 As shown;

[0140] It should also be noted that the doping impurities in the second doped silicon oxide layer are different from those in the first doped silicon oxide layer, and the concentration of the doping impurities in the second doped silicon oxide layer is 3E20cm-3, while the concentration of the doping impurities in the first doped silicon oxide layer is 5E19cm-3. Based on this, the concentration of the doping impurities in the second doped silicon oxide layer is significantly higher than that in the first doped silicon oxide layer.

[0141] Subsequently, through thermal propulsion, the doped impurities in the second doped silicon oxide layer are pushed toward the layer below it, while simultaneously forming an inversion in the underlying diffusion region. At the same time, the doped impurities still present in the first doped silicon oxide layer in the second region also undergo propulsion toward the layer below it, further increasing the surface concentration and crystallization of the underlying passivation layer.

[0142] Furthermore, since the concentration of doped impurities in the second doped silicon oxide layer is significantly higher than that in the first doped silicon oxide layer, as the processing is completed, the polarity of the passivation layer located in the first region 01 changes to the opposite polarity to that of the passivation layer in the second region.

[0143] Furthermore, because the coverage area (length) of the second doped silicon oxide layer in the first region 01 is smaller than that of the polysilicon layer below it along the length of the base silicon wafer 100, after this step, the polysilicon layer region below the second doped silicon oxide layer is transformed into a doped polysilicon region, while the polysilicon layer region not below the second doped silicon oxide layer remains undoped, ultimately as follows... Figure 8 As shown.

[0144] Furthermore, the bottom passivation layer in the back contact structure of the TBC solar cell ultimately contains the same doped impurities as the second passivation layer, but has opposite polarities. This is precisely as... Figure 5 As shown, the bottom passivation layer and the second passivation layer are actually formed simultaneously in step S2. Based on this, the bottom passivation layer and the second passivation layer contain the same doped impurities; furthermore, in such... Figures 6-8 After the steps S3 and S4 shown are completed, the polarity of the bottom passivation layer is further changed.

[0145] S5. The first region 01 is etched using KOH alkaline solution. During this process, the etching reaction rate is faster with lower polysilicon doping concentrations, especially... Figure 8 The undoped polysilicon region shown exhibits rapid etching characteristics. The doped polysilicon layer at the bottom of the first region 01 etches faster than the doped polysilicon layer in the second region, ultimately resulting in a structure like... Figure 9 The isolation area shown has a first slope; and this is also the reason why the inclination degree (angle α1) of the first slope 410 is greater than the inclination degree (angle α2) of the second side surface 420. The etching satisfies the following conditions: the mass fraction concentration of KOH is 1.5%, the temperature is 70°C, a texturing additive with protective oxide layer properties is selected, and the reaction time is 350s;

[0146] At this point, after S1-S5 as described above, as Figure 9 As shown, a bottom passivation layer 210 and a top passivation layer 220 with the same polarity are finally formed in the first region 01 (including a bottom tunnel oxide layer 211, a bottom doped polysilicon layer 212, a top tunnel oxide layer 221, and a top doped polysilicon layer 222, which are sequentially stacked on the back side of the base silicon wafer 100); a second passivation layer with the opposite polarity to the bottom passivation layer 210 is formed in the second region (including a second tunnel oxide layer 311 and a second doped polysilicon layer 312, which are sequentially stacked on the back side of the base silicon wafer 100); and an isolation region as described above is formed between the first region 01 and the second region.

[0147] Regarding the aforementioned "first dielectric layer 600", it includes an oxide layer and a silicon nitride layer (SiN). x The first dielectric layer 600 is a combination of an oxide layer (a single material), an amorphous silicon layer, and an oxide layer (a multi-material oxide layer and an amorphous silicon layer), or a combination of multiple amorphous silicon layers with different refractive indices made of a single material. Furthermore, the first dielectric layer can also be a silicon oxynitride layer, a silicon nitride layer, etc. It is understood that the specific structure of the first dielectric layer 600 includes, but is not limited to, the several methods listed above. The first dielectric layer can be configured according to actual usage needs, and no specific limitation is made here. In some preferred embodiments of the present invention, the thickness of the first dielectric layer 600 is 3~90 nm, and the refractive index is 1.9-2.1. In other preferred embodiments of the present invention, the first dielectric layer 600 is preferably an oxide layer with a thickness of 3~10 nm and a silicon nitride layer with a thickness of 50~80 nm. In this case, the oxide layer and the silicon nitride layer are arranged sequentially from the base region silicon wafer 100 outwards. The oxide layer is in contact with the inner passivation layer, and the silicon nitride layer is in contact with the oxide layer. Furthermore, the oxide layer preferably consists of one or more layers selected from silicon oxide (SiO2 layer) and aluminum oxide (Al2O3 layer); therefore, the first dielectric layer can also be a combination of silicon oxide layer and aluminum oxide layer in the oxide layer. The silicon nitride layer in the first dielectric layer includes a silicon nitride hydrogenation layer.

[0148] Regarding the formation of the first dielectric layer, the SiO2 layer can be prepared by thermal oxidation (including dry oxygen oxidation and wet oxygen oxidation), chemical vapor deposition (CVD) (including plasma chemical vapor deposition (PECVD) and low-pressure chemical vapor deposition (LPCVD)), room temperature wet oxidation, etc., depending on actual application needs, and is not specifically limited here; the SiN x The SiN film can be prepared using chemical vapor deposition (CVD) methods (including plasma-enhanced chemical vapor deposition (PECVD) and low-pressure chemical vapor deposition (LPCVD)) and magnetron sputtering, depending on the specific application requirements. If conditions permit, CVD methods are preferred for preparing the SiN film. The alumina layer can be prepared using atomic layer deposition (ALD), plasma-assisted ALD, pyrolysis deposition, delocalized PECVD, molecular beam epitaxy, Al deposition followed by oxidation, etc., depending on the specific application requirements, and no specific limitations are specified here. (SiN...) x During the deposition of Al2O3 thin films, a large amount of hydrogen is generated, which can form good hydrogen passivation.

[0149] Specifically, in this embodiment: step S6 is performed: a first dielectric layer 600 is deposited on the surface of the base silicon wafer using plasma atomic layer deposition (ALD) and plasma chemical vapor deposition (PECVD), such as... Figure 10 As shown;

[0150] The first dielectric layer 600 includes a first oxide layer 610 (alumina layer) with a thickness of 5 nm and a first silicide layer 620 (silicon nitride layer) with a thickness of 75 nm. The final refractive index of the first dielectric layer 600 is 2.05.

[0151] Proceed to step S7: Figure 11 As shown, a first silver electrode 230 and a second silver electrode 320 are printed on the back side of the base region silicon wafer 100 and sintered to form an ohmic contact.

[0152] Example 3

[0153] The third embodiment of the present invention also provides a TBC solar cell. For ease of explanation, only the parts related to the embodiments of the present invention are shown. Refer to Figure 4 and Figures 12-18 As shown.

[0154] The TBC solar cell (TBC-1) shown includes: a base region silicon wafer 100;

[0155] A back contact structure as described in Example 1 is disposed on the back side of the base region silicon wafer 100;

[0156] A second dielectric layer 500 is disposed on the front side of the base region silicon wafer 100;

[0157] In principle, the second dielectric layer 500 can have the same composition and structure as the first dielectric layer 600, or it can be different, and adjustments can be made as needed. Specifically, in this embodiment, the second dielectric layer 500 is completely identical to the first dielectric layer 600. Regarding the fabrication of the TBC solar cell in this embodiment:

[0158] Step A1 is the same as step S1 in Example 1;

[0159] Step A2 is the same as step S2 in Example 1, resulting in the following: Figure 12 The structure shown;

[0160] Step A3: Same as step S3 in Example 1, to obtain as follows Figure 13 The structure shown;

[0161] Step A4: Same as step S4 in Example 1, to obtain as follows Figure 14 The structure shown;

[0162] Step A5: Using a single-sided stripping method, remove the hybrid structure grown on the front side of the base silicon wafer to obtain the following... Figure 15 The structure shown;

[0163] Step A6: Texturing the front side of the base silicon wafer after A5 processing to obtain the following... Figure 16 The shown is a velvet structure 110 with a height of 1.2 micrometers; simultaneously, the operation described in step S5 of Example 1 is performed to obtain the following... Figure 16 The back structure shown;

[0164] Step A7: Same as step S6 in Example 1, to obtain as follows Figure 17 The structure shown;

[0165] Step A8: Same as step S7 in Example 1, to obtain as follows Figure 18 The structure shown;

[0166] It should be noted that the texturing process described in step A6 can further reduce surface light reflection loss, improve the utilization rate of incident light by the base silicon wafer 100, and thus increase the short-circuit current of the cell. The texturing method generally employs mechanical grooving, chemical etching, plasma etching, etc., ultimately obtaining a textured surface structure, including but not limited to alkaline polished surfaces, mechanically polished surfaces, random pyramidal shapes, inverted pyramidal shapes, spherical crown shapes, V-grooves, and shapes between the above morphologies. Furthermore, it can typically form irregular hemispherical textured surfaces during acid texturing, pyramidal textured surfaces during alkaline texturing, or first form pyramidal textured surfaces through alkaline texturing and then smooth the pyramid apex through acid texturing. In this case, the surface morphology formed at the trenches on the back of the base silicon wafer 100 is beneficial for increasing the absorption and reuse of light by the base silicon wafer 100, thereby increasing the short-circuit current density and improving the conversion efficiency of the solar cell. Furthermore, as can be seen from the above, the texture height of the textured surface 110 also affects the reflectivity of the base silicon wafer 100. Regarding the "thickness of the base silicon wafer 100," it should be noted that reducing the wafer thickness effectively reduces the carrier recombination rate, thereby achieving a higher open-circuit voltage. However, because crystalline silicon has a low absorption coefficient for incident light, reducing the wafer thickness reduces the absorption of sunlight, resulting in a decrease in the battery's short-circuit current. In summary, based on actual needs, adjustments can be made to the thickness of the base silicon wafer 100, the height of the textured surface, and the reflectivity.

[0167] Example 4

[0168] This embodiment provides an additional TBC solar cell (TBC-2), the only difference between TBC-1 and TBC-2 is the type of silicon wafer doping.

[0169] Example 5

[0170] This embodiment also provides a TBC solar cell (TBC-3). The only difference between TBC-1 and TBC-3 is that the intersection region 430 of the isolation region 400 of TBC-3 is in contact with the base silicon wafer 100, and the depth on the base silicon wafer 100 is 0.5 micrometers.

[0171] Comparative Example 1

[0172] In addition, for comparison, two other solar cells are provided in this comparative example: TBC-D1, TBC-D2, TBC-D3, and TBC-D4;

[0173] The TBC-D1 battery structure is the same as the solar cell provided in Embodiment 2 of the present invention, except that the "first passivation layer" only includes the "top passivation layer".

[0174] The TBC-D2 battery structure is the same as the solar cell provided in Embodiment 2 of the present invention, except that the "first passivation layer" only includes the "bottom passivation layer".

[0175] The TBC-D3 battery structure is the same as the solar cell provided in Embodiment 2 of the present invention, except that the "isolation region 400" is as follows: Figure 19 As shown, the isolation region 400 has an overall shape close to a rectangle, meaning that both sides are almost perpendicular to the surface of the silicon substrate, thus it no longer has the characteristics of the present invention. Figure 3 The first inclined plane 410 of the isolation zone 400 shown.

[0176] The TBC-D4 battery structure is basically the same as the solar cell TBC-D3 provided in the comparative example of this invention, such as... Figure 20 As shown, the only difference is that the bottom surface of the isolation region 400 is approximately 2 micrometers deep at the depth of the base region silicon wafer 100 shown.

[0177] Table 1. Performance Comparison Parameters of Various Solar Cells

[0178]

[0179] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. The back contact structure of a TBC solar cell, characterized in that, The back contact structure includes: a passivation layer disposed on the back of the base region silicon wafer, and a dielectric layer disposed on the passivation layer; The passivation layer includes a first passivation layer, a second passivation layer having the opposite polarity to the first passivation layer, and an isolation region located between the first passivation layer and the second passivation layer; The isolation region includes a first inclined surface and a second side surface; the first inclined surface is formed on a first passivation layer; the second side surface is formed on a second passivation layer; the bottom of the first inclined surface and the bottom of the second side surface intersect near the surface of the base silicon wafer; starting from the intersection area, the first inclined surface extends outward to contact the dielectric layer, and the second side surface extends outward to contact the dielectric layer; the first inclined surface and the second side surface have an included angle of 5 to 60°.

2. The back contact structure of the TBC solar cell according to claim 1, characterized in that, The back contact structure also includes an electrode that passes through the dielectric layer and contacts the passivation layer.

3. The back contact structure of the TBC solar cell according to claim 2, characterized in that, The electrode includes a first electrode and a second electrode, wherein the first electrode passes through the dielectric layer and contacts the first passivation layer, and the second electrode passes through the dielectric layer and contacts the second passivation layer; The passivation layer includes a tunneling oxide layer disposed on the back side of the base region silicon wafer, and a doped polycrystalline silicon layer disposed on the tunneling oxide layer; The intersection region exists within the tunnel oxide layer.

4. The back contact structure of the TBC solar cell according to any one of claims 1 to 3, characterized in that, The inclination of the first inclined plane is greater than that of the second side.

5. The back contact structure of the TBC solar cell according to claim 4, characterized in that, The depth of the isolation region on the base silicon wafer does not exceed 0.5 micrometers; Alternatively, the isolation region may not make contact with the base silicon wafer.

6. The back contact structure of the TBC solar cell according to claim 3, characterized in that, The first passivation layer includes: a bottom passivation layer disposed on the back side of the base region silicon wafer; A top passivation layer stacked on top of the bottom passivation layer; The bottom passivation layer and the top passivation layer have the same polarity; The first electrode passes through the dielectric layer and contacts the top passivation layer.

7. The back contact structure of the TBC solar cell according to claim 6, characterized in that, The bottom passivation layer contains the same doped impurities as the second passivation layer, but has opposite polarities.

8. The back contact structure of the TBC solar cell according to claim 6 or 7, characterized in that, The top passivation layer includes a tunneling oxide layer and a doped polysilicon layer; the bottom passivation layer includes a tunneling oxide layer and a doped polysilicon layer; the second passivation layer includes a tunneling oxide layer and a doped polysilicon layer. And / or, The doped polycrystalline silicon layer has a thickness of 100~300nm; And / or, The tunneling oxide layer has a thickness of 0.5~3 nm; And / or, The doped polysilicon layer of the top passivation layer has a 3 E19cm² diameter. -3 ~10E19cm -3 doping concentration; And / or, The doped polysilicon layer of the bottom passivation layer has a 3 E19cm² diameter. -3 ~10E19cm -3 doping concentration; And / or, The doped polysilicon layer of the second passivation layer has a 3E20cm² diameter. -3 ~10E20cm -3 The doping concentration.

9. The back contact structure of the TBC solar cell according to claim 6 or 7, characterized in that, The dielectric layer includes one or more combinations of an oxide layer, a silicon nitride layer, and an amorphous silicon layer; And / or, The dielectric layer has a thickness of 3~90nm; And / or, The dielectric layer has a refractive index of 1.9-2.

1.

10. The back contact structure of the TBC solar cell according to claim 9, characterized in that, The dielectric layer includes an oxide layer in contact with the passivation layer and a silicon nitride layer in contact with the oxide layer; And / or, The oxide layer has a thickness of 3-10 nm; the silicon nitride layer has a thickness of 50-80 nm.

11. A TBC solar cell, characterized in that, include: Base region silicon wafer; A back contact structure disposed on the back side of the base region silicon wafer, the back contact structure being as described in any one of claims 1 to 10; a second dielectric layer disposed on the front side of the base region silicon wafer; And / or, The second dielectric layer includes one or more combinations of an oxide layer, a silicon nitride layer, and an amorphous silicon layer; And / or, The second dielectric layer includes an oxide layer and a silicon nitride layer, wherein the second dielectric layer has a thickness of 3~90 nm.

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