A method and system for representing sigmoid probability distribution based on memristor

Abstract

The application discloses a method and system for representing sigmoid probability distribution based on a memristor, and relates to the technical field of the memristor, and comprises the following steps: receiving a sigmoid curve extracted from a memristor unit, and marking the sigmoid curve as a probability storage sigmoid curve; receiving input data, quantifying the input data into a probability value, and marking the input data as a prior probability; mapping the prior probability to a corresponding gate-end voltage value through the probability storage sigmoid curve, storing the gate-end voltage value to a node memristor array, and marking the gate-end voltage value as a storage probability value; quantifying the storage probability value to obtain a voltage signal, inputting the voltage signal to a weight memristor array, obtaining an output current, inputting the output current to a next node, and thus realizing a sigmoid belief network; and the application can directly represent the sigmoid probability distribution by using the current limiting effect of a 1T1R unit transistor, and simultaneously stores the probability value at the gate end.

Description

Technical Field

[0001] This invention relates to the field of memristor technology, specifically a method and system for representing the Sigmoid probability distribution based on memristors. Background Technology

[0002] Neural networks have been widely used in image recognition, natural language processing, and medical diagnosis. However, as black-box models, their internal structure and parameters are difficult to interpret, requiring a large number of parameters and complex structures. Furthermore, they struggle to provide reasonable results with small sample sizes and noisy data. Probabilistic graphical models (PGMs), on the other hand, can intuitively represent the dependencies between variables and have a concise network structure. They can use these dependencies to infer missing samples or filter noise. However, their concise structure and small number of parameters make PGMs inefficient in parameter learning and inference, and highly complex. In 1995, Hinton et al. proposed the Sigmoid Belief Network, which combines traditional neural networks and PGMs. Leveraging the powerful representational capabilities of neural networks and the flexibility of PGMs, they constructed a directed graphical model where nodes represent random variables, edges represent dependencies between variables, and activation functions represent the probability distribution of nodes. This model combines the nonlinear characteristics of neural networks with the probabilistic inference capabilities of PGMs, enabling it to better handle high-dimensional, sparse, and noisy data.

[0003] In summary, while Sigmoid belief networks offer a new paradigm for modeling complex data, deploying the network hardware on the terminal remains a challenge. Mainstream memristor hardware accelerators, although capable of performing matrix-vector multiplication through "physical computation," require mathematical transformations when representing the probability distribution of the sigmoid function, introducing additional circuitry and energy consumption. Furthermore, the read noise of memristors makes it difficult to effectively store probability values, hindering practical applications. The primary challenge in implementing Sigmoid belief networks using memristors is how to directly represent the Sigmoid probability distribution while ensuring its storage. Summary of the Invention

[0004] To address the shortcomings mentioned in the background art, the present invention aims to provide a method and system for representing the sigmoid probability distribution based on memristors, which can directly represent the sigmoid probability distribution using the current limiting effect of 1T1R unit transistors, while storing the probability values ​​at the gate.

[0005] Firstly, the objective of this invention can be achieved through the following technical solution: a method for representing the Sigmoid probability distribution based on memristors to realize a Sigmoid belief network, the method comprising the following steps:

[0006] Receive the sigmoid curve extracted from the memristor cell and mark the sigmoid curve as a probability storage S-shaped curve;

[0007] Receive input data, quantize the input data into probability values, and mark the probability values ​​as prior probabilities, wherein the input data is the pixel values ​​of a handwritten digit image;

[0008] The prior probability is mapped to the corresponding gate voltage value through the probability storage S-curve, and the gate voltage value is stored in the node memristor array and marked as the stored probability value.

[0009] The stored probability value is quantized to obtain a voltage signal, which is then input to a weighted memristor array to obtain an output current. The output current is then converted into the posterior probability of the Sigmoid network.

[0010] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the process of extracting the sigmoid curve from the 1T1R memristor cell includes the following steps:

[0011] Set the initial gate voltage V G Low resistance threshold R low ;

[0012] Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Initial voltage V reset Pulse width t reset Set the amplitude increment step size ΔV and the gate voltage V. gate_reset set up;

[0013] Set a fixed set pulse and gate voltage value V g And tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming.

[0014] By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming.

[0015] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the calculation process of the programming success probability value P:

[0016] Set a fixed pulse, pulse amplitude V set Pulse width t set Gate voltage V g Set as initial set gate voltage V G ;

[0017] The number of tests n is set to 0, and the number of successful programming attempts m is set to 0.

[0018] Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1;

[0019] Determine if R is less than the set low-resistance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step.

[0020] Determine if n is equal to the number of tests; if n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming.

[0021] The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ;

[0022] Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0.

[0023] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the process of quantizing the stored probability value to obtain a voltage signal, inputting the voltage signal to a weighted memristor array to obtain an output current, and inputting the output current to the next node:

[0024] A fixed pulse is applied to the node memristor array with storage probability;

[0025] The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value;

[0026] The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array.

[0027] The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network.

[0028] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the counting module is used to return the output current to the host computer through the TIA circuit, the digital counter, and the ADC circuit, convert the output current of the array into voltage pulses, obtain the output value of the stored probability through the digital counter, and finally return it to the host computer through the ADC circuit.

[0029] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the host computer quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array, and inputs it to the weighted memristor array.

[0030] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the weighted memristor array represents positive and negative weights with positive and negative memristor pairs, wherein the positive and negative weights represent the positive and negative correlations between nodes, and the magnitude of the weights represents the strength of the correlations between nodes.

[0031] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the output signal of the weighted memristor array is converted into a voltage signal via a host computer as the gate voltage of the 1T1R memristor cell represented by the next node.

[0032] Secondly, in order to achieve the above objectives, this invention discloses a memristor-based system for representing the Sigmoid probability distribution, comprising:

[0033] The curve extraction module is used to receive the sigmoid curve extracted from the memristor cell and mark the sigmoid curve as a probability-stored S-shaped curve.

[0034] The probability conversion module is used to receive input data, quantize the input data into probability values, and mark the probability values ​​as prior probabilities, wherein the input data is the pixel values ​​of a handwritten digit image;

[0035] The mapping storage module is used to map the prior probability to the corresponding gate voltage value through the probability storage S-curve, store the gate voltage value to the node memristor array, and mark it as the stored probability value.

[0036] The signal transmission module is used to quantize the stored probability value to obtain a voltage signal, input the voltage signal to the weighted memristor array to obtain the output current, and convert the output current into the posterior probability of the Sigmoid network.

[0037] In conjunction with the second aspect, in some implementations of the second aspect, the system further includes: the process of extracting the sigmoid curve from the 1T1R memristor unit within the curve extraction module includes the following steps:

[0038] Set the initial gate voltage V G Low resistance threshold R low ;

[0039] Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Initial voltage V reset Pulse width t reset Set the amplitude increment step size ΔV and the gate voltage V. gate_reset set up;

[0040] Set a fixed set pulse and gate voltage value V gAnd tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming.

[0041] By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming;

[0042] Alternatively, the calculation process of the programming success probability value P within the curve extraction module:

[0043] Set a fixed pulse, pulse amplitude V set Pulse width t set Gate voltage V g Set as initial set gate voltage V G ;

[0044] The number of tests n is set to 0, and the number of successful programming attempts m is set to 0.

[0045] Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1;

[0046] Determine if R is less than the set low-resistance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step.

[0047] Determine if n is equal to the number of tests; if n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming.

[0048] The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ;

[0049] Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0;

[0050] Preferably, the process involves quantizing the stored probability value within the signal transmission module to obtain a voltage signal, inputting the voltage signal to the weighted memristor array to obtain an output current, and then inputting the output current to the next node.

[0051] A fixed pulse is applied to the node memristor array with storage probability;

[0052] The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value;

[0053] The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array.

[0054] The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network.

[0055] Alternatively, the counting module within the signal transmission module is used to return the output current to the host computer via the TIA circuit, digital counter, and ADC circuit. It converts the array's output current into voltage pulses, then obtains the output value of the stored probability through the digital counter, and finally returns it to the host computer via the ADC circuit.

[0056] Alternatively, the host computer in the signal transmission module quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array and inputs it to the weighted memristor array.

[0057] Alternatively, the weighted memristor array within the signal transmission module can use positive and negative memristor pairs to represent positive and negative weights, where positive and negative weights represent the positive and negative correlation between nodes, and the magnitude of the weights represents the strength of the correlation between nodes.

[0058] Alternatively, the output signal of the weighted memristor array within the signal transmission module can be converted into a voltage signal by the host computer, serving as the gate voltage of the 1T1R memristor unit represented by the next node.

[0059] The beneficial effects of this invention are:

[0060] This invention can directly represent the sigmoid probability distribution using 1T1R memristor units, while ensuring the storage and updating of the probability distribution and probability values, and realize a complete sigmoid belief network at low cost. Attached Figure Description

[0061] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0062] Figure 1 This is a schematic diagram of the method flow of the present invention;

[0063] Figure 2 This is a schematic diagram of the test process for the sigmoid curve based on the 1T1R memristor unit described in this invention.

[0064] Figure 3 This is a graph showing the Sigmoid curve measured by the 1T1R memristor unit described in this invention and its corresponding function fitting curve.

[0065] Figure 4 This is a schematic diagram illustrating the implementation principle of the Sigmoid belief network hardware system based on a 1T1R memristor array as described in this invention. Figure 5This is a schematic diagram of the system structure of the present invention.

[0066] Figure 6 This is a diagram showing the generation effect of the system of the present invention on the MNIST dataset. Detailed Implementation

[0067] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0068] Example 1:

[0069] The following is a description of the relevant terms used in the embodiments of this application:

[0070] Memristor: A memristor, short for memory resistor, is a circuit device that represents the relationship between magnetic flux and electric charge. While it has the dimensions of resistance, unlike a regular resistor, its resistance is determined by the charge flowing through it. Therefore, by measuring the resistance of a memristor, the amount of charge flowing through it can be determined, thus enabling it to "memorize" charge. Memristor-based random access memory (RAM) offers superior integration density, power consumption, and read / write speeds compared to traditional RAM. Furthermore, memristors are the best way to implement artificial neural network synapses in hardware. Due to their nonlinear properties, memristors can generate chaotic circuits, which also have many applications in secure communications.

[0071] Sigmoid: The Sigmoid function is a mathematical function with an S-shaped curve.

[0072] The sigmoid function is an activation function, and more specifically, a squashing function. Squashing functions limit the output to between 0 and 1, making them very useful in probabilistic predictions.

[0073] like Figure 1 As shown, a method for representing the Sigmoid probability distribution based on memristors to realize a Sigmoid belief network is presented. The method includes the following steps:

[0074] Receive the sigmoid curve extracted from the 1T1R memristor cell and mark the sigmoid curve as a probability storage S-shaped curve;

[0075] Among them, such as Figure 2 As shown, the process of extracting the sigmoid curve from the 1T1R memristor cell includes the following steps:

[0076] Set the initial gate voltage V G 1.57V, low impedance threshold R low It is 6KΩ;

[0077] Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Set to 50KΩ; initial voltage V reset Set to -2V, pulse width t reset Set to 500ns, amplitude increment step ΔV is 0.05V, gate voltage V gate_reset Set to 3.6V;

[0078] Set a fixed set pulse and gate voltage value V g And tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming.

[0079] By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming.

[0080] The calculation process of the probability P of successful programming:

[0081] Set a fixed pulse, pulse amplitude V set Set to 2.5V, pulse width t set Set to 500ns, gate voltage V g Set as initial set gate voltage V G ;

[0082] The number of tests n is set to 0, and the number of successful programming attempts m is set to 0.

[0083] Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1;

[0084] Determine if R is less than the set low-resistance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step.

[0085] Determine if n is equal to the number of tests (100); if n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming.

[0086] The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ;

[0087] Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0.

[0088] Receive input data, quantize the input data into probability values, and label them as prior probabilities;

[0089] The prior probability is mapped to the corresponding gate voltage value through the probability storage S-curve, and the gate voltage value is stored in the node memristor array and marked as the stored probability value.

[0090] Specifically, the present invention will be further illustrated below through embodiments:

[0091] Figure 3 The results of the sigmoid curve and its corresponding function fitting curve measured by the 1T1R memristor unit in the embodiment of the present invention are used to realize the probability distribution of the node by a single 1T1R unit through the extracted curve, and the probability value is stored by gate voltage, which reduces the hardware implementation cost of the network and realizes the probability storage function.

[0092] Figure 4 This is a schematic diagram illustrating the specific operation of the Sigmoid belief network hardware system based on a 1T1R memristor array as described in this embodiment of the invention. The host computer maps the input data to the gate voltage value of the 1T1R memristor unit via a probability storage S-curve, and applies it as a voltage pulse to the gate terminal of the node memristor array, storing the probability value as a voltage value. The node memristor array outputs the stored probability value as current to the counting module. The counting module transmits the data to the host computer for quantization and outputs it to the weighted memristor array. The weighted memristor array outputs to the node memristor array of the next layer node, completing the probabilistic inference between nodes and realizing a complete Sigmoid belief network.

[0093] The stored probability value is quantized to obtain a voltage signal, which is then input to a weighted memristor array to obtain an output current. The output current is then converted into the posterior probability of the Sigmoid network.

[0094] The process involves quantizing the stored probability value to obtain a voltage signal, inputting the voltage signal to a weighted memristor array to obtain an output current, and then inputting the output current to the next node.

[0095] A fixed pulse is applied to the node memristor array with storage probability;

[0096] The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value;

[0097] The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array.

[0098] The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network.

[0099] The counting module is used to return the output current to the host computer through the TIA circuit, digital counter, and ADC circuit. It converts the array's output current into voltage pulses, obtains the output value of the stored probability through the digital counter, and finally returns it to the host computer through the ADC circuit.

[0100] The host computer quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array, and inputs it to the weighted memristor array.

[0101] The weighted memristor array uses positive and negative memristor pairs to represent positive and negative weights. The positive and negative weights represent the positive and negative correlation between nodes, and the magnitude of the weight indicates the strength of the correlation. The output signal of the weighted memristor array is converted into a voltage signal by the host computer, which serves as the gate voltage of the 1T1R memristor cell represented by the next node.

[0102] Specifically, the present invention will be further illustrated below through embodiments:

[0103] PSNR (Peak Signal-to-Noise Ratio): Peak signal-to-noise ratio is a metric commonly used to measure image or audio quality.

[0104] PSNR is used to compare the quality difference between a raw signal (e.g., an original image) and a processed signal (e.g., a compressed image). PSNR is calculated based on the relationship between signal and noise, using the following formula:

[0105]

[0106] Where MAX is the maximum possible value of the signal (e.g., for an 8-bit image, MAX = 255), and MSE is the mean squared error, which represents the average of the squares of the pixel-level differences between the original signal and the processed signal.

[0107] PSNR is measured in decibels (dB), and a higher value indicates better signal quality. PSNR is typically used to evaluate the impact of compression algorithms on images or to compare the quality differences between different image processing methods. A higher PSNR value usually means less signal distortion and higher image quality.

[0108] Example 2: Second aspect, such as Figure 5 As shown, in order to achieve the above objectives, this invention discloses a memristor-based system for representing the Sigmoid probability distribution, comprising:

[0109] The curve extraction module is used to receive the sigmoid curve extracted from the memristor cell and mark the sigmoid curve as a probability-stored S-shaped curve.

[0110] The probability conversion module is used to receive input data, quantize the input data into probability values, and mark the probability values ​​as prior probabilities, wherein the input data is the pixel values ​​of a handwritten digit image;

[0111] The mapping storage module is used to map the prior probability to the corresponding gate voltage value through the probability storage S-curve, store the gate voltage value to the node memristor array, and mark it as the stored probability value.

[0112] The signal transmission module is used to quantize the stored probability value to obtain a voltage signal, input the voltage signal to the weighted memristor array to obtain the output current, and convert the output current into the posterior probability of the Sigmoid network.

[0113] In conjunction with the second aspect, in some implementations of the second aspect, the system further includes: the process of extracting the sigmoid curve from the 1T1R memristor unit within the curve extraction module includes the following steps:

[0114] Set the initial gate voltage V G 1.57V, low impedance threshold R low It is 6KΩ;

[0115] Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Set to 50KΩ; initial voltage V reset Set to -2V, pulse width t reset Set to 500ns, amplitude increment step ΔV is 0.05V, gate voltage V gate_reset Set to 3.6V;

[0116] Set a fixed set pulse and gate voltage value V g And tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming.

[0117] By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming;

[0118] Alternatively, the calculation process of the programming success probability value P within the curve extraction module:

[0119] Set a fixed pulse, pulse amplitude V set Set to 2.5V, pulse width t set Set to 500ns, gate voltage V g Set as initial set gate voltage V G ;

[0120] The number of tests n is set to 0, and the number of successful programming attempts m is set to 0.

[0121] Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1;

[0122] Determine if R is less than the set low-resistance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step.

[0123] Determine if n is equal to the number of tests (100); if n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming.

[0124] The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ;

[0125] Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0;

[0126] Preferably, the process involves quantizing the stored probability value within the signal transmission module to obtain a voltage signal, inputting the voltage signal to the weighted memristor array to obtain an output current, and then inputting the output current to the next node.

[0127] A fixed pulse is applied to the node memristor array with storage probability;

[0128] The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value;

[0129] The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array.

[0130] The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network.

[0131] Alternatively, the counting module within the signal transmission module is used to return the output current to the host computer via the TIA circuit, digital counter, and ADC circuit. It converts the array's output current into voltage pulses, then obtains the output value of the stored probability through the digital counter, and finally returns it to the host computer via the ADC circuit.

[0132] Alternatively, the host computer in the signal transmission module quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array and inputs it to the weighted memristor array.

[0133] Alternatively, the weighted memristor array within the signal transmission module can use positive and negative memristor pairs to represent positive and negative weights, where positive and negative weights represent the positive and negative correlation between nodes, and the magnitude of the weights represents the strength of the correlation between nodes.

[0134] Alternatively, the output signal of the weighted memristor array within the signal transmission module can be converted into a voltage signal by the host computer, serving as the gate voltage of the 1T1R memristor unit represented by the next node.

[0135] Figure 6 This image shows the generated images of the system based on the MNIST dataset. The system was modeled using Python. After preprocessing the MNIST images, they were input into a Sigmoid belief network system, successfully generating images with PSNRs of 32.21dB, 30.32dB, 33.67dB, and 30.80dB, respectively, verifying the feasibility of the system in generative applications.

[0136] Based on the same inventive concept, this invention also provides a computer device, comprising: one or more processors, and a memory for storing one or more computer programs; the programs include program instructions, and the processor executes the program instructions stored in the memory. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, used to implement one or more instructions, specifically for loading and executing one or more instructions stored in a computer storage medium to implement the above-described method.

[0137] It should be further explained that, based on the same inventive concept, the present invention also provides a computer storage medium storing a computer program, which, when executed by a processor, performs the above-described method. This storage medium can be any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In the present invention, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0138] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0139] The foregoing has shown and described the basic principles, main features, and advantages of this disclosure. Those skilled in the art should understand that this disclosure is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of this disclosure. Various changes and modifications can be made to this disclosure without departing from its spirit and scope, and all such changes and modifications fall within the scope of this disclosure as claimed.

Claims

1. A method for representing a Sigmoid probability distribution based on a memristor, used to effectively store probability values ​​in a memristor through gate voltage, characterized in that, The method includes the following steps: Receive the sigmoid curve extracted from the memristor cell and mark the sigmoid curve as a probability storage S-shaped curve; The process of extracting the sigmoid curve from the memristor cell includes the following steps: Set the initial gate voltage V G Low resistance threshold R low ; Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Initial voltage V reset Pulse width t reset The amplitude increases by a step size ∆V, and the gate voltage V gate_reset ; Set a fixed set pulse and gate voltage value V g And tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming. By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming; Receive input data, quantize the input data into probability values, and mark the probability values ​​as prior probabilities, wherein the input data is the pixel values ​​of a handwritten digit image; The prior probability is mapped to the corresponding gate voltage value through the probability storage S-curve, and the gate voltage value is stored in the node memristor array and marked as the stored probability value. The stored probability value is quantized to obtain a voltage signal, which is then input to a weighted memristor array to obtain an output current. The output current is then converted into the posterior probability of the Sigmoid network.

2. The method for representing the Sigmoid probability distribution based on memristors according to claim 1, characterized in that, The calculation process of the programming success probability value P: Set a fixed pulse, pulse amplitude V set Pulse width t set Gate voltage V g Set as initial set gate voltage V G ; The number of tests is n, and the number of successful programming attempts is m. Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1; Determine if R is less than the set low-impedance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step. Determine if n is equal to the number of tests; If n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming. The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ; Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0.

3. The method for representing the Sigmoid probability distribution based on memristors according to claim 1, characterized in that, The process of quantizing the stored probability value to obtain a voltage signal, inputting the voltage signal to a weighted memristor array to obtain an output current, and inputting the output current to the next node is as follows: A fixed pulse is applied to the node memristor array with storage probability; The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value; The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array. The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network.

4. The method for representing the Sigmoid probability distribution based on memristors according to claim 3, characterized in that, The counting module is used to return the output current to the host computer through the TIA circuit, digital counter, and ADC circuit. It converts the output current of the array into voltage pulses, obtains the output value of the stored probability through the digital counter, and finally returns it to the host computer through the ADC circuit.

5. The method for representing the Sigmoid probability distribution based on memristors according to claim 4, characterized in that, The host computer quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array, and inputs it to the weighted memristor array.

6. The method for representing the Sigmoid probability distribution based on memristors according to claim 5, characterized in that, The weighted memristor array uses positive and negative memristor pairs to represent positive and negative weights, where positive and negative weights represent the positive and negative correlation between nodes, and the magnitude of the weights represents the strength of the correlation between nodes.

7. The method for representing the Sigmoid probability distribution based on memristors according to claim 6, characterized in that, The output signal of the weighted memristor array is converted into a voltage signal by the host computer and used as the gate voltage of the 1T1R memristor unit represented by the next node.

8. A memristor-based system for representing the Sigmoid probability distribution, characterized in that, include: The curve extraction module is used to receive the sigmoid curve extracted from the memristor cell and mark the sigmoid curve as a probability-stored S-shaped curve. The process of extracting the sigmoid curve from the memristor cell includes the following steps: Set the initial gate voltage V G Low resistance threshold R low ; Setting relevant values ​​for the memristor: The initial high-resistance state R of the memristor is adjusted using an iterative programming scheme. h Initial voltage V reset Pulse width t reset The amplitude increases by a step size ∆V, and the gate voltage V gate_reset ; Set a fixed set pulse and gate voltage value V g And tested how the memristor was programmed to R using a fixed set pulse and gate voltage. low The following probability values ​​are defined as the probability P of successful programming. By fitting the programming success probability value P, the gate voltage V is obtained. g The sigmoid curve of the probability value P of successful programming; The probability conversion module is used to receive input data, quantize the input data into probability values, and mark the probability values ​​as prior probabilities, wherein the input data is the pixel values ​​of a handwritten digit image; The mapping storage module is used to map the prior probability to the corresponding gate voltage value through the probability storage S-curve, store the gate voltage value to the node memristor array, and mark it as the stored probability value. The signal transmission module is used to quantize the stored probability value to obtain a voltage signal, input the voltage signal to the weighted memristor array to obtain the output current, and convert the output current into the posterior probability of the Sigmoid network.

9. A memristor-based system for representing a Sigmoid probability distribution according to claim 8, characterized in that, The calculation process of the programming success probability value P within the curve extraction module: Set a fixed pulse, pulse amplitude V set Pulse width t set Gate voltage V g Set as initial set gate voltage V G ; The number of tests is n, and the number of successful programming attempts is m. Apply a fixed set pulse to the modulated 1T1R to obtain R, and increment the test count n by 1; Determine if R is less than the set low-impedance threshold R low If R is less than the low resistance threshold, the programming is successful, and the number of successful programming attempts m is incremented by 1. If R is greater than or equal to the low resistance threshold, proceed to the next step. Determine if n is equal to the number of tests; If n is less than the number of tests, set the relevant values ​​for the memristor; otherwise, calculate the probability value P of successful programming. The percentage of successful tests m is used to obtain the programming success probability value P, which is then marked as the programming success probability value P corresponding to the gate voltage Vg. Vg ; Decrease the gate voltage value Vg in fixed steps until the programming success probability value P is 0; The signal transmission module quantizes the stored probability value to obtain a voltage signal, inputs the voltage signal to the weighted memristor array to obtain the output current, and then inputs the output current to the next node. A fixed pulse is applied to the node memristor array with storage probability; The output current of the node memristor array is returned to the host computer through the counting module to obtain the storage probability value; The stored probability value is quantized by the host computer and converted into a voltage signal, which is then applied to the weighted memristor array. The output current of the weighted memristor array is transmitted to the nodes of the next layer through the host computer to realize the Sigmoid belief network. The counting module in the signal transmission module is used to return the output current to the host computer through the TIA circuit, digital counter, and ADC circuit. It converts the output current of the array into voltage pulses, then obtains the output value of the stored probability through the digital counter, and finally returns it to the host computer through the ADC circuit. The host computer in the signal transmission module quantizes the input probability value into a voltage signal between the top and bottom electrodes of the array, and inputs it to the weighted memristor array. The weighted memristor array in the signal transmission module uses positive and negative memristor pairs to represent positive and negative weights. The positive and negative weights represent the positive and negative correlations between nodes, and the magnitude of the weights represents the strength of the correlations between nodes. The output signal of the weighted memristor array in the signal transmission module is converted into a voltage signal by the host computer as the gate voltage of the 1T1R memristor unit represented by the next node.

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