A resonant switched capacitor converter using integrated inductors on PCB traces

Abstract

The application discloses a resonant switched capacitor converter integrated with PCB wiring inductance, which comprises a PCB board and top layer circuit and bottom layer circuit located on two sides of the PCB board respectively; wherein, resonant capacitor C1 in the top layer circuit is connected with a first power device through a first wiring, resonant capacitor C2 is connected with a second power device through a second wiring, resonant capacitor C3 in the bottom layer circuit is connected with a fifth power device through a third wiring, and resonant capacitor C4 is connected with a sixth power device through a fourth wiring; the first wiring, the second wiring, the third wiring and the fourth wiring are equivalent to four resonant inductances through mutual inductance among each other and self inductance of each one. The application is based on high frequency working condition of gallium nitride, designs coupling mode of the above four wirings, thereby reasonably utilizes parasitic inductance in the wirings and uses as resonant inductance in the resonant switched capacitor converter, and makes inductance value reach requirement.

Description

Technical Field

[0001] The present invention belongs to the technical field of resonant converters, and in particular relates to a resonant switched capacitor converter using a PCB trace integrated inductor. Background Art

[0002] With the development of big data, the Internet of Things, cloud computing, and mobile internet, more and more data centers are being built around the world. Data centers consume vast amounts of electricity, and DC power distribution systems, due to their high efficiency, have replaced traditional AC systems and are widely used in data centers. Currently, most data centers use a 48V power architecture.

[0003] For 48V bus-powered systems, there are single-stage and two-stage approaches. To achieve a high voltage conversion ratio, the single-stage approach utilizes a highly efficient and high-conversion-ratio planar transformer in the topology to convert the 48V DC bus voltage to a low voltage, which is then fed directly to the CPU. The two-stage approach, on the other hand, first converts the 48V to an intermediate voltage such as 9V or 12V. A second stage then generates a low voltage such as 1.2V or 1.8V for the CPU. Typically, the two-stage approach uses an unregulated intermediate bus converter (IBC) as the first stage and a regulated point-of-load (POL) converter as the second stage. Switched capacitor converters are often used as the unregulated intermediate bus converter. However, traditional switched capacitor converters suffer from charge redistribution and large current spikes during capacitor charging and discharging, limiting converter efficiency.

[0004] To address this issue, existing technologies introduce inductors into the circuit, making the charging and discharging of capacitors nearly lossless. With the introduction of inductors, the inductors resonate with the capacitors, and when the switching frequency of the switched-capacitor converter approaches the resonant frequency of the two, ZCS (zero current switching) can be achieved. However, traditional MOSFET switches operate at a relatively low frequency, requiring a relatively large inductor to achieve resonance, making this approach difficult to implement in practice. Summary of the Invention

[0005] To address the above-mentioned problems in the prior art, the present invention provides a resonant switched capacitor converter using a PCB trace integrated inductor. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a resonant switched capacitor converter using a PCB trace integrated inductor, comprising: a PCB board and a top circuit and a bottom circuit respectively located on both sides of the PCB board; wherein,

[0007] The top-level circuit includes a first power device, a second power device, a third power device, a fourth power device, and resonant capacitors: C1 and C2; the bottom-level circuit includes a fifth power device, a sixth power device, a seventh power device, an eighth power device, and resonant capacitors: C3 and C4; wherein the resonant capacitor C1 is connected to the first power device through a first trace, the resonant capacitor C2 is connected to the second power device through a second trace, the resonant capacitor C3 is connected to the fifth power device through a third trace, and the resonant capacitor C4 is connected to the sixth power device through a fourth trace;

[0008] The first wiring, the second wiring, the third wiring, and the fourth wiring are equivalent to four resonant inductors through mutual inductances and self-inductances of the wirings.

[0009] In one embodiment of the present invention, the power devices in the top-level circuit and the bottom-level circuit are both half-bridge devices.

[0010] In one embodiment of the present invention, the first routing line, the second routing line, the third routing line, and the fourth routing line are all copper traces.

[0011] In one embodiment of the present invention, the PCB board includes a top trace and a bottom trace, the top trace includes a first trace and a second trace, and the bottom trace includes a third trace and a fourth trace;

[0012] Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first routing line and the second routing line coincide with the orthographic projections of the third routing line and the fourth routing line, respectively.

[0013] In one embodiment of the present invention, it further includes an input terminal and an output terminal; the top-level circuit further includes a flying capacitor C f1 and a first driver chip, a second driver chip, a third driver chip, and a fourth driver chip connected to the first power device, the second power device, the third power device, and the fourth power device, respectively; the first power device includes GaN devices S1 and S2, the second power device includes GaN devices S3 and S4, the third power device includes GaN devices S5 and S6, and the fourth power device includes GaN devices S7 and S8; wherein,

[0014] The drain of S1 is connected to the input terminal, the source is connected to the drain of S2 and the first plate of the resonant capacitor C1, the source of S2 is connected to the drain of S3 and the flying capacitor C f1 The source of S3 is connected to the drain of S4 and the first plate of the resonant capacitor C2 respectively, the source of S4 is connected to the output terminal, the gate of S1 and the gate of S2 are both connected to the first driver chip, and the gate of S3 and the gate of S4 are both connected to the second driver chip;

[0015] The drain of S5 is connected to the source of S4 and the drain of S7 respectively. The source of S5 is connected to the drain of S6, the second plate of the resonant capacitor C1 and the second plate of the resonant capacitor C2 respectively. The source of S6 is grounded. The source of S7 is connected to the flying capacitor C f1 The second electrode plate of is connected to the drain of S8, the source of S8 is grounded, the gate of S5 and the gate of S6 are both connected to the third driving chip, and the gate of S7 and the gate of S8 are both connected to the fourth driving chip.

[0016] In one embodiment of the present invention, the bottom layer circuit further includes a flying capacitor C f2 and a fifth driver chip, a sixth driver chip, a seventh driver chip, and an eighth driver chip connected to the fifth power device, the sixth power device, the seventh power device, and the eighth power device, respectively;

[0017] The fifth power device includes GaN devices S9, S 10 , the sixth power device includes a GaN device S 11 、S 12 , the seventh power device includes a GaN device S 13 、S 14 , the eighth power device includes a GaN device S 15 、S 16 ;in,

[0018] The drain of S9 is connected to the input terminal, and the source is connected to S 10 The drain of the resonant capacitor C3 is connected to the first plate, S 10 The source and S 11 The drain and flying capacitor C f2 The first plate connection, S 11 The source and S 12 The drain of the resonant capacitor C4 is connected to the first plate, S 12 The source of S9 is connected to the output terminal, the gate of S9 and S 10 The gates are connected to the fifth driver chip, S 11 The gate and S 12 The gates of are connected to the sixth driving chip;

[0019] S 13 The drain and S 12 The source and S 15 The drain connection, S 13 The source and S 14 The drain of the resonant capacitor C3 and the second plate of the resonant capacitor C4 are connected, S 14 The source is grounded, S 15 The source of the flying capacitor Cf2 The second plate and S 16 The drain connection, S 16 The source is grounded, S 13 The gate and S 14 The gates are connected to the seventh driver chip, S 15 The gate and S 16 The gates of the chips are connected to the eighth driver chip.

[0020] In one embodiment of the present invention, along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first power device, the second power device, the third power device and the fourth power device respectively coincide with the orthographic projections of the fifth power device, the sixth power device, the seventh power device and the eighth power device.

[0021] In one embodiment of the present invention, along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first driver chip, the second driver chip, the third driver chip, and the fourth driver chip respectively coincide with the orthographic projections of the fifth driver chip, the sixth driver chip, the seventh driver chip, and the eighth driver chip.

[0022] In one embodiment of the present invention, the first routing line, the second routing line, the third routing line, and the fourth routing line are distributed along a direction perpendicular to the plane where the PCB board is located;

[0023] Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first routing line, the second routing line, the third routing line, and the fourth routing line coincide with each other.

[0024] In one embodiment of the present invention, the first routing line, the second routing line, the third routing line and the fourth routing line are arranged on the same layer in the PCB board.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] The present invention provides a resonant switched capacitor converter using PCB traces with integrated inductors. In the top circuit, resonant capacitor C1 is connected to a first power device via a first trace, and resonant capacitor C2 is connected to a second power device via a second trace. In the bottom circuit, resonant capacitor C3 is connected to a fifth power device via a third trace, and resonant capacitor C4 is connected to a sixth power device via a fourth trace. Based on the high-frequency operating conditions of gallium nitride devices, the present invention designs the coupling method of the above four traces, thereby rationally utilizing the parasitic inductance in the traces and using them as resonant inductors in the resonant switched capacitor converter, ensuring that the inductance value meets the required requirements.

[0027] In the prior art, traditional switched-capacitor converters typically require planar inductors or discrete components to achieve soft switching. However, compared to active switches and ceramic capacitors, the introduction of inductors significantly reduces space utilization. Generally speaking, parasitic inductance in PCB copper traces can cause voltage spikes in active switching devices, generating noise, unnecessary crosstalk, and losses. By optimizing the PCB trace layout, the present invention not only reduces the volume and size of the converter, but also helps improve converter efficiency and reduce inductor costs.

[0028] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a topology diagram of a resonant switched capacitor converter using PCB trace integrated inductors provided by an embodiment of the present invention;

[0030] Figure 2 is a partial cross-sectional view of the resonant switched capacitor converter provided by an embodiment of the present invention at section AA';

[0031] Figure 3 This is a schematic diagram of a coupling method of the first routing line, the second routing line, the third routing line, and the fourth routing line provided in an embodiment of the present invention;

[0032] Figure 4 is a schematic diagram of another cross section BB' of the resonant switched capacitor converter provided by an embodiment of the present invention;

[0033] Figure 5 This is a schematic diagram of another coupling method of the first routing line, the second routing line, the third routing line, and the fourth routing line provided in an embodiment of the present invention;

[0034] Figure 6 This is a schematic diagram of another coupling method of the first routing line, the second routing line, the third routing line, and the fourth routing line provided in an embodiment of the present invention;

[0035] Figure 7 It is a topology diagram of two same-phase 4:1 resonant switched capacitor converters in the prior art;

[0036] Figure 8 This is a schematic diagram of an operating mode of a two-phase 4:1 resonant switched capacitor converter in the prior art;

[0037] Figure 9 This is a schematic diagram of another working mode of a two-phase 4:1 resonant switched capacitor converter in the prior art;

[0038] Figure 10 Schematic diagram of the principle of a resonant switched capacitor converter using PCB trace integrated inductors provided by an embodiment of the present invention;

[0039] Figure 11 The embodiment of the present invention provides Figure 3 Schematic diagram of the relationship between self-inductance, mutual inductance, and total inductance and PCB trace length in the hybrid structure shown;

[0040] Figure 12 The embodiment of the present invention provides Figure 5 Schematic diagram of the relationship between self-inductance, mutual inductance, and total inductance and PCB trace length in the vertical structure shown;

[0041] Figure 13 The embodiment of the present invention provides Figure 6 Schematic diagram of the relationship between self-inductance, mutual inductance, and total inductance and PCB trace length in the horizontal structure shown;

[0042] Figure 14 The embodiment of the present invention provides Figure 3 Schematic diagram of the relationship between AC resistance and PCB trace length in the hybrid structure shown;

[0043] Figure 15 The embodiment of the present invention provides Figure 5 Schematic diagram of the relationship between AC resistance and PCB trace length in the vertical structure shown;

[0044] Figure 16 The embodiment of the present invention provides Figure 6 Schematic diagram of the relationship between AC resistance and PCB trace length in the horizontal structure shown. DETAILED DESCRIPTION

[0045] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0046] Figure 1 : This is a topology diagram of a resonant switched capacitor converter using PCB trace integrated inductance provided by an embodiment of the present invention. Figure 1 As shown, an embodiment of the present invention provides a resonant switched capacitor converter using a PCB trace integrated inductor, comprising: a PCB board and a top circuit and a bottom circuit respectively located on both sides of the PCB board; wherein,

[0047] The top-level circuit includes a first power device, a second power device, a third power device, a fourth power device, and resonant capacitors C1 and C2. The bottom-level circuit includes a fifth power device, a sixth power device, a seventh power device, an eighth power device, and resonant capacitors C3 and C4. The resonant capacitor C1 is connected to the first power device via a first trace, the resonant capacitor C2 is connected to the second power device via a second trace, the resonant capacitor C3 is connected to the fifth power device via a third trace, and the resonant capacitor C4 is connected to the sixth power device via a fourth trace.

[0048] The first wiring, the second wiring, the third wiring, and the fourth wiring are equivalent to four resonant inductors through mutual inductances and self-inductances of the wirings.

[0049] It should be noted that Figure 1 Phase 1 represents the top-level circuit, and phase 2 represents the bottom-level circuit. The topological structures of these two circuits are the same.

[0050] In this embodiment, the power devices in the top circuit and the bottom circuit are all half-bridge devices, that is, each power device actually contains two GaN devices. For example, considering the heat dissipation problem in the layout, the first to eighth power devices selectively use EPC's gallium nitride GaN half-bridge device EPC2102. EPC2102 is a top heat dissipation device with practical engineering value.

[0051] Optionally, in this embodiment, the first routing line, the second routing line, the third routing line and the fourth routing line are all copper traces.

[0052] Furthermore, the PCB board includes a top trace and a bottom trace, the top trace includes a first trace and a second trace, and the bottom trace includes a third trace and a fourth trace;

[0053] Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first and second routing lines coincide with the orthographic projections of the third and fourth routing lines, respectively.

[0054] Please continue to see Figure 1 The above-mentioned resonant switched capacitor converter using PCB trace integrated inductor also includes an input terminal V in , output terminal; the top circuit also includes a flying capacitor C f1 and a first driver chip, a second driver chip, a third driver chip, and a fourth driver chip connected to the first power device, the second power device, the third power device, and the fourth power device, respectively; the first power device includes GaN devices S1 and S2, the second power device includes GaN devices S3 and S4, the third power device includes GaN devices S5 and S6, and the fourth power device includes GaN devices S7 and S8; wherein,

[0055] The drain of S1 is connected to the input terminal, the source is connected to the drain of S2 and the first plate of the resonant capacitor C1, the source of S2 is connected to the drain of S3 and the flying capacitor C f1 The source of S3 is connected to the drain of S4 and the first plate of the resonant capacitor C2 respectively, the source of S4 is connected to the output terminal, the gate of S1 and the gate of S2 are both connected to the first driver chip, and the gate of S3 and the gate of S4 are both connected to the second driver chip;

[0056] The drain of S5 is connected to the source of S4 and the drain of S7 respectively. The source of S5 is connected to the drain of S6, the second plate of the resonant capacitor C1 and the second plate of the resonant capacitor C2 respectively. The source of S6 is grounded. The source of S7 is connected to the flying capacitor C f1 The second electrode plate of is connected to the drain of S8, the source of S8 is grounded, the gate of S5 and the gate of S6 are both connected to the third driving chip, and the gate of S7 and the gate of S8 are both connected to the fourth driving chip.

[0057] Exemplarily, the bottom circuit further includes a flying capacitor C f2 and a fifth driver chip, a sixth driver chip, a seventh driver chip, and an eighth driver chip connected to the fifth power device, the sixth power device, the seventh power device, and the eighth power device, respectively;

[0058] The fifth power device includes GaN devices S9, S 10 , the sixth power device includes a GaN device S 11 、S 12 , the seventh power device includes a GaN device S 13 、S 14 , the eighth power device includes a GaN device S 15 、S 16 ;in,

[0059] The drain of S9 is connected to the input terminal, and the source is connected to S 10 The drain of the resonant capacitor C3 is connected to the first plate, S 10 The source and S 11 The drain and flying capacitor C f2 The first plate connection, S 11 The source and S 12 The drain of the resonant capacitor C4 is connected to the first plate, S 12 The source of S9 is connected to the output terminal, the gate of S9 and S 10 The gates of the chips are connected to the fifth driver chip, S 11 The gate and S 12 The gates of are connected to a sixth driver chip;

[0060] S 13 The drain and S 12 The source and S 15 The drain connection, S 13 The source and S 14 The drain of the resonant capacitor C3 and the second plate of the resonant capacitor C4 are connected, S 14 The source is grounded, S 15 The source of the flying capacitor C f2 The second plate and S 16 The drain connection, S16 The source is grounded, S 13 The gate and S 14 The gates of the chips are connected to the seventh driver chip, S 15 The gate and S 16 The gates of the transistors are connected to the eighth driver chip.

[0061] Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first power device, the second power device, the third power device, and the fourth power device respectively coincide with the orthographic projections of the fifth power device, the sixth power device, the seventh power device, and the eighth power device.

[0062] Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first driver chip, the second driver chip, the third driver chip and the fourth driver chip respectively coincide with the orthographic projections of the fifth driver chip, the sixth driver chip, the seventh driver chip and the eighth driver chip.

[0063] Figure 2 FIG is a partial cross-sectional view of the resonant switched capacitor converter provided by an embodiment of the present invention at section AA'. Considering that the topology of the top circuit and the bottom circuit are the same, and both are about Figure 2 The cross section AA' shown is symmetrical, so here we only take the first module in the top circuit and the second module in the bottom circuit as an example. Figure 1-2 Provide detailed explanation.

[0064] Specifically, in the top-level circuit, the first module includes GaN devices S1, S2, S5, S6, resonant capacitor C1, flying capacitor C f1 As well as the first driver chip and the third driver chip, the second module in the bottom circuit includes GaN devices S9, S 10 、S 13 、S 14 , resonant capacitor C3, flying capacitor C f2 And the fifth driver chip, the seventh driver chip ( Figure 1 The first to eighth driver chips are not shown in FIG. Figure 2 As shown, in the direction perpendicular to the plane of the PCB board, the orthographic projections of S1, S2, S5, and S6 are respectively 10 、S 13 、S 14 The orthographic projection of the resonant capacitor C1 coincides with the orthographic projection of the resonant capacitor C3, and the flying capacitor C f1 The orthographic projection and flying capacitor C f2 The orthographic projections of the first and third driver chips coincide with the orthographic projections of the fifth and seventh driver chips, respectively. It should be understood that since the resonant capacitor C1 will be replaced by the flying capacitor C at the cross section AA', f1The shielding and resonant capacitor C3 will be blocked by the flying capacitor C f2 Block, so Figure 2 Only the flying capacitor C is shown f1 and C f2 .

[0065] Figure 3 : is a schematic diagram of a coupling mode of the first, second, third and fourth lines provided in an embodiment of the present invention, wherein L1, L2, L3 and L4 represent the self-inductance of the above four lines respectively, and M ij It represents the mutual inductance between trace i and trace j. Figure 2-3 As shown, the first and second traces are top traces, and the third and fourth traces are bottom traces. Figure 2 In the first direction shown, the orthographic projections of the first and second traces coincide with the orthographic projections of the third and fourth traces in a direction perpendicular to the plane of the PCB. This design approach can achieve balanced inductor currents and parameter consistency for these four PCB traces.

[0066] in addition, Figure 4 This is a schematic diagram of another cross section BB' of the resonant switched capacitor converter provided by an embodiment of the present invention. At cross section BB', the top circuit is composed of GaN devices S3, S4, S7, S8, resonant capacitor C2, flying capacitor C f1 The third module consists of the second driver chip and the fourth driver chip, and the GaN device S in the bottom circuit 11 、S 12 、S 15 、S 16 , resonant capacitor C4, flying capacitor C f2 The third module composed of the second driver chip and the fourth driver chip also meets the requirements. Figure 2 The positional relationship shown will not be repeated here.

[0067] Optionally, other wiring methods may be used in this embodiment. Figure 5-6 This is a schematic diagram of another coupling method for the first, second, third, and fourth lines provided by an embodiment of the present invention. Figure 5 、 Figure 6 In some other embodiments of the present invention, the first to fourth traces may be arranged in other ways. For example, the first, second, third, and fourth traces may be distributed in a direction perpendicular to the plane of the PCB board, and the orthographic projections of the first, second, third, and fourth traces may coincide with each other in the direction perpendicular to the plane of the PCB board. Alternatively, the first, second, third, and fourth traces may be arranged on the same layer in the PCB board.

[0068] It should be noted that the use of Figure 5 、 6 The overall layout of the circuit may also change when the coupling mode shown is used. In addition, the order of the first trace, the second trace, the third trace and the fourth trace is not limited in these two coupling modes. In other words, Figure 5 In the coupling mode shown, the first to second traces can be arranged vertically, and the first to fourth traces do not necessarily need to be arranged in a top-to-bottom order. Similarly, in Figure 6 In the perspective shown, the first to fourth traces are not necessarily arranged in order from left to right.

[0069] Figure 7 This is a topology diagram of two identical phase 4:1 resonant switched capacitor converters in the prior art. Figure 8 This is a schematic diagram of an operating mode of a two-phase 4:1 resonant switched capacitor converter in the prior art. Figure 9 This is another working mode diagram of a two-phase 4:1 resonant switched capacitor converter in the prior art. Figure 7-9 The above two same-phase 4:1 resonant switched capacitor converters include a first group of active switches: S1', S3', S5', S8', S9', S11', S13' and a second group of active switches: S2', S4', S6', S7', S10', S12', S14', S15'. The first group of active switches are turned on and off simultaneously, and the second group of active switches is complementary to the first group of active switches. In addition, the two groups of active switches have a duty cycle close to 50% without considering the dead time. The converter has two operating modes. Figure 8 The operating mode shown is that the first set of active switches is turned on. Figure 9 The operating mode shown is where the second set of active switches is open.

[0070] Those skilled in the art should know that when the switching frequency is equal to the resonant frequency, zero current switching can be achieved. The calculation formula for the resonant frequency is:

[0071]

[0072] Where L represents the total inductance of the resonant circuit, including parasitic inductance in the circuit, and C represents the total capacitance of the resonant circuit. For a two-phase 4:1 Dickson resonant switched capacitor converter, the required resonant inductance is generally less than 100nh.

[0073] In this embodiment, the parasitic inductance of the copper traces in the PCB board is used to replace the discrete inductor. Specifically, the copper traces in the PCB board can be regarded as straight conductors with a rectangular cross-section, and their self-inductance can be expressed as follows:

[0074]

[0075] Where l, b, and c represent the length, thickness, and width of the copper trace in the PCB, respectively.

[0076] It can be seen that the self-inductance L of the PCB trace i selfi It is determined by its own structure.

[0077] Obviously, compared with b and c, the effect of length l on self-inductance is dominant. Meeting the required resonant inductance value (20nH to 100nH) with only a single PCB trace will result in the copper trace length l being too long. In this way, the power density will not increase but will decrease. The parasitic resistance of the conductor will also increase, resulting in a decrease in the quality factor.

[0078] In view of this, this embodiment implements a double-layer routing design in the PCB board, and through PCB routing integration, effectively increases the inductance value while reducing the routing length l.

[0079] It should be understood that the traces in the PCB will generate parasitic inductance. The inductance is not only determined by the trace itself, but the PCB traces around each trace will also contribute to the inductance, forming mutual inductance.

[0080] For example, taking four traces as an example, the mutual inductance expression between the traces in the PCB board is:

[0081]

[0082]

[0083] at this time,

[0084]

[0085]

[0086]

[0087] Where, l represents the length of the trace on the PCB board, b i 、c i They represent the thickness and width of the trace in the PCB board, μ0 is the magnetic permeability in a vacuum, h is the vertical distance of the trace, and s is the horizontal distance of the trace.

[0088] Skin effect is caused by current flowing within a PCB trace, whose magnetic field results in higher lateral current density. Proximity effect is caused by adjacent PCB traces, whose magnetic fields affect current distribution. At high frequencies, these two effects increase the parasitic AC resistance of the PCB trace. Therefore, theoretically deriving AC resistance at high frequencies is difficult.

[0089] The Dowell equation can be used to calculate AC resistance as follows:

[0090]

[0091] Where l, b, c, σ, δ, ω and B n They represent the length, thickness, width, conductivity, skin depth, angular frequency, and average external magnetic field of the traces in the PCB, respectively.

[0092] Obviously, the total inductance between the traces is the sum of the self-inductance of the PCB traces and the mutual inductance between them. The total inductance expression is as follows:

[0093]

[0094] Figure 10 FIG. 1 is a schematic diagram showing the principle of a resonant switched capacitor converter using PCB trace integrated inductors provided by an embodiment of the present invention. Figure 10 As shown, this embodiment increases the mutual inductance M between PCB traces i and j by coupling and integrating multiple PCB traces. ij The number and value of the inductor increase the total inductance so that the resonant inductance value (i.e. Figure 1 、 4 , L1, L2, L3 and L4 (indicated by dotted lines in 10) meet the circuit resonance requirements.

[0095] Furthermore, existing resonant switched capacitor converters mostly use silicon-based devices, but this embodiment replaces them with gallium nitride devices. GaN devices offer low conduction and switching losses. Under soft-switching conditions, the switching losses of GaN devices are over 10 times lower than those of Si-based switches. Therefore, the use of GaN devices in this embodiment increases the switching frequency, reduces the required resonant inductance, and significantly reduces switching losses.

[0096] Below Figure 3 、 5 -6 are used to simulate the three routing coupling modes shown in FIG. 6 , which are named hybrid structure, vertical structure and horizontal structure respectively.

[0097] Specifically, the hybrid structure and single track routing were simulated under the conditions of switching frequency f = 300 kHz, distance between adjacent traces d = 0.1 mm, trace width c = 1.6 mm, and 1 oz. The results are shown in Table 1:

[0098] Table 1

[0099] Frequency 300 kHz Length / width / thickness Total inductance AC resistance Single track routing 55mm / 1.6mm / 2oz 50.17nH 5.08mΩ Hybrid structure 22mm / 1.6mm / 2oz 50.38nH 3.48mΩ

[0100] As shown in Table 1, under the same equivalent inductance, the PCB trace length of the mixed structure is reduced by 60%, and the AC resistance is reduced by 31.5%. Obviously, the application is more conducive to achieving higher power density and lower PCB copper loss.

[0101] Figure 11 is the relationship diagram of self-inductance, mutual inductance and total inductance of the mixed structure provided by the embodiment of the application and the PCB trace length, Figure 3 Figure 12 is the relationship diagram of self-inductance, mutual inductance and total inductance of the vertical structure provided by the embodiment of the application and the PCB trace length, Figure 5 Figure 13 is the relationship diagram of self-inductance, mutual inductance and total inductance of the horizontal structure provided by the embodiment of the application and the PCB trace length. As can be seen from Figure 6 , the self-inductance, mutual inductance and total inductance of the three structures all increase linearly with the PCB trace length, wherein the total inductance L1 and L4 of the horizontal structure are lower than L2 and L3, and the total inductance per unit length and the mutual inductance per unit length are the lowest in Figure 11-12 , the self-inductance, mutual inductance and total inductance of the vertical structure are the highest, and the total inductance L1 and L4 are relatively close to the inductors L2 and L3 of the vertical structure in Figure 11 , the self-inductance, mutual inductance and total inductance of the mixed structure are at a medium level, only slightly lower than those of the vertical structure, as shown in Figure 12 . In addition, the four total inductances of the mixed structure are basically the same and have no difference. Figure 13

[0102] Figure 14 is the relationship diagram of AC resistance of the mixed structure provided by the embodiment of the application and the PCB trace length, Figure 3 Figure 15 is the relationship diagram of AC resistance of the vertical structure provided by the embodiment of the application and the PCB trace length, Figure 5 Figure 16 is the relationship diagram of AC resistance of the horizontal structure provided by the embodiment of the application and the PCB trace length. As shown in Figure 6 , under the same PCB trace length, the AC resistance of the horizontal structure is relatively the highest among the three structures, and the two external AC resistances R1 and R4 are lower than the two internal AC resistances, which is caused by the proximity effect. Compared with the two outer PCB traces, the two inner PCB traces are more seriously affected by the proximity effect. The AC resistance of the vertical structure is the lowest among the three structures, and the four AC resistances of the vertical structure are relatively consistent when l<20mm, however, the two external AC resistances R1 and R4 are higher than the two internal AC resistances. Figure 14-15 Figure 16 ​​​​​​This shows that the AC resistance of the hybrid structure is at a medium level, and the four AC resistances of the hybrid structure can be consistent.

[0103] In summary, of the three coupling structures mentioned above, the horizontal structure is relatively disadvantageous in terms of total inductance and AC resistance, but has the lowest PCB cost. The vertical structure has advantages in both total inductance and AC resistance, but the parameters of the four PCB traces are slightly inconsistent. The hybrid structure has moderate total inductance and AC resistance, and the parameters of the four PCB traces are consistent. Compared with a single PCB trace, it can reduce PCB trace length by 60% and AC resistance by 31.5%. In summary, the hybrid structure is more suitable for inductor integration technology in this type of switched-capacitor converter.

[0104] It can be seen from the above embodiments that the beneficial effects of the present invention are:

[0105] The present invention provides a resonant switched capacitor converter using PCB traces with integrated inductors. In the top circuit, resonant capacitor C1 is connected to a first power device via a first trace, and resonant capacitor C2 is connected to a second power device via a second trace. In the bottom circuit, resonant capacitor C3 is connected to a fifth power device via a third trace, and resonant capacitor C4 is connected to a sixth power device via a fourth trace. Based on the high-frequency operating conditions of gallium nitride, the present invention designs the coupling method of the above four traces, thereby rationally utilizing the parasitic inductance in the traces and using them as resonant inductors in the resonant switched capacitor converter, ensuring that the inductance value meets the required requirements.

[0106] In the prior art, traditional switched-capacitor converters typically require planar inductors or discrete components to achieve soft switching. However, compared to active switches and ceramic capacitors, the introduction of inductors significantly reduces space utilization. Generally speaking, parasitic inductance in PCB copper traces can cause voltage spikes in active switching devices, generating noise, unnecessary crosstalk, and losses. By optimizing the PCB trace layout, the present invention not only reduces the volume and size of the converter, but also helps improve converter efficiency and reduce inductor costs.

[0107] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0108] Reference to terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc., mean that a particular feature, structure, material or characteristic being described is included in at least one embodiment or example of the present application. The appearances of the above-described terms in various places in the specification are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples. Also, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples. Moreover, those skilled in the art will appreciate that the described particular features, structures, materials, or characteristics can be combined in any suitable manner in other combinations of one or more embodiments or examples without necessarily being mutually exclusive.

[0109] The above further describes the present application in detail with reference to specific preferred embodiments. The present application is not limited to these descriptions. Any simple derivations or replacements made by those skilled in the art without departing from the concept of the present application shall be considered as falling within the protection scope of the present application.

Claims

1. A resonant switched capacitor converter using a PCB trace integrated inductor, characterized in that: include: A PCB board and a top circuit and a bottom circuit respectively located on both sides of the PCB board; wherein, The top-level circuit includes a first power device, a second power device, a third power device, a fourth power device, and resonant capacitors: C1 and C2; the bottom-level circuit includes a fifth power device, a sixth power device, a seventh power device, an eighth power device, and resonant capacitors: C3 and C4; wherein the resonant capacitor C1 is connected to the first power device through a first trace, the resonant capacitor C2 is connected to the second power device through a second trace, the resonant capacitor C3 is connected to the fifth power device through a third trace, and the resonant capacitor C4 is connected to the sixth power device through a fourth trace; The first wiring, the second wiring, the third wiring, and the fourth wiring are equivalent to four resonant inductors through mutual inductances and self-inductances of the wirings.

2. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 1, characterized in that: The power devices in the top-layer circuit and the bottom-layer circuit are both half-bridge devices.

3. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 2, characterized in that: The first routing line, the second routing line, the third routing line, and the fourth routing line are all copper traces.

4. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 3, characterized in that: The PCB board includes a top trace and a bottom trace, the top trace includes a first trace and a second trace, and the bottom trace includes a third trace and a fourth trace; Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first routing line and the second routing line coincide with the orthographic projections of the third routing line and the fourth routing line, respectively.

5. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 4, characterized in that: It also includes an input terminal and an output terminal; the top circuit also includes a flying capacitor C f1 and a first driver chip, a second driver chip, a third driver chip, and a fourth driver chip connected to the first power device, the second power device, the third power device, and the fourth power device, respectively; the first power device includes GaN devices S1 and S2, the second power device includes GaN devices S3 and S4, the third power device includes GaN devices S5 and S6, and the fourth power device includes GaN devices S7 and S8; wherein, The drain of S1 is connected to the input terminal, the source is connected to the drain of S2 and the first plate of the resonant capacitor C1, the source of S2 is connected to the drain of S3 and the flying capacitor C f1 The source of S3 is connected to the drain of S4 and the first plate of the resonant capacitor C2 respectively, the source of S4 is connected to the output terminal, the gate of S1 and the gate of S2 are both connected to the first driver chip, and the gate of S3 and the gate of S4 are both connected to the second driver chip; The drain of S5 is connected to the source of S4 and the drain of S7 respectively. The source of S5 is connected to the drain of S6, the second plate of the resonant capacitor C1 and the second plate of the resonant capacitor C2 respectively. The source of S6 is grounded. The source of S7 is connected to the flying capacitor C f1 The second electrode plate of is connected to the drain of S8, the source of S8 is grounded, the gate of S5 and the gate of S6 are both connected to the third driving chip, and the gate of S7 and the gate of S8 are both connected to the fourth driving chip.

6. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 5, characterized in that: The bottom circuit also includes a flying capacitor C f2 and a fifth driver chip, a sixth driver chip, a seventh driver chip, and an eighth driver chip connected to the fifth power device, the sixth power device, the seventh power device, and the eighth power device, respectively; The fifth power device includes GaN devices S9, S 10 , the sixth power device includes a GaN device S 11 、S 12 , the seventh power device includes a GaN device S 13 、S 14 , the eighth power device includes a GaN device S 15 、S 16 ;in, The drain of S9 is connected to the input terminal, and the source is connected to S 10 The drain of the resonant capacitor C3 is connected to the first plate, S 10 The source and S 11 The drain and flying capacitor C f2 The first plate connection, S 11 The source and S 12 The drain of the resonant capacitor C4 is connected to the first plate, S 12 The source of S9 is connected to the output terminal, the gate of S9 and S 10 The gates are connected to the fifth driver chip, S 11 The gate and S 12 The gates of are connected to the sixth driving chip; S 13 The drain and S 12 The source and S 15 The drain connection, S 13 The source and S 14 The drain of the resonant capacitor C3 and the second plate of the resonant capacitor C4 are connected, S 14 The source is grounded, S 15 The source of the flying capacitor C f2 The second plate and S 16 The drain connection, S 16 The source is grounded, S 13 The gate and S 14 The gates are connected to the seventh driver chip, S 15 The gate and S 16 The gates of the chips are connected to the eighth driver chip.

7. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 6, characterized in that: Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first power device, the second power device, the third power device, and the fourth power device respectively coincide with the orthographic projections of the fifth power device, the sixth power device, the seventh power device, and the eighth power device.

8. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 7, characterized in that: Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first driver chip, the second driver chip, the third driver chip, and the fourth driver chip respectively coincide with the orthographic projections of the fifth driver chip, the sixth driver chip, the seventh driver chip, and the eighth driver chip.

9. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 3, characterized in that: The first routing line, the second routing line, the third routing line, and the fourth routing line are distributed along a direction perpendicular to the plane where the PCB board is located; Along a direction perpendicular to the plane of the PCB board, the orthographic projections of the first routing line, the second routing line, the third routing line, and the fourth routing line coincide with each other.

10. The resonant switched capacitor converter using PCB trace integrated inductor according to claim 3, characterized in that: The first routing line, the second routing line, the third routing line and the fourth routing line are arranged on the same layer in the PCB board.

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