Controller, power system and vehicle

Abstract

The controller comprises a main control chip and at least two of an electric motor driving circuit, a first and a second DCDC converter driving circuit, a transmission driving circuit, a throttle signal sampling circuit, an OBC driving circuit and a BMS connected with the main control chip; the electric motor driving circuit drives the electric motor to work; the first DCDC converter driving circuit drives the first DCDC converter to boost the voltage of the power battery; the transmission driving circuit drives the transmission electromagnetic valve to work; the throttle signal sampling circuit samples the throttle signal of the vehicle; the second DCDC converter driving circuit drives the second DCDC converter to step down the voltage of the power battery; the OBC driving circuit drives the OBC to work; and the BMS monitors the state of the power battery. The controller can integrate the control of at least two of the electric motor, the double DCDC, the transmission and multiple vehicle items, has low hardware cost and good stability.

Description

Technical Field

[0001] This disclosure relates to the field of vehicle technology, and more particularly to a controller, power system, and vehicle. Background Technology

[0002] Currently, most all-in-one controllers in the industry only achieve simple physical integration. Their hardware architecture cannot achieve complex functional integration and control based on a single main control chip, and cannot truly meet the requirements of low cost, modularity, and platformization for use in electronic control systems. Summary of the Invention

[0003] This disclosure aims to at least partially address one of the technical problems in the related art. Therefore, the purpose of this disclosure is to provide a controller, power system, and vehicle that reduces the hardware cost of the controller and improves the stability of the hardware.

[0004] In a first aspect, embodiments of this disclosure provide a controller, the controller comprising a main control chip; and at least two of the following: a motor drive circuit, a first DC-DC converter drive circuit, a transmission drive circuit, a throttle signal sampling circuit, a second DC-DC converter drive circuit, an on-board charger (OBC) drive circuit, and a power management system (BMS), all connected to the main control chip; wherein, the motor drive circuit is used to drive the vehicle's motor; the first DC-DC converter drive circuit is used to drive the first DC-DC converter to boost the voltage supplied by the vehicle's power battery; the transmission drive circuit is used to drive the vehicle's transmission solenoid valve; the throttle signal sampling circuit is used to sample the vehicle's throttle signal; the second DC-DC converter drive circuit is used to drive the second DC-DC converter to boost the voltage supplied by the power battery; the OBC drive circuit is used to drive the vehicle's OBC; and the BMS is used to monitor the state of the power battery.

[0005] In addition, the controller according to the embodiments of this disclosure may also have the following additional technical features:

[0006] According to one embodiment of this disclosure, the controller further includes at least one of a generator drive circuit and an engine drive circuit, which are respectively connected to the main control chip; the generator drive circuit is used to drive the generator of the vehicle to work; the engine drive circuit is used to drive the fuel injector and igniter of the engine of the vehicle to work.

[0007] According to one embodiment of this disclosure, the controller includes the electric motor drive circuit, the engine drive circuit, and the throttle signal sampling circuit; the main control chip is used to: receive the throttle signal sent by the throttle signal sampling circuit; determine the output torque of the electric motor and the engine based on the throttle signal; send an electric motor drive signal to the electric motor drive circuit based on the output torque of the electric motor; and send an engine drive signal to the engine drive circuit based on the output torque of the engine.

[0008] According to one embodiment of this disclosure, the controller includes the motor drive circuit, the first DC-DC converter drive circuit, and the generator drive circuit.

[0009] According to one embodiment of this disclosure, the controller includes the electric motor drive circuit, the first DC-DC converter drive circuit, the generator drive circuit, the transmission drive circuit, and the throttle signal sampling circuit.

[0010] According to one embodiment of this disclosure, the controller further includes: a first PWM signal output module, connected to the main control chip and the motor drive circuit respectively, for outputting a first PWM signal to the motor drive circuit under the control of the main control chip to drive the motor to work; a second PWM signal output module, connected to the main control chip and the generator drive circuit respectively, for outputting a second PWM signal to the generator drive circuit under the control of the main control chip to drive the generator to work; and a third PWM signal output module, connected to the main control chip and the first DC-DC converter drive circuit respectively, for outputting a third PWM signal to the first DC-DC converter drive circuit under the control of the main control chip to control the first DC-DC converter to work.

[0011] According to one embodiment of this disclosure, the controller further includes a first electronic control module, a second electronic control module, and a first DC-DC converter; the first electronic control module is connected to the motor drive circuit and the motor respectively, and the motor drive circuit is used to control the first electronic control module to work according to the first PWM signal to drive the motor to work; the second electronic control module is connected to the generator drive circuit and the generator respectively, and the generator drive circuit is used to control the second electronic control module to work according to the second PWM signal to drive the generator to work; the first DC-DC converter is connected to the first DC-DC converter drive circuit, and the first DC-DC converter drive circuit is used to control the first DC-DC converter to work according to the third PWM signal.

[0012] According to one embodiment of this disclosure, the controller further includes: a first resolver excitation circuit connected to the main control chip, used to output a first excitation signal to a first resolver transformer corresponding to the motor under the control of the main control chip, so as to provide stator power to the stator of the motor; a first resolver signal acquisition circuit connected to the main control chip, used to acquire the resolver signal of the first resolver transformer; wherein, the main control chip is further used to obtain the rotor position and angle of the motor according to the resolver signal acquired by the first resolver signal acquisition circuit, and control the first PWM signal output module to output the first PWM signal according to the rotor position and angle of the motor.

[0013] According to one embodiment of this disclosure, the controller further includes: a first gate-level detection circuit connected to the main control chip, configured to issue an error signal when receiving any one of the following signals: a motor overcurrent signal, a DC-DC battery-side overvoltage signal, a DC-DC bus-side overvoltage signal, and a motor drive circuit error signal; wherein, the main control chip is further configured to disable the control of the first PWM signal output module to output the first PWM signal when receiving the error signal issued by the first gate-level detection circuit.

[0014] According to one embodiment of this disclosure, the controller further includes: a first gate-level latch circuit, which is connected to the first gate-level detection circuit and the first PWM signal output module respectively, and is used to continuously output a shutdown signal to the first PWM signal output module after receiving an error signal from the first gate-level detection circuit, so as to prevent the first PWM signal output module from outputting the first PWM signal.

[0015] According to one embodiment of this disclosure, the first gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

[0016] According to one embodiment of this disclosure, the controller further includes: a first overcurrent detection circuit, respectively connected to the main control chip and the first gate-level detection circuit; and a first hardware overcurrent threshold setting circuit, respectively connected to the main control chip and the first overcurrent detection circuit, for providing a first hardware current threshold to the first overcurrent detection circuit under the control of the main control chip, so that when the first overcurrent detection circuit determines that the motor is overcurrent based on the first hardware current threshold and the sampled motor current, it sends the motor overcurrent signal to the main control chip and the first gate-level detection circuit respectively.

[0017] According to one embodiment of this disclosure, the controller further includes: a first current detection circuit connected to the main control chip, used to collect motor current, wherein the main control chip is further used to determine that the motor is overcurrent when the motor current is greater than a first software current threshold, wherein the first software current threshold is less than a first hardware current threshold.

[0018] According to one embodiment of this disclosure, the controller further includes: a second resolver excitation circuit connected to the main control chip, used to output a second excitation signal to a second resolver corresponding to the generator under the control of the main control chip, so as to provide stator power to the stator of the generator; a second resolver signal acquisition circuit connected to the main control chip, used to acquire the resolver signal of the second resolver; wherein, the main control chip is further used to obtain the rotor position and angle of the generator according to the resolver signal acquired by the second resolver signal acquisition circuit, and control the second PWM signal output module to output the second PWM signal according to the rotor position and angle of the generator.

[0019] According to one embodiment of this disclosure, the controller further includes: a second gate-level detection circuit connected to the main control chip, used to issue an error signal when receiving any one of the following signals: generator overcurrent signal, DC-DC battery side overvoltage signal, DC-DC bus side overvoltage signal, and generator drive circuit error signal; wherein, the main control chip is further used to disable the control of the second PWM signal output module to output the second PWM signal when receiving the error signal issued by the second gate-level detection circuit.

[0020] According to one embodiment of this disclosure, the controller further includes: a second gate-level latch circuit, which is connected to the second gate-level detection circuit and the second PWM signal output module respectively, and is used to continuously output a shutdown signal to the second PWM signal output module after receiving an error signal from the second gate-level detection circuit, so as to prevent the second PWM signal output module from outputting the second PWM signal.

[0021] According to one embodiment of this disclosure, the second gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

[0022] According to one embodiment of this disclosure, the controller further includes: a second overcurrent detection circuit, respectively connected to the main control chip and the second gate-level detection circuit; and a second hardware overcurrent threshold setting circuit, respectively connected to the main control chip and the second overcurrent detection circuit, for providing a second hardware current threshold to the second overcurrent detection circuit under the control of the main control chip, so that when the second overcurrent detection circuit determines that the generator is overcurrent based on the second hardware current threshold and the sampled generator current, it sends the generator overcurrent signal to the main control chip and the second gate-level detection circuit respectively.

[0023] According to one embodiment of this disclosure, the controller further includes: a second current detection circuit connected to the main control chip, used to collect generator current, wherein the main control chip is further used to determine that the generator is overcurrent when the generator current is greater than a second software current threshold, wherein the second software current threshold is less than a second hardware current threshold.

[0024] According to one embodiment of this disclosure, the controller further includes: a third gate-level detection circuit connected to the main control chip, used to issue an error signal when receiving any one of the following signals: a DC-DC overcurrent signal, a DC-DC battery-side overvoltage signal, a DC-DC bus-side overvoltage signal, and an error signal from the first DC-DC converter drive circuit; wherein, the main control chip is further used to disable the control of the third PWM signal output module to output the third PWM signal after receiving the error signal issued by the third gate-level detection circuit.

[0025] According to one embodiment of this disclosure, the controller further includes: a third gate-level latch circuit, which is connected to the third gate-level detection circuit and the third PWM signal output module respectively, and is used to continuously output a shutdown signal to the third PWM signal output module after receiving an error signal from the third gate-level detection circuit, so as to prevent the third PWM signal output module from outputting the third PWM signal.

[0026] According to one embodiment of this disclosure, the third gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

[0027] According to one embodiment of this disclosure, the controller further includes: a third overcurrent detection circuit, respectively connected to the main control chip and the third gate-level detection circuit; and a third hardware overcurrent threshold setting circuit, respectively connected to the main control chip and the third overcurrent detection circuit, for providing a third hardware current threshold to the third overcurrent detection circuit under the control of the main control chip, so that when the third overcurrent detection circuit determines that the first DC-DC converter is overcurrent based on the third hardware current threshold and the sampled current of the first DC-DC converter, it sends the DC-DC overcurrent signal to the main control chip and the third gate-level detection circuit respectively.

[0028] According to one embodiment of this disclosure, the controller further includes: a third current detection circuit connected to the main control chip, used to collect the current of the first DC-DC converter, wherein the main control chip is further used to determine that the first DC-DC converter is overcurrent when the current of the first DC-DC converter is greater than a third software current threshold, wherein the third software current threshold is less than the third hardware current threshold.

[0029] According to one embodiment of this disclosure, the controller further includes: a first voltage sampling circuit for sampling the DC-DC battery-side voltage; a first overvoltage detection circuit connected to the first voltage sampling circuit, the main control chip, and the third gate-level detection circuit; and a first hardware voltage threshold setting circuit connected to the main control chip and the first overvoltage detection circuit, for providing a first hardware voltage threshold to the first overvoltage detection circuit under the control of the main control chip, so that when the first overvoltage detection circuit determines that the DC-DC battery-side voltage is overvoltage based on the first hardware voltage threshold and the DC-DC battery-side voltage, it sends the DC-DC battery-side overvoltage signal to the main control chip and the gate-level detection circuit respectively.

[0030] According to one embodiment of this disclosure, the controller further includes: a second voltage sampling circuit for sampling the DC-DC bus side voltage; a second overvoltage detection circuit connected to the second voltage sampling circuit, the main control chip, and the gate-level detection circuit; and a second hardware voltage threshold setting circuit connected to the main control chip and the second overvoltage detection circuit, for providing a second hardware voltage threshold to the second overvoltage detection circuit under the control of the main control chip, so that when the second overvoltage detection circuit determines that the DC-DC bus side voltage is overvoltage based on the second hardware voltage threshold and the DC-DC bus side voltage, it sends the DC-DC bus side overvoltage signal to the main control chip and the gate-level detection circuit respectively.

[0031] According to one embodiment of this disclosure, the controller further includes: a first CAN transceiver circuit connected to the main control chip, used to enable the main control chip to perform CAN communication with the vehicle's energy network.

[0032] According to one embodiment of this disclosure, the controller further includes: a second CAN transceiver circuit connected to the main control chip, used to enable CAN communication between the main control chip and the chassis network of the vehicle; and a third CAN transceiver circuit connected to the main control chip, used to enable CAN communication between the main control chip and the ECM network of the vehicle.

[0033] According to one embodiment of this disclosure, the controller further includes an auxiliary chip and a monitoring circuit. The monitoring circuit is connected to the third CAN transceiver circuit, the main control chip, and the auxiliary chip, respectively. The main control chip is further configured to: send a CAN shutdown signal to the monitoring circuit through the auxiliary chip when the ECM network is abnormal, so as to shut down the third CAN transceiver circuit through the monitoring circuit.

[0034] According to one embodiment of this disclosure, the controller further includes a power management chip, the main control chip is connected to the power management chip and the auxiliary chip respectively, and is further configured to reset the main control chip through the auxiliary chip and the power management chip when an error occurs.

[0035] According to one embodiment of this disclosure, the controller further includes a drive chip connected to the main control chip, the drive chip being used to drive the clutch pressure valve, the main pressure solenoid valve and the overcooling protection solenoid valve of the transmission system under the control of the main control chip.

[0036] According to one embodiment of this disclosure, the controller further includes a sampling circuit for sampling at least one of the following signals: pressure signal sampling signal, temperature sampling signal, switch signal, position signal, collision signal, electronically controlled cooling water pump feedback signal, water channel temperature, motor temperature, generator temperature, first electronic control module temperature, second electronic control module temperature, and DC-DC converter temperature.

[0037] According to one embodiment of this disclosure, the controller further includes: a LIN transceiver, connected to the main control chip and used to connect to an external controller, for enabling the main control chip to communicate with the external controller via the LIN protocol; and a storage module, connected to the main control chip, for storing data generated during the operation of the main control chip.

[0038] According to one embodiment of this disclosure, the controller further includes: a power control circuit, connected to the second CAN transceiver circuit and the power management chip respectively, for controlling the power supply to power the power management chip after receiving a wake-up signal, so as to wake up the main control chip through the power management chip, wherein the wake-up signal is generated by the second CAN transceiver circuit according to the wake-up message sent by the chassis network; wherein, after the main control chip is woken up, it outputs a power hold signal to the power control circuit, so that the power control circuit continuously controls the power supply to power the power management chip under the control of the power hold signal.

[0039] Secondly, embodiments of this disclosure provide a power system including the controller described in the above embodiments.

[0040] Thirdly, this disclosure provides a vehicle including the power system described in the above embodiments.

[0041] The controller, powertrain, and vehicle of this disclosure integrate at least two of the electric motor controller, generator controller, DC-DC controller, transmission controller, and vehicle controller into a single main control chip. This single main control chip enables control of at least two of the electric motor, dual DC-DC controllers, transmission, and multiple vehicle components, thereby reducing the hardware cost of the controller and improving its stability.

[0042] Additional aspects and advantages of this disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this disclosure. Attached Figure Description

[0043] Figure 1 This is a structural block diagram of a controller motherboard according to an embodiment of the present disclosure;

[0044] Figure 2 This is a structural block diagram of a controller motherboard according to a specific embodiment of the present disclosure;

[0045] Figure 3 This is a structural block diagram of the motor control section according to an embodiment of the present disclosure;

[0046] Figure 4 This is a structural block diagram of a generator control section according to an embodiment of the present disclosure;

[0047] Figure 5 This is a structural block diagram of the DC-DC control section according to an embodiment of this disclosure;

[0048] Figure 6 This is a structural block diagram of a vehicle control section according to an embodiment of the present disclosure;

[0049] Figure 7This is a schematic block diagram of the controller motherboard according to a specific embodiment of the present disclosure;

[0050] Figure 8 This is a structural block diagram of the power distribution section according to an embodiment of the present disclosure;

[0051] Figure 9 This is a structural block diagram of the power system according to an embodiment of the present invention;

[0052] Figure 10 This is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0053] Figure label:

[0054] 100 - Controller, 310 - First DC-DC converter, 320 - Second DC-DC converter, 400a - Power battery, 400b - Low-voltage battery, M1 - Electric motor, M2 - Generator, M3 - Engine;

[0055] 2a-Motor drive circuit, 3a-First DC-DC converter drive circuit, 3b-Transmission drive circuit, 3c-Throttle signal sampling circuit, 3d-Second DC-DC converter drive circuit, 3e-On-board charger (OBC) drive circuit, 3f-Power management system (BMS), 3g-Driver chip, 4a-First PWM signal output module, 4b-Second PWM signal output module, 4c-Third PWM signal output module, 5a-First electronic control module, 5b-Second electronic control module;

[0056] 1-Main control chip, 5-First gate-level detection circuit, 6-First resolver excitation circuit, 7-First resolver signal acquisition circuit, 8-First gate-level latch circuit, 9-First current detection circuit, 10-First hardware overcurrent threshold setting circuit, 11-First overcurrent detection circuit, 13-Second gate-level detection circuit, 14-Second resolver excitation circuit, 15-Second resolver signal acquisition circuit, 16-Second gate-level latch circuit, 17-Second current detection circuit, 18-Second hardware overcurrent threshold setting circuit, 19-Second overcurrent detection circuit, 21-Third gate-level detection circuit, 22-Third gate-level latch circuit, 23-Third current detection circuit, 24-Third hardware overcurrent threshold setting circuit, 25-The Three overcurrent detection circuits, 26-first voltage sampling circuit, 27-first hardware voltage threshold setting circuit, 28-first overvoltage detection circuit, 29-second voltage sampling circuit, 30-second hardware voltage threshold setting circuit, 31-second overvoltage detection circuit, 32-first CAN transceiver circuit, 33-second CAN transceiver circuit, 34-third CAN transceiver circuit, 35-fourth CAN transceiver circuit, 36-auxiliary chip, 37-monitoring circuit, 38-power management chip, 40-digital signal conditioning circuit, 41-analog signal conditioning circuit, 42-temperature sampling circuit, 43-LIN transceiver, 44-storage module, 45-power control circuit, 46-voltage monitoring circuit;

[0057] 451 - First power distribution unit; 452 - Second power distribution unit;

[0058] 4511-First preset power supply, 4512-Soft start circuit, 4513-First filter circuit, 4521-Second preset power supply, 4522-Second filter circuit, 4523-Switching circuit, 4524-Wake-up source;

[0059] 1000 - Powertrain; 10000 - Vehicle. Detailed Implementation

[0060] Embodiments of this disclosure are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this disclosure, and should not be construed as limiting this disclosure.

[0061] The controller, power system, and vehicle of embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0062] Figure 1 This is a structural block diagram of the controller according to an embodiment of the present disclosure.

[0063] like Figure 1As shown, the controller 100 includes a main control chip 1; and at least two of the following connected to the main control chip 1: a motor drive circuit 2a (which may be mounted on a first drive board), a first DC-DC converter drive circuit 3a (which may be mounted on a second drive board), a transmission drive circuit 3b, a throttle signal sampling circuit 3c, a second DC-DC converter drive circuit 3d, an on-board charger (OBC) drive circuit 3e, and a power management system (BMS) 3f. Figure 1 (Taking examples including 2a and 3a-3f above). Among them, the main control chip 1 can be RH850 / C1M-A2.

[0064] The system includes: an electric motor drive circuit 2a for driving the vehicle's electric motor M1; a first DC-DC converter drive circuit 3a for driving the first DC-DC converter 310 to boost the voltage supplied by the vehicle's power battery 400a; a transmission drive circuit 3b (implemented via an L9305 chip) for driving the vehicle's transmission solenoid valve; a throttle signal sampling circuit 3c (connectable to a throttle sensor) for sampling the vehicle's throttle signal; a second DC-DC converter drive circuit 3d for driving the second DC-DC converter 320 to step down the voltage supplied by the power battery 400a and charge the low-voltage battery 400b; an OBC drive circuit 3e for driving the vehicle's OBC to charge the power battery 400a; and a BMS 3f for monitoring the status of the power battery 400a (such as battery temperature and voltage).

[0065] Specifically, the controller 100 includes at least two of the following: a motor drive circuit 2a, a first DC-DC converter drive circuit 3a, a transmission drive circuit 3b, a throttle signal sampling circuit 3c, a second DC-DC converter drive circuit 3d, an on-board charger (OBC) drive circuit 3e, and a power management system (BMS) 3f. That is, 21 + 35 + 35 + 21 + 7 + 1 = 120 combinations. Taking the controller 100, which includes a motor drive circuit 2a, a throttle signal sampling circuit 3c, and a first DC-DC converter drive circuit 3a, as an example, after receiving the first torque request (which can be determined based on the throttle signal sampled by the throttle signal sampling circuit 3c), the main control chip 1 can control the motor drive circuit 2a to control the vehicle's first electronic control module 5a to drive the motor M1 and drive the vehicle. After receiving the boost request, it controls the first DC-DC converter drive circuit 3a to boost the voltage of the first DC-DC converter 310, so that the vehicle's power battery 400a can supply power to the motor M1 through the first DC-DC converter 310. Thus, this controller integrates motor control and DC-DC boost control, and both controls are implemented through a single main control chip 1. Compared with the simple physical integration in related technologies, this results in lower hardware costs, better stability, and lower complexity.

[0066] In some embodiments, such as Figure 2 As shown, the controller 100 also includes at least one of a generator drive circuit 2b (which can be mounted on the second drive board) and an engine drive circuit 2c, both connected to the main control chip 1. The generator drive circuit 2b drives the vehicle's generator M2; the engine drive circuit 2c drives the fuel injectors and igniters of the vehicle's engine M3.

[0067] Specifically, the controller 100 includes at least two of the following: a motor drive circuit 2a, a first DC-DC converter drive circuit 3a, a transmission drive circuit 3b, a throttle signal sampling circuit 3c, a second DC-DC converter drive circuit 3d, an on-board charger (OBC) drive circuit 3e, and a power management system (BMS) 3f. It also includes at least one of a generator drive circuit 2b and an engine drive circuit 2c, allowing for 120 × 3 = 360 possible combinations. Taking the controller 100 including a motor drive circuit 2a, a throttle signal sampling circuit 3c, a generator drive circuit 2b, and a second DC-DC converter drive circuit 3d as an example... After receiving the first torque request (which can be determined based on the throttle signal sampled by the throttle signal sampling circuit 3c), the main control chip 1 can control the motor drive circuit 2a to control the vehicle's first electronic control module 5a to drive the motor M1 and drive the vehicle. After receiving the second torque request, it can control the generator drive circuit 2b to control the vehicle's second electronic control module 5b to generate electricity from the generator M2 and supply power to the motor M1. After receiving the step-down request, it controls the second DC-DC converter drive circuit 3d to perform step-down control on the second DC-DC converter 320, at which time the power battery 400a can charge the low-voltage battery 400b through the second DC-DC converter 320.

[0068] In this embodiment, the control of the motor M1, generator M2, and DC-DC converter is achieved through a single main control chip 1, integrating the functions of a three-in-one controller: a Traction Motor Control Unit (TMCU), a Generator Control Unit (GMCU), and a Bi-directional DC-DC Converter (BDC). This reduces the hardware cost of the controller 100 and improves its stability. Furthermore, integrating the generator drive circuit 2b for driving the second electronic control module 5b and the first DC-DC converter drive circuit 3a for driving the first DC-DC converter 310 into a single drive board further reduces the cost and space required for the control system. Simultaneously, separating the first and second drive boards allows for independent control of the motor M1, generator M2, and first DC-DC converter 310, enhancing control convenience.

[0069] In some embodiments, as shown in number 1 in Table 1, the controller 100 includes an electric motor drive circuit 2a, an engine drive circuit 2c, and a throttle signal sampling circuit 3c.

[0070] Table 1

[0071]

[0072] In this embodiment, the main control chip 1 is used to: receive the throttle signal sent by the throttle signal sampling circuit 3c; determine the output torque of the motor M1 and the engine M3 based on the throttle signal; send the motor drive signal to the motor drive circuit 2a based on the output torque of the motor M1; and send the engine drive signal to the engine drive circuit 2c based on the output torque of the engine M2.

[0073] By combining the electric motor drive circuit 2a, the engine drive circuit 2c, and the throttle signal sampling circuit 3c, the signal transmission time that was originally required between the three controllers (electric motor controller, vehicle controller, and engine controller) can be integrated into the internal signal transmission of a single controller, saving signal transmission time and enabling the engine M3 and electric motor M1 to respond quickly to the throttle signal.

[0074] In some embodiments, as shown in number 2 in Table 1, the controller 100 includes a motor drive circuit 2a, a first DC-DC converter drive circuit 3a, and a generator drive circuit 2c.

[0075] By combining the motor drive circuit 2a, the first DC-DC converter drive circuit 3a, and the generator drive circuit 2c, the motor controller, generator controller, and DC-DC controller are integrated. Since the control logic and control circuits of these three controllers are consistent, their integration allows for component reuse, saving costs, reducing code volume, and requiring less computing power.

[0076] In some embodiments, as shown in number 3 in Table 1, the controller 100 includes a motor drive circuit 2a, a first DC-DC converter drive circuit 3a, a generator drive circuit 2b, a transmission drive circuit 3b, and a throttle signal sampling circuit 3c.

[0077] By integrating the motor drive circuit 2a, the first DC-DC converter drive circuit 3a, the generator drive circuit 2b, the transmission drive circuit 3b, and the throttle signal sampling circuit 3c, the motor controller, generator controller, transmission controller, DC-DC controller, and vehicle controller can be achieved. Since the control logic and control circuits of these five controllers are consistent, components can be reused to save costs, reduce the amount of code, and require less computing power.

[0078] In some embodiments, such as Figure 2 As shown, the controller 100 also includes:

[0079] The first PWM signal output module 4a is connected to the main control chip 1 and the motor drive circuit 2a respectively, and is used to output the first PWM signal to the motor drive circuit 2a under the control of the main control chip 1 to drive the motor M1 to work.

[0080] The second PWM signal output module 4b is connected to the main control chip 1 and the generator drive circuit 2b respectively. It is used to output the second PWM signal to the generator drive circuit 2b under the control of the main control chip 1 to drive the generator M2 to work.

[0081] The third PWM signal output module 4c is connected to the main control chip 1 and the first DC-DC converter drive circuit 3a respectively. It is used to output the third PWM signal to the first DC-DC converter drive circuit 3a under the control of the main control chip 1 to control the first DC-DC converter 200 to work.

[0082] In some embodiments, such as Figure 2 As shown, the controller 100 also includes a first electronic control module 5a, a second electronic control module 5b, and a first DC-DC converter 310.

[0083] The first electronic control module 4a is connected to the motor drive circuit 2a and the motor M1 respectively. The motor drive circuit 2a is used to control the first electronic control module 4a to work according to the first PWM signal, so as to drive the motor M1 to work.

[0084] The second electronic control module 5b is connected to the generator drive circuit 2b and the generator M2 respectively. The generator drive circuit 2b is used to control the second electronic control module 5b to work according to the second PWM signal, so as to drive the generator M2 to work.

[0085] The first DC-DC converter 310 and the first DC-DC converter driving circuit 3a are used to control the first DC-DC converter 310 to work according to the third PWM signal.

[0086] In some embodiments, such as Figure 3 As shown, the controller 100 also includes a first resolver excitation circuit 6 and a first resolver signal acquisition circuit 7 connected to the main control chip 1. The first resolver excitation circuit 6 is used to output a first excitation signal to the first resolver set for the corresponding motor M1 under the control of the main control chip 1, so as to provide stator power to the stator of the motor M1; the first resolver signal acquisition circuit 7 is used to acquire the resolver signal of the first resolver.

[0087] In this embodiment, the main control chip 1 is also used to: obtain the rotor position and angle of the motor M1 based on the resolver signal collected by the first resolver signal acquisition circuit 7, and control the first PWM signal output module 4a to output the first PWM signal based on the rotor position and angle of the motor M1.

[0088] In some embodiments, such as Figure 3 As shown, the controller 100 also includes: a first gate-level detection circuit 5, connected to the main control chip 1, used to issue an error signal when it receives any of the following signals: motor overcurrent signal, DCDC battery side overvoltage signal, DCDC bus side overvoltage signal, and motor drive circuit error signal.

[0089] The main control chip 1 is also used to prevent the first PWM signal output by the first PWM signal output module 4a when it receives an error signal from the first gate-level detection circuit 5.

[0090] In some embodiments, such as Figure 3 As shown, the controller 100 also includes a first gate-level latch circuit 8, which is connected to the first gate-level detection circuit 5 and the first PWM signal output module 4a respectively. After receiving the error signal sent by the first gate-level detection circuit 5, the first gate-level latch circuit 8 continuously outputs a shutdown signal to the first PWM signal output module 4a to prevent the first PWM signal output module 4a from outputting the first PWM signal.

[0091] In this embodiment, the first gate-level detection circuit 5 is also connected to the main control chip 1 and is used to stop outputting the shutdown signal when it receives the clear latch signal sent by the main control chip 1.

[0092] Specifically, after at least one of the following faults occurs—motor overcurrent, DC-DC battery side overvoltage, DC-DC bus side overvoltage, and motor drive circuit error—the first gate-level latch circuit 8 is triggered to latch, and a hardware shutdown signal is sent to the first PWM signal output module 4a. The main control chip 1 is also triggered to perform torque limiting or shutdown processing on the motor M1, or torque limiting followed by shutdown processing. After the fault is cleared, the main control chip 1 also sends a clear latch signal to the first gate-level latch circuit 8 so that the first gate-level latch circuit 8 stops sending the hardware shutdown signal.

[0093] Specifically, see Figure 3 For the TMCU control section, during the power-on self-test initialization process or during operation, the main control chip 1 diagnoses the initial state of the system's hardware and software. If no faults such as TMCU overcurrent, BDC battery-side overvoltage, BDC bus-side overvoltage, or driver board errors are detected, and all hardware circuits are functioning normally, the main control chip 1, upon receiving the application layer open-wave and torque request via CAN, enables the first PWM signal output module 4a and the motor drive circuit 2a. Based on the sine / cosine signals acquired by the resolver, it obtains the rotor position and angle of the motor M1 through an algorithm and sends PWM drive signals (U-phase +, U-phase -, V-phase +, V-phase -, W-phase +, W-phase -) to the first electronic control module 5a. The main control chip 1 then uses a software Field Oriented Control (FOC) algorithm to precisely control the motor M1 based on the angle and speed values ​​decoded by the resolver.

[0094] During this process, the main control chip 1 can monitor the TMCU overcurrent signal, SMCU error signal, SMCU reset signal, PMIC reset signal, BST_V1 (BDC battery side) overvoltage signal, BST_V2 (BDC bus side) overvoltage signal, and TMCU driver board P / N phase error signal in real time through the first gate-level detection circuit 5. When one or more of these faults occur, the first gate-level latch circuit 8 latches the PWM signal of the motor M1, and the main control chip 1 performs torque limiting or waveform shutdown processing on the TMCU, or first torque limiting and then waveform shutdown processing. When the fault is cleared, a clear latch signal is issued, and the system is in a normal waiting request state.

[0095] In some embodiments, such as Figure 3 As shown, the controller 100 also includes a first hardware overcurrent threshold setting circuit 10 and a first overcurrent detection circuit 11.

[0096] See Figure 3The first overcurrent detection circuit 11 is connected to the main control chip 1 and the first gate-level detection circuit 5 respectively; the first hardware overcurrent threshold setting circuit 10 is connected to the main control chip 1 and the first overcurrent detection circuit 11 respectively, and is used to provide the first hardware current threshold to the first overcurrent detection circuit 11 under the control of the main control chip 1, so that when the first overcurrent detection circuit 11 determines that the motor M1 is overcurrent according to the first hardware current threshold and the sampled motor current, it sends the motor overcurrent signal to the main control chip 1 and the first gate-level detection circuit 5 respectively.

[0097] In some embodiments, see Figure 3 The controller 100 also includes a first current detection circuit 9, connected to the main control chip 1, for collecting motor current. The main control chip 1 is also used to determine that the motor M1 is overcurrent when the motor current is greater than a first software current threshold, wherein the first software current threshold is less than a first hardware current threshold.

[0098] Specifically, see Figure 3 To ensure the reliability of overcurrent diagnosis, dual overcurrent diagnosis is set up, including software overcurrent comparison and hardware overcurrent comparison; and the software overcurrent threshold (i.e., the first software current threshold) is lower than the hardware overcurrent threshold (i.e., the first hardware current threshold) so that software processing is faster than hardware processing.

[0099] Optionally, for hardware overcurrent diagnostics, see [link to relevant documentation]. Figure 3 Furthermore, overcurrent diagnostics can be set for the high and low sides of motor M1 respectively to further ensure the reliability of overcurrent diagnostics.

[0100] In some embodiments, such as Figure 4 As shown, the controller 100 also includes a second resolver excitation circuit 14 and a second resolver signal acquisition circuit 15 connected to the main control chip 1. The second resolver excitation circuit 14 is connected to the main control chip 1 and is used to output a second excitation signal to the second resolver installed in the corresponding generator M2 under the control of the main control chip 1, so as to provide stator power to the stator of the generator M2; the second resolver signal acquisition circuit 15 is connected to the main control chip 1 and is used to acquire the resolver signal of the second resolver.

[0101] The main control chip 1 is also used to obtain the rotor position and angle of the generator M2 based on the resolver signal collected by the second resolver signal acquisition circuit 15, and to control the second PWM signal output module 4b to output the second PWM signal based on the rotor position and angle of the generator M2.

[0102] In some embodiments, such as Figure 4As shown, the controller 100 also includes a second gate-level detection circuit 13, which is connected to the main control chip 1 and is used to issue an error signal when it receives any of the following signals: generator overcurrent signal, DC-DC battery side overvoltage signal, DC-DC bus side overvoltage signal, and generator drive circuit error signal.

[0103] The main control chip 1 is also used to prevent the second PWM signal output by the second PWM signal output module 4b when it receives an error signal from the second gate-level detection circuit 13.

[0104] Specifically, after the main control chip 1 determines through the second gate-level detection circuit 13 that no generator overcurrent, DC-DC battery side overvoltage, DC-DC bus side overvoltage, or generator drive circuit error has occurred, it receives the second torque request, enables the second PWM signal output module 4b and the generator drive circuit 2b, obtains the rotor position and angle of the generator M2 based on the resolver signal collected by the second resolver signal acquisition circuit 15, and sends the second PWM drive signal to the second electronic control module 5b to control the generator M2.

[0105] In some embodiments, such as Figure 4 As shown, the controller 100 also includes a second gate-level latch circuit 16, which is connected to the second gate-level detection circuit 13 and the second PWM signal output module 4b respectively. After receiving the error signal sent by the second gate-level detection circuit 13, the second gate-level latch circuit 16 continuously outputs a shutdown signal to the second PWM signal output module 4b to prevent the second PWM signal output module 4b from outputting the second PWM signal.

[0106] In some embodiments, the second gate-level latch circuit 16 is also connected to the main control chip 1 and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip 1.

[0107] Specifically, the second gate-level detection circuit 13 is also used to: trigger the second gate-level latch circuit 16 to latch and send a hardware shutdown signal to the second PWM signal output module 12 after at least one of the following faults occurs: generator overcurrent, DC-DC battery side overvoltage, DC-DC bus side overvoltage, and generator drive circuit error; and trigger the main control chip 1 to perform torque limiting or shutdown processing on the generator M2, or torque limiting followed by shutdown processing. The main control chip 1 is also used to send a clear latch signal to the second gate-level latch circuit 16 after the fault is cleared, so that the second gate-level latch circuit 16 stops sending the hardware shutdown signal.

[0108] Specifically, see Figure 4For the GMCU control section, during the power-on self-test initialization process or during operation, the main control chip 1 diagnoses the initial state of the system's hardware and software. If no faults such as GMCU overcurrent, BDC battery-side overvoltage, BDC bus-side overvoltage, or drive board errors are detected, and all hardware circuits are functioning normally, the main control chip 1, upon receiving the application layer open-wave and torque request via CAN, enables the second PWM signal output module 4b and the generator drive circuit 4b. Based on the sine / cosine signals acquired by the resolver, it obtains the motor rotor position and angle through an algorithm and sends PWM drive signals (U-phase+, U-phase-, V-phase+, V-phase-, W-phase+, W-phase-) to the second electronic control module 5b. The main control chip 1 then uses the software FOC algorithm to achieve precise control of the generator M2 based on the angle and speed values ​​decoded by the resolver.

[0109] During this process, the main control chip 1 can monitor the GMCU overcurrent signal, SMCU error signal, SMCU reset signal, PMIC reset signal, BST_V1 (BDC battery side) overvoltage signal, BST_V2 (BDC bus side) overvoltage signal, and GMCU driver board P / N phase error signal in real time through the second gate-level detection circuit 13. When one or more of these faults occur, the second gate-level latch circuit 16 latches the PWM signal of the generator M2, and the main control chip 1 performs torque limiting or waveform shutdown processing on the GMCU, or performs torque limiting and then waveform shutdown processing. When the fault is cleared, a clear latch signal is issued, and the system is in a normal waiting request state.

[0110] In some embodiments, such as Figure 4 As shown, the controller 100 further includes: a second hardware overcurrent threshold setting circuit 18 and a second overcurrent detection circuit 19. The second overcurrent detection circuit 19 is connected to the main control chip 1 and the second gate-level detection circuit 13, respectively; the second hardware overcurrent threshold setting circuit 18 is connected to the main control chip 1 and the second overcurrent detection circuit 19, respectively, and is used to provide a second hardware current threshold to the second overcurrent detection circuit 19 under the control of the main control chip 1, so that when the second overcurrent detection circuit 19 determines that the generator M2 is overcurrent based on the second hardware current threshold and the sampled generator current, it sends a generator overcurrent signal to the main control chip 1 and the second gate-level detection circuit 13, respectively.

[0111] In some embodiments, see Figure 4 The controller 100 also includes a second current detection circuit 17, which is connected to the main control chip 1 and is used to collect the generator current. The main control chip 1 is also used to determine that the generator M2 is overcurrent when the generator current is greater than the second software current threshold. The second software current threshold is less than the second hardware current threshold.

[0112] Specifically, see Figure 4To ensure the reliability of overcurrent diagnosis, dual overcurrent diagnosis is set up, including software overcurrent comparison and hardware overcurrent comparison; and the software overcurrent threshold (i.e., the first software current threshold) is lower than the hardware overcurrent threshold (i.e., the first hardware current threshold) so that software processing is faster than hardware processing.

[0113] Optionally, for hardware overcurrent diagnostics, see [link to relevant documentation]. Figure 4 Furthermore, overcurrent diagnostics can be set for the high and low sides of generator M2 separately to further ensure the reliability of overcurrent diagnostics.

[0114] In some embodiments, such as Figure 5 As shown, the controller 100 also includes a third gate-level detection circuit 21 connected to the main control chip 1, which is used to issue an error signal when it receives any of the following signals: DC-DC overcurrent signal, DC-DC battery-side overvoltage signal, DC-DC bus-side overvoltage signal, and first DC-DC converter drive circuit error signal.

[0115] The main control chip 1 is also used to prevent the third PWM signal output module 4c from outputting the third PWM signal after receiving an error signal from the third gate-level detection circuit 21.

[0116] Specifically, after the main control chip 1 determines through the third gate-level detection circuit 21 that no generator overcurrent, DC-DC battery side overvoltage, DC-DC bus side overvoltage, or error report from the first DC-DC converter drive circuit 3a has occurred, it receives a boost or buck request, enables the third PWM signal output module 20, and sends a third PWM drive signal to the DC-DC converter drive circuit to realize boost or buck control of the DC-DC converter.

[0117] In some embodiments, such as Figure 5 As shown, the controller 100 also includes a third gate-level latch circuit 22, which is connected to the third gate-level detection circuit 21 and the third PWM signal output module 4c respectively. After receiving the error signal from the third gate-level detection circuit 21, the controller 100 continuously outputs a shutdown signal to the third PWM signal output module 4c to prevent the third PWM signal output module 4c from outputting the third PWM signal.

[0118] Optionally, see Figure 5 The third gate-level latch circuit 22 is also connected to the main control chip 1 and is used to stop outputting the shutdown signal when it receives the clear latch signal sent by the main control chip 1.

[0119] Specifically, after at least one of the following faults occurs—DC-CDC overcurrent, DC-CDC battery-side overvoltage, DC-CDC bus-side overvoltage, and DC-CDC converter drive circuit error—the third gate-level detection circuit 22 triggers the third gate-level latch circuit 22 to latch, and sends a hardware shutdown signal to the third PWM signal output module 20. It also triggers the main control chip 1 to control the DC-CDC converter to enter shutdown mode or pass-through mode. The main control chip 1 is also used to send a clear latch signal to the third gate-level latch circuit 22 after the fault is cleared, so that the third gate-level latch circuit 22 stops sending the hardware shutdown signal.

[0120] Specifically, see Figure 5 For the BDC section, during the power-on self-test initialization process or during operation, the controller 100 diagnoses the initial state of the system's hardware and software. If no faults are found (such as BST overcurrent, BDC battery-side overvoltage, BDC bus-side overvoltage, and driver board errors), and all hardware circuits are functioning normally, during driving, the main control chip 1, after receiving the application layer boost command request via CAN, enables the third PWM signal output module 20 and the first DC-DC converter driver circuit 3a, and sends PWM drive signals (phase 1+, phase 1-, phase 2+, phase 2-) to the first DC-DC converter driver circuit 3a. The first DC-DC converter 310 in the BDC is boosted to the required voltage. During power generation, the generator M2 generates power to store energy in the low-voltage battery 400. After receiving the application layer step-down command request via CAN, the main control chip 1 enables the third PWM signal output module 20 and the second DC-DC converter drive circuit 3d, and sends PWM drive signals (phase 1+, phase 1-, phase 2+, phase 2-) to the second DC-DC converter drive circuit 3d to boost the voltage of the second DC-DC converter 320 in the BDC, and step down the voltage generated by the generator M2 to the charging voltage of the low-voltage battery 400.

[0121] During this process, the main control chip 1 can monitor the BDC overcurrent signal, BST_V1 (BDC battery side) overvoltage signal, BST_V2 (BDC bus side) overvoltage signal, BDC driver board P / N phase error signal, capacitor V1 overtemperature signal, capacitor V2 overtemperature signal, inductor 1 overtemperature signal, and inductor 2 overtemperature signal in real time through the third gate-level detection circuit 21. When one or more of these faults occur, the BDC enters the shutdown mode or the direct-through mode. When the fault is cleared, a clear latch signal is issued, and the system enters a normal waiting request state.

[0122] In some embodiments, such as Figure 5As shown, the controller 100 further includes: a third hardware overcurrent threshold setting circuit 24 and a third overcurrent detection circuit 25. The third overcurrent detection circuit 25 is connected to the main control chip 2 and the third gate-level detection circuit 21, respectively; the third hardware overcurrent threshold setting circuit 24 is connected to the main control chip 1 and the third overcurrent detection circuit 25, respectively, and is used to provide a third hardware current threshold to the third overcurrent detection circuit 25 under the control of the main control chip 1, so that when the third overcurrent detection circuit 25 determines that the first DC-DC converter 200 is overcurrent based on the third hardware current threshold and the sampled current of the first DC-DC converter 200, it sends a DC-DC overcurrent signal to the main control chip 1 and the third gate-level detection circuit 21, respectively.

[0123] In some embodiments, see Figure 5 The controller 100 also includes a third current detection circuit 23, connected to the main control chip 1, for collecting the current of the first DC-DC converter. The main control chip 1 is also used to determine that the first DC-DC converter is overcurrent when the current of the first DC-DC converter is greater than the third software current threshold, and the third software current threshold is less than the third hardware current threshold.

[0124] Specifically, see Figure 5 To ensure the reliability of overcurrent diagnosis, dual overcurrent diagnosis is set up, including software overcurrent comparison and hardware overcurrent comparison; and the software overcurrent threshold (i.e., the first software current threshold) is lower than the hardware overcurrent threshold (i.e., the first hardware current threshold) so that software processing is faster than hardware processing.

[0125] Optionally, for hardware overcurrent diagnostics, see [link to relevant documentation]. Figure 5 Furthermore, overcurrent diagnostics can be set separately for the high and low sides of the DC-DC converter 300 to further ensure the reliability of the overcurrent diagnostics.

[0126] In some embodiments, such as Figure 5 As shown, the controller 100 also includes: a first voltage sampling circuit 26, a first hardware voltage threshold setting circuit 27, and a first overvoltage detection circuit 28.

[0127] See Figure 5The first voltage sampling circuit 26 is used to sample the voltage on the DC-DC battery side; the first overvoltage detection circuit 28 is connected to the first voltage sampling circuit 26, the main control chip 1, and each gate-level detection circuit (including the first gate-level detection circuit 5, the second gate-level detection circuit 13, and the third gate-level detection circuit 21); the first hardware voltage threshold setting circuit 27 is connected to the main control chip 1 and the first overvoltage detection circuit 28, and is used to provide the first hardware voltage threshold to the first overvoltage detection circuit 29 under the control of the main control chip 1, so that when the first overvoltage detection circuit 28 determines that the DC-DC battery side voltage is overvoltage based on the first hardware voltage threshold and the DC-DC battery side voltage, it sends the DC-DC battery side overvoltage signal to the main control chip 1 and each gate-level detection circuit.

[0128] In some embodiments, such as Figure 5 As shown, the controller 100 also includes: a second voltage sampling circuit 29, a second hardware voltage threshold setting circuit 30, and a second overvoltage detection circuit 31.

[0129] The second voltage sampling circuit 29 is used to sample the DC-DC bus side voltage; the second overvoltage detection circuit 31 is connected to the second voltage sampling circuit 29, the main control chip 1, and each gate-level detection circuit; the second hardware voltage threshold setting circuit 30 is connected to the main control chip 1 and the second overvoltage detection circuit 31, respectively, and is used to provide the second hardware voltage threshold to the second overvoltage detection circuit 31 under the control of the main control chip 1, so that when the second overvoltage detection circuit 31 determines that the DC-DC bus side voltage is overvoltage based on the second hardware voltage threshold and the DC-DC bus side voltage, it sends the DC-DC bus side overvoltage signal to the main control chip 1 and each gate-level detection circuit respectively.

[0130] Specifically, see Figure 5 Similar to overcurrent diagnosis, software overvoltage diagnosis can be set for BST_V1 (BDC battery side) voltage and BST_V2 (BDC bus side) voltage. Figure 5 The software overvoltage diagnosis and hardware overvoltage diagnosis of BST_V1 (BDC battery side) are not shown in the figure.

[0131] It should be noted that, see Figure 3 , Figure 4 , Figure 5 To ensure the accuracy and reliability of overvoltage and overcurrent diagnosis, the main control chip 1 can perform a self-test on the hardware threshold output by the threshold setting circuit.

[0132] In some embodiments, such as Figure 6 As shown, the controller 100 also includes a first CAN transceiver circuit 32 connected to the main control chip 1. The first CAN transceiver circuit 32 is used to enable CAN communication between the main control chip and the vehicle's energy network.

[0133] Specifically, the main control chip 1 communicates with each controller of the vehicle energy network through the first CAN transceiver circuit 32 to receive the first torque request, the second torque request, the boost request, and the buck request, thereby realizing the vehicle's power-on / off control, power generation control, and power limiting control.

[0134] In some embodiments, such as Figure 6 As shown, the controller 100 also includes a second CAN transceiver circuit 33 and a third CAN transceiver circuit 34 connected to the main control chip 1. The second CAN transceiver circuit 33 is used to enable CAN communication between the main control chip and the vehicle's chassis network to receive gear signals from the gear controller to achieve vehicle mode control; the third CAN transceiver circuit 34 is used to enable CAN communication between the main control chip and the vehicle's ECM network to achieve motor start / stop, torque control, torque compensation, torque distribution, and torque limiting.

[0135] Optionally, see Figure 6 The controller 100 also includes a fourth CAN transceiver circuit 35, which is a reserved CAN transceiver circuit.

[0136] Specifically, see Figure 6 The controller 100 supports four CAN communication channels, including four CAN transceiver channels, which communicate with the backbone network in the vehicle network to achieve CAN signal input and output functions. CAN1 (the second CAN transceiver circuit 33) communicates with the controllers in the chassis network to receive gear signals from the gear position controller to achieve vehicle mode control. CAN2 (the first CAN transceiver circuit 32) communicates with the controllers in the energy network to achieve vehicle power-on / off control, power generation control, and power limiting functions. CAN4 (the third CAN transceiver circuit 34) communicates with the controllers in the ECM network to achieve motor start / stop, torque control, torque compensation, torque distribution, and torque limiting functions. CAN3 (the fourth CAN transceiver circuit 35) is a reserved network to provide space for expanding other vehicle function controls. CAN1 can have a built-in sleep / wake-up function; its INH pin can be used as a wake-up source to wake up the main control chip 1 from sleep mode. The main control chip 1 can also achieve its own sleep mode by setting the STB pin of the CAN1 circuit low.

[0137] In some embodiments, such as Figure 6 As shown, the controller 100 also includes an auxiliary chip 36 and a monitoring circuit 37, which are connected to the third CAN transceiver circuit 34, the main control chip 1 and the auxiliary chip 36 respectively.

[0138] The main control chip 1 is also used to: send a CAN shutdown signal to the monitoring circuit 37 through the auxiliary chip 36 when the ECM network is abnormal, so as to shut down the third CAN transceiver circuit 34 through the monitoring circuit 37.

[0139] Specifically, see Figure 6 To meet the functional safety requirements of the vehicle, an SMCU chip (i.e., auxiliary chip 36) was added to implement functional safety-related algorithm processing at the software level. This includes: a monitoring circuit 37 was designed between the CAN4 network and the main control chip 1. When the main control chip 1 detects an abnormality in the vehicle's ECM, the SMCU will shut down CAN4 in time to ensure the functional safety of the vehicle.

[0140] In some embodiments, such as Figure 6 As shown, the controller main control board 100 also includes a power management chip 38. The main control chip 1 is connected to the power management chip 38 and the auxiliary chip 36 respectively. It is also used to reset the main control chip 1 through the auxiliary chip 36 and the power management chip 38 when an error occurs.

[0141] Specifically, see Figure 6 The SMCU and PMIC share a single SPI interface to communicate with the main control chip 1. Error signals from the main control chip 1 can be sent to both the SMCU and the PMIC. Upon receiving an error signal, both the SMCU and PMIC can promptly reset the main control chip 1. Optionally, to ensure the safety of the main control chip 1 and the SMCU, the PMIC can reset the MCU and SMCU via the RES pin. The power supply voltages output by the PMIC can also be monitored in real time by the main control chip 1.

[0142] In some embodiments, such as Figure 6 As shown, the controller 100 also includes a drive chip 3g connected to the main control chip. The drive chip 3g is used to drive the clutch pressure valve, main pressure solenoid valve and overcooling protection solenoid valve of the transmission system under the control of the main control chip 1.

[0143] Specifically, the transmission drive circuit 3b has four high-side and low-side drives, and the drive chip 3g has four high-side and low-side drives and two H-bridge drives. The main control chip 1 is also used to control the transmission drive circuit 3b and the drive chip 3g to drive the vehicle's multiple high-current valve bodies and small motors.

[0144] Specifically, see Figure 6The vehicle control unit (VCU) of controller 100 has extensive hardware resources. For high-current drive design, L9305 and L9945 chips can be selected as drive chips. The main control chip 1 sends control commands to the integrated drive chips L9305 and L9945 via SPI communication. The integrated drive chip L9305 has four high / low side configurable drives, and the integrated drive chip L9945 has four high / low side configurable drives and two H-bridge drives. This enables the drive control of multiple high-current valves (such as clutch pressure valves, main pressure solenoid valves, and overcooling protection solenoid valves) and small motors (such as small motors used for game car functions) in the automatic transmission electronic control unit (TCU).

[0145] In some embodiments, the controller 100 further includes a sampling circuit for sampling at least one of the following signals: pressure signal sampling signal, temperature sampling signal, switch signal, position signal, collision signal, electronically controlled cooling water pump feedback signal, water channel temperature, motor temperature, generator temperature, first electronic control module temperature, second electronic control module temperature, and DC-DC converter temperature.

[0146] Specifically, such as Figure 6 As shown, the controller 100 includes a digital signal conditioning circuit 40, an analog signal conditioning circuit 41, and multiple temperature sampling circuits 42 connected to the main control chip 1. The main control chip 1 is used to: receive accelerator pedal sampling signals, pressure signal sampling signals, and temperature sampling signals through the analog signal conditioning circuit 40; and receive switch signals, position signals, collision signals, and electronically controlled cooling water pump feedback signals through the digital signal conditioning circuit 41, so as to complete the acquisition of the above signals by the whole vehicle; sample the water channel temperature, motor temperature, generator temperature, first electronic control module temperature, second electronic control module temperature, and DC-DC converter temperature through the multiple temperature sampling circuits 42; and when it is determined that the whole vehicle needs to dissipate heat based on the temperature sampled by the multiple temperature sampling circuits 42, control the actuators in the vehicle thermal management system to perform heat dissipation treatment through the digital signal conditioning circuit 41. The actuators in the thermal management system include at least one of a cooling water pump, an electric motor cooling water pump, and a radiator fan.

[0147] Specifically, see Figure 6The controller 100 has multi-channel digital and analog signal acquisition functions. The analog channel of the VCU has two accelerator pedal samples (for redundant control), three pressure signal samples (valve body pressure in the TCU system mentioned above), and one temperature sample (oil temperature in the TCU system). The digital channel of the multi-in-one controller has two switch signal samples, two position signal samples (position of the two motors in the game car function), one collision signal (SRS signal) sample, one electronically controlled cooling water pump feedback signal sample, one electronically controlled cooling water pump control output signal, one cooling fan control and feedback (on the same line), one cooling fan enable signal, and one motor and water pump control output signal, used to complete the acquisition and control of the above signals for the whole vehicle.

[0148] The controller 100 supports water channel temperature sampling, TMCU motor temperature sampling, GMCU motor temperature sampling, GMCU power module (i.e., the second electronic control module 5b) temperature sampling, and TMCU power module (i.e., the first electronic control module 5a) temperature sampling. The DC-DC converter may include BDC power module 1 (i.e., the aforementioned first DC-DC converter 310), power module 2 (i.e., the aforementioned second DC-DC converter 320), capacitor 1 and inductor 1 corresponding to power module 1, and capacitor 2 and inductor 2 corresponding to power module 2. The controller 100 also supports temperature sampling for BDC power module 1 and power module 2; temperature sampling for BDC capacitor 1 and capacitor 2; and temperature sampling for BDC inductor 1 and inductor 2. Furthermore, by collecting signals such as the radiator water channel temperature, DC-DC converter temperature, generator and motor power module temperatures, generator temperature, and motor temperature, the controller can control actuators such as the electronic thermostat, coolant pump, motor coolant pump, and radiator fan to perform heat dissipation according to the vehicle's overall heat dissipation requirements, thereby achieving thermal management.

[0149] In some embodiments, such as Figure 7 , Figure 8 As shown, the controller 100 also includes a LIN transceiver 43 and a storage module 44.

[0150] The LIN transceiver 45 is connected to the main control chip 1 and is used to connect to an external controller to enable the main control chip 1 to communicate with the external controller via the LIN protocol; the storage module 44 is connected to the main control chip 1 and is used to store the data generated by the main control chip 1 during its operation.

[0151] In some embodiments, such as Figure 7 , Figure 8As shown, the controller 100 also includes a power control circuit 45, which is connected to the second CAN transceiver circuit 33 and the power management chip 38 respectively. After receiving the wake-up signal, the power control circuit 45 controls the power supply to the power management chip 38 so as to wake up the main control chip 1 through the power management chip 38. The wake-up signal is generated by the second CAN transceiver circuit 33 according to the wake-up message sent by the chassis network.

[0152] When the main control chip 1 is woken up, it outputs a power holding signal to the power control circuit 45 so that the power control circuit 45 continuously controls the power supply to the power management chip 38 under the control of the power holding signal.

[0153] See Figure 8 The power control circuit 45 is used to provide multiple first voltages, and the power management chip 38 is also used to provide multiple second voltages and at least one third voltage based on one first voltage. The multiple first voltages are used to power the peripheral PWM signal output module, transmission drive circuit 3b, drive chip 3g, H-bridge drive circuit, first drive board, second drive board, peripheral sensors and circuits, LIN transceiver 43, and power management chip 38, and also serve as the CAN wake-up power supply for the second CAN transceiver circuit 33. The second CAN transceiver circuit 33 is also used to provide a wake-up source for the power control circuit 45 based on the CAN wake-up power supply and the external ignition hardwire signal. The multiple second voltages are used to power the CAN / CAN FD transceiver, accelerator pedal sensor, external sensors and their corresponding sampling circuits, auxiliary chip 37, peripheral circuits and chips, the ADC module and RDC module (Resolver-to-Digital Converter) of the main control chip 1, ADC / RDC peripheral circuits, first current detection circuit 9, first overcurrent detection circuit 11, second current detection circuit 17, second overcurrent detection circuit 19, third current detection circuit 23, and third overcurrent detection circuit 25, and also serve as the reference voltage for the main control chip 1. The FD transceiver includes a first CAN transceiver circuit 32, a second CAN transceiver circuit 33, a third CAN transceiver circuit 34, and a fourth CAN transceiver circuit 35; at least one third voltage is used to power the core of the main control chip 1.

[0154] The main control chip 1 is also used to: switch from sleep state to working state after the second CAN transceiver circuit 33 provides a wake-up source, and switch from working state to sleep state after receiving a sleep signal from the second CAN transceiver circuit 33.

[0155] In some embodiments, such as Figure 8As shown, the power control circuit 45 includes a first power distribution unit 451 and a second power distribution unit 452. The first power distribution unit 451 includes a first preset power supply 4511, a soft-start circuit 4512, and a first filter circuit 4513 connected in sequence. The first filter circuit 4513 outputs at least three first voltages, at least one of which powers the peripheral PWM control circuit, at least one of which powers the transmission drive circuit 3b and the drive chip 3g, and at least one of which powers the H-bridge drive circuit. The second power distribution unit 452 includes a second preset power supply 4521, a second filter circuit 4522, and a switching circuit 45. 23 and wake-up source 4524, the second preset power supply 4521 outputs at least one first voltage after passing through the second filter circuit 4522, as the CAN wake-up power supply, the wake-up source 4524 is connected to the control terminal of the switch circuit 4523, when the switch circuit 4523 is turned on under the control of the wake-up source 4524, the second preset power supply 4521 outputs at least two first voltages after passing through the second filter circuit 4522 and the switch circuit 4523 in sequence, at least one of which powers the first driver board, and at least one of which powers the second driver board, peripheral sensors and circuits, LIN transceiver 43 and power management chip 38 respectively.

[0156] Specifically, participate in Figure 8 The power control circuit 45 can be used to implement 12V power distribution, which can be composed of a first preset power supply 4511 (such as KL87) and a second preset power supply 4521 (such as KL30). The power input of KL87 first passes through the soft start circuit 4512, making KL87 controlled by the main control chip 1. After passing through the first filter circuit 4513, it is divided into three 12V power supplies, namely 12VDD, 12VD1, and 12VD2. The soft start circuit 4512 can effectively suppress transient inrush current during vehicle startup and sudden power failure, effectively protecting the controller 100. At the same time, the soft start circuit 4512 also has reverse protection. The filtered output 12VDD is used to power the peripheral PWM control circuit, 12VD1 powers the vehicle drive chips L9945 and L9305 and the high-side and low-side drive circuits, and 12VD2 powers the H-bridge drive circuit. To prevent common-mode interference caused by the H-bridge drive circuit and thus distinguish between 12VD1 and 12VD2, the H-bridge control circuit and power supply components can be selected according to different vehicle models, which can effectively reduce costs and improve adaptability and flexibility.

[0157] The KL30 outputs three power supplies after passing through anti-reverse protection circuits and filtering circuits: 12V-CAN, 12VD, and 12VVC. After filtering, the KL30 directly outputs 12V-CAN as the CAN wake-up power supply. This CAN wake-up power supply, along with the external KL15 hard-wired wake-up signal, serves as the wake-up source 4524 to control the MOS switch. After the MOS is turned on, it outputs two power supplies: 12VD and 12VVC. Power supply 12VVC powers the second driver board, which has a regulated power supply module that can directly draw power from 12VVC. Power supply 12VD powers four modules: the first driver board, peripheral sensors and circuits, the LIN transceiver 43, and the power management chip 38. The second driver board does not have a regulated power supply module that requires power from the main control chip 1.

[0158] In some embodiments, see Figure 8 The power management chip 38 has DCDC1 port, DCDC2 port, LDO1 port, LDOAD port, TRACKER1 port, and TRACKER2 port, used for:

[0159] Three secondary voltages are output through the DCDC1 port to power the CAN / CAN FD transceiver, accelerator pedal sensor, and other external sensors and their corresponding sampling circuits, respectively.

[0160] A third voltage is output through the DCDC2 interface to power the core of the main control chip 1;

[0161] A second voltage is output through the LDO1 interface to power the auxiliary chip 36, peripheral circuits and the chip respectively;

[0162] A second voltage is output through the LDOAD interface to power the ADC / RDC module and ADC / RDC peripheral circuit of the main control chip 1 respectively, and to serve as the reference voltage of the main control chip 1.

[0163] A second voltage is output through the TRACKER1 interface to power the first current detection circuit 9, the first overcurrent detection circuit 11, the second current detection circuit 17, and the second overcurrent detection circuit 19.

[0164] A second voltage is output through the TRACKER2 interface to power the third current detection circuit 23 and the third overcurrent detection circuit 25 respectively.

[0165] Specifically, such as Figure 8 As shown, the power management chip 38 can achieve 5V power distribution. The power management chip 38 draws power from 12VD, and after internal processing, it has the ability to output 7 power channels, which are output through interfaces DCDC1, DCDC2, LDO1, LDO2, LDOAD, TRACKER1, and TRACKER2.

[0166] The DC-DC1 output is 5.7V. To meet safety requirements, the accelerator pedal sensor requires two independent power supplies. Secondly, considering the high current consumption of the CAN / CAN FD transceiver during operation and failure, a failure of the CAN / CAN FD transceiver could lead to a power outage for the main control chip 1. Therefore, the DC-DC1 output is routed through three low-dropout regulator (LDO) chips to provide three power supplies: CANLDO_5V, EXLDO1_5V, and EXLDO2_5V. These power supplies are for the CAN / CAN FD transceiver, the two accelerator pedal sensors (for dual-channel throttle pedal sampling), and other external 5V sensors and their corresponding sampling circuits. The DC-DC2 output is 1.25V, specifically VDD_1.25V, dedicated to powering the core of the main control chip 1. The LDO1 output is 5V, EVCC_5V, primarily used for powering the auxiliary chip 36, peripheral 5V circuits, and the 5V chip itself. The LDO2 output is 3.3V, which is left unused. The LDOAD output power is 5V. VADC_5V powers the ADC and RDC modules and the external ADC / RDC circuits, and also serves as the reference voltage source for the main control chip 1. TRACKER1 and TRACKER2 track the LDOAD power supply and output 5V. VTRQ1 and VTRQ2 power the current sensors for the dual motors, the DC current sensor and their corresponding detection circuits, and the overcurrent detection circuit, respectively.

[0167] Optionally, see Figure 6 The VCU control section can also be equipped with two voltage monitoring circuits 46 to monitor the output voltage of the two 5V LDOs (i.e., EXLDO1_5V and EXLDO2_5V mentioned above) in real time, thereby monitoring the power supply safety of many external 5V sensors.

[0168] See Figure 7 In the controller 100 disclosed herein, the main control chip 1 is equipped with a power management chip 38 (Power Management IC, PMIC) and a storage module 44 to maintain normal system operation. The controller 100 can be configured with one high-voltage sampling interface (connected to the second voltage sampling circuit 29), and four internal interfaces (one connected to the second PWM signal output module 4b and the third PWM signal output module 4c respectively, one connected to the first PWM signal output module 4a, and one connected to...). Figure 6 Each temperature sampling circuit shown is connected to one of the following circuits: Figures 3-5The controller 100 uses various current detection circuits and an external interface (connected to circuits for acquiring external signals) to acquire and control signals both internally and externally. Signals acquired through these interfaces are converted using modules such as high-voltage sampling, ADC sampling, PWM input, and active-high input, and then transmitted to the main control chip 1. Upon receiving the sampled signals, the main control chip 1 calculates and makes decisions to issue corresponding control commands. Modules such as PWM output, active-high output, high / low active control, CAN / CAN FD transceiver, and LIN transceiver 43 convert the control commands into corresponding control signals and output them through the internal and external interfaces, achieving closed-loop control. The controller 100's functionality relies on sensors and actuators connected to the main control chip 1. Input sensors acquire signals, which are processed by the controller's various control algorithms and output to the actuators for execution. Sensor signal acquisition is divided into internal and external signal acquisition. Internal signal acquisition is used for monitoring, diagnosing, and thermal management of the controller 100; external signal acquisition primarily aims to obtain the driver's intent to control torque output. Therefore, the controller 100 of this disclosure uses a single MCU (i.e., main control chip 1) to replace multiple physically integrated MCUs in related technologies, and performs data calculation, decision-making and control by a single MCU. This achieves the integration of multiple functions such as VCU+TCU+TMCU+GMCU+BDC, reduces the complexity of circuit design and reduces the overall hardware cost.

[0169] Figure 9 This is a structural block diagram of the power system according to an embodiment of the present invention.

[0170] like Figure 9 As shown, the power system 1000 includes the controller 100 of the above embodiment.

[0171] Figure 10 This is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0172] like Figure 10 As shown, the vehicle 10000 includes the power system 1000 of the above embodiment.

[0173] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0174] In the description of this disclosure, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this disclosure.

[0175] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0176] In this disclosure, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0177] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0178] Although embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A controller, characterized in that, The controller includes: Main control chip; And at least two of the following: a motor drive circuit, a first DC-DC converter drive circuit, a transmission drive circuit, a throttle signal sampling circuit, a second DC-DC converter drive circuit, an on-board charger (OBC) drive circuit, and a power management system (BMS) respectively connected to the main control chip; The electric motor drive circuit is used to drive the electric motor of the vehicle. The first DC-DC converter drive circuit is used to drive the first DC-DC converter to work, so as to boost the voltage provided by the power battery of the vehicle. The transmission drive circuit is used to drive the transmission solenoid valve of the vehicle to operate; The throttle signal sampling circuit is used to sample the throttle signal of the vehicle; The second DC-DC converter drive circuit is used to drive the second DC-DC converter to work, so as to step down the voltage provided by the power battery; The OBC drive circuit is used to drive the vehicle's OBC to work; The BMS is used to monitor the status of the power battery; The controller further includes at least one of a generator drive circuit and an engine drive circuit, which are respectively connected to the main control chip. The generator drive circuit is used to drive the generator of the vehicle to work; The engine drive circuit is used to drive the fuel injector and igniter of the vehicle's engine. The controller includes the motor drive circuit, the first DC-DC converter drive circuit, and the generator drive circuit; A first PWM signal output module is connected to both the main control chip and the motor drive circuit, and is used to output a first PWM signal to the motor drive circuit under the control of the main control chip to drive the motor to work; a second PWM signal output module is connected to both the main control chip and the generator drive circuit, and is used to output a second PWM signal to the generator drive circuit under the control of the main control chip to drive the generator to work; a third PWM signal output module is connected to both the main control chip and the first DC-DC converter drive circuit, and is used to output a third PWM signal to the first DC-DC converter drive circuit under the control of the main control chip to control the first DC-DC converter to work. The first gate-level detection circuit, connected to the main control chip, is used to issue an error signal when it receives any of the following signals: motor overcurrent signal, DC-DC battery side overvoltage signal, DC-DC bus side overvoltage signal, or motor drive circuit error signal. The main control chip is also used to disable the first PWM signal output module from outputting the first PWM signal when it receives the error signal from the first gate-level detection circuit. The first gate-level latch circuit, connected to both the first gate-level detection circuit and the first PWM signal output module, is used to continuously output a shutdown signal to the first PWM signal output module after receiving the error signal from the first gate-level detection circuit, thereby disabling the first PWM signal output module from outputting the first PWM signal. The first overcurrent detection circuit is connected to the main control chip and the first gate-level detection circuit, respectively. A first hardware overcurrent threshold setting circuit is connected to the main control chip and the first overcurrent detection circuit, respectively. Under the control of the main control chip, it provides a first hardware current threshold to the first overcurrent detection circuit, so that when the first overcurrent detection circuit determines that the motor is overcurrent based on the first hardware current threshold and the sampled motor current, it sends the motor overcurrent signal to the main control chip and the first gate-level detection circuit respectively.

2. The controller according to claim 1, characterized in that, The controller includes the electric motor drive circuit, the engine drive circuit, and the throttle signal sampling circuit; The main control chip is used to: receive the throttle signal sent by the throttle signal sampling circuit; determine the output torque of the electric motor and the engine based on the throttle signal; send a motor drive signal to the electric motor drive circuit based on the output torque of the electric motor; and send an engine drive signal to the engine drive circuit based on the output torque of the engine.

3. The controller according to claim 1, characterized in that, The controller includes the electric motor drive circuit, the first DC-DC converter drive circuit, the generator drive circuit, the transmission drive circuit, and the throttle signal sampling circuit.

4. The controller according to claim 1, characterized in that, The controller further includes a first electronic control module, a second electronic control module, and a first DC-DC converter; The first electronic control module is connected to the motor drive circuit and the motor respectively. The motor drive circuit is used to control the first electronic control module to work according to the first PWM signal so as to drive the motor to work. The second electronic control module is connected to the generator drive circuit and the generator respectively. The generator drive circuit is used to control the second electronic control module to work according to the second PWM signal so as to drive the generator to work. The first DC-DC converter is connected to the first DC-DC converter driver circuit, which is used to control the first DC-DC converter to work according to the third PWM signal.

5. The controller according to claim 1, characterized in that, The controller also includes: The first resolver excitation circuit is connected to the main control chip and is used to output a first excitation signal to the first resolver corresponding to the motor under the control of the main control chip, so as to provide stator power to the stator of the motor. The first resolver signal acquisition circuit is connected to the main control chip and is used to acquire the resolver signal of the first resolver. The main control chip is also used to obtain the rotor position and angle of the motor based on the resolver signal acquired by the first resolver signal acquisition circuit, and to control the first PWM signal output module to output the first PWM signal based on the rotor position and angle of the motor.

6. The controller according to claim 1, characterized in that, The first gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

7. The controller according to claim 1, characterized in that, The controller also includes: A first current detection circuit, connected to the main control chip, is used to collect the motor current. The main control chip is also used to determine that the motor is overcurrent when the motor current is greater than a first software current threshold, wherein the first software current threshold is less than a first hardware current threshold.

8. The controller according to claim 1, characterized in that, The controller also includes: The second resolver excitation circuit is connected to the main control chip and is used to output a second excitation signal to the second resolver corresponding to the generator under the control of the main control chip, so as to provide stator power to the stator of the generator; The second resolver signal acquisition circuit is connected to the main control chip and is used to acquire the resolver signal of the second resolver. The main control chip is also used to obtain the rotor position and angle of the generator based on the resolver signal acquired by the second resolver signal acquisition circuit, and to control the second PWM signal output module to output the second PWM signal based on the rotor position and angle of the generator.

9. The controller according to claim 1, characterized in that, The controller also includes: The second gate-level detection circuit, connected to the main control chip, is used to issue an error signal when it receives any of the following signals: generator overcurrent signal, DC-DC battery side overvoltage signal, DC-DC bus side overvoltage signal, or generator drive circuit error signal. The main control chip is also used to prevent the second PWM signal output module from outputting the second PWM signal when it receives an error signal from the second gate-level detection circuit.

10. The controller according to claim 9, characterized in that, The controller also includes: The second gate-level latch circuit is connected to the second gate-level detection circuit and the second PWM signal output module, respectively. After receiving the error signal from the second gate-level detection circuit, it continuously outputs a shutdown signal to the second PWM signal output module to prevent the second PWM signal output module from outputting the second PWM signal.

11. The controller according to claim 10, characterized in that, The second gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

12. The controller according to claim 10, characterized in that, The controller also includes: The second overcurrent detection circuit is connected to the main control chip and the second gate-level detection circuit, respectively. The second hardware overcurrent threshold setting circuit is connected to the main control chip and the second overcurrent detection circuit, respectively. Under the control of the main control chip, it provides a second hardware current threshold to the second overcurrent detection circuit, so that when the second overcurrent detection circuit determines that the generator is overcurrent based on the second hardware current threshold and the sampled generator current, it sends the generator overcurrent signal to the main control chip and the second gate-level detection circuit, respectively.

13. The controller according to claim 12, characterized in that, The controller also includes: The second current detection circuit is connected to the main control chip and is used to collect the generator current. The main control chip is also used to determine that the generator is overcurrent when the generator current is greater than a second software current threshold, wherein the second software current threshold is less than a second hardware current threshold.

14. The controller according to claim 1, characterized in that, The controller also includes: The third gate-level detection circuit, connected to the main control chip, is used to issue an error signal when it receives any of the following signals: DC-DC overcurrent signal, DC-DC battery side overvoltage signal, DC-DC bus side overvoltage signal, and error signal from the first DC-DC converter drive circuit. The main control chip is also used to prevent the third PWM signal output module from outputting the third PWM signal after receiving an error signal from the third gate-level detection circuit.

15. The controller according to claim 14, characterized in that, The controller also includes: The third gate-level latch circuit is connected to the third gate-level detection circuit and the third PWM signal output module, respectively. After receiving the error signal from the third gate-level detection circuit, it continuously outputs a shutdown signal to the third PWM signal output module to prevent the third PWM signal output module from outputting the third PWM signal.

16. The controller according to claim 15, characterized in that, The third gate-level latch circuit is also connected to the main control chip and is used to stop outputting the shutdown signal when it receives a clear latch signal sent by the main control chip.

17. The controller according to claim 14, characterized in that, The controller also includes: The third overcurrent detection circuit is connected to the main control chip and the third gate-level detection circuit respectively; The third hardware overcurrent threshold setting circuit is connected to the main control chip and the third overcurrent detection circuit, respectively. Under the control of the main control chip, it provides a third hardware current threshold to the third overcurrent detection circuit, so that when the third overcurrent detection circuit determines that the first DC-DC converter is overcurrent based on the third hardware current threshold and the sampled current of the first DC-DC converter, it sends the DC-DC overcurrent signal to the main control chip and the third gate-level detection circuit, respectively.

18. The controller according to claim 17, characterized in that, The controller also includes: The third current detection circuit is connected to the main control chip and is used to collect the current of the first DC-DC converter. The main control chip is also used to determine that the first DC-DC converter is overcurrent when the current of the first DC-DC converter is greater than the third software current threshold, wherein the third software current threshold is less than the third hardware current threshold.

19. The controller according to claim 1, 9, or 14, characterized in that, The controller also includes: The first voltage sampling circuit is used to sample the voltage on the DC-DC battery side. The first overvoltage detection circuit is connected to the first voltage sampling circuit, the main control chip, and the third gate-level detection circuit, respectively. A first hardware voltage threshold setting circuit is connected to the main control chip and the first overvoltage detection circuit, respectively. Under the control of the main control chip, it provides a first hardware voltage threshold to the first overvoltage detection circuit, so that when the first overvoltage detection circuit determines that the DC-DC battery side voltage is overvoltage based on the first hardware voltage threshold and the DC-DC battery side voltage, it sends the DC-DC battery side overvoltage signal to the main control chip and the gate-level detection circuit, respectively.

20. The controller according to claim 1, 9, or 14, characterized in that, The controller also includes: The second voltage sampling circuit is used to sample the voltage on the DC-DC bus side. The second overvoltage detection circuit is connected to the second voltage sampling circuit, the main control chip, and the gate-level detection circuit, respectively. The second hardware voltage threshold setting circuit is connected to the main control chip and the second overvoltage detection circuit, respectively. Under the control of the main control chip, it provides a second hardware voltage threshold to the second overvoltage detection circuit, so that when the second overvoltage detection circuit determines that the DC-DC bus side voltage is overvoltage based on the second hardware voltage threshold and the DC-DC bus side voltage, it sends the DC-DC bus side overvoltage signal to the main control chip and the gate-level detection circuit, respectively.

21. The controller according to claim 1, characterized in that, The controller also includes: The first CAN transceiver circuit is connected to the main control chip and is used to enable CAN communication between the main control chip and the vehicle's energy network.

22. The controller according to claim 21, characterized in that, The controller also includes: The second CAN transceiver circuit is connected to the main control chip and is used to enable CAN communication between the main control chip and the chassis network of the vehicle. The third CAN transceiver circuit is connected to the main control chip and is used to enable CAN communication between the main control chip and the vehicle's ECM network.

23. The controller according to claim 22, characterized in that, The controller further includes an auxiliary chip and a monitoring circuit. The monitoring circuit is connected to the third CAN transceiver circuit, the main control chip, and the auxiliary chip, respectively. The main control chip is also used for: When the ECM network malfunctions, the auxiliary chip sends a CAN shutdown signal to the monitoring circuit to shut down the third CAN transceiver circuit.

24. The controller according to claim 23, characterized in that, The controller also includes a power management chip. The main control chip is connected to the power management chip and the auxiliary chip respectively. It is also used to reset the main control chip through the auxiliary chip and the power management chip when an error occurs.

25. The controller according to claim 1, characterized in that, The controller also includes a drive chip connected to the main control chip. The drive chip is used to drive the clutch pressure valve, main pressure solenoid valve and overcooling protection solenoid valve of the transmission system under the control of the main control chip.

26. The controller according to claim 1, characterized in that, The controller further includes a sampling circuit for sampling at least one of the following signals: Pressure signal sampling signal, temperature sampling signal, switch signal, position signal, collision signal, feedback signal of electronically controlled cooling water pump, water channel temperature, motor temperature, generator temperature, temperature of the first electronic control module, temperature of the second electronic control module, and temperature of the DC-DC converter.

27. The controller according to claim 1, characterized in that, The controller also includes: A LIN transceiver is connected to the main control chip and is used to connect to an external controller, enabling the main control chip to communicate with the external controller via the LIN protocol. A storage module, connected to the main control chip, is used to store data generated during the operation of the main control chip.

28. The controller according to claim 24, characterized in that, The controller also includes: The power control circuit is connected to the second CAN transceiver circuit and the power management chip respectively. It is used to control the power supply to the power management chip after receiving the wake-up signal, so as to wake up the main control chip through the power management chip. The wake-up signal is generated by the second CAN transceiver circuit according to the wake-up message sent by the chassis network. When the main control chip is woken up, it outputs a power hold signal to the power control circuit, so that the power control circuit continuously controls the power supply to the power management chip under the control of the power hold signal.

29. A power system, characterized in that, Includes the controller according to any one of claims 1-28.

30. A vehicle, characterized in that, Includes the power system according to claim 29.

Images