A method and system for checking the quality of shielding lines in a layout
By identifying the signal line and ground line in the circuit layout, setting the preset distances L1 and L2, forming a rectangular area, and judging and marking the unqualified ground line, the problems of low efficiency and missed detection of shielded wire quality inspection in the prior art are solved, and efficient and accurate shielded wire detection are achieved.
Patent Information
- Application Number
- CN202410850998.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-28
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2044-06-28
AI Technical Summary
The prior art cannot effectively check the quality of the shielded wire in the layout, especially when the length of the metal wire is proportional to the interference amplitude, DRC inspection cannot identify the shielded wire of the grounding wire, resulting in low manual inspection efficiency and risk of false detection and missed detection.
By identifying the signal line and the ground line in the circuit layout data, setting the preset distance L1 and the extension distance L2, forming an extended rectangular area, determining whether there are remaining areas in the ground line area, and marking and displaying the unqualified ground line area, and using a preset terminal to display it.
It realizes the rapid and accurate screening of unqualified shielded wires, improves circuit analysis efficiency, reduces false detection and missed detection, and enhances the flexibility and accuracy of detection.
Smart Images

Figure CN118397005B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor quality inspection, and more specifically, to a method and system for inspecting the quality of shield lines in a layout. Background Art
[0002] When two metal lines are adjacent in a circuit layout design, a signal propagating on one metal line will couple current to the other metal line, and there is a mutual capacitance effect between the two metal lines. By applying a step voltage on one metal line and measuring the coupling capacitance on the adjacent wire, the experimental value of the mutual capacitance can be obtained. There is also a mutual inductance effect in metal lines, which can be regarded as connecting a micro-transformer between two metal lines. When current flows through one wire, an induced current will be generated on the other wire. By injecting current into one wire and measuring the voltage on the other wire, the mutual inductance value can be calculated.
[0003] The shield line is a very practical method to reduce crosstalk. By placing a ground wire on both sides of the sensitive signal line, most of the electric field lines emitted by the "noise" interference line will terminate at the ground wire instead of the signal line, greatly ensuring signal integrity and playing a great role in circuit performance.
[0004] The length of the metal line is proportional to the amplitude of the interference it receives, that is, the longer the line, the greater the interference. In layout data, the situation of overly long wiring often exists. Such metal lines have a large load on the ground and directly affect the waveform. Currently, for such situations, DRC (Design Rule Check) cannot detect them. The DRC rule for checking antenna effects only applies to signal lines connected to the gate terminal of a MOS transistor, while shield lines are generally grounded and not directly connected to the gate port of a MOS transistor.
[0005] Therefore, such situations can only be checked manually, which takes a lot of time and has a high risk. Therefore, it is necessary to develop a method for inspecting the quality of shield lines. Summary of the Invention
[0006] The present invention overcomes the defects of the prior art and provides a method and system for inspecting the quality of shield lines in a layout.
[0007] The first aspect of the present invention provides a method for inspecting the quality of shield lines in a layout, including:
[0008] Obtaining the layout data of the target area in the circuit layout data and marking it as the target area diagram;
[0009] Identifying signal lines and ground lines in the target area diagram to obtain an identification result;
[0010] Based on the recognition result, mark the ground wire area and the signal wire area, further identify the via positions from the ground wire area, and mark the vias;
[0011] Set a preset distance L1 and an extension distance L2, where L2 = L1 / 2. Extend the two end vias in all directions based on the L2 distance, and form two extended areas, the first area and the second area;
[0012] Based on the first area and the second area, perform overlapping interception on the ground wire area, and determine whether there is a remaining area. If so, mark the remaining area in the ground wire area;
[0013] Selectively mark all the ground wires in the remaining areas of the target area to obtain the unqualified ground wire area, and display the unqualified ground wire area through a preset terminal.
[0014] In this solution, obtaining the layout data of the target area from the circuit layout data and marking it as the target area map is specifically as follows:
[0015] Obtain the circuit layout data through a preset circuit layout design platform;
[0016] Based on the target area selected by the user, obtain the layout data of the target area from the circuit layout data, and mark it as the target area map.
[0017] In this solution, identifying the signal wires and ground wires in the target area map to obtain the recognition result; based on the recognition result, marking the ground wire area and the signal wire area, further identifying the via positions from the ground wire area, and marking the vias is specifically as follows:
[0018] Based on the layout design layout information, obtain the metal wire layout information in the target area map;
[0019] Combined with a preset recognition model, perform metal wire recognition on the target area map to obtain the recognition result;
[0020] Based on the recognition result and the metal wire layout information, mark the ground wire area and the signal wire area;
[0021] Based on the ground wire area, locate and mark the vias at both ends of the ground wire.
[0022] In this solution, setting a preset distance L1 and an extension distance L2, where L2 = L1 / 2, extending the two end vias in all directions based on the L2 distance, and forming two extended areas, the first area and the second area; based on the first area and the second area, performing overlapping interception on the ground wire area, and determining whether there is a remaining area. If so, marking the remaining area in the ground wire area is specifically as follows:
[0023] Obtain the set preset distance L2. Using the two through-hole position points in the ground wire area as two center points, extend in all directions. The extension distance is L2, and two extended areas are obtained, marked as the first area and the second area. Both the first area and the second area are rectangular areas;
[0024] Based on the first area and the second area, perform overlapping interception on the ground wire area. The interception method is to merge the first area and the second area into a large area, use the intersection of the large area and the ground wire area as the interception object, intercept from the ground wire area, and determine whether there is a remaining area. If there is no remaining area, it means the large area contains the ground wire area. If there is a remaining area, mark the remaining area in the ground wire area.
[0025] In this solution, frame and mark the ground wires where all the remaining areas in the target area are located, and obtain the unqualified ground wire area. Display the unqualified ground wire area through a preset terminal. Specifically:
[0026] Obtain all the remaining areas in the target area, frame and mark based on the ground wires where the remaining areas are located, and mark them as unqualified ground wire areas;
[0027] Mark the ground wires without remaining areas to form qualified ground wire areas;
[0028] Use the ground wires in the unqualified ground wire area as unqualified shielding wires, and the ground wires in the qualified ground wire area as qualified shielding wires, and display them through a preset terminal.
[0029] The second aspect of the present invention also provides a system for inspecting the quality of shielding wires in a layout. The system includes: a memory and a processor. The memory includes a program for inspecting the quality of shielding wires in a layout. When the program for inspecting the quality of shielding wires in a layout is executed by the processor, the following steps are implemented:
[0030] Obtain the layout data of the target area in the circuit layout data and mark it as the target area diagram;
[0031] Identify the signal wires and ground wires in the target area diagram to obtain the identification result;
[0032] Based on the identification result, mark the ground wire area and the signal wire area, further identify the through-hole positions from the ground wire area, and perform through-hole marking;
[0033] Set the preset distance L1 and the extension distance L2, where L2 = L1 / 2. Extend the two end through-holes in all directions based on the L2 distance, and form two extended areas, the first area and the second area;
[0034] Based on the coincidence truncation of the ground wire area for the first area and the second area, determine whether there is a remaining area. If so, mark the remaining area in the ground wire area;
[0035] Selectively mark the ground wires where all the remaining areas in the target area are located, and obtain the unqualified ground wire areas. Display the unqualified ground wire areas through a preset terminal.
[0036] The screening of unqualified shielded wires in the present invention is simple and efficient, and can effectively assist engineers in quickly analyzing circuits and improving the design efficiency of the software platform. Users can directly locate the positions of unreasonable shielded wires without manual inspection, preventing misdetection and missed detection, and improving the accuracy and efficiency of shielded wire detection. The threshold L can be adjusted manually, increasing the flexibility and practicality of the method. Brief Description of the Drawings
[0037] Figure 1 Shows a schematic diagram of a method for inspecting the quality of shielded wires in a layout according to the present invention;
[0038] Figure 2 Shows a schematic diagram of the traces in the layout of the present invention;
[0039] Figure 3 Shows a schematic diagram of the traces in the layout of the present invention;
[0040] Figure 4 Shows a block diagram of a system for inspecting the quality of shielded wires in a layout according to the present invention. Detailed Description of the Invention
[0041] In order to more clearly understand the above objects, features and advantages of the present invention, the present invention will be further described in detail below with reference to the drawings and specific embodiments. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.
[0042] Many specific details are set forth in the following description in order to provide a thorough understanding of the present invention. However, the present invention may be practiced in other ways than those specifically described herein, and therefore, the scope of the present invention is not limited by the specific embodiments disclosed below.
[0043] Figure 1 Shows a schematic diagram of a method for inspecting the quality of shielded wires in a layout according to the present invention.
[0044] The first aspect of the present invention provides a method for inspecting the quality of shielded wires in a layout, including:
[0045] Obtain the layout data of the target area from the circuit layout data and mark it as the target area diagram;
[0046] Identify signal lines and ground lines in the target area diagram to obtain the identification result;
[0047] Based on the identification result, mark the ground line area and the signal line area, further identify the via positions from the ground line area, and perform via marking;
[0048] Set a preset distance L1 and an extension distance L2, where L2 = L1 / 2. Extend the two end vias around based on the L2 distance to form two extended areas, the first area and the second area;
[0049] Based on the first area and the second area, perform overlapping interception on the ground line area, and determine whether there is a remaining area. If so, mark the remaining area in the ground line area;
[0050] Frame and label the ground lines where all the remaining areas in the target area are located to obtain the unqualified ground line area, and display the unqualified ground line area through a preset terminal.
[0051] As Figure 1 shown, it is a schematic diagram of the circuit layout area. Based on the arrow process, it can be divided into 5 sub - flowcharts, P1~P5. P1 is the upper - left process sub - flowchart, P2 is the middle - upper process sub - flowchart, P3 is the upper - right process sub - flowchart, P4 is the lower - right process sub - flowchart, and P5 is the lower - left process sub - flowchart. In the order of the arrow indication, they are P1, P2, P3, P4, P5. In P1, VSS represents the ground line and CLK represents the signal line. It can be seen that three VSSs are framed in the figure for subsequent analysis. In P2, the small rectangles represent the selected via positions. There are four metal lines in P2, two long rectangles, a square, and an L - shaped metal line. The corresponding via positions have been framed. In P3, extend based on the via positions. Note that the maximum boundary of the extension is the maximum boundary of the corresponding metal line. In P3, it can be seen that after the extension, the first long - rectangle shielding line has been covered by the extended area, so there is no redundant area and it is a qualified shielding line. However, for the middle second long rectangle, there is a remaining area in the middle position after the via extension, so it is an unqualified shielding line, as the position of the L / 2 distance has been marked in the figure. The other metal lines in P3 are qualified. In P4, select and mark the unqualified metal line in P3, and frame the corresponding shielding line based on the remaining area, that is, in P5, display based on P5. Figure 1 In addition, the value of L is set by the user and can be set according to the actual situation of the layout, which can effectively screen out errors and align for correction. The following table is a statistical chart of setting the value of L once and the number of analyzed unqualified shielding lines.
[0052] In addition, the value of L is set by the user and can be set according to the actual situation of the layout, which can effectively screen out errors and align for correction. The following table is a statistical chart of setting the value of L once and the number of analyzed unqualified shielding lines.
[0053]
[0054] The final output result of the fifth step P5 is the area that the engineer needs to correct. The present invention uses a series of operation steps to screen out the shielded wires that do not meet the requirements, and can optimize the writing of the layout design according to the actual metal wiring situation.
[0055] Figure 2 、 3 shows the wiring schematic diagram in the layout of the present invention;
[0056] Figure 2 、 3 What is shown is the wiring situation in the layout, where Figure 2 is a situation where there are various signal lines and ground lines, and there are both shielded wires that meet the requirements and those that do not. The dotted line is the unqualified shielded wire. Figure 2 shows a simple situation of screening and locating the shielded wires that do not meet the requirements; under normal circumstances, the layout is composed of dozens or even hundreds of process layers, and the situation is more complex, as Figure 3 shown;
[0057] It should be noted that the shielded wire is the ground wire in the layout and is used to shield the corresponding interference signals. The screening of unqualified shielded wires in the present invention is simple and efficient, can effectively assist engineers in quickly analyzing the circuit, and improve the design efficiency of the software platform. Users can intuitively locate the position of unreasonable shielded wires without manual inspection, preventing misdetection and missed detection, and improving the accuracy and efficiency of shielded wire detection. The threshold L can be adjusted manually, increasing the flexibility and practicability of the method.
[0058] According to an embodiment of the present invention, obtaining the layout data of the target area from the circuit layout data and marking it as the target area map specifically includes:
[0059] Obtaining the circuit layout data through a preset circuit layout design platform;
[0060] Based on the target area selected by the user, obtaining the layout data of the target area from the circuit layout data and marking it as the target area map.
[0061] According to an embodiment of the present invention, identifying the signal lines and ground lines in the target area map to obtain an identification result; based on the identification result, marking the ground line area and the signal line area, further identifying the via positions from the ground line area, and performing via marking, specifically including:
[0062] Based on the layout design layout information, obtaining the metal wire layout information in the target area map;
[0063] Combining with a preset identification model, identifying the metal wires in the target area map and obtaining an identification result;
[0064] Based on the recognition result and the metal wire layout information, mark the ground wire area and the signal wire area;
[0065] Based on the ground wire area, locate and mark the vias at both ends of the ground wire.
[0066] It should be noted that the layout design layout information includes circuit wire layout, signal wire and shield wire design, wiring design and other information. The preset recognition model is an image recognition model based on CNN, which is used to identify circuit target parts in the circuit. There are various signal wires, power ground wires, CMP fill layers, etc. in the layout, which need to be identified and analyzed. The power ground wire is the shield wire, which is used to shield interference signals.
[0067] According to the embodiment of the present invention, set the preset distance L1 and the extension distance L2, where L2 = L1 / 2. Extend the two ends of the via around by the distance L2, and form two extended areas, the first area and the second area; based on the first area and the second area, perform overlapping interception on the ground wire area, and determine whether there is a remaining area. If so, mark the remaining area in the ground wire area. Specifically:
[0068] Obtain the preset distance L2, use the two via position points in the ground wire area as two center points, extend around, and the extension distance is L2, and obtain two extended areas, marked as the first area and the second area. Both the first area and the second area are rectangular areas;
[0069] Based on the first area and the second area, perform overlapping interception on the ground wire area. The interception method is to merge the first area and the second area into a large area, and use the intersection of the large area and the ground wire area as the interception object, intercept from the ground wire area, and determine whether there is a remaining area. If there is no remaining area, it means that the large area contains the ground wire area. If there is a remaining area, mark the remaining area in the ground wire area.
[0070] It should be noted that the merging is the addition of areas. When extending, the extension boundary of the large area is the boundary of the ground wire area where it is located, that is, the maximum extension range of the large area coincides with the ground wire area where it is located.
[0071] According to the embodiment of the present invention, frame and mark the ground wires where all the remaining areas in the target area are located, and obtain the unqualified ground wire area, and display the unqualified ground wire area through a preset terminal. Specifically:
[0072] Obtain all the remaining areas in the target area, frame and mark the ground wires where the remaining areas are located, and mark them as unqualified ground wire areas;
[0073] Mark the ground wires without remaining areas to form qualified ground wire areas;
[0074] Regard the ground wires in the unqualified ground wire area as unqualified shield wires, and the ground wires in the qualified ground wire area as qualified shield wires, and display them through a preset terminal.
[0075] It should be noted that the preset terminal includes a computer terminal and a mobile terminal.
[0076] According to an embodiment of the present invention, for the ground wires in all remaining areas in the target area, perform frame selection and marking to obtain an unqualified ground wire area, and display the unqualified ground wire area through a preset terminal, further including:
[0077] Based on the circuit layout data, obtain adjacent area maps of the target area, and there are multiple adjacent area maps;
[0078] Obtain the unqualified shield wire area and the qualified shield wire area of the target area map;
[0079] Based on the unqualified shield wire area and the qualified shield wire area, mark the qualified shield wires and unqualified shield wires on the target area map. Through the marking, extract the distribution characteristics of the ground wires from the image perspective to obtain the shield wire defect distribution characteristics, and mark them as the first distribution characteristics;
[0080] Construct a clustering model based on the K-means algorithm;
[0081] Analyze and judge the shield wire distribution of the adjacent area maps, and obtain the shield wire defect distribution characteristics of the adjacent area maps, and mark them as the second distribution characteristics;
[0082] Take the first distribution characteristics and the second distribution characteristics as clustering sample data and import them into the clustering model. In the clustering model, use the first distribution characteristics as the data position as a center point, randomly select K - 1 center points from the second distribution characteristics data, and perform cyclic clustering analysis;
[0083] Through the clustering model and the clustering process, obtain the clustering result, and based on the clustering result, analyze and mark the adjacent areas in the same group as the target area map as defect-similar areas;
[0084] Display the defect-similar areas through a preset terminal.
[0085] It should be noted that the adjacent area map is specifically that the user sets an adjacent distance. The larger the distance, the larger the number of selected adjacent areas. The shield wire defect distribution characteristics include the distribution data of qualified and unqualified shield wires. There are generally multiple defect-similar areas. The clustering result is the grouping result of different areas, obtained through clustering analysis based on the distribution characteristics.
[0086] It is worth mentioning that during the inspection and testing of circuit board diagrams, due to the influence of design defects and the actual circuit distribution law, in the area with unqualified ground wires (shielding wires), there may often be the same defects in the adjacent areas. Based on the distribution of unqualified shielding wires, there is a certain influence. Therefore, the present invention performs clustering analysis through distribution characteristics to analyze whether there are similar characteristics between adjacent areas of the target area. The present invention adopts the kmeans clustering algorithm and sets a central point in the target group distribution, so that clustering calculation can be performed with this central point in the subsequent clustering process, and further the distribution characteristics can be efficiently clustered and grouped, so as to screen out similar adjacent areas and send the corresponding areas to a preset terminal to assist engineers in defect analysis and distribution characteristic analysis of the layout, improving the role of the circuit layout auxiliary visualization of the present invention. Compared with the traditional technology, the present invention can perform rapid and efficient distribution characteristic analysis on the target area based on clustering analysis, effectively realize the data display of defect characteristics, assist engineers in visual circuit analysis, and improve the layout design efficiency and quality.
[0087] Figure 4 The block diagram of a system for inspecting the quality of shielding wires in a layout according to the present invention is shown.
[0088] In a second aspect of the present invention, a system 4 for inspecting the quality of shielding wires in a layout is further provided. The system includes: a memory 41 and a processor 42. The memory includes a program for inspecting the quality of shielding wires in a layout. When the program for inspecting the quality of shielding wires in a layout is executed by the processor, the following steps are implemented:
[0089] Obtain the layout data of the target area from the circuit layout data and mark it as the target area diagram;
[0090] Identify the signal wires and ground wires in the target area diagram to obtain the identification result;
[0091] Based on the identification result, mark the ground wire area and the signal wire area, further identify the via positions from the ground wire area, and perform via marking;
[0092] Set a preset distance L1 and an extension distance L2, where L2 = L1 / 2. Extend the two ends of the via around based on the L2 distance to form two extended areas, the first area and the second area;
[0093] Based on the first area and the second area, perform overlapping interception on the ground wire area, and judge whether there is a remaining area. If so, mark the remaining area in the ground wire area;
[0094] Selectively mark the ground wires where all the remaining areas in the target area are located to obtain the unqualified ground wire area, and display the unqualified ground wire area through a preset terminal.
[0095] It should be noted that the shielded wire is the ground wire in the layout, which is used to shield corresponding interference signals. The screening method for unqualified shielded wires in the present invention is simple and efficient, and can effectively assist engineers in quickly analyzing circuits and improving the design efficiency of the software platform.
[0096] According to an embodiment of the present invention, obtaining the layout data of the target area from the circuit layout data and marking it as the target area diagram specifically includes:
[0097] Obtaining circuit layout data through a preset circuit layout design platform;
[0098] Based on the target area selected by the user, obtaining the layout data of the target area from the circuit layout data and marking it as the target area diagram.
[0099] According to an embodiment of the present invention, identifying signal wires and ground wires in the target area diagram to obtain an identification result; based on the identification result, marking the ground wire area and the signal wire area, further identifying the via positions from the ground wire area, and performing via marking, specifically including:
[0100] Obtaining the metal wire layout information in the target area diagram based on the layout design layout information;
[0101] Combining with a preset identification model to identify metal wires in the target area diagram and obtain an identification result;
[0102] Based on the identification result and the metal wire layout information, marking the ground wire area and the signal wire area;
[0103] Positioning and marking the vias at both ends of the ground wire based on the ground wire area.
[0104] It should be noted that the layout design layout information includes information such as circuit wire material layout, signal wire and shielded wire design, and wiring design. The preset identification model is an image recognition model based on CNN, which is used to identify circuit target parts in the circuit. There are various signal wires, power ground wires, CMP fill layers, etc. in the layout that need to be identified and analyzed. The power ground wire is the shielded wire, which is used to shield interference signals.
[0105] According to an embodiment of the present invention, setting a preset distance L1 and an extension distance L2, where L2 = L1 / 2, extending the vias at both ends by a distance of L2 in all directions to form two extended areas, a first area and a second area; based on the first area and the second area, overlapping and intercepting the ground wire area, and determining whether there is a remaining area. If so, marking the remaining area in the ground wire area, specifically including:
[0106] Obtain the set preset distance L2. Using the two through-hole position points in the ground wire area as two center points, extend them in all directions. The extension distance is L2, and two extended areas are obtained, marked as the first area and the second area. Both the first area and the second area are rectangular areas;
[0107] Based on the first area and the second area, perform overlapping interception on the ground wire area. The interception method is to merge the first area and the second area into a large area, take the intersection of the large area and the ground wire area as the interception object, intercept from the ground wire area, and determine whether there is a remaining area. If there is no remaining area, it means the large area contains the ground wire area. If there is a remaining area, mark the remaining area in the ground wire area.
[0108] It should be noted that the merging is the addition of areas. When extending, the extension boundary of the large area is the boundary of the ground wire area where it is located, that is, the large area extends to the maximum range where it coincides with the ground wire area.
[0109] According to an embodiment of the present invention, frame and mark the ground wires where all the remaining areas in the target area are located, and obtain the unqualified ground wire areas. Display the unqualified ground wire areas through a preset terminal, specifically as follows:
[0110] Obtain all the remaining areas in the target area, frame and mark them based on the ground wires where the remaining areas are located, and mark them as unqualified ground wire areas;
[0111] Mark the ground wires without remaining areas to form qualified ground wire areas;
[0112] Regard the ground wires in the unqualified ground wire areas as unqualified shielding wires, and regard the ground wires in the qualified ground wire areas as qualified shielding wires, and display them through a preset terminal.
[0113] It should be noted that the preset terminal includes a computer terminal and a mobile terminal.
[0114] The present invention is simple and efficient for screening unqualified shielding wires, can effectively assist engineers in quickly analyzing circuits, and improve the design efficiency of the software platform. Users can intuitively locate the positions of unreasonable shielding wires, without manual inspection, preventing misdetection and missed detection, and improving the accuracy and efficiency of shielding wire detection. The threshold L can be adjusted manually, increasing the flexibility and practicality of the method.
[0115] In several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces. The indirect coupling or communication connection of devices or units can be electrical, mechanical, or other forms.
[0116] The units described above as separate components may or may not be physically separated. The components shown as units may or may not be physical units. They can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0117] In addition, each functional unit in the embodiments of the present invention can be all integrated in a processing unit, or each unit can be separately used as a unit, or two or more units can be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of a combination of hardware and software functional units.
[0118] Those of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps including the above method embodiments. The foregoing storage medium includes various media that can store program codes, such as removable storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.
[0119] Alternatively, if the above integrated units of the present invention are implemented in the form of software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present invention, in essence, or the part that contributes to the prior art can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the various embodiments of the present invention. The foregoing storage medium includes various media that can store program codes, such as removable storage devices, ROM, RAM, magnetic disks, or optical discs.
[0120] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claimed rights.
Claims
1. A method for checking the quality of shielded lines in a layout, characterized in that: include: Acquire layout data of a target area in the circuit layout data and mark it as a target area map; Identify the signal line and the ground line on the target area map to obtain the identification result; Based on the recognition results, the ground line area and the signal line area are marked, and the through hole position is further identified from the ground line area, and the through hole is marked; Set a preset distance L1 and an extension distance L2, L2=L1 / 2, extend the through holes at both ends around the distance L2, and form two extended areas, a first area and a second area; Based on the first area and the second area, the ground line area is overlapped and intercepted, and it is determined whether there is a remaining area, and if so, the remaining area in the ground line area is marked; Marking the ground lines of all remaining areas in the target area, obtaining unqualified ground line areas, and displaying the unqualified ground line areas through a preset terminal; Among them, the preset distance L1 and the extended distance L2 are set, L2=L1 / 2, the through holes at both ends are extended around based on the L2 distance, and two extended areas, the first area and the second area, are formed; based on the first area and the second area, the ground area is overlapped and intercepted to determine whether there is a remaining area, and if so, the remaining area in the ground area is marked, specifically: Obtain a preset distance L1, take the two through-hole position points in the ground wire area as two center points, extend to all sides, the extension distance is L2, and obtain two extended areas, marked as the first area and the second area, both of which are rectangular areas; Based on the first area and the second area, the ground line area is overlapped and intercepted. The interception method is to merge the first area and the second area into a large area, take the intersection of the large area and the ground line area as the interception object, intercept from the ground line area, and determine whether there is a remaining area. If there is no remaining area, it means that the large area contains the ground line area. If there is a remaining area, the remaining area in the ground line area is marked; The method of marking the ground lines of all the remaining areas in the target area by box selection and obtaining the unqualified ground line area is as follows: Obtain all remaining areas in the target area, select and mark them based on the lines where the remaining areas are located, and mark them as unqualified ground line areas; Mark the ground lines without any remaining area to form a qualified ground line area; The ground wires in the unqualified ground wire area are regarded as unqualified shielding wires, and the ground wires in the qualified ground wire area are regarded as qualified shielding wires, and are displayed through a preset terminal.
2. A method for checking the quality of shielded lines in a layout according to claim 1, characterized in that: The layout data of the target area is obtained from the circuit layout data, and is marked as a target area map, specifically: Obtain circuit layout data through a preset circuit layout design platform; Based on the target area selected by the user, the layout data of the target area is obtained from the circuit layout data and marked as a target area map.
3. A method for checking the quality of shielded lines in a layout according to claim 2, characterized in that: The target area map is identified with signal lines and ground lines to obtain an identification result; based on the identification result, the ground line area and the signal line area are marked, and the through-hole position is further identified from the ground line area, and the through-hole is marked, specifically: Based on the layout information of the layout design, obtain the metal line layout information in the target area map; Combined with the preset recognition model, metal wire recognition is performed on the target area map and the recognition result is obtained; Based on the recognition results and the metal line layout information, the ground line area and the signal line area are marked; Based on the ground wire area, locate and mark the through holes at both ends of the ground wire.
4. A system for checking the quality of shielded lines in a layout, characterized in that: The system includes: a memory and a processor, wherein the memory includes a program for checking the quality of shielding lines in a layout, and when the program for checking the quality of shielding lines in a layout is executed by the processor, the following steps are implemented: Acquire layout data of a target area in the circuit layout data and mark it as a target area map; Identify the signal line and the ground line on the target area map to obtain the identification result; Based on the recognition results, the ground line area and the signal line area are marked, and the through hole position is further identified from the ground line area, and the through hole is marked; Set a preset distance L1 and an extension distance L2, L2=L1 / 2, extend the through holes at both ends around the distance L2, and form two extended areas, a first area and a second area; Based on the first area and the second area, the ground line area is overlapped and intercepted, and it is determined whether there is a remaining area, and if so, the remaining area in the ground line area is marked; Marking the ground lines of all remaining areas in the target area, obtaining unqualified ground line areas, and displaying the unqualified ground line areas through a preset terminal; Among them, the preset distance L1 and the extended distance L2 are set, L2=L1 / 2, the through holes at both ends are extended around based on the L2 distance, and two extended areas, the first area and the second area, are formed; based on the first area and the second area, the ground area is overlapped and intercepted to determine whether there is a remaining area, and if so, the remaining area in the ground area is marked, specifically: Obtain a preset distance L1, take the two through-hole position points in the ground wire area as two center points, extend to all sides, the extension distance is L2, and obtain two extended areas, marked as the first area and the second area, both of which are rectangular areas; Based on the first area and the second area, the ground line area is overlapped and intercepted. The interception method is to merge the first area and the second area into a large area, take the intersection of the large area and the ground line area as the interception object, intercept from the ground line area, and determine whether there is a remaining area. If there is no remaining area, it means that the large area contains the ground line area. If there is a remaining area, the remaining area in the ground line area is marked; The method of marking the ground lines of all the remaining areas in the target area by box selection and obtaining the unqualified ground line area is as follows: Obtain all remaining areas in the target area, select and mark them based on the lines where the remaining areas are located, and mark them as unqualified ground line areas; Mark the ground lines without any remaining area to form a qualified ground line area; The ground wires in the unqualified ground wire area are regarded as unqualified shielding wires, and the ground wires in the qualified ground wire area are regarded as qualified shielding wires, and are displayed through a preset terminal.
Citation Information
Patent Citations
Electric ground network leak hole inspection method and electronic equipment
CN117744575A