Caton processing method and related device

Abstract

The jamming processing method and related device provided in the embodiments of the present application relate to the field of terminal technology. The method includes: the electronic device can detect jamming events, calculate the load status of system resources, and divide the jamming events into jamming levels, and divide the load status into load pressure levels. When the jamming level is low, and / or the load pressure level is low, the electronic device can schedule fewer resources, and when the jamming level is high, and / or the load pressure level is high, the electronic device can schedule more resources. In this way, the electronic device can more reasonably determine the resources to be scheduled according to different jamming levels and / or load pressure levels.

Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to a freeze processing method and related devices. Background Art

[0002] Various types of applications can be run in electronic devices, such as game applications, short video applications, etc. Users can use electronic devices to play games, watch short videos, or browse the web.

[0003] However, in some scenarios, electronic devices may freeze during operation, reducing the user experience. Summary of the invention

[0004] The jamming processing method and related device provided in the embodiments of the present application can detect jamming events, calculate the load status of system resources, and classify jamming events into jamming levels, and classify load status into load pressure levels. When the jamming level is low and / or the load pressure level is low, the electronic device can schedule fewer resources, and when the jamming level is high and / or the load pressure level is high, the electronic device can schedule more resources. In this way, the electronic device can more reasonably determine the resources to be scheduled according to different jamming levels and / or load pressure levels.

[0005] In a first aspect, the embodiment of the present application provides a method for processing jams, the method comprising:

[0006] The electronic device obtains the N+1th jamming event; the electronic device obtains the load pressure level and the jamming level of the jamming event, wherein the jamming level is positively correlated with the jamming frame loss duration, the jamming level is negatively correlated with the jamming interval, the jamming interval includes the interval time between the N+1th jamming event and the Nth jamming event, N is a positive integer, and the load pressure level is positively correlated with any one or more of the following: the utilization rate of the central processing unit CPU, the degree of memory task blocking, the degree of input and output IO task blocking, the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping; the electronic device executes a resource scheduling strategy, wherein the resource scheduling strategy, the jamming level and the load pressure level have a preset corresponding relationship in the electronic device, and the higher the jamming level and / or the higher the load pressure level, the more resources are scheduled by the resource scheduling strategy. In this way, the electronic device can more reasonably determine the resources to be scheduled according to different jamming levels and / or load pressure levels.

[0007] In a possible implementation, the resource scheduling strategy includes one or more of the following: suppressing background resource supply, increasing CPU frequency, and killing background processes. In this way, the lag problem of the electronic device can be reduced, and too many resources will not be scheduled, thereby improving the user experience.

[0008] In one possible implementation, if the jam level is the first jam level, and the load pressure level is the first pressure level or the second pressure level, or the jam level is the second jam level, and the load pressure level is the first pressure level, the resource scheduling strategy includes suppressing the supply of background resources, wherein the first jam level is less than the second jam level, and the first pressure level is less than the second pressure level; if the jam level is the first jam level, and the load pressure level is the third pressure level, or the jam level is the second jam level, and the load pressure level is the second pressure level, or the jam level is the third jam level, and the load pressure level is the first pressure level, the resource scheduling strategy includes one or more of the following: suppressing the supply of background resources, CPU frequency increase, wherein the second jam level is less than the third jam level, and the second pressure level is less than the third pressure level; if the jam level is the second jam level, and the load pressure level is the third pressure level, or the jam level is the third jam level, and the load pressure level is the second pressure level or the third pressure level, the resource scheduling strategy includes one or more of the following: suppressing the supply of background resources, CPU frequency increase, and killing background processes. In this way, when the lag level is low and / or the load pressure level is low, the electronic device can schedule fewer resources, which can minimize the memory resources occupied when performing resource scheduling and reduce the impact on threads running in the electronic device; when the lag level is high and / or the load pressure level is high, the electronic device can schedule more resources so that the problem of lag in the electronic device can be solved as soon as possible.

[0009] In a possible implementation, suppressing the background resource supply includes one or more of the following: the running time of the control thread on the CPU, the priority of the control thread, and the core migration priority of the control thread. In this way, suppressing the background resource supply can relieve the load pressure of the electronic device and enable threads with higher priority to be processed as soon as possible, thereby reducing the jamming problem of the electronic device.

[0010] In a possible implementation, the jamming score corresponding to the jamming level satisfies the following formula:

[0011] jank_score = W1*W2;

[0012] Among them, jank_score is the jank score, W1 is the weight of the jank frame loss duration, W2 is the weight of the jank interval, the jank score is positively correlated with the jank level, the weight of the jank frame loss duration is positively correlated with the jank frame loss duration, and the weight of the jank interval is negatively correlated with the jank interval. In this way, it can correctly reflect that the larger the average frame loss duration and the shorter the jank interval, the more obvious the jank, and the larger the jank score; the smaller the average frame loss duration and the longer the jank interval, the less obvious the jank, and the smaller the jank score. As a result, the decision module can make a more reasonable resource scheduling strategy based on the jank score.

[0013] In a possible implementation, the load pressure score corresponding to the load pressure level satisfies the following formula:

[0014] Load_score = L1 + L2 + L3 + L4;

[0015] Among them, Load_score is the load pressure score, L1 is the weight of the CPU usage, L2 is the weight of the memory task blocking degree, L3 is the weight of the IO task blocking degree, and L4 is the weight of the ratio of the number of threads in the key thread group waiting to run to the total number of threads in the key thread group; the load pressure score is positively correlated with the load pressure level, the weight of the CPU usage is positively correlated with the CPU usage, the weight of the memory task blocking degree is positively correlated with the memory task blocking degree, the weight of the IO task blocking degree is positively correlated with the IO task blocking degree, and the weight of the ratio of the number of threads in the key thread group waiting to run to the total number of threads in the key thread group is positively correlated with the ratio of the number of threads in the key thread group waiting to run to the total number of threads in the key thread group. In this way, it can be correctly reflected that the greater the proportion of the total number of CPU tasks, the greater the degree of memory task blocking, the greater the degree of IO task blocking, and the greater the proportion of VIP group Runnable, the greater the load pressure of the system, and the greater the load pressure score. Therefore, the decision module can make a more reasonable resource scheduling strategy according to the load pressure score.

[0016] In a possible implementation, the jamming event detected by the electronic device includes: a motion effect frame loss event and / or a sliding frame loss event. Thus, after the electronic device detects the motion effect frame loss event and / or the sliding frame loss event, it can schedule resources for the jamming event, thereby reducing the jamming of the electronic device.

[0017] In a possible implementation, the electronic device includes a load calculation module, a performance radar module, a decision module and a scheduling control module of an application management service AMS, and the electronic device obtains the N+1th jam event, including: the performance radar module of the Native layer detects the motion effect frame loss event, and / or the sliding frame loss event; after the electronic device obtains the N+1th jam event, it also includes: the performance radar module transmits the jam frame loss duration of the N+1th jam event to the decision module of the Native layer; the decision module obtains the jam interval based on the jam frame loss duration of the N+1th jam event and the jam frame loss duration of the Nth jam event; the decision module obtains the CPU usage, memory task blocking degree, IO task blocking degree and / or the ratio of the number of threads in the waiting state to run in the key thread group to the total number of threads in the key thread group; the electronic device obtains the load pressure level and the jam level of the jam event, including: the decision module obtains the load pressure level based on the CPU usage rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the waiting state to run in the key thread group to the total number of threads in the key thread group; the decision module obtains the jam level based on the jam frame loss duration and the jam interval; the electronic device executes the resource scheduling strategy, including: the decision module determines the resource scheduling strategy according to the jam frame loss duration and the jam level, and the decision module passes the resource scheduling strategy to the scheduling control module of the Native layer; the scheduling control module executes the resource scheduling strategy. In this way, the jam problem of the electronic device can be reduced, and too many resources will not be scheduled, thereby improving the user experience.

[0018] In a second aspect, an embodiment of the present application provides a device for jamming processing, which may be an electronic device, or a chip or chip system in an electronic device. The device may include a processing unit. The processing unit is used to implement any method related to processing performed by the electronic device in the first aspect or any possible implementation of the first aspect. When the device is an electronic device, the processing unit may be a processor. The device may also include a storage unit, which may be a memory. The storage unit is used to store instructions, and the processing unit executes the instructions stored in the storage unit so that the electronic device implements the method described in the first aspect or any possible implementation of the first aspect. When the device is a chip or chip system in an electronic device, the processing unit may be a processor. The processing unit executes the instructions stored in the storage unit so that the electronic device implements the method described in the first aspect or any possible implementation of the first aspect. The storage unit may be a storage unit in the chip (for example, a register, a cache, etc.), or a storage unit in the electronic device located outside the chip (for example, a read-only memory, a random access memory, etc.).

[0019] Exemplarily, the processing unit is used to obtain the N+1th jamming event, and is also used to obtain the load pressure level and the jamming level of the jamming event, and is specifically used to execute a resource scheduling strategy.

[0020] In a possible implementation, the resource scheduling strategy includes one or more of the following: suppressing background resource supply, increasing CPU frequency, and killing background processes.

[0021] In one possible implementation, if the jam level is the first jam level, and the load pressure level is the first pressure level or the second pressure level, or the jam level is the second jam level, and the load pressure level is the first pressure level, the resource scheduling strategy includes suppressing the supply of background resources, wherein the first jam level is less than the second jam level, and the first pressure level is less than the second pressure level; if the jam level is the first jam level, and the load pressure level is the third pressure level, or the jam level is the second jam level, and the load pressure level is the second pressure level, or the jam level is the third jam level, and the load pressure level is the first pressure level, the resource scheduling strategy includes one or more of the following: suppressing the supply of background resources, CPU frequency increase, wherein the second jam level is less than the third jam level, and the second pressure level is less than the third pressure level; if the jam level is the second jam level, and the load pressure level is the third pressure level, or the jam level is the third jam level, and the load pressure level is the second pressure level or the third pressure level, the resource scheduling strategy includes one or more of the following: suppressing the supply of background resources, CPU frequency increase, and killing background processes.

[0022] In a possible implementation, suppressing the background resource supply includes one or more of the following: the running time of the control thread on the CPU, the priority of the control thread, and the core migration priority of the control thread.

[0023] In a possible implementation, the jamming score corresponding to the jamming level satisfies the following formula:

[0024] jank_score = W1*W2;

[0025] Among them, jank_score is the jank score, W1 is the weight of the jank frame loss duration, and W2 is the weight of the jank interval.

[0026] In a possible implementation, the load pressure score corresponding to the load pressure level satisfies the following formula:

[0027] Load_score = L1 + L2 + L3 + L4;

[0028] Among them, Load_score is the load pressure score, L1 is the weight of CPU usage, L2 is the weight of memory task blocking degree, L3 is the weight of IO task blocking degree, and L4 is the weight of the ratio of the number of threads in the waiting state in the key thread group to the total number of threads in the key thread group.

[0029] In a possible implementation, the freeze event includes: a motion effect frame loss event and / or a sliding frame loss event.

[0030] In one possible implementation, the processing unit is used to detect motion effect frame loss events and / or sliding frame loss events, and is also used to transmit the jamming frame loss duration of the N+1th jamming event to the decision module of the Native layer, and is also used to obtain the jamming interval based on the jamming frame loss duration of the N+1th jamming event and the jamming frame loss duration of the Nth jamming event. Specifically, it is used to obtain the CPU usage rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the waiting state in the key thread group to the total number of threads in the key thread group from the load calculation module of the application framework layer, and is also used to obtain the load pressure level and the jamming level, and is also used to determine the resource scheduling strategy according to the jamming frame loss duration and the jamming level, and is also used to transmit the resource scheduling strategy to the scheduling control module of the Native layer, and is also used to execute the resource scheduling strategy.

[0031] In a third aspect, an embodiment of the present application provides a terminal device, including a processor and a memory, the memory being used to store code instructions, and the processor being used to run the code instructions to execute the method described in the first aspect or any possible implementation of the first aspect.

[0032] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instructions are stored. When the computer program or instructions are run on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0033] In a fifth aspect, an embodiment of the present application provides a computer program product including a computer program. When the computer program runs on a computer, the computer executes the method described in the first aspect or any possible implementation manner of the first aspect.

[0034] In a sixth aspect, the present application provides a chip or a chip system, the chip or chip system comprising at least one processor and a communication interface, the communication interface and the at least one processor are interconnected by a line, and the at least one processor is used to run a computer program or instruction to execute the method described in the first aspect or any possible implementation of the first aspect. The communication interface in the chip can be an input / output interface, a pin or a circuit, etc.

[0035] In a possible implementation, the chip or chip system described above in the present application further includes at least one memory, in which instructions are stored. The memory may be a storage unit inside the chip, such as a register, a cache, etc., or a storage unit of the chip (e.g., a read-only memory, a random access memory, etc.).

[0036] It should be understood that the second to sixth aspects of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0038] Figure 2 A schematic diagram of the software structure of an electronic device provided in an embodiment of the present application;

[0039] Figure 3 A schematic diagram of module interaction of a jamming processing method provided in an embodiment of the present application;

[0040] Figure 4 A schematic diagram of a jamming processing method provided in an embodiment of the present application;

[0041] Figure 5 A schematic diagram of the structure of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] In order to clearly describe the technical solutions of the embodiments of the present application, some terms and technologies involved in the embodiments of the present application are briefly introduced below:

[0043] 1. Terminology

[0044] In the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. For example, the first chip and the second chip are only used to distinguish different chips, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0045] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0046] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, a--c, bc, or abc, where a, b, c can be single or multiple.

[0047] 2. Electronic equipment

[0048] The electronic device of the embodiment of the present application may also be a terminal device in any form. For example, the electronic device may include: a mobile phone, a tablet computer, a PDA, a laptop computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, an electronic device in a 5G network or a public land mobile communication network (public land mobile communication network) to be evolved in the future. Mobile network, PLMN) and the like, the embodiments of the present application are not limited to this.

[0049] As an example but not limitation, in the embodiments of the present application, the electronic device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also powerful functions achieved through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include full-featured, large-sized, and fully or partially independent of smartphones, such as smart watches or smart glasses, as well as devices that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various types of smart bracelets and smart jewelry for vital sign monitoring.

[0050] In addition, in the embodiments of the present application, the electronic device may also be an electronic device in an Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network that interconnects people and machines and things.

[0051] The electronic devices in the embodiments of the present application may also be referred to as: user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0052] In an embodiment of the present application, the electronic device or each network device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as Linux operating system, Unix operating system, Android operating system, iOS operating system, or Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0053] For example, Figure 1 A schematic structural diagram of an electronic device is shown.

[0054] The electronic device may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0055] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device. In other embodiments of the present application, the electronic device may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components may be implemented by hardware, software, or a combination of software and hardware.

[0056] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or integrated into one or more processors. The controller may generate an operation control signal according to the instruction opcode and the timing signal to complete the control of fetching and executing instructions.

[0057] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0058] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a SIM card interface, and / or a USB interface, etc.

[0059] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present invention is only a schematic illustration and does not constitute a structural limitation of the electronic device. In other embodiments of the present application, the electronic device may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0060] The internal memory 121 can be used to store computer executable program codes, and the executable program codes include instructions. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, at least one application required for a function, etc. The data storage area may store data created during the use of the electronic device, etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device by running instructions stored in the internal memory 121 and / or instructions stored in a memory provided in the processor.

[0061] Figure 2It is a software structure block diagram of the electronic device of the embodiment of the present application. The layered architecture divides the software into several layers, each layer has a clear role and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into five layers, from top to bottom, namely, the application layer, the application framework layer, the Android runtime (Android runtime) and the system library, the hardware abstraction layer (hardware adaptation layer, HAL), and the kernel layer.

[0062] The application layer can also be called the application layer, which can include a series of application packages. Figure 2 As shown, the application package may include applications such as phone, music, calendar, camera, game, memo, video, etc. Applications may include system applications and third-party applications.

[0063] The application framework layer can also be called the Framework layer. The Framework layer can provide an application programming interface (API) and a programming framework for the application layer's applications. The Framework layer can include some predefined functions.

[0064] like Figure 2 As shown, the Framework layer may include a scene-aware real-time subsystem, an application management service (AMS), a resource manager, and a content provider, etc.

[0065] The scene perception real-time subsystem can be used to sense user input events received by the electronic device. Input events may include single-click, double-click, long-press, sliding and other operation events of the user on an application in the electronic device, such as application startup events, application exit events, in-application sliding events, application interface switching events, etc.

[0066] The AMS may include a load calculation module, which may be used to query the running status of a process, the load status of a computing system, etc. It is understandable that a process may include one or more threads, and a thread may include one or more tasks.

[0067] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0068] Content providers are used to implement data sharing between different applications, allowing one program to access data in another program while ensuring the security of the accessed data.

[0069] Android runtime includes core libraries and virtual machines. Android runtime is responsible for the control and management of the Android system.

[0070] The core library consists of two parts: one part is the function that needs to be called by the Java language, and the other part is the Android core library.

[0071] The application layer and the framework layer run in a virtual machine. The virtual machine executes the java files of the application layer and the framework layer as binary files. The virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection. For example, in the embodiment of the present application, the virtual machine can be used to query the running status of the execution process, calculate the system load pressure level, and divide the jam level.

[0072] The system library can also be called the Native layer, which can include multiple functional modules, such as performance radar module, decision module, and scheduling control module.

[0073] The performance radar module can be used to detect performance failure issues during the operation of electronic equipment, including the detection of performance failure issues related to user operations. For example, the performance radar module can perform dynamic frame loss detection, sliding frame loss detection, etc.

[0074] The decision module can be used to calculate the system load pressure level according to various load pressure values ​​provided by the load calculation module; the decision module can also be used to divide the jamming level according to the frame loss duration and the jamming interval.

[0075] The scheduling control module can be used to control the resource scheduling strategy issued by the kernel layer execution decision module. The resource scheduling strategy can include controlling the CPU core frequency, controlling the CPU time slice, controlling the thread priority, etc.

[0076] The hardware abstraction layer is an abstract structure between the kernel layer and the Android runtime. The hardware abstraction layer can be a package of hardware drivers, providing a unified interface for upper-layer applications to call.

[0077] The kernel layer is a layer between hardware and software. The kernel layer may include display driver, camera driver, audio driver, battery driver, Bluetooth driver, CPU driver, USB driver, etc. In the embodiment of the present application, the kernel layer can be used to execute processes such as CPU kernel frequency control, CPU time slice control, and thread priority control.

[0078] It should be noted that the embodiments of the present application are only illustrated using the Android system as an example. In other operating systems (such as Windows system, IOS system, etc.), as long as the functions implemented by each functional module are similar to those in the embodiments of the present application, the solutions of the present application can also be implemented.

[0079] Various types of applications can be run in electronic devices, such as game applications, short video applications, etc. Users can use electronic devices to play games, watch short videos, or browse the web.

[0080] However, in some scenarios, after users use electronic devices for a long time, the electronic devices may become stuck, reducing the user experience.

[0081] This is because users may not actively clean up the background applications of electronic devices when using them, and electronic devices are running at high loads, consuming large amounts of power, and may limit the operating frequency of the CPU core when the electronic devices are overheated. This causes untimely task scheduling in the system, and insufficient system resource scheduling for the foreground tasks of electronic devices and / or tasks associated with the foreground. In addition, if the number of tasks waiting to be executed in the system continues to increase, it may eventually cause the electronic device to freeze, reducing the user experience.

[0082] In some implementations, the electronic device can use a low memory killer (LMK) mechanism to optimize a certain memory resource in the system. For example, when a certain memory resource in the system reaches a preset threshold of the memory resource, the electronic device can execute processes such as killing background processes. However, the LMK mechanism cannot simultaneously optimize the load status of multiple system resources such as CPU resources, memory resources, and IO resources. In other words, the optimization effect of the LMK mechanism is single, and it is not obvious in reducing the jamming problem of electronic devices.

[0083] In view of this, the jamming processing method provided in the embodiment of the present application is that the electronic device can detect jamming events, calculate the load status of system resources, and divide the jamming events into jamming levels, and divide the load status into load pressure levels. When the jamming level is low, and / or the load pressure level is low, the electronic device can schedule fewer resources, and when the jamming level is high, and / or the load pressure level is high, the electronic device can schedule more resources. In this way, the electronic device can more reasonably determine the resources to be scheduled according to different jamming levels and / or load pressure levels, which can reduce the jamming problem of the electronic device and will not schedule too many resources, thereby improving the user experience.

[0084] Figure 3 A schematic diagram of module interaction of the jamming processing method according to an embodiment of the present application is shown.

[0085] (1) Framework layer.

[0086] The Framework layer of the electronic device may include a scene perception real-time subsystem and an application management service AMS.

[0087] Among them, the scene perception real-time subsystem can perceive user input events received by the electronic device, such as application startup events, application exit events, in-application sliding events, application interface switching events, etc.

[0088] The load calculation module in the application management service AMS can calculate the system load status, where the system load status can include the proportion of the total CPU tasks (CPU_Load), the degree of memory task blocking (memory pressure stallinformation, Mem-PSI), the degree of IO task blocking (input / output pressure stall information, IO-PSI), and the proportion of Runnable of critical (very important person, VIP) thread groups.

[0089] The percentage of total CPU tasks can be understood as the ratio of the number of threads currently processed by the CPU to the total number of threads that the CPU can process in parallel. Among them, the total number of threads that the CPU can process in parallel can be understood as the number of threads that all CPU cores process simultaneously. The percentage of total CPU tasks can also be understood as the CPU utilization rate. It can be understood that when the number of CPU processing threads is equal to the total number of threads that the CPU can process in parallel, it means that the CPU has reached full load, which can also be understood as the CPU is in a high load state. At this time, the system is more prone to jamming. In order not to affect the user experience, the system can execute related processes such as reducing the CPU load.

[0090] Mem-PSI can be understood as the degree of task blocking caused by tight memory resources.

[0091] IO-PSI can be understood as the degree of task blocking caused by tight input and output resources.

[0092] It is understandable that when the CPU executes a task, it can adopt a group scheduling strategy for threads, and the CPU can process threads in groups. For example, the CPU can put some important foreground threads and / or threads associated with the foreground in a key thread group. Among them, the important foreground threads may include threads that are more closely related to the user experience, such as user interface (UI) threads. In other words, the key thread group may include some important foreground threads and / or threads associated with the foreground.

[0093] The Runnable percentage of key thread groups can be understood as the ratio of the number of threads in the key thread group that are waiting to run to the total number of threads in the key thread group. The Runnable percentage of key thread groups can also be called the Runnable percentage of VIP groups. It is understandable that if the Runnable percentage of VIP groups is high, it means that the foreground tasks cannot be scheduled in time, and the foreground tasks have to wait in line for a long time, then the system may become stuck.

[0094] (2)Native layer

[0095] The Native layer of the electronic device may include a performance radar module and a decision module.

[0096] The performance radar module can perform jam detection on the events perceived by the above-mentioned scene perception real-time subsystem. For example, jam detection can include motion effect frame loss detection, sliding frame loss detection, etc. When the performance radar module detects a jam event, it can report the jam event and data such as the frame loss duration to the decision module. Among them, the frame loss duration can also be understood as the average frame loss duration.

[0097] The decision module can be used to implement the following functions: (a) calculate the continuous jam level; (b) calculate the system load pressure level; (c) determine the system resource scheduling strategy.

[0098] (a) Calculate the continuous jam level.

[0099] When the decision module obtains the jam event reported by the performance radar module, the decision module can record the reporting time of the jam event, so as to calculate the jam interval between the current jam event and the previous jam event.

[0100] It is understandable that the decision module can determine the continuous jam level based on the average frame loss duration of each jam and the jam intervals of multiple jams. For example, the decision module can determine the weight of the average frame loss duration based on the average frame loss duration, and determine the weight of the jam interval based on the jam interval, and determine the continuous jam level based on the weight of the average frame loss duration and the weight of the jam interval. Among them, the continuous jam level can also be called the jam level.

[0101] For example, the average frame loss duration can be divided into multiple intervals. It is understandable that the longer the average frame loss duration is, the more obvious the jamming is, and the larger the weight value corresponding to the average frame loss duration can be. Similarly, the jamming interval can also be divided into multiple intervals. It is understandable that the longer the jamming interval is, the less obvious the jamming is, and the smaller the weight value corresponding to the jamming interval can be.

[0102] The following takes the average frame loss duration and the jamming interval divided into three intervals as an example to illustrate the correspondence between the average frame loss duration and the weight, and the correspondence between the jamming interval and the weight. Table 1 below shows the weight division of the average frame loss duration and the weight division of the jamming interval.

[0103] Table 1

[0104] Weight Average frame loss duration (ms) Stall interval (ms) 1 50～84 2000 and above 2 85～150 1000～2000 3 150 and above 500～999

[0105] It can be understood that if the average frame loss duration is between 50 milliseconds (ms) and 84 ms, the weight of the average frame loss duration is 1; if the average frame loss duration is between 85 ms and 150 ms, the weight of the average frame loss duration is 2; if the average frame loss duration is above 150 ms, the weight of the average frame loss duration is 3.

[0106] If the jamming interval is more than 2000ms, the weight of the jamming interval is 1; if the jamming interval is 1000ms-2000ms, the weight of the jamming interval is 2; if the jamming interval is 500ms-999ms, the weight of the jamming interval is 3.

[0107] The decision module can calculate the jamming score according to the weight of the average frame loss duration and the weight of the jamming interval. In a possible implementation, the jamming score can be positively correlated with the weight of the average frame loss duration, and the jamming score can also be positively correlated with the weight of the jamming interval. It can also be understood that the jamming score can be positively correlated with the average frame loss duration, and the jamming score can be negatively correlated with the jamming interval.

[0108] Exemplarily, the calculation method of the jam score may satisfy the following formula:

[0109] jank_score = W1*W2.

[0110] Among them, jank_score is the jank score, W1 is the weight of the average frame loss duration, and W2 is the weight of the jank interval.

[0111] For example, if the weight W1 of the average frame loss duration is 2 and the weight W2 of the freeze interval is 3, the freeze score is 6.

[0112] The decision module may classify the continuous jamming levels according to the jamming scores. For example, the following Table 2 shows the classification of the continuous jamming levels.

[0113] Table 2

[0114] Continuous freeze level Lv Level 1 Level 2 Level 3 jank_score [1,3] (3,6] (6,9]

[0115] For example, if the decision module calculates a jamming score of 6, then the continuous jamming level is 2.

[0116] It can be understood that the value range of the average frame loss duration and the value range of the freeze interval can also be set to other values, which are not limited in the embodiments of the present application, but it is necessary to satisfy that the value range of the average frame loss duration is positively correlated with the weight of the average frame loss duration, and the value range of the freeze interval is negatively correlated with the weight of the freeze interval.

[0117] The method for calculating the jam score may also adopt other calculation methods, which is not limited by the embodiments of the present application. Exemplarily, the method for calculating the jam score may also be any variation of the above-mentioned jank_score formula. For example, the jam score may be the sum of the weight of the average frame loss duration and the weight of the jam interval; or, the weight of the average frame loss duration may be multiplied by a first coefficient to obtain a first value, and the weight of the jam interval may be multiplied by a second coefficient to obtain a second value, and the jam score may be the value obtained by multiplying the first value by the second value, or, the jam score may be the sum of the first value and the second value, wherein the first coefficient and the second coefficient may be equal or unequal, and the first coefficient and the second coefficient may be values ​​pre-set by the electronic device, which is not limited by the embodiments of the present application.

[0118] In addition, the continuous jamming level can also be divided into other levels, which are not limited in the embodiments of the present application, but need to satisfy the fact that the jamming score is positively correlated with the weight of the average frame loss duration, and the jamming score is positively correlated with the weight of the jamming interval. In this way, it can be correctly reflected that the larger the average frame loss duration and the shorter the jamming interval, the more obvious the jamming, and the larger the jamming score; the smaller the average frame loss duration and the longer the jamming interval, the less obvious the jamming, and the smaller the jamming score. As a result, the decision module can make a more reasonable resource scheduling strategy based on the jamming score.

[0119] (b) Calculate the load pressure level of the system.

[0120] The decision module can obtain various load states of the system from the load calculation module. It is understandable that the timing of the decision module obtaining various load states of the system is not limited in the embodiment of the present application.

[0121] In a possible implementation, when the decision module determines that the continuous jam level reaches level 1, the decision module can call a related interface to obtain various load states of the system from the load calculation module.

[0122] In another possible implementation, when the decision module obtains the jamming event reported by the performance radar module, the decision module can call the relevant interface to obtain various load states of the system from the load calculation module.

[0123] In another possible implementation, the load calculation module may periodically report various load states of the system to the decision module. The specific reporting period may be pre-set by the electronic device and is not limited in the embodiments of the present application.

[0124] The decision module can assign corresponding weights to each load state of the system, such as the weight of the total number of CPU tasks (CPU_Load), the weight of the memory task blocking degree (Mem-PSI), the weight of the IO task blocking degree (IO-PSI), and the weight of the VIP group Runnable ratio.

[0125] Exemplarily, the percentage of total CPU tasks CPU_Load can be divided into multiple intervals. It is understandable that the larger the CPU_Load value, the more obvious the jamming, and the larger the weight value corresponding to CPU_Load can be. Similarly, the degree of memory task blocking Mem-PSI can be divided into multiple intervals. It is understandable that the larger the Mem-PSI value, the more obvious the jamming, and the larger the weight value corresponding to Mem-PSI can be; the degree of IO task blocking can be divided into multiple intervals. It is understandable that the larger the IO-PSI value, the more obvious the jamming, and the larger the weight value corresponding to IO-PSI can be; the percentage of VIP group Runnable can be divided into multiple intervals. It is understandable that the larger the value of the VIP group Runnable percentage, the more obvious the jamming, and the larger the weight value corresponding to the VIP group Runnable percentage can be.

[0126] The following takes CPU_Load, Mem-PSI, IO-PSI, and VIP group Runnable percentage divided into three intervals as an example to illustrate the corresponding relationship between CPU_Load and weight, the corresponding relationship between Mem-PSI and weight, the corresponding relationship between IO-PSI and weight, and the corresponding relationship between VIP group Runnable percentage and weight. The following Table 3 shows the weight division of each load state.

[0127] Table 3

[0128]

[0129] It can be understood that if the total number of CPU tasks accounts for CPU_Load greater than 70% and less than or equal to 80%, the weight of the total number of CPU tasks is 1; if the total number of CPU tasks accounts for CPU_Load greater than 80% and less than or equal to 90%, the weight of the total number of CPU tasks is 2; if the total number of CPU tasks accounts for CPU_Load greater than 90%, the weight of the total number of CPU tasks is 3.

[0130] If the memory task blocking degree Mem-PSI is greater than 10% and less than or equal to 20%, the weight of the memory task blocking degree is 1; if the memory task blocking degree Mem-PSI is greater than 20% and less than or equal to 30%, the weight of the memory task blocking degree is 2; if the memory task blocking degree Mem-PSI is greater than 30%, the weight of the memory task blocking degree is 3.

[0131] If the IO task blocking degree IO-PSI is greater than 10% and less than or equal to 20%, the weight of the IO task blocking degree is 1; if the IO task blocking degree IO-PSI is greater than 20% and less than or equal to 30%, the weight of the IO task blocking degree is 2; if the IO task blocking degree IO-PSI is greater than 30%, the weight of the IO task blocking degree is 3.

[0132] If the Runnable proportion of the VIP group is greater than 10% and less than or equal to 20%, the weight of the Runnable proportion of the VIP group is 1; if the Runnable proportion of the VIP group is greater than 20% and less than or equal to 30%, the weight of the Runnable proportion of the VIP group is 2; if the Runnable proportion of the VIP group is greater than 30%, the weight of the Runnable proportion of the VIP group is 3.

[0133] The decision module can calculate the load pressure score of the system based on the weights of each load state. In a possible implementation, the load pressure score can be positively correlated with any one or more of the following: the weight of the total CPU task ratio, the weight of the memory task blocking degree, the weight of the IO task blocking degree, and the weight of the VIP group Runnable ratio. It can also be understood that the load pressure score can be positively correlated with the total CPU task ratio, the load pressure score can be positively correlated with the memory task blocking degree, the load pressure score can be positively correlated with the IO task blocking degree, and the load pressure score can be positively correlated with the VIP group Runnable ratio.

[0134] Exemplarily, the calculation method of the load pressure score may satisfy the following formula:

[0135] Load_score = L1 + L2 + L3 + L4.

[0136] Among them, Load_score is the load pressure score, L1 is the weight of the total number of CPU tasks, L2 is the weight of the degree of memory task blocking, L3 is the weight of the degree of IO task blocking, and L4 is the weight of the Runnable proportion of the VIP group.

[0137] For example, if the weight W1 of the total CPU task ratio is 1, the weight W2 of the memory task blocking degree is 2, the weight of the IO task blocking degree is 2, and the weight of the VIP group Runnable ratio is 3, then the jam score is 8.

[0138] The decision module can classify the load pressure into grades according to the load pressure scores. For example, the following Table 4 shows the classification of load pressure grades.

[0139] Table 4

[0140] Load pressure level Level 1 Level 2 Level 3 Load_score [1,3] (3,6] (6,12]

[0141] For example, if the decision module calculates that the load pressure score is 8, the level of load pressure is 3.

[0142] It can be understood that the value ranges of the proportion of the total number of CPU tasks, the degree of memory task blocking, the degree of IO task blocking, and the proportion of VIP group Runnable can all be set to other values, and the embodiments of the present application are not limited thereto, but it is necessary to satisfy that the value range of the proportion of the total number of CPU tasks is positively correlated with the weight of the proportion of the total number of CPU tasks, the value range of the degree of memory task blocking is positively correlated with the weight of the degree of memory task blocking, the value range of the degree of IO task blocking is positively correlated with the weight of the degree of IO task blocking, and the value range of the proportion of VIP group Runnable is positively correlated with the weight of the proportion of VIP group Runnable.

[0143] The method for calculating the load pressure score may also adopt other calculation methods, which are not limited in the embodiments of the present application. Exemplarily, the method for calculating the load pressure score may also be any variation of the above-mentioned Load_score formula. For example, the load pressure score may also be the sum of L1, L2, L3, and L4; or, the load pressure score may be the value of L1, L2, L3, and L4 multiplied by their respective coefficients, and then added or multiplied, which is not limited in the embodiments of the present application.

[0144] The load pressure level can also be divided into other levels, which are not limited in the embodiments of the present application, but need to satisfy the load pressure score being positively correlated with the weight of the total number of CPU tasks, the load pressure score being positively correlated with the weight of the memory task blocking degree, the load pressure score being positively correlated with the weight of the IO task blocking degree, and the load pressure score being positively correlated with the weight of the VIP group Runnable proportion. In this way, it can be correctly reflected that the greater the proportion of the total number of CPU tasks, the greater the degree of memory task blocking, the greater the degree of IO task blocking, and the greater the proportion of VIP group Runnable, the greater the load pressure of the system, and the greater the load pressure score. This allows the decision module to make a more reasonable resource scheduling strategy based on the load pressure score.

[0145] In addition, the system may also consider other load conditions to determine the load pressure level of the system, which is not limited in the embodiments of the present application.

[0146] (c) Determine the system's resource scheduling strategy.

[0147] The decision module can determine the resource scheduling strategy of the system based on the continuous jam level and the load pressure level. For example, the following Table 5 shows the implementation of the resource scheduling strategy of the system.

[0148] Table 5

[0149]

[0150] It is understandable that if the continuous lag level is 1 and the load pressure level is 1 or 2, or if the continuous lag level is 2 and the load pressure level is 1, the decision module can improve the system's lag problem by suppressing the background.

[0151] If the continuous lag level is 1 and the load pressure level is 3, or if the continuous lag level is 2 and the load pressure level is 2, or if the continuous lag level is 3 and the load pressure level is 1, the decision module can improve the system's lag problem by suppressing the background and short-term boost.

[0152] If the continuous lag level is 2 and the load pressure level is 3, or if the continuous lag level is 3 and the load pressure level is 2 or 3, the decision module can improve the system's lag problem by suppressing the background, short-term boost, and killing background processes.

[0153] Among them, suppressing the background can be understood as the system's control over the supply of background resources, which may include: controlling CPU time slices, controlling thread execution priorities, controlling core migration priorities, etc.

[0154] For example, controlling the CPU time slice can be understood as the CPU being able to control the running time of a thread on a core. When the CPU reduces the running time of a thread on a core, the system load pressure can be relieved and the system freeze can be reduced.

[0155] Controlling the core migration priority can be understood as follows: if threads A and B are running on the CPU's large core, when thread C is running on the large core, if thread C has a higher priority than threads A and B, thread C can be run on the large core first. To ease the load pressure on the large CPU core, the system can migrate threads with lower priorities to the small CPU cores. For example, if thread A has a lower priority than thread B, the system can migrate thread A to the small CPU core, thereby achieving core migration priority control.

[0156] Short-term boost can be understood as increasing the frequency of a CPU core, which can speed up the processing of threads running on that core. In a possible implementation, since the foreground tasks in the system usually run on the large core of the CPU, the system can increase the frequency of the large core of the CPU. In this way, the system interface can be less stuck. In some implementations, short-term boost can also be called CPU frequency increase.

[0157] When checking and killing background processes, the system can check and kill the third-party processes in the background instead of the system processes. In this way, the system processes can run normally and the probability of system abnormalities can be reduced.

[0158] It is understandable that the system can also use other methods to implement the resource scheduling strategy of the system based on the continuous jam level and load pressure level, which is not limited in the embodiments of the present application. However, it is necessary to meet the requirement that when the jam level is low and / or the load pressure level is low, the electronic device can schedule fewer resources, and when the jam level is high and / or the load pressure level is high, the electronic device can schedule more resources. In this way, the electronic device can determine the resources to be scheduled according to different jam levels and / or load pressure levels, which can reduce the jam problem of the electronic device and will not schedule too many resources, thereby improving the user experience.

[0159] In addition, different resource scheduling strategies may be adopted under different continuous jamming levels and load pressure levels, which is not limited in the embodiments of the present application.

[0160] After the decision module determines the resource scheduling strategy, it can send the resource scheduling strategy to the scheduling control module, and then the scheduling control module can send corresponding control commands to the kernel layer.

[0161] It is understandable that the decision module may also run in the scheduling control module of the Native layer, or the decision module may also run in other software layers, which is not limited in the embodiments of the present application.

[0162] (3) Core layer.

[0163] The kernel layer can perform CPU core frequency modulation, control CPU time slices, control thread execution priorities, and other processes based on the control commands issued by the scheduling control module, thereby improving the freezing problem of electronic devices and enhancing user experience.

[0164] The following specific embodiments are used to describe the method of the present application in detail. The following embodiments may be combined with each other or implemented independently, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0165] Figure 4The method for handling jamming in an embodiment of the present application is shown. The method includes:

[0166] S401. The electronic device receives the N+1th freezing event.

[0167] In the embodiment of the present application, the jam event may include various jam events in the electronic device, which are not limited in the embodiment of the present application. For example, the jam event may include the above Figure 3 The corresponding embodiments of the present invention will not be described in detail in detail, such as the dynamic frame loss event and the sliding frame loss event.

[0168] S402. The electronic device obtains the load pressure level and the jamming level of the jamming event, wherein the jamming level is positively correlated with the jamming frame loss duration, and the jamming level is negatively correlated with the jamming interval, the jamming interval includes the interval time between the N+1th jamming event and the Nth jamming event, N is a positive integer, and the load pressure level is positively correlated with any one or more of the following: the utilization rate of the central processing unit CPU, the degree of memory task blocking, the degree of input and output IO task blocking, and the ratio of the number of threads in the critical thread grouping that are in a waiting state to the total number of threads in the critical thread grouping.

[0169] In the embodiment of the present application, the electronic device can obtain the jam level by referring to the above Figure 3 In the corresponding embodiment (a) the description of calculating the continuous jam level, the jam level can also be called the continuous jam level, which will not be repeated. The electronic device can obtain the load pressure level by referring to the above Figure 3 The description related to the load pressure level of the calculation system in the corresponding embodiment (b) is not repeated here.

[0170] Among them, the CPU utilization rate can be understood as the proportion of the total number of CPU tasks in the above embodiment, and the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping can also be understood as the proportion of VIP group Runnable in the above embodiment, which will not be repeated.

[0171] S403, the electronic device executes a resource scheduling strategy, wherein the resource scheduling strategy, the jamming level and the load pressure level have a preset corresponding relationship in the electronic device, and the higher the jamming level and / or the higher the load pressure level, the more resources are scheduled by the resource scheduling strategy.

[0172] In the embodiment of the present application, the electronic device can execute the resource scheduling strategy by referring to the above Figure 3 The corresponding description of (c) determining the resource scheduling strategy of the system in the corresponding embodiment is not repeated here. The corresponding relationship between the resource scheduling strategy, the jam level and the load pressure level in the electronic device can be referred to above. Figure 3 The relevant description of Table 5 in the corresponding embodiment will not be repeated here.

[0173] The higher the lag level and / or the higher the load pressure level, the more resources the resource scheduling strategy schedules. In this way, the electronic device can more reasonably determine the resources to be scheduled according to different lag levels and / or load pressure levels, which can reduce the lag problem of the electronic device and avoid scheduling too many resources.

[0174] Optional, in Figure 4 On the basis of the corresponding embodiments, the resource scheduling strategy may include one or more of the following: suppressing background resource supply, increasing CPU frequency, and killing background processes.

[0175] In the embodiment of the present application, the resource scheduling strategy can refer to the above Figure 3 The description of Table 5 in the corresponding embodiment will not be repeated here. Figure 3 The description of suppressing the background in the corresponding embodiment and CPU frequency increase can refer to the above Figure 3 The relevant description of the short-term boost in the corresponding embodiment will not be repeated here.

[0176] The electronic device can determine the resources to be scheduled according to different jamming levels and / or load pressure levels. In this way, the jamming problem of the electronic device can be reduced, and too many resources will not be scheduled, thereby improving the user experience.

[0177] Optional, in Figure 4 On the basis of the corresponding embodiments, if the jam level is the first jam level, and the load pressure level is the first pressure level or the second pressure level, or the jam level is the second jam level, and the load pressure level is the first pressure level, the resource scheduling strategy may include suppressing the supply of background resources, wherein the first jam level is less than the second jam level, and the first pressure level is less than the second pressure level; if the jam level is the first jam level, and the load pressure level is the third pressure level, or the jam level is the second jam level, and the load pressure level is the second pressure level, or the jam level is the third jam level, and the load pressure level is the first pressure level, the resource scheduling strategy may include one or more of the following: suppressing the supply of background resources, CPU frequency increase, wherein the second jam level is less than the third jam level, and the second pressure level is less than the third pressure level; if the jam level is the second jam level, and the load pressure level is the third pressure level, or the jam level is the third jam level, and the load pressure level is the second pressure level or the third pressure level, the resource scheduling strategy may include one or more of the following: suppressing the supply of background resources, CPU frequency increase, and killing background processes.

[0178] In the embodiment of the present application, the corresponding relationship between the resource scheduling strategy, the jam level and the load pressure level can refer to the above Figure 3The relevant description of Table 5 in the corresponding embodiment will not be repeated here.

[0179] When the lag level is low and / or the load pressure level is low, the electronic device can schedule fewer resources, which can minimize the memory resources occupied when performing resource scheduling and reduce the impact on threads running in the electronic device; when the lag level is high and / or the load pressure level is high, the electronic device can schedule more resources so that the lag problem of the electronic device can be solved as soon as possible.

[0180] Optional, in Figure 4 On the basis of the corresponding embodiment, suppressing the background resource supply includes one or more of the following: the running time of the control thread on the CPU, the priority of the control thread, and the core migration priority of the control thread.

[0181] In the embodiment of the present application, the running time of the control thread on the CPU can be understood as the control CPU time slice. For details, please refer to the above Figure 3 The description of controlling CPU time slices in the corresponding embodiment will not be repeated here. Figure 3 The relevant description of controlling the core migration priority in the corresponding embodiment will not be repeated here.

[0182] Suppressing the supply of background resources can alleviate the load pressure of electronic devices and enable higher-priority threads to be processed as quickly as possible, thereby reducing the lag problem of electronic devices.

[0183] Optional, in Figure 4 Based on the corresponding embodiment, the jamming score corresponding to the jamming level can satisfy the following formula:

[0184] jank_score = W1*W2;

[0185] Among them, jank_score is the jank score, W1 is the weight of the jank frame loss duration, and W2 is the weight of the jank interval. The jank score is positively correlated with the jank level, the weight of the jank frame loss duration is positively correlated with the jank frame loss duration, and the weight of the jank interval is negatively correlated with the jank interval.

[0186] In the embodiment of the present application, the calculation method of the jam level can refer to the above Figure 3 The relevant description of calculating the continuous jam level in (a) in the corresponding embodiment is not repeated here.

[0187] The jam score is positively correlated with the weight of the average frame loss duration, and the jam score is positively correlated with the weight of the jam interval. In this way, it can be correctly reflected that the larger the average frame loss duration and the shorter the jam interval, the more obvious the jam, and the larger the jam score; the smaller the average frame loss duration and the longer the jam interval, the less obvious the jam, and the smaller the jam score. This allows the decision module to make a more reasonable resource scheduling strategy based on the jam score.

[0188] Optional, in Figure 4 Based on the corresponding embodiment, the load pressure score corresponding to the load pressure level can satisfy the following formula:

[0189] Load_score = L1 + L2 + L3 + L4;

[0190] Among them, Load_score is the load pressure score, L1 is the weight of the CPU usage, L2 is the weight of the memory task blocking degree, L3 is the weight of the IO task blocking degree, and L4 is the weight of the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping; the load pressure score is positively correlated with the load pressure level, the weight of the CPU usage is positively correlated with the CPU usage, the weight of the memory task blocking degree is positively correlated with the memory task blocking degree, the weight of the IO task blocking degree is positively correlated with the IO task blocking degree, and the weight of the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping is positively correlated with the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping.

[0191] In the embodiment of the present application, the calculation method of the load pressure level can refer to the above Figure 3 The description related to the load pressure level of the calculation system in the corresponding embodiment (b) is not repeated here.

[0192] In this way, it can be correctly reflected that the greater the proportion of total CPU tasks, the greater the degree of memory task blocking, the greater the degree of IO task blocking, and the greater the proportion of VIP group Runnable, the greater the system load pressure, and the greater the load pressure score. Therefore, the decision module can make a more reasonable resource scheduling strategy according to the load pressure score.

[0193] Optional, in Figure 4 Based on the corresponding embodiments, the freeze events detected by the electronic device may include: motion effect frame loss events, and / or sliding frame loss events.

[0194] In an embodiment of the present application, after detecting a motion effect frame loss event and / or a sliding frame loss event, the electronic device can schedule resources for the freeze event, thereby reducing the freeze of the electronic device.

[0195] Optional, in Figure 4 On the basis of the corresponding embodiments, the electronic device may include a load calculation module, a performance radar module, a decision module and a scheduling control module of the application management service AMS, and the electronic device obtains the N+1th freeze event, which may include: the performance radar module of the Native layer detects the dynamic frame loss event, and / or the sliding frame loss event; after the electronic device obtains the N+1th freeze event, it may also include: the performance radar module transmits the freeze frame loss duration of the N+1th freeze event to the decision module of the Native layer; the decision module obtains the freeze interval based on the freeze frame loss duration of the N+1th freeze event and the freeze frame loss duration of the Nth freeze event; the decision module obtains the CPU usage, memory task blocking degree, IO task blocking degree from the load calculation module of the application framework layer The electronic device obtains the load pressure level and the jamming level of the jamming event, which may include: the decision module obtains the load pressure level based on the CPU utilization rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the waiting state to the total number of threads in the key thread grouping; the decision module obtains the jamming level based on the jamming frame loss duration and the jamming interval; the electronic device executes the resource scheduling strategy, which may include: the decision module determines the resource scheduling strategy according to the jamming frame loss duration and the jamming level, and the decision module passes the resource scheduling strategy to the scheduling control module of the Native layer; the scheduling control module executes the resource scheduling strategy.

[0196] In the embodiment of the present application, the timing when the decision module obtains the CPU usage rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the key thread group waiting to run to the total number of threads in the key thread group is not limited in the embodiment of the present application. The specific decision module obtains the various load states of the system from the load calculation module, which can refer to the above Figure 3 The relevant descriptions in the corresponding embodiments are not repeated here.

[0197] The electronic device can detect the jamming event, calculate the load status of the system resources, and classify the jamming event into jamming levels, and classify the load status into load pressure levels. In this way, the electronic device can determine the resources to be scheduled according to different jamming levels and / or load pressure levels, which can reduce the jamming problem of the electronic device and avoid scheduling too many resources, thereby improving the user experience.

[0198] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0199] The above mainly introduces the solution provided by the embodiment of the present application from the perspective of the method. In order to achieve the above functions, it includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily appreciate that, in combination with the method steps of each example described in the embodiment disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0200] The embodiment of the present application can divide the functional modules of the device implementing the method according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The integrated module can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0201] like Figure 5 FIG. 5 is a schematic diagram of a chip structure provided by an embodiment of the present application. The chip 500 includes one or more (including two) processors 501 , a communication line 502 , a communication interface 503 and a memory 504 .

[0202] In some implementations, the memory 504 stores the following elements: executable modules or data structures, or a subset thereof, or an extended set thereof.

[0203] The method described in the above embodiment of the present application can be applied to the processor 501, or implemented by the processor 501. The processor 501 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware or software instructions in the processor 501. The above processor 501 can be a general processor (for example, a microprocessor or a conventional processor), a digital signal processor (digital signal processing, DSP), an application specific integrated circuit (application specific integrated circuit, ASIC), a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic devices, discrete gates, transistor logic devices or discrete hardware components. The processor 501 can implement or execute the methods, steps and logic block diagrams related to each processing disclosed in the embodiment of the present application.

[0204] The steps of the method disclosed in the embodiment of the present application can be directly embodied as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. Among them, the software module can be located in a mature storage medium in the field such as a random access memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable read only memory (EEPROM). The storage medium is located in the memory 504, and the processor 501 reads the information in the memory 504 and completes the steps of the above method in combination with its hardware.

[0205] The processor 501 , the memory 504 , and the communication interface 503 may communicate with each other via the communication line 502 .

[0206] In the above embodiments, the instructions stored in the memory for execution by the processor may be implemented in the form of a computer program product, wherein the computer program product may be pre-written in the memory, or may be downloaded and installed in the memory in the form of software.

[0207] The embodiment of the present application also provides a computer program product including one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that includes one or more available media integrated. For example, the available medium may include a magnetic medium (e.g., a floppy disk, a hard disk or a tape), an optical medium (e.g., a digital versatile disc (DVD)), or a semiconductor medium (e.g., a solid state disk (SSD)), etc.

[0208] The present application also provides a computer-readable storage medium. The methods described in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. Computer-readable media may include computer storage media and communication media, and may also include any medium that can transfer a computer program from one place to another. The storage medium may be any target medium that can be accessed by a computer.

[0209] As a possible design, the computer readable medium may include a compact disc read-only memory (CD-ROM), RAM, ROM, EEPROM or other optical disc storage; the computer readable medium may include a magnetic disk storage or other magnetic disk storage device. Moreover, any connection line may also be appropriately referred to as a computer readable medium. For example, if the software is transmitted from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave), the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology such as infrared, radio and microwave are included in the definition of medium. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while optical discs reproduce data optically using lasers.

[0210] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

Claims

1. A method for processing jams, characterized in that: The method comprises: The electronic device obtains the N+1th freeze event; the freeze event includes: a motion effect frame loss event and / or a sliding frame loss event; The electronic device obtains a load pressure level and a jam level of the jam event, wherein the jam level is positively correlated with the jam frame loss duration, the jam level is negatively correlated with the jam interval, the jam interval includes the interval time between the N+1th jam event and the Nth jam event, N is a positive integer, and the load pressure level is positively correlated with any one or more of the following: a utilization rate of a central processing unit (CPU), a degree of memory task blocking, a degree of input and output (IO) task blocking, and a ratio of the number of threads in a waiting state in a key thread group to the total number of threads in the key thread group; The electronic device executes a resource scheduling strategy, wherein the resource scheduling strategy, the jamming level and the load pressure level have a preset corresponding relationship in the electronic device, and the higher the jamming level and / or the higher the load pressure level, the more resources are scheduled by the resource scheduling strategy; the resource scheduling strategy includes one or more of the following: suppressing background resource supply, CPU frequency increase, and killing background processes, and the suppression of background resource supply includes one or more of the following: the running time of the control thread on the CPU, the priority of the control thread, and the core migration priority of the control thread.

2. The method according to claim 1, characterized in that If the jam level is the first jam level, and the load pressure level is the first pressure level or the second pressure level, or the jam level is the second jam level, and the load pressure level is the first pressure level, the resource scheduling strategy includes suppressing background resource supply, wherein the first jam level is less than the second jam level, and the first pressure level is less than the second pressure level; If the jam level is the first jam level and the load pressure level is the third pressure level, or the jam level is the second jam level and the load pressure level is the second pressure level, or the jam level is the third jam level and the load pressure level is the first pressure level, the resource scheduling strategy includes one or more of the following: suppressing background resource supply and CPU frequency increase, wherein the second jam level is less than the third jam level, and the second pressure level is less than the third pressure level; If the lag level is the second lag level and the load pressure level is the third pressure level, or the lag level is the third lag level and the load pressure level is the second pressure level or the third pressure level, the resource scheduling strategy includes one or more of the following: suppressing background resource supply, increasing CPU frequency, and killing background processes.

3. The method according to claim 1 or 2, characterized in that: The jamming score corresponding to the jamming level satisfies the following formula: jank_score = W1*W2; Among them, jank_score is the jank score, W1 is the weight of the jank frame loss duration, W2 is the weight of the jank interval, the jank score is positively correlated with the jank level, the weight of the jank frame loss duration is positively correlated with the jank frame loss duration, and the weight of the jank interval is inversely correlated with the jank interval.

4. The method according to claim 1 or 2, characterized in that: The load pressure score corresponding to the load pressure level satisfies the following formula: Load_score = L1 + L2 + L3 + L4; Wherein, Load_score is the load pressure score, L1 is the weight of the CPU usage rate, L2 is the weight of the memory task blocking degree, L3 is the weight of the IO task blocking degree, and L4 is the weight of the ratio of the number of threads in the critical thread grouping that are in the waiting state to the total number of threads in the critical thread grouping; The load pressure score is positively correlated with the load pressure level, the weight of the CPU usage is positively correlated with the CPU usage, the weight of the memory task blocking degree is positively correlated with the memory task blocking degree, the weight of the IO task blocking degree is positively correlated with the IO task blocking degree, and the weight of the ratio of the number of threads in the waiting state to the total number of threads in the critical thread grouping is positively correlated with the ratio of the number of threads in the waiting state to the total number of threads in the critical thread grouping.

5. The method according to claim 1 or 2, characterized in that: The electronic device includes a load calculation module, a performance radar module, a decision module and a scheduling control module of the application management service AMS. The electronic device receives the N+1th freeze event, including: The performance radar module of the Native layer detects a motion effect frame loss event and / or a sliding frame loss event; After the electronic device receives the N+1th freeze event, the method further includes: The performance radar module transmits the jamming frame loss duration of the N+1th jamming event to the decision module of the Native layer; The decision module obtains the freeze interval based on the freeze frame loss duration of the N+1th freeze event and the freeze frame loss duration of the Nth freeze event; The decision module obtains the CPU usage rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the key thread grouping waiting to run to the total number of threads in the key thread grouping from the load calculation module of the application framework layer; The electronic device obtains a load pressure level and a jam level of the jam event, including: The decision module obtains the load pressure level based on the CPU usage rate, the memory task blocking degree, the IO task blocking degree and / or the ratio of the number of threads in the critical thread grouping that are in a waiting state to run to the total number of threads in the critical thread grouping; The decision module obtains the jam level based on the jam frame loss duration and the jam interval; The electronic device executes a resource scheduling strategy, including: The decision module determines the resource scheduling strategy according to the jamming frame loss duration and the jamming level, and the decision module transmits the resource scheduling strategy to the scheduling control module of the Native layer; The scheduling control module executes the resource scheduling strategy.

6. An electronic device, characterized in that: include: A memory and a processor, the memory being used to store a computer program, and the processor being used to execute the computer program to perform the method according to any one of claims 1 to 5.

7. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when the instructions are executed, the computer executes the method according to any one of claims 1 to 5.

8. A computer program product, characterized in that The invention comprises a computer program, which, when being executed, enables an electronic device to execute the method according to any one of claims 1 to 5.

Images