5 results about "Encrypted function" patented technology

This invention discloses a hardware circuit supporting SM3 encryption, relating to the field of information security cryptography. It includes a register configuration component, an initialization and update component, and an SM3 hash calculation component integrated at the top layer of the chip and interconnected in pairs. The register configuration component includes a message register, an IV value setting register, a status register, a hash result register, and an SM3 control register. The register configuration component is connected to the CPU via a CPU_IF interface, through which the CPU performs read and write operations on each register. The initialization and update component receives the message data to be encrypted from the message register and the IV value from the IV value setting register, packages the received IV value as the initial IV value and the message data to be encrypted, and forwards it to the SM3 hash calculation component. The SM3 hash calculation component calculates the hash value based on the message data and the IV value, performs endianness conversion, and sends the hash result back to the hash result register. This invention enhances the overall security and computational speed of the chip system.

This invention discloses a low-resource AES encryption system and method based on heterogeneous computing, belonging to the field of information security hardware acceleration technology. Based on the traditional AES algorithm, a fixed-round multiplexing control module and an external dedicated XOR circuit are introduced. The fixed-round multiplexing control module sequentially executes SubBytes and ShiftRows transformations within the FPGA. By employing in-round operation multiplexing and state register sharing, high-level reuse of logic resources is achieved, significantly reducing the FPGA's lookup table usage. By decomposing the MixColumns operation into a two-stage pipeline structure of internal FPGA xtime transformation and external XOR circuit, and using an external 74LVC574 register to synchronize the data path in real time, precise matching of computational latency and area optimization are achieved. This system implements secure and reliable AES encryption with limited hardware resources. Combined with a dynamic masking mechanism, effective protection of intermediate states is achieved, significantly enhancing the system's resistance to side-channel attacks and reducing hardware costs and resource overhead while ensuring throughput.

This invention discloses a white-light communication μLED device with physical-layer temporal encryption, along with its encryption method and system. The device is based on an InGaN / GaN blue μLED array, with orange-red μLED encryption units based on organic long-afterglow materials integrated on adjacent mesa via a masking process. These encryption units generate controllably decaying afterglow emission after the pulsed current stops. By adjusting the pulse parameters, the duration and brightness of the afterglow can be changed, thereby writing encrypted information in the temporal dimension. The blue unit outputs a high-speed communication signal, while the orange-red unit emits afterglow carrying the ciphertext. The two lights mix in space to form a stable white light output. This structure simultaneously achieves illumination, high-speed communication, and physical-layer encryption in a single device. This invention offers a highly concealed encryption mechanism, a large modulation bandwidth, a simple device structure, and compatibility with existing systems, providing crucial hardware support for high-security visible light communication.

A matrix code based on pan-artificial intelligence, comprising three layers of structure from an outside to an inside, namely, an outer open code area, a core layer code area, and a matrix core layer code area; the outer open code area is generated by AI software according to specific requirements; the core layer code area has a firewall layer and advanced encryption functions, and the core layer code area manages and controls the outer open code area; the matrix core layer code area serves as the most core intervention and correction method of AI, acting as a deep encryption core information zone. Through the use of multi-layer structures and optical media composite materials, the information storage capacity is significantly improved to meet the needs of the big data era; the dual encryption mechanism of the core layer and matrix core layer effectively prevents information leakage and tampering, improves security.