A method for detecting the endpoint of wet etching of silicon oxide

Abstract

The present invention discloses a method for detecting the endpoint of wet etching of silicon oxide, belonging to the technical field of semiconductor etching. First, an ion pattern is prepared along a preset path of ion implantation on the wafer surface, and ion implantation is carried out within the ion pattern region. Secondly, a marker pattern is prepared on the surface of the wafer implanted with ions, and markers are respectively plated on the surface of the implanted ions and the surface of the second photoresist layer. Then, a protective layer is prepared on the markers remaining on the ion surface and on the wafer. Next, an etching pattern is prepared along the preset path of ion implantation on the surface of the protective layer. Finally, during the etching process, the thickness change of the marker is detected and the color change of the marker on the ion surface is simultaneously confirmed. When the color of the marker on the ion surface disappears, it is determined that the protective layer on the ion surface has been etched completely, and the etching is stopped. This detection method does not require resistance and film thickness testing, saves time and testing steps, and is not easily damaged to the substrate.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor etching, and in particular to a method for detecting the end point of wet etching of silicon oxide. Background Art

[0002] With the rapid development of the semiconductor industry, the feature size of integrated circuits has been continuously miniaturized, and semiconductor wafers have been continuously developed in the direction of small volume, high circuit density, fast speed, and low power consumption. The integrated circuit has now entered the ULSI sub-micron technology stage.

[0003] In the existing preparation process of semiconductor devices, after ion implantation on a silicon substrate is completed, a layer of silicon oxide needs to be deposited on the device surface as isolation; firstly, silicon oxide is an insulating material that can effectively isolate devices in different regions, prevent the current between electrons from interfering with each other, and improve the stability and reliability of the device; secondly, the silicon oxide film can protect the device surface from the influence of the external environment, prevent the infiltration and oxidation of impurities, and extend the life of the device; thirdly, silicon oxide has high insulation performance, which can reduce crosstalk and interconnect resistance in the device, and improve the performance and power consumption efficiency of the device.

[0004] However, in some cases, the silicon oxide layer formed during the preparation process may have a negative impact on the use of the device. For example, an overly thick silicon oxide layer may affect the performance of the device, and a large area of the silicon oxide layer remaining at the opening will affect the conductivity of the device. Therefore, it is necessary to control the thickness of the silicon oxide or reduce the silicon oxide at the opening through the technology of removing silicon oxide. Precise reduction of the silicon oxide thickness or precise removal of most of the silicon oxide layer at the opening can make the structure of the device more precise and stable, and improve the performance and reliability of the device.

[0005] The commonly used techniques for removing silicon oxide are divided into two categories: dry etching and wet etching. Dry etching uses reactive particles (such as oxygen ions, fluorine ions, etc.) in gas plasma to chemically react with silicon oxide, corrode or chemically change the material, and convert silicon oxide into gaseous products, so as to achieve the purpose of removing silicon oxide. However, it is easy to damage the implanted silicon substrate, resulting in device failure; wet etching of silicon oxide generally uses a chemical solution - BOE solution for etching. The BOE solution is a chemical solution commonly used for etching silicon and silicon oxide. It is usually composed of a mixture of hydrofluoric acid and hydrochloric acid, and a certain buffer is used to adjust the pH value of the solution; after etching, it is necessary to observe under a microscope to judge whether the silicon oxide at the opening has been removed completely. However, since silicon oxide itself is a light-transmitting substance, it is impossible to accurately judge whether there is silicon oxide residue under the microscope; other commonly used detection methods include resistance measurement method and etching depth detection method, but both of these methods have the following defects: it is difficult to accurately measure or impossible to test for too small micropores, and once the judgment is incorrect and there is silicon oxide residue at the etched hole, it will cause rework of the product, and in severe cases, it will cause the product to be scrapped.

[0006] It can be seen that the existing methods for testing the endpoint of silicon oxide have problems such as being difficult to observe, inaccurate detection results, and inability to conduct tests. Therefore, developing a wet etching silicon oxide endpoint detection solution that is more intuitive and has a high test accuracy rate has become an urgent practical problem facing those skilled in the art. Summary of the Invention

[0007] To solve the many practical problems mentioned in the background art, the present invention aims to provide a method for detecting the endpoint of wet etching silicon oxide to overcome the problems existing in the prior art, such as the silicon oxide endpoint test method being prone to damaging the substrate, having inaccurate detection results, and being unable to conduct tests.

[0008] A method for detecting the endpoint of wet etching silicon oxide disclosed by the present invention includes the following steps:

[0009] S1. Coat a first photoresist on the surface of the wafer, project an ion pattern onto the first photoresist, remove the first photoresist corresponding to the ion pattern to form an ion pattern on the surface of the wafer, and the remaining first photoresist is the first photoresist layer. The first photoresist layer covers the surface of the wafer. Inject ions into the ion pattern area and then remove the first photoresist layer;

[0010] S2. Prepare a marker on the surface of the wafer into which ions have been injected

[0011] Coat a second photoresist on the entire surface of the wafer after ion injection, project a marker pattern onto the second photoresist, remove the second photoresist corresponding to the projected marker pattern to form a marker pattern on the surface of the wafer, and the remaining second photoresist is the second photoresist layer. The second photoresist layer covers part of the ion surface and the surface of the wafer. Deposit a marker on the surface of the injected ions where the marker pattern is located and on the surface of the second photoresist layer. The marker has a color, and then remove the second photoresist layer and the marker covering the surface of the second photoresist layer;

[0012] S3. Prepare a protective layer on the marker remaining on the ion surface and on the wafer outside the marker;

[0013] S4. Coat a third photoresist on the surface of the wafer with the protective layer, project an etching pattern onto the third photoresist, remove the third photoresist corresponding to the projected etching pattern to form an etching pattern on the surface of the protective layer, and the remaining third photoresist is the third photoresist layer. The third photoresist layer covers the surface of the protective layer outside the etching pattern;

[0014] S5. Start etching, etch the area corresponding to the etching pattern, monitor the color change on the ion surface, and stop etching when the color of the marker on the ion surface disappears, determining that the protective layer on the ion surface has been completely etched, and further remove the third photoresist layer in step S4.

[0015] Further, to ensure that the marker can be etched clean without residue, which may cause the wafer to be scrapped, the aperture of the ion pattern is D 1 , the aperture of the marker pattern is D 2 , the aperture of the etching pattern is D 3 , where D 1 = D 3 > D 2 .

[0016] Further, to prevent lateral etching from affecting the structural stability of the wafer, the thickness of the protective layer is H 1 , the horizontal distance between the aperture edge of the etching pattern and the aperture edge of the ion pattern is H 2 , where H 2 > H 1 .

[0017] Further, in step S5, it specifically includes the following sub-steps:

[0018] S501. Etching process:

[0019] Etch away the protective layer formed within the etching pattern and the marker on the ion surface, and the protective layer outside the etching pattern covered by the third photoresist layer remains;

[0020] S502. Stripping process:

[0021] Remove the third photoresist layer remaining on the protective layer outside the etching pattern.

[0022] Further, in step S501, the etching process includes the following sub-steps:

[0023] S5011: Immerse the wafer in a hydrofluoric acid solution to bring the protective layer into contact with the hydrofluoric acid solution, stop etching after etching away a protective layer with a thickness of H1. At this time, the distance between the aperture edge of the ion pattern after the first etching and the edge of the unetched protective layer is H 3 , where H 3 = H 2 - H 1 , H 3 > 0;

[0024] S5012: Clean the wafer to remove the hydrofluoric acid solution on the wafer;

[0025] S5013: Immerse the wafer in a nitric acid solution to bring the marker into contact with the nitric acid solution, monitor the color change on the surface of the ions, and stop etching when the color of the marker on the surface of the ions disappears, determining that the marker on the surface of the ions has been etched completely;

[0026] S5014: Clean the wafer to remove the nitric acid solution on the wafer.

[0027] Further, the protective layer is formed of silicon oxide, and the marker is any one of aluminum, titanium, and chromium, or the marker is formed by mixing aluminum, titanium, and chromium.

[0028] Further, in step S1, it specifically includes the following sub-steps:

[0029] S101: First photolithography:

[0030] Coat a first photoresist on the surface of the wafer, use a lithography machine to project the ion pattern onto the first photoresist, and remove the first photoresist corresponding to the ion pattern through a developer to form an ion pattern on the surface of the wafer. The remaining first photoresist is the first photoresist layer, and the first photoresist layer covers the surface of the wafer;

[0031] S102: Ion implantation:

[0032] Accelerate the ions to a preset energy by any one of heating means, laser means, or electric field means, and directionally bombard the area corresponding to the ion pattern on the surface of the wafer to embed the ions into the wafer interior;

[0033] S103: Stripping process:

[0034] Remove the first photoresist layer remaining on the surface of the wafer.

[0035] Further, in step S2, it specifically includes the following sub-steps:

[0036] S201: Second photolithography:

[0037] Coat a second photoresist on the entire surface of the wafer after ion implantation, use a lithography machine to project the marker pattern onto the second photoresist, and remove the second photoresist corresponding to the projected marker pattern through a developer to form a marker pattern on the surface of the wafer. The remaining second photoresist is the second photoresist layer. The second photoresist layer covers part of the ion surface and the surface of the wafer, and the formed marker pattern falls within the area range where the ion pattern is located;

[0038] S202: Deposition process:

[0039] The marker is connected to the remaining second photoresist layer and the ions embedded in the wafer interior through chemical reactions or physical reactions;

[0040] S203. Stripping treatment:

[0041] Remove the second photoresist layer and the markers connected to the second photoresist layer, so that only the markers remain on the ions embedded in the wafer.

[0042] Further, the specific step S4 is: Third lithography: Coat the surface of the wafer with the protective layer obtained in step S3 with a third photoresist, use a lithography machine to project the etching pattern onto the third photoresist, and remove the third photoresist corresponding to the projected etching pattern through a developer to form an etching pattern on the surface of the protective layer. The remaining third photoresist is the third photoresist layer, and the third photoresist layer covers the surface of the protective layer outside the etching pattern.

[0043] Further, the color change on the surface of the ions in step S5 is specifically:

[0044] Integrate a microscope on the microscopic imaging unit. The microscopic imaging unit collects the position information of all the markers on the wafer, and judges whether the etching of the protective layer is completed currently through comparison by the control system.

[0045] Beneficial effects

[0046] (1) By setting the markers, the control system can directly obtain the identification information during the etching process of the protective layer. When observing that the color of the markers on the surface of the ions disappears, it is judged that the protective layer on the surface of the ions has been etched, effectively preventing substrate damage, and there is no need to perform resistance and film thickness tests, saving time and test steps;

[0047] (2) Design the aperture of the marker pattern to be smaller than the aperture of the etching pattern, and the cross-sectional area of the marker on the ion is also smaller than the cross-sectional area of the ion. When etching, the smaller-sized markers can be etched cleanly without causing marker residues and preventing wafer scrapping. Brief description of the drawings

[0048] Figure 1 Schematic flow chart of a wet etching silicon oxide endpoint detection method of the present invention;

[0049] Figure 2 Enlarged structural schematic diagram obtained in step S4 of a wet etching silicon oxide endpoint detection method of the present invention;

[0050] Figure 3 is Figure 2 etching direction schematic diagram shown in circle A of

[0051] Figure 4 Schematic diagram of the etched protective layer H obtained in step S5011 of a wet etching silicon oxide endpoint detection method of the present invention2 and H 3 Relationship diagram;

[0052] Figure 5 In step S5013 of a method for detecting the end point of wet etching of silicon oxide according to the present invention, part of the marker H is etched away 2 Schematic diagram;

[0053] Figure 6 Schematic diagram of the etched marker in step S5014 of a method for detecting the end point of wet etching of silicon oxide according to the present invention;

[0054] Reference numerals: 1, wafer; 2, ion; 3, marker; 4, protective layer; 5, third photoresist layer; 6, first photoresist layer; 7, second photoresist layer. Detailed implementation manners

[0055] Next, the technical solutions of the present invention will be combined with different specific embodiments, and the technical solutions of each specific embodiment of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. The experimental methods described in the following embodiments are all conventional methods unless otherwise specified; the reagents and materials described are all commercially available through ordinary commercial channels unless otherwise specified.

[0056] Embodiment 1:

[0057] Referring to Figure 1 , a method for detecting the end point of wet etching of silicon oxide includes the following steps:

[0058] S1. Coat a first photoresist on the surface of the wafer 1, project an ion pattern onto the first photoresist, remove the first photoresist corresponding to the ion pattern, form an ion pattern on the surface of the wafer 1, and the remaining first photoresist is the first photoresist layer 6. The first photoresist layer 6 covers the surface of the wafer 1. Inject the ions 2 into the ion pattern area and remove the first photoresist layer 6;

[0059] Specifically, it includes the following sub-steps:

[0060] S101. First lithography:

[0061] Coat a first photoresist on the surface of the wafer 1, use a lithography machine to project an ion pattern onto the first photoresist, and remove the first photoresist corresponding to the ion pattern through a developer to form an ion pattern on the surface of the wafer 1. The remaining first photoresist is the first photoresist layer 6, and the first photoresist layer 6 covers the surface of the wafer 1;

[0062] S102. Ion 2 implantation:

[0063] By any one of heating means, laser means or electric field means, accelerate Ion 2 to a preset energy, which can be 900 eV - 2000 eV, and directionally bombard the area corresponding to the ion pattern on the surface of wafer 1 to embed Ion 2 into the interior of wafer 1. Ion 2 is determined according to the needs of etching the wafer, such as platinum, rhodium, boron, arsenic, phosphorus, etc. This method of ion 2 implantation can change the electrical properties of the semiconductor and form regions with uneven concentrations in the material. By controlling the energy, time and position of ion 2 implantation, the doping concentration of the semiconductor material can be controlled, thereby changing the electrical performance and function of the device;

[0064] S103. Stripping treatment:

[0065] Remove the first photoresist layer 6 remaining on the surface of wafer 1. This step is the first stripping.

[0066] S2. Prepare marker 3 on the surface of wafer 1 implanted with Ion 2

[0067] Coat the entire surface of wafer 1 after implanting Ion 2 with a second photoresist, project the marker pattern onto the second photoresist, remove the second photoresist corresponding to the projected marker pattern to form a marker pattern on the surface of wafer 1. The remaining second photoresist is the second photoresist layer 7. The second photoresist layer 7 covers part of the surface of Ion 2 and the surface of wafer 1. Deposit marker 3 on the surface of the implanted Ion 2 where the marker pattern is located and on the surface of the second photoresist layer 7. The marker 3 used is aluminum, and aluminum is silver-white. Then remove the second photoresist layer 7 and the marker 3 covering the surface of the second photoresist layer 7;

[0068] Specifically, it includes the following sub-steps:

[0069] S201. Second lithography:

[0070] Coat the entire surface of wafer 1 after implanting Ion 2 with a second photoresist, use a lithography machine to project the marker pattern onto the second photoresist, and remove the second photoresist corresponding to the projected marker pattern through a developer to form a marker pattern on the surface of wafer 1. The remaining second photoresist is the second photoresist layer 7. The second photoresist layer 7 covers part of the surface of Ion 2 and the surface of wafer 1, and the formed marker pattern falls within the area range where the Ion 2 pattern is located;

[0071] S202. Deposition treatment:

[0072] Marker 3 is connected to the remaining second photoresist layer 7 and the ions 2 embedded in the wafer 1 through chemical reactions or physical reactions. Specifically: Marker 3 has a physical reaction with the second photoresist layer 7, and Marker 3 has a chemical reaction with the ions 2 embedded in the wafer 1;

[0073] There are the following ways of deposition processing:

[0074] Metal evaporation (PVD): Put metallic aluminum into the evaporation source in the vacuum chamber, heat it to make it evaporate, and form an aluminum thin film on the substrate of the wafer 1.

[0075] Sputtering deposition (PVD): Use sputtering technology to strike metallic aluminum ions onto the substrate surface to form an aluminum film.

[0076] Chemical vapor deposition (CVD): By adding a metallic aluminum precursor gas in the gas state, a chemical reaction occurs on the substrate surface to deposit an aluminum thin film.

[0077] S203. Stripping process:

[0078] Remove the second photoresist layer 7 and the marker 3 connected to the second photoresist layer 7, so that only the marker 3 remains on the ions 2 embedded in the wafer 1. This step is the second stripping. Specifically: Since the connection force of the chemical reaction is greater than the physical connection force, the second photoresist layer 7 and the marker 3 on the second photoresist layer 7 can be removed during the stripping process, while the marker 3 on the ions 2 is retained, obtaining an ion wafer with a silver-white marker 3.

[0079] S3. Prepare a protective layer 4 on the marker 3 remaining on the surface of the ions 2 and on the wafer 1 outside the marker 3. The protective layer 4 is formed by preparing silicon oxide; the thickness of the protective layer 4 is H 1 , the horizontal distance between the aperture edge of the etching pattern and the aperture edge of the ion pattern is H 2 , where H 2 > H 1 .

[0080] S4. Coating the surface of the wafer 1 with the protective layer 4 with a third photoresist, projecting the etching pattern onto the third photoresist, removing the third photoresist corresponding to the projected etching pattern, forming an etching pattern on the surface of the protective layer 4, and the remaining third photoresist is the third photoresist layer 5. The third photoresist layer 5 covers the surface of the protective layer 4 outside the etching pattern. Specifically: The third lithography: Coating the surface of the wafer 1 with the protective layer 4 obtained in step S3 with a third photoresist, using a lithography machine to project the etching pattern onto the third photoresist, and removing the third photoresist corresponding to the projected etching pattern through a developer, forming an etching pattern on the surface of the protective layer 4, and the remaining third photoresist is the third photoresist layer 5. The third photoresist layer 5 covers the surface of the protective layer 4 outside the etching pattern;

[0081] S5. Start etching, etch the area corresponding to the etching pattern, monitor the color change on the surface of the ions. When the color of the marker 3 on the surface of the ions disappears, that is, the silver-white color disappears, stop etching, and judge that the protective layer 4 on the surface of the ions 2 has been etched completely, and further remove the third photoresist layer 5 in step S4.

[0082] Refer to Figures 3 - 6 , the arrow indicates the etching direction, which specifically includes the following sub-steps:

[0083] S501. Etching treatment:

[0084] Etch away the protective layer 4 and the marker 3 formed within the etching pattern, and the protective layer 4 outside the etching pattern covered by the third photoresist layer 5 remains;

[0085] S502. Stripping treatment:

[0086] Remove the third photoresist layer 5 on the protective layer 4 outside the etching pattern. This step is the third stripping.

[0087] By successively immersing in different types of etching solutions, the protective layer 4 and the marker 3 at the preset positions are successively removed. The solutions corresponding to the two immersion processes are different, which is beneficial to preventing the influence of the mixed etching solution on the etching rate of the protective layer 4 and further improving the etching accuracy.

[0088] Furthermore, in step S501, the etching treatment includes the following sub-steps:

[0089] S5011: Immerse the wafer 1 in a hydrofluoric acid solution to make the protective layer 4 contact with the hydrofluoric acid solution. Stop etching after etching away the protective layer 4 with a thickness of H. At this time, the distance between the aperture edge of the ion pattern after the first etching and the edge of the unetched protective layer 4 is H 1 wherein, H 3 , and H 3 =H2 -H 1 ,H 3 > 0;

[0090] H 1 Etching of the protective layer with a thickness can be monitored and judged by the following methods:

[0091] Ellipsometry: This is a non-contact optical measurement technique that determines the thickness and refractive index of a thin film by measuring the amplitude and phase changes of incident light. Ellipsometers are commonly used to monitor the thickness of thin films in real-time during film growth and etching processes.

[0092] Reflectometry: In reflectometry, light passes through the silicon oxide film and is then captured by a detector; by comparing the reflectivity of a standard sample with a known thickness and the reflectivity of the actual sample, the thickness of the protective layer can be determined.

[0093] Raman Spectroscopy: Raman spectroscopy uses the interaction between photons and molecular vibrational energy to determine the chemical composition and structure of materials. The thickness of the protective layer can be determined by measuring the position and intensity of the silicon oxide characteristic peak in the Raman spectrum.

[0094] Surface Profilometer: This device determines the thickness of the protective layer by scanning the surface and measuring its height; then, by comparing the initial film thickness and the real-time film thickness, the reduction amount of the protective layer during the etching process can be determined.

[0095] It should be noted that if due to monitoring errors, some ions not covered by the marker are etched away by the hydrofluoric acid solution, while the ions covered by the marker still remain, which will not affect the structure and function of the wafer.

[0096] Generally speaking, the possibility of the hydrofluoric acid solution reacting with the ions implanted in the wafer is low because hydrofluoric acid is more likely to react with silicon oxide.

[0097] S5012: Clean wafer 1 to remove the hydrofluoric acid solution on wafer 1;

[0098] S5013: Immerse wafer 1 in the nitric acid solution to make marker 3 contact with the nitric acid solution, monitor the color change on the surface of ion 2. When the color of marker 3 on the ion surface disappears, stop etching and judge that the marker 3 on the ion surface has been etched completely;

[0099] It should be noted that the nitric acid solution will not react with the wafer and the ions implanted in the wafer. Therefore, etching will automatically stop after the marker 3 disappears, and the nitric acid solution will not etch away the wafer and the ions implanted in the wafer.

[0100] Further, it is confirmed that the color change on the surface of the ion 2 is specifically as follows: The microscope is integrated on the microscopic imaging unit, and the microscopic imaging unit identifies and collects the position information of all the markers 3 on the wafer 1. Through the control system comparison and judgment, it is determined whether the etching of the protective layer is completed currently, that is, the marker is under the protective layer. When the color of the marker disappears, it also means that there is no protective layer on the ion surface.

[0101] S5014: Clean the wafer 1 and remove the nitric acid solution on the wafer 1.

[0102] During the etching process, side etching will occur at the edge position between the protective layer 4 and the third photoresist layer 5, and the lateral etching rate is equal to the vertical etching rate. Therefore, set H 2 to be greater than H 1 After that, the distance between the aperture edge of the ion pattern after the first etching and the edge of the unetched protective layer 4 is H 3 , where H 3 = H 2 - H 1 , H 3 > 0, which can prevent the side etching of the BOE solution from affecting the structural stability of the wafer 1.

[0103] Specifically, the aperture of the ion pattern is D 1 , the aperture of the marker 3 pattern is D 2 , and the aperture of the etching pattern is D 3 , where D 1 = D 3 > D 2 ; Since the aperture of the marker 3 pattern is smaller than that of the etching pattern, that is, the size of the marker 3 is also smaller than the aperture of the etching pattern; The advantage of such a design is that when etching, the smaller-sized marker 3 can be etched cleanly without causing marker residue and preventing wafer scrapping.

[0104] The formation of the above ion pattern, marker pattern, and etching pattern means: Coating photoresist at a preset position, exposing along a preset path to change the chemical properties of the photoresist located on the preset path, and then removing the photoresist at the preset path position through a developer. The hollowed-out path of the photoresist forms the corresponding pattern. That is, the ion pattern can be understood as several ion implantation holes, the marker pattern can be understood as several marker holes, and the etching pattern can be understood as several etching holes.

[0105] Specifically, for the above first stripping, second stripping, and third stripping, there are the following methods:

[0106] Wet stripping: By immersing the wafer 1 in a specific solvent, the photoresist is softened and separated; common solvents include organic solvents such as acetone, methyl ethyl ketone, or N-methylpyrrolidone, etc.; these solvents can dissolve the photoresist and easily strip it.

[0107] Dry stripping: By placing the wafer 1 in an atmosphere and using high temperature or plasma to decompose the photoresist; among them, common dry stripping methods include oxygen plasma stripping and thermal oxidation stripping; oxygen plasma stripping removes the photoresist through the chemical reaction and ion bombardment of oxygen plasma, and is suitable for high-precision chip manufacturing. Thermal oxidation stripping is to oxidize and decompose the photoresist through high-temperature oxidation and strip the photoresist.

[0108] It should be noted that multiple embodiments can also be set. The marker 3 can be titanium or chromium, or formed by mixing aluminum, titanium, and chromium.

[0109] Comparative Example 1

[0110] The difference from Example 1 is that the aperture of the marker pattern is set to be equal to the aperture of the etching pattern. After the etching treatment with nitric acid solution is completed;

[0111] Similarly, when the wafer is placed under an electron microscope for observation, it is found that part of the marker still remains on the wafer, resulting in the marker not being etched clean.

[0112] Comparative Example 2

[0113] The difference from Example 1 is that the thickness of the protective layer is not set to H1 and the horizontal distance between the aperture edge of the etching pattern and the aperture edge of the ion pattern is H2, and H2 > H1;

[0114] When performing resistance testing or capacitance testing on the obtained wafer, it is found that the currents passing through the wafer interfere with each other, and the structural stability of the wafer is poor; that is, the protective layer with excessive side etching causes the surface of the wafer not to be covered by the protective layer.

[0115] Therefore, the present invention can, by setting the marker, enable the control system to directly obtain identification information during the etching process of the protective layer. When observing the disappearance of the color of the ion surface marker, it is judged that the protective layer on the ion surface has been etched completely, effectively preventing substrate damage, without the need for resistance and film thickness testing, saving time and testing steps; when etching, the smaller-sized marker can be etched clean without causing marker residue and preventing wafer scrapping; also, by setting the thickness of the protective layer to be less than the horizontal distance between the aperture edge of the etching pattern and the aperture edge of the ion pattern, leaving part of the protective layer covering the ion surface, ensuring that there is a protective layer on the wafer surface, and the ion part after the marker is etched completely can ensure its contact with the buried wire, which can prevent the lateral etching of the BOE solution from affecting the structural stability of the wafer.

[0116] The above-described embodiments merely represent several implementation manners of the present invention. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent for the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention shall be subject to the appended claims.

Claims

1. A method for detecting an endpoint of wet etching of silicon oxide, characterized in that: The following steps are involved: S1, coating a first photoresist on the surface of a wafer, projecting an ion pattern onto the first photoresist, removing the first photoresist corresponding to the ion pattern to form an ion pattern on the surface of the wafer, the retained first photoresist is a first photoresist layer, the first photoresist layer covers the surface of the wafer, ions are injected into the ion pattern region, and the first photoresist layer is removed; S2. Preparing markers on the surface of the wafer into which ions have been implanted The entire wafer surface after ion implantation is coated with a second photoresist, a marker pattern is projected onto the second photoresist, the second photoresist corresponding to the projected marker pattern is removed, and the marker pattern on the wafer surface is formed, the second photoresist that remains is a second photoresist layer, the second photoresist layer covers part of the ion surface and the wafer surface, a marker is plated on the ion implantation surface where the marker pattern is located and the surface of the second photoresist layer, the marker has a color, and then the second photoresist layer and the marker covering the surface of the second photoresist layer are removed; S3, preparing a protective layer on the marker remaining on the ion surface and on the wafer outside the marker; S4, coating the surface of the wafer with the protective layer with a third photoresist, projecting the etching pattern onto the third photoresist, removing the third photoresist corresponding to the projected etching pattern to form an etching pattern on the surface of the protective layer, and the remaining third photoresist is a third photoresist layer, and the third photoresist layer covers the surface of the protective layer outside the etching pattern; S5, start etching, etch the area corresponding to the etching pattern, monitor the color change of the ion surface, and stop etching when the color of the marker on the ion surface disappears, judge that the protective layer on the ion surface has been etched, and further remove the third photoresist layer in step S4; The aperture of the ion pattern is D1, the aperture of the marker pattern is D2, and the aperture of the etching pattern is D3, wherein D1=D3>D2; The thickness of the protective layer is H1, and the horizontal distance between the aperture edge of the etching pattern and the aperture edge of the ion pattern is H2, wherein H2>H1.

2. The endpoint detection method for wet etching of silicon oxide according to claim 1, characterized in that: The step S5 specifically includes the following sub-steps: S501, etching process: The protective layer formed in the etching pattern and the marker on the ion surface are removed by etching, and the protective layer outside the etching pattern covered by the third photoresist layer is retained; S502, stripping process: The third photoresist layer remaining on the protection layer outside the etched pattern is removed.

3. The wet etching silicon oxide endpoint detection method according to claim 2, characterized in that: In step S501, the etching process includes the following sub-steps: S5011: immersing the wafer in a hydrofluoric acid solution so that the protective layer contacts the hydrofluoric acid solution, and stopping etching after etching away the protective layer with a thickness of H1. At this time, the distance between the aperture edge of the ion pattern that has completed the first etching and the edge of the protective layer that has not been etched is H3, where H3=H2-H1, H3>0; S5012: Clean the wafer to remove the hydrofluoric acid solution on the wafer; S5013: immersing the wafer in a nitric acid solution so that the marker contacts the nitric acid solution, monitoring the color change of the ion surface, and when the color of the marker on the ion surface disappears, stopping etching, and judging that the marker on the ion surface has been completely etched; S5014: Clean the wafer to remove the nitric acid solution on the wafer.

4. The endpoint detection method for wet etching of silicon oxide according to claim 1, characterized in that: The protective layer is made of silicon oxide, and the marker is any one of aluminum, titanium and chromium, or the marker is made of a mixture of aluminum, titanium and chromium.

5. The wet etching silicon oxide endpoint detection method according to claim 1 or 4, characterized in that: The step S1 specifically includes the following sub-steps: S101, first photolithography: Coating a first photoresist on the surface of the wafer, projecting an ion pattern onto the first photoresist using a photolithography machine, and removing the first photoresist corresponding to the ion pattern by a developer to form an ion pattern on the surface of the wafer, wherein the retained first photoresist is a first photoresist layer, and the first photoresist layer covers the surface of the wafer; S102, ion implantation: By any one of heating, laser or electric field means, the ions are accelerated to a preset energy, and bombarded in a direction to the area corresponding to the ion pattern on the wafer surface, so as to embed the ions into the wafer; S103, stripping treatment: The first photoresist layer remaining on the wafer surface is removed.

6. The method for detecting the endpoint of wet etching of silicon oxide according to claim 5, characterized in that: The step S2 specifically includes the following sub-steps: S201, second photolithography: The entire wafer surface after ion implantation is coated with a second photoresist, a marker pattern is projected onto the second photoresist using a photolithography machine, and the second photoresist corresponding to the projected marker pattern is removed by a developer to form a marker pattern on the wafer surface, and the retained second photoresist is a second photoresist layer. The second photoresist layer covers part of the ion surface and the wafer surface; S202, deposition treatment: The markers are connected to the remaining second photoresist layer and the ions embedded in the wafer through chemical reaction or physical reaction; S203, stripping treatment: The second photoresist layer and the marker connected to the second photoresist layer are removed, so that only the marker remains on the ions embedded in the wafer.

7. The method for detecting the endpoint of wet etching of silicon oxide according to claim 6, characterized in that: The step S4 is specifically as follows: third photolithography: coating the surface of the wafer with the protective layer obtained in step S3 with a third photoresist, projecting the etching pattern onto the third photoresist using a photolithography machine, and removing the third photoresist corresponding to the projected etching pattern by a developer to form an etching pattern on the surface of the protective layer, and the retained third photoresist is the third photoresist layer, and the third photoresist layer covers the surface of the protective layer outside the etching pattern.

8. The method for detecting the endpoint of wet etching of silicon oxide according to claim 1, characterized in that: The color change of the ion surface in step S5 is specifically: The microscope is integrated into the microscopic camera unit. The microscopic camera unit identifies and collects the point information of all markers on the wafer, and compares it through the control system to determine whether the etching of the protective layer is currently completed.

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