Method for manufacturing packaging substrate

Abstract

A method for manufacturing a packaging substrate includes forming a conductive column on a circuit layer of a core board, and an insulating layer covering the conductive column so that the conductive column is exposed on the surface of the insulating layer. The packaging substrate is then immersed in a low-concentration chemical liquid and ground using a grinder. Therefore, the packaging substrate of the present invention can achieve a highly uniform substrate without groove depth.

Description

Technical Field

[0001] The invention relates to a method for manufacturing a packaging substrate for carrying a chip, and in particular to a method for manufacturing a packaging substrate with a conductive column. Background Art

[0002] The technologies currently used in the field of chip packaging include chip scale packaging (CSP), direct chip attached packaging (DCA) or multi-chip module packaging (MCM). Regardless of the electronic product using any packaging technology, removing excess conductive materials to make the conductive material thinner or flat is one of the common and necessary steps in the series of steps in the manufacturing process.

[0003] Currently, there are several widely used methods for removing excess conductive materials, such as mechanical grinding, chemical liquid etching, chemical mechanical polishing (CMP), or contact electrolysis. However, the above traditional methods each have their own disadvantages.

[0004] Figures 1A to 1D It is a cross-sectional view of a conventional method of manufacturing a package substrate 1 .

[0005] like Figure 1A As shown, a substrate 110 is provided, a dielectric layer 120 is formed on the substrate 110, and a metal layer 130 is formed on the patterned dielectric layer 120. The metal layer 130 covering the surface of the dielectric layer 120 has a surface with uneven thickness (such as Figure 1A Next, a grinding wheel 140 is used to rotate the surface of the metal layer 130 at a high speed to grind and reduce the thickness of the metal layer 130.

[0006] like Figure 1B As shown, in order to facilitate the subsequent planarization process (such as chemical etching), the surface of the metal layer 130 is mechanically ground by the grinding wheel 140 for multiple times, so that the surface thickness is further thinned to present as shown in FIG. Figure 1B The metal layer surface 130d is shown.

[0007] like Figure 1C As shown, the mechanically ground Figure 1B The package substrate 1 is immersed in a tank containing a chemical etching solution 150 to etch the metal layer surface 130d by chemical etching.

[0008] like Figure 1D As shown, finally, after chemical etching, Figure 1CThe metal layer surface 130 d is shown planarized to form a metal layer surface 130 e , which is flush with the surface of the patterned dielectric layer 120 .

[0009] As can be seen from the above, the above-mentioned traditional grinding method first grinds the surface of the metal layer to a flat surface, and then immerses the ground substrate in an etching solution. However, this method has several disadvantages and risks. For example, the excess conductive material (such as copper shavings, etc.) generated during the grinding process has the risk of contaminating the board surface, generating uneven stress and concentrating it in a certain place to deform the substrate, and requires customized grinding machines and fixtures corresponding to the size of the substrate. Furthermore, the substrate immersed in the etching solution cannot guarantee the uniformity of conductive metal etching (such as the depth of the depression and the side etching).

[0010] Therefore, how to overcome the various problems of the above-mentioned existing manufacturing methods has become a topic that is urgently needed to be solved. Summary of the invention

[0011] An object of the present invention is to provide a method for manufacturing a packaging substrate to solve at least one of the above problems.

[0012] In view of the various defects of the above-mentioned prior art, the present invention provides a method for manufacturing a packaging substrate, including: providing a substrate; forming a plurality of conductive pillars on the substrate, and covering the plurality of conductive pillars with an insulating layer, and exposing the plurality of conductive pillars on the surface of the insulating layer; and immersing the exposed plurality of conductive pillars and the surface of the insulating layer in a chemical liquid and using a grinder to grind the exposed plurality of conductive pillars and the surface of the insulating layer.

[0013] In a specific embodiment, the substrate has a core board body having a first side and a second side opposite to each other and a plurality of conductive through holes connecting the first side and the second side, and a circuit layer electrically connecting the plurality of conductive through holes is formed on the first side and the second side of the core board body respectively.

[0014] In a specific embodiment, the plurality of conductive posts are formed on the circuit layers on the first side and the second side of the core board, and the plurality of conductive posts are electrically connected to the circuit layers.

[0015] In a specific embodiment, the insulating layer is formed on the first side and the second side of the core board to cover the plurality of conductive pillars, and the plurality of conductive pillars are exposed on the surface of the insulating layer.

[0016] In one embodiment, the plurality of conductive pillars are copper pillars.

[0017] In a specific embodiment, after being ground by the grinder, the surfaces of the plurality of conductive pillars are flush with the surface of the insulating layer.

[0018] In one embodiment, the grinder grinds the conductive pillars in a manner horizontal to the surfaces of the conductive pillars.

[0019] In a specific embodiment, the chemical liquid includes an etching liquid and a polishing liquid.

[0020] In a specific embodiment, the steps of forming the multiple conductive pillars and the insulating layer include forming the multiple conductive pillars on the substrate; forming an insulating layer covering the multiple conductive pillars on the surface of the substrate; and removing part of the material of the insulating layer to expose the multiple conductive pillars on the surface of the insulating layer.

[0021] For example, a resist layer is formed on two opposite surfaces of the substrate, and a plurality of patterned openings are formed on each of the resist layers (for example, after exposure and development) so that the circuit layer on the substrate is exposed in each of the patterned openings. The resist layer may be a dry film to form the plurality of patterned openings through an exposure and development process. Next, a metal layer such as copper is formed on the resist layer. For example, the metal layer is formed through a plating process. Prior to this, a seed layer made of copper may be formed on the resist layer and the surface of the patterned opening by sputtering; or, a graphene film may be attached by lamination to serve as the seed layer, and then the metal layer may be formed by electroplating.

[0022] In another specific embodiment, the steps of forming the multiple conductive pillars and the insulating layer include forming an insulating layer having multiple openings on the substrate; forming a metal layer on the insulating layer and in the multiple openings; and removing the metal layer on the insulating layer, retaining the material of the metal layer in the multiple openings to obtain the multiple conductive pillars exposed on the surface of the insulating layer.

[0023] As described above, in an embodiment where the substrate is a core board, the insulating layer and a plurality of conductive columns are formed on the first and second side surfaces of the core board, and circuit layers can be added on both sides of the substrate by the method of the present invention.

[0024] As can be seen from the above, the packaging substrate and its manufacturing method of the present invention mainly remove the insulating layer by plasma etching to expose multiple conductive pillars, and then immerse the substrate in a low-concentration chemical solution and grind it horizontally to the surfaces of the multiple conductive pillars by a grinder to flatten the substrate to form a coplanar surface. Compared with the existing horizontal line vertical grinding method, the grinder has the advantages of large contact area, uniform vertical pressure, suitable for thin substrates, and not being limited by the thickness of the equipment board.

[0025] Furthermore, immersing the substrate in a low-concentration chemical liquid means that the chemical liquid serves a dual role as an etching liquid and a grinding liquid during grinding by a grinder, so as to achieve the effects of cooling, cleaning, and reducing grinding resistance during grinding. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figures 1A to 1D A cross-sectional view of a conventional method for manufacturing a packaging substrate.

[0027] FIG. 2A to FIG. 2F It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing a packaging substrate of the present invention.

[0028] FIG. 3A to FIG. 3E It is a cross-sectional schematic diagram of a second embodiment of a method for manufacturing a packaging substrate of the present invention.

[0029] The reference numerals are as follows:

[0030] 1,2,3 Package substrate

[0031] 20 Core board

[0032] 20a First side

[0033] 20b Second side

[0034] 21,25,31,35 conductive columns

[0035] 21a, 21b Surface of the conductive column

[0036] 23 Chemical liquid

[0037] 24 Grinder

[0038] 29 barrier layer

[0039] 200 Conductive vias

[0040] 201,202 circuit layer

[0041] 200a Plug material

[0042] 110 substrate

[0043] 211 Insulation layer

[0044] 120 Dielectric layer

[0045] 130 Metal Layer

[0046] 130d Metal layer surface

[0047] 130e Metal layer surface

[0048] 140 Grinding Wheel

[0049] 150 Chemical etching solution

[0050] 210 Metal Layer

[0051] 211a, 211b Surface of the insulating layer

[0052] 290 Patterned opening

[0053] 310 Opening DETAILED DESCRIPTION

[0054] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0055] It should be noted that the structures, proportions, sizes, etc. shown in the attached drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size, without affecting the effects and purposes that can be produced by the present invention, should still fall within the scope of the technical contents disclosed in the present invention. At the same time, the terms such as "above", "one", etc. quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of the relative relationship, without substantially changing the technical contents, should also be regarded as the scope of the implementation of the present invention.

[0056] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing a packaging substrate 2 of the present invention.

[0057] like Figure 2A As shown, a substrate such as a core board 20 is provided, which has a first side 20a and a second side 20b opposite to each other; and a plurality of conductive through holes 200 connecting the first side 20a and the second side 20b, and circuit layers 201, 202 are patterned on the first side 20a and the second side 20b of the core board 20, respectively, so that the plurality of conductive through holes 200 are electrically connected to the plurality of circuit layers 201, 202.

[0058] In this embodiment, the core board 20 may be an organic polymer board or other board including Bismaleimide triazine (BT), glass fiber prepreg (PP), and the plurality of conductive through holes 200 are hollow columns, which can be filled with plugging material 200a in the hollow, wherein the plugging material 200a is of various types, such as conductive glue, ink, etc., and is not particularly limited. It should be understood that in other embodiments, the plurality of conductive through holes 200 may also be solid metal columns without the need to be filled with plugging material 200a.

[0059] like Figure 2B As shown, a resist layer 29 is formed on the first side 20 a and the second side 20 b of the core board 20 , respectively, and a plurality of patterned openings 290 are formed on each of the resist layers 29 (eg after exposure and development) to expose the plurality of circuit layers 201 , 202 in each of the patterned openings 290 .

[0060] In this embodiment, the resist layer 29 is a dry film, so as to form the plurality of patterned openings 290 through an exposure and development process.

[0061] like Figure 2C As shown, a metal layer 210 such as copper is formed on the resist layer 29. For example, the metal layer 210 is formed by a plating process. In a specific embodiment, a seed layer made of copper can be formed on the resist layer and the patterned opening surface by sputtering; or, a graphene film can be attached by lamination to serve as the seed layer, and then the metal layer is formed by electroplating (not shown).

[0062] like Figure 2D As shown, the material of the metal layer 210 on the resist layer 29 is removed, and only the material of the metal layer 210 in the plurality of patterned openings 290 is retained to serve as a plurality of conductive pillars 21, such as copper pillars, so that the plurality of conductive pillars 21 are electrically connected to the plurality of circuit layers 201, 202. Next, the resist layer 29 is removed to expose the first side 20a and the second side 20b of the core board 20.

[0063] like Figure 2E As shown, an insulating layer 211 is formed on the first side 20a and the second side 20b of the core board 20, respectively. In the present embodiment, each of the insulating layers 211 is a dielectric layer, such as an ABF film (Ajinomoto build-up film) or other dielectric materials. After the insulating layer 211 is formed, the circuit layer 201, 202 and the plurality of conductive pillars 21 are embedded in the insulating layer 211, wherein a portion of the surface 21a of the plurality of conductive pillars 21, such as the top surface, is flush with the surface 211a, 211b of the insulating layer 211, or a portion of the plurality of conductive pillars 21 protrudes from the surface 211a, 211b of the insulating layer 211, so that the plurality of conductive pillars 21 are exposed on the surface of each of the insulating layers 211.

[0064] Furthermore, plasma, grinding or other methods are used to remove part of the material of the insulating layer 211 so that the surfaces 211a and 211b of each insulating layer 211 are flush with the surfaces 21a and 21b of the conductive pillars 21, so that the conductive pillars 21 are exposed on the surfaces 211a and 211b of the insulating layer 211.

[0065] Next, the conductive pillars 21 exposed on the surfaces 211 a and 211 b of the insulating layer 211 and the surfaces 211 a and 211 b of the insulating layer 211 are immersed in a chemical liquid 23 , and the conductive pillars 21 immersed in the chemical liquid 23 are planarized by a grinder 24 .

[0066] In this embodiment, the chemical liquid 23 is a low-concentration etching liquid, which etches the conductive material (such as the conductive pillar 21 ) immersed therein.

[0067] In some embodiments, the chemical liquid 23 is a low-concentration chemical liquid including an etching liquid and a grinding liquid, which is helpful for etching and grinding the conductive material (such as the conductive pillar 21 ) immersed therein.

[0068] In this embodiment, the grinder 24 grinds the conductive column 21 (e.g., the surfaces 21a, 21b of the conductive column 21) and / or the surfaces 211a, 211b of the insulating layer 211 immersed in the chemical liquid 23 in a direction horizontal to the surfaces 21a, 21b and / or the surfaces 211a, 211b.

[0069] like Figure 2F As shown, based on FIG. 2A to FIG. 2D The process method of Figure 2E A plurality of conductive pillars 25 are formed on the insulating layer 211 and the conductive pillars 21 after being planarized by the chemical solution 23 and the grinder 24, and then the conductive pillars 25 are formed according to the above Figure 2E In the process, the plurality of conductive pillars 25 coated in the insulating layer are flattened by chemical liquid and a grinder. It should be understood that the process can be repeated. FIG. 2A to FIG. 2E An additional conductive column build-up layer is performed on the insulating layer 211 and the plurality of conductive columns 21 using a process method.

[0070] Therefore, in the manufacturing method of the first embodiment, after removing part of the material of the insulating layer 211 by plasma etching, the plurality of conductive pillars 21 are immersed in a chemical solution 23 and planarized by a grinder 24 in a manner substantially horizontal to the plurality of conductive pillars 21 .

[0071] FIG. 3A to FIG. 3E The cross-sectional view of the second embodiment of the method for manufacturing the package substrate 3 of the present invention is shown in FIG. The difference between this embodiment and the first embodiment lies in the process steps, and the structures obtained after the process are substantially the same, so the same points will not be described in detail below.

[0072] like Figure 3A As shown, continued Figure 2A By using a process, an insulating layer 211 is formed on the first side 20a and the second side 20b of the core board 20 respectively, and a plurality of openings 310 are formed on each of the insulating layers 211 so that the plurality of circuit layers 201 and 202 are exposed in each of the openings 310.

[0073] In this embodiment, plasma etching or other methods are used to remove part of the material of the insulating layer 211 to form the plurality of openings 310 .

[0074] like Figure 3B As shown, a metal layer 210 is formed on the insulating layer 211 and in the opening 310 by electroplating or other methods.

[0075] like Figure 3C As shown, the material of the metal layer 210 on the insulating layer 211 is removed, and only the material of the metal layer 210 in the plurality of openings 310 is retained to serve as a plurality of conductive pillars 31, so that the plurality of conductive pillars 31 are electrically connected to the plurality of circuit layers 201, 202, wherein the surfaces of the plurality of conductive pillars 31 are substantially flush with the surfaces of the respective insulating layers 211, so that the plurality of conductive pillars 31 are exposed in the respective openings 310. However, it should be understood that Figure 3C In the illustrated embodiment, the surfaces of the plurality of conductive pillars 31 may be higher than the surfaces of the insulating layers 211 .

[0076] Therefore, the manufacturing method of the second embodiment is to first form the openings 310 on the insulating layer 211 to manufacture the plurality of conductive pillars 31 , and thus there is no need to form the resist layer 29 .

[0077] like Figure 3D As shown, the conductive pillars 21 exposed on the surfaces 211a, 211b of the insulating layer 211 and the surfaces 211a, 211b of the insulating layer 211 are immersed in a chemical liquid 23, and the conductive pillars 21 immersed in the chemical liquid 23 are planarized by a grinder 24. The chemical liquid 23 is a low-concentration etching liquid, which etches the conductive material (such as the conductive pillars 21) immersed therein.

[0078] In some embodiments, the chemical liquid 23 is a low-concentration chemical liquid including an etching liquid and a grinding liquid, which is helpful for etching and grinding the conductive material (such as the conductive pillar 21 ) immersed therein.

[0079] In this embodiment, the grinder 24 grinds the conductive column 21 (e.g., the surfaces 21a, 21b of the conductive column 21) and / or the surfaces 211a, 211b of the insulating layer 211 immersed in the chemical liquid 23 in a direction horizontal to the surfaces 21a, 21b and / or the surfaces 211a, 211b.

[0080] like Figure 3E As shown in Figure 3D Another plurality of conductive pillars 35 are formed on the insulating layer 211 and the conductive pillars 21 which have been planarized by the chemical solution 23 and the grinder 24, and then the conductive pillars 35 are formed according to the above Figure 3D In the process, the plurality of conductive pillars 35 coated in the insulating layer are flattened by chemical liquid and a grinder. It should be understood that the process can be repeated. FIG. 2A to FIG. 2E or Figures 3A to 3C The process method is used to add additional conductive column layers.

[0081] In summary, the method for manufacturing the package substrate 2, 3 of the present invention first removes part of the material of the insulating layer 211 by plasma etching, and then immerses the plurality of conductive pillars 21 in a chemical solution 23, and simultaneously uses a grinder 24 to planarize the plurality of conductive pillars 21 in a manner substantially horizontal to the plurality of conductive pillars 21. Therefore, compared with the prior art, the package substrate 2, 3 of the present invention and the method for manufacturing the same have the following advantages and features:

[0082] The method for manufacturing the packaging substrate 2, 3 of the present invention can achieve a highly uniform double-sided substrate without a recess depth (RD) by grinding and etching and immersing the substrate in a low-concentration chemical solution.

[0083] In the manufacturing method of the present invention, the grinder grinds horizontally to the grinding surface. Compared with the horizontal line vertical grinding method, it has the advantages of large contact area, uniform vertical pressure, suitable for thin substrates, and not limited by the thickness of the equipment substrate processing.

[0084] In the manufacturing method of the present invention, copper pillars are used to replace laser vias and desmearing, thereby saving the process and instrument costs after molding.

[0085] In the manufacturing method of the present invention, a fine L / S pattern can be realized on the outer layer by using a high-resolution dry film through a copper pillar forming method.

[0086] By the method of the present invention, the thickness across the substrate is less than that of a typical substrate made with thinner dielectric layer materials (eg, 10 or 20 μm thick).

[0087] Compared with the conventional process, the manufacturing method of the present invention does not require a dedicated grinder or lapping machine, but only requires a (manual or typical) lapping machine to achieve the desired effect.

[0088] In the manufacturing method of the present invention, the substrate is immersed in a low-concentration chemical liquid and polished to remove protrusions (copper column shape). The chemical liquid acts as a lubricant to assist in polishing for flattening, and a thinner substrate can be achieved through polishing.

[0089] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Those skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. A method for manufacturing a packaging substrate, comprising: providing a substrate; Forming a plurality of conductive pillars on the substrate, and then covering the plurality of conductive pillars with an insulating layer, and making the plurality of conductive pillars exposed on the surface of the insulating layer; as well as The exposed plurality of conductive pillars and the surface of the insulating layer are immersed in a chemical solution and the exposed plurality of conductive pillars and the surface of the insulating layer are grinded by a grinder. The chemical liquid includes etching liquid and grinding liquid.

2. The method for manufacturing a packaging substrate according to claim 1, wherein: The substrate has a core board body having a first side and a second side opposite to each other and a plurality of conductive through holes connecting the first side and the second side, and a circuit layer electrically connecting the plurality of conductive through holes is formed on the first side and the second side of the core board body respectively.

3. The method for manufacturing a packaging substrate according to claim 2, wherein: The plurality of conductive posts are formed on the circuit layers on the first side and the second side of the core board, and the plurality of conductive posts are electrically connected to the circuit layers.

4. The method for manufacturing a packaging substrate according to claim 3, wherein: The insulating layer is formed on the first side and the second side of the core board to cover the plurality of conductive pillars and expose the plurality of conductive pillars on the surface of the insulating layer.

5. The method for manufacturing a packaging substrate according to claim 1, wherein: The plurality of conductive pillars are copper pillars.

6. The method for manufacturing a packaging substrate according to claim 1, wherein: After being ground by the grinder, the surfaces of the plurality of conductive posts are flush with the surface of the insulating layer.

7. The method for manufacturing a packaging substrate according to claim 1, wherein: The grinder grinds the plurality of conductive pillars in a manner horizontal to surfaces of the plurality of conductive pillars.

8. The method for manufacturing a packaging substrate according to claim 1, wherein: The steps of forming the plurality of conductive pillars and the insulating layer include forming the plurality of conductive pillars on the substrate; forming an insulating layer covering the plurality of conductive pillars on the surface of the substrate; and removing part of the material of the insulating layer so that the plurality of conductive pillars are exposed on the surface of the insulating layer.

9. The method for manufacturing a packaging substrate according to claim 1, wherein: The steps of forming the plurality of conductive pillars and the insulating layer include forming an insulating layer having a plurality of openings on the substrate; forming a metal layer on the insulating layer and in the plurality of openings; The metal layer on the insulating layer is removed, and the material of the metal layer in the plurality of openings is retained to obtain the plurality of conductive pillars exposed on the surface of the insulating layer.

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