Packaging substrate and manufacturing method thereof

Abstract

The present invention discloses a packaging substrate and a method for manufacturing the same. The packaging substrate includes a conductive column formed on a circuit layer of a core board, and an insulating layer covers the conductive column so that the conductive column is exposed on the surface of the insulating layer to serve as an external contact point, so there is no need to make a wiring layer on the insulating layer. Therefore, the thickness of the packaging substrate of the present invention is relatively low, so as to meet the demand for thinning.

Description

Technical Field

[0001] The invention relates to a packaging substrate for carrying a chip, and in particular to a packaging substrate with a conductive column and a manufacturing method thereof. Background Art

[0002] The technologies currently used in the field of chip packaging include packaging modules such as chip scale packaging (CSP), direct chip attached packaging (DCA) or multi-chip module packaging (MCM). As the functional requirements of terminal products increase, semiconductor chips need to have more input / output (I / O) contacts, so the number of external pads on the packaging substrate used to carry semiconductor chips also increases accordingly.

[0003] Figures 1A to 1C It is a cross-sectional view of a conventional method of manufacturing a package substrate 1 .

[0004] like Figure 1A As shown, a core board 10 is provided, which has a first side 10a and a second side 10b opposite to each other, and a plurality of conductive through holes 100 connecting the first side 10a and the second side 10b are formed in the core board 10, and circuit layers 101, 102 are arranged on the first side 10a and the second side 10b of the core board 10, so that the plurality of conductive through holes 100 are electrically connected to the plurality of circuit layers 101, 102, wherein the plurality of conductive through holes 100 are hollow metal columns, and the hollow parts thereof can be filled with plugging material 100a.

[0005] like Figure 1B As shown, an insulating layer 111 having a metal layer 120 is pressed on the first side 10a and the second side 10b of the core board 10, respectively, so that the circuit layers 101 and 102 are embedded in the insulating layer 111. Then, a plurality of openings 1110 are formed on each of the insulating layers 111 by laser or other methods, so that part of the surface of the plurality of circuit layers 101 and 102 is exposed in the plurality of openings 1110.

[0006] like Figure 1C As shown, a copper electroplating process is performed on the metal layer 120 to form a wiring layer 13 having a plurality of external pads 130 on each of the insulating layers 111, and a plurality of conductive blind vias 11 electrically connecting the circuit layers 101, 102 and the wiring layer 13 are formed in the plurality of openings 1110. Afterwards, the exposed metal layer 120 is removed, leaving only the metal layer 12 under the wiring layer 13.

[0007] However, in the existing packaging substrate 1, the external pad 130 serves as an external contact, so a wiring layer 13 needs to be made on the insulating layer 111. Therefore, the insulating layer 111 needs to have a certain thickness, and the thickness of the wiring layer 13 needs to be considered, making it difficult to thin the thickness of the existing packaging substrate 1.

[0008] Furthermore, the external pad 130 is an external contact point, and its width is greater than the conductive blind via 11 , so it needs to have a certain size of circuit specifications, resulting in a limited wiring density of the package substrate 1 , which makes it difficult to meet the requirements of fine line width / fine line spacing.

[0009] In addition, the multiple openings 1110 are formed by laser drilling, which requires the use of expensive laser equipment, and thus it is difficult to reduce the manufacturing cost of the existing packaging substrate 1 .

[0010] Therefore, how to overcome the various problems of the above-mentioned existing manufacturing methods has become a topic that is urgently needed to be solved. Summary of the invention

[0011] An object of the present invention is to provide a packaging substrate and a manufacturing method thereof to solve at least one of the above problems.

[0012] In view of the various defects of the above-mentioned prior art, the present invention provides a packaging substrate, including: a core board body, having a first side and a second side opposite to each other and a plurality of conductive through holes connecting the first side and the second side, and a circuit layer electrically connected to the plurality of conductive through holes is respectively arranged on the first side and the second side of the core board body; a plurality of conductive pillars are arranged on the circuit layer on the first side and the second side of the core board body to electrically connect the circuit layer, wherein a seed layer is formed around and on the bottom of the plurality of conductive pillars; and an insulating layer is arranged on the first side and the second side of the core board body and covers the plurality of conductive pillars, wherein the plurality of conductive pillars are exposed on the surface of the insulating layer.

[0013] The present invention also provides a method for manufacturing a packaging substrate, including: providing a core board having a first side and a second side opposite to each other and a plurality of conductive through holes connecting the first side and the second side, and then respectively arranging a circuit layer electrically connected to the plurality of conductive through holes on the first side and the second side of the core board; forming a plurality of conductive columns on the circuit layer on the first side and the second side of the core board, and electrically connecting the plurality of conductive columns to the circuit layer, wherein a seed layer is formed around and on the bottom of the plurality of conductive columns; and forming an insulating layer on the first side and the second side of the core board, so that the insulating layer covers the plurality of conductive columns, wherein the plurality of conductive columns are exposed on the surface of the insulating layer.

[0014] In the aforementioned packaging substrate and its manufacturing method, a seed layer is formed around the body and bottom of the plurality of conductive pillars, so the tops of the plurality of conductive pillars or the surfaces not covered by the seed layer are exposed on the surface of the insulating layer.

[0015] In the aforementioned packaging substrate and its manufacturing method, the seed layer is a conductive film.

[0016] In the aforementioned packaging substrate and its manufacturing method, the seed layer is a metal layer.

[0017] In the aforementioned packaging substrate and its manufacturing method, the surfaces of the plurality of conductive pillars are flush with or lower than the surface of the insulating layer.

[0018] In a specific embodiment, the method for manufacturing the packaging substrate first forms an insulating layer on the first side and the second side of the core board respectively; forms an opening on the insulating layer; forms a metal layer on the insulating layer and in the opening; removes the material of the metal layer on the insulating layer, and retains the material of the metal layer in the multiple openings to serve as multiple conductive columns, so that the multiple conductive columns are electrically connected to the circuit layer and exposed on the surface of the insulating layer.

[0019] As can be seen from the above, the packaging substrate and its manufacturing method of the present invention mainly use conductive columns as external contacts to replace the existing external pads, so there is no need to make the existing wiring layer on the insulating layer. Therefore, compared with the prior art, the thickness of the packaging substrate of the present invention is lower, which is conducive to meeting the demand for thinning.

[0020] Furthermore, by using the conductive pillars as external contacts, the circuit specifications have a smaller fine line width / fine line pitch, so compared with the existing wiring layer, the packaging substrate of the present invention has a higher wiring density. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figures 1A to 1C A cross-sectional view of a conventional method for manufacturing a packaging substrate.

[0022] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing a packaging substrate of the present invention.

[0023] FIG. 3A to FIG. 3C It is a cross-sectional schematic diagram of a second embodiment of a method for manufacturing a packaging substrate of the present invention.

[0024] The reference numerals are as follows:

[0025] 1,2,3 Package substrate

[0026] 10,20 core board

[0027] 10a, 20a First side

[0028] 10b, 20b Second side

[0029] 100,200 conductive vias

[0030] 101,102,201,202 circuit layers

[0031] 100a, 200a plug material

[0032] 11Conductive blind vias

[0033] 111,211 insulation layer

[0034] 1110,310 opening

[0035] 12,120,210 metal layers

[0036] 13 Wiring Layer

[0037] 130 External pad

[0038] 21,31 Conductive columns

[0039] 22 Seed layer

[0040] 29 barrier layer

[0041] 290 Patterned opening DETAILED DESCRIPTION

[0042] The following describes the implementation of the present invention by means of specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0043] It should be noted that the structures, proportions, sizes, etc. shown in the attached drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size, without affecting the effects and purposes that can be produced by the present invention, should still fall within the scope of the technical contents disclosed in the present invention. At the same time, the terms such as "above", "one", etc. quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of the relative relationship, without substantially changing the technical contents, should also be regarded as the scope of the implementation of the present invention.

[0044] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing a packaging substrate 2 of the present invention.

[0045] like Figure 2A As shown, a core board 20 is provided, which has a first side 20a and a second side 20b opposite to each other, and circuit layers 201, 202 are arranged on the first side 20a and the second side 20b of the core board 20, and the core board 20 has a plurality of conductive through holes 200 connecting the first side 20a and the second side 20b, so that the plurality of conductive through holes 200 are electrically connected to the plurality of circuit layers 201, 202.

[0046] In this embodiment, the core board 20 may be an organic polymer board or other board including Bismaleimide triazine (BT), glass fiber prepreg (PP), and the plurality of conductive through holes 200 are hollow columns, which can be filled with plugging material 200a in the hollow, wherein the plugging material 200a is of various types, such as conductive glue, ink, etc., and is not particularly limited. It should be understood that in other embodiments, the plurality of conductive through holes 200 may also be solid metal columns without the need to be filled with plugging material 200a.

[0047] like Figure 2B As shown, a resist layer 29 is formed on the first side 20a and the second side 20b of the core board 20, and a plurality of patterned openings 290 are formed on each of the resist layers 29, so that the plurality of circuit layers 201, 202 are exposed in each of the patterned openings 290. Then, a seeding layer 22 is formed on the resist layer 29 and the wall surface of the plurality of patterned openings 290. Afterwards, the material of the seed layer 22 on the resist layer 29 is removed, and only the material of the seed layer 22 on the wall surface of the plurality of patterned openings 290 is retained.

[0048] In this embodiment, the resist layer 29 is a dry film, and a plurality of patterned openings 290 are formed by exposure and development.

[0049] Furthermore, the seed layer 22 is a conductive film such as graphene or a metal layer such as copper. For example, a copper layer is formed by sputtering to serve as the seed layer 22; or a graphene film is pasted by lamination to serve as the seed layer 22.

[0050] like Figure 2C As shown, a metal layer 210 such as copper is formed on the resist layer 29 and the seed layer 22 .

[0051] like Figure 2D As shown, the material of the metal layer 210 on the resist layer 29 is removed, and only the material of the metal layer 210 in the plurality of patterned openings 290 is retained to serve as a plurality of conductive pillars 21, such as copper pillars, so that the plurality of conductive pillars 21 are electrically connected to the plurality of circuit layers 201, 202. Next, the resist layer 29 is removed to expose the first side 20a and the second side 20b of the core board 20.

[0052] like Figure 2EAs shown, an insulating layer 211 is formed on the first side 20a and the second side 20b of the core board 20, respectively, so that the circuit layer 201, 202 and multiple conductive pillars 21 are embedded in the insulating layer 211, wherein the surface of each insulating layer 211 is flush with the surface of the multiple conductive pillars 21, so that the multiple conductive pillars 21 are exposed on the surface of each insulating layer 211.

[0053] In this embodiment, each of the insulating layers 211 is a dielectric layer, such as Ajinomoto build-up film (ABF) or other dielectric materials.

[0054] Furthermore, plasma, grinding or other methods are used to remove part of the material of the insulating layer 211 so that the surface of each insulating layer 211 is flush with the surfaces of the conductive pillars 21 , so that the conductive pillars 21 are exposed on the surface of each insulating layer 211 .

[0055] In addition, the manufacturing method of the present invention does not need to perform a wiring process on the insulating layer 211, so the plurality of conductive pillars 21 serve as external contacts for combining with solder materials.

[0056] Therefore, the manufacturing method of the first embodiment uses a dry film as the resist layer 29 to facilitate the manufacturing of circuit specifications with fine line width / fine line spacing, such as less than or equal to 10 micrometers (um).

[0057] Furthermore, by using the dry film as the resist 29 and adopting the exposure and development method to form the patterned opening 290 , the conventional laser drilling method is replaced. Therefore, compared with the expensive laser machine equipment, the manufacturing method of the present invention can save equipment cost, thereby reducing the manufacturing cost of the package substrate 2 .

[0058] In addition, the manufacturing method of the first embodiment uses multiple conductive pillars 21 as external contacts, so there is no need to form grooves on the insulating layer 211 to accommodate the wiring layer, so the process of the insulating layer 211 can be omitted and the thickness of the insulating layer 211 can be reduced, which is conducive to thinning the packaging substrate 2.

[0059] FIG. 3A to FIG. 3C The cross-sectional view of the second embodiment of the method for manufacturing the package substrate 3 of the present invention is shown in FIG. The difference between this embodiment and the first embodiment lies in the thickness of the conductive pillar 31 , and the other processes are substantially the same, so the same points will not be described in detail below.

[0060] like Figure 3A As shown, continued Figure 2A By using a process, an insulating layer 211 is formed on the first side 20a and the second side 20b of the core board 20, and a plurality of openings 310 are formed on each of the insulating layers 211, so that the plurality of circuit layers 201, 202 are exposed in each of the openings 310. Then, a seed layer 22 is formed on the wall surface of the plurality of openings 310.

[0061] In this embodiment, plasma etching or other methods are used to remove part of the material of the insulating layer 211 to form a plurality of openings 310 .

[0062] like Figure 3B As shown, a metal layer 210 is formed on the insulating layer 211 and in the opening 310 by electroplating or other methods.

[0063] like Figure 3C As shown, the material of the metal layer 210 on the insulating layer 211 is removed, and only the material of the metal layer 210 in the multiple openings 310 is retained to serve as multiple conductive pillars 31, so that the multiple conductive pillars 31 are electrically connected to the multiple circuit layers 201, 202, wherein the surface of the multiple conductive pillars 31 is lower than the surface of each of the insulating layers 211, so that the multiple conductive pillars 31 are exposed in each of the openings 310.

[0064] In this embodiment, the material of the metal layer 210 on the insulating layer 211 is removed by etching, so the metal layer 210 at the opening 310 is also micro-etched, so that the surface of the plurality of conductive pillars 31 is lower than the surface of each insulating layer 211 .

[0065] Therefore, the manufacturing method of the second embodiment forms the opening 310 on the insulating layer 211 first to manufacture a plurality of conductive pillars 31 , and thus there is no need to form the resistance layer 29 .

[0066] The present invention also provides a packaging substrate 2, 3, including: a core board 20 having a first side 20a and a second side 20b opposite to each other, a plurality of conductive pillars 21, 31 arranged on the first side 20a and the second side 20b of the core board 20, and an insulating layer 211 arranged on the first side 20a and the second side 20b of the core board 20 to cover the plurality of conductive pillars 21, 31.

[0067] The core board 20 has a plurality of conductive vias 200 connecting the first side 20a and the second side 20b, and circuit layers 201 and 202 are arranged on the first side 20a and the second side 20b of the core board 20 so that the plurality of conductive vias 200 are electrically connected to the plurality of circuit layers 201 and 202.

[0068] The conductive pillars 21 , 31 are disposed on the circuit layers 201 , 202 to electrically connect the circuit layers 201 , 202 , wherein a seed layer 22 is formed around and at the bottom of the conductive pillars 21 , 31 , and the conductive pillars 21 , 31 are exposed on the surface of the insulating layer 211 .

[0069] In one embodiment, the seed layer 22 is a conductive film such as graphene or a metal layer such as copper.

[0070] In one embodiment, the surfaces of the plurality of conductive pillars 21 are flush with the surface of the insulating layer 211 .

[0071] In one embodiment, the surfaces of the plurality of conductive pillars 31 are lower than the surface of the insulating layer 211 .

[0072] In summary, the packaging substrates 2, 3 and the manufacturing method thereof of the present invention use a plurality of conductive pillars 21, 31 as external contacts to replace the existing external pads 130, so there is no need to make the existing wiring layer 13 on the insulating layer 211. Therefore, compared with the prior art, the packaging substrates 2, 3 of the present invention are lower in thickness to meet the thinning requirements.

[0073] Furthermore, by using a plurality of conductive pillars 21 , 31 as external contacts, the circuit specifications have a finer line width / fine line pitch, so compared with the existing wiring layer 13 , the packaging substrates 2 , 3 of the present invention have a higher wiring density.

[0074] In addition, the seed layer 22 has better bonding properties, so the plurality of conductive pillars 21 , 31 are covered by the seed layer 22 at their peripheries and bottoms, so as to facilitate bonding with the insulating layer 211 .

[0075] In addition, the shapes of the plurality of conductive pillars 21 , 31 can be designed as required, but should be avoided from extending toward the periphery of the end surfaces thereof.

[0076] The above embodiments are used to illustrate the principles and effects of the present invention, but are not used to limit the present invention. Those skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. A method for manufacturing a packaging substrate, comprising: Providing a core board having a first side and a second side opposite to each other and a plurality of conductive through holes connecting the first side and the second side, and then laying a circuit layer electrically connecting the plurality of conductive through holes on the first side and the second side of the core board respectively; forming a barrier layer on the first side and the second side of the core board; Forming a plurality of conductive pillars on the circuit layers on the first side and the second side of the core board through the resist layer by exposure and development, then removing the resist layer, and electrically connecting the plurality of conductive pillars to the circuit layer, wherein a seed layer is formed around and on the bottom of the plurality of conductive pillars; and An insulating layer is formed on the first side and the second side of the core board so that the insulating layer covers the plurality of conductive pillars, wherein the plurality of conductive pillars are exposed on the surface of the insulating layer.

2. The method for manufacturing a packaging substrate according to claim 1, wherein: The seed layer is a conductive film.

3. The method for manufacturing a packaging substrate according to claim 1, wherein: The seed layer is a metal layer.

4. The method for manufacturing a packaging substrate according to claim 1, wherein: Surfaces of the plurality of conductive pillars are flush with a surface of the insulating layer.

5. The method for manufacturing a packaging substrate according to claim 1, wherein: Surfaces of the plurality of conductive pillars are lower than a surface of the insulating layer.

Images