Energy storage management system and electronic device

Abstract

The application discloses an energy storage management system and an electronic device, wherein the energy storage management system comprises a power supply unit, a data processing unit, an analog front end configured to collect data of an energy storage device, and a low-side drive unit configured to control charging and discharging of the energy storage device. The low-side drive unit comprises a charging and discharging module, a drive module, and the data processing unit. The drive module is configured to receive a first drive enable signal of the data processing unit and send a drive signal to the charging and discharging module for drive control according to the first drive enable signal. An anti-reverse connection module is connected to a negative end of a charging and discharging interface and the drive module. When it is detected that the voltage of the negative end of the charging and discharging interface is greater than a set voltage threshold, the anti-reverse connection module controls the level of the first drive enable signal to flip, so that the drive module stops drive control of the charging and discharging module. In this way, the energy storage management system can be protected.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of energy storage, in particular to an energy storage management system and an electronic device. BACKGROUND

[0002] At present, energy storage systems have been applied in various fields, such as new energy vehicles, photovoltaic power stations, communication base stations and the like. Taking the communication base station as an example, with the use scene of the communication base station becoming more and more complex, the functional requirements of the energy storage system are more and more, and the capacity demand of the system is also more and more. The current technology meets the basic function of use, but the design form of the battery protection function is single, and the use safety and stability of the energy storage system cannot be guaranteed. SUMMARY

[0003] To solve the above problems, the present application provides an energy storage management system and an electronic device, which can protect the energy storage management system and improve the safety and stability of the energy storage management system.

[0004] One of the technical solutions adopted by the present application is to provide an energy storage management system, which comprises: a power supply unit connected to an energy storage device; a data processing unit connected to the power supply unit; an analog front end connected to the power supply unit, the energy storage device and the data processing unit, the analog front end being configured to collect data from the energy storage device; a low-side drive unit connected to the energy storage device, the data processing unit and a charge-discharge port, the low-side drive unit being configured to control the charging and discharging of the energy storage device; wherein the low-side drive unit comprises: a charge-discharge module connected to the negative terminal of the energy storage device and the negative terminal of the charge-discharge interface; a drive module connected to the charge-discharge module and the data processing unit, the drive module being configured to receive a first drive enable signal from the data processing unit and send a drive signal to the charge-discharge module for drive control according to the first drive enable signal; and an anti-reverse connection module connected to the negative terminal of the charge-discharge interface and the drive module, the anti-reverse connection module being configured to control the level of the first drive enable signal to flip when it is detected that the voltage of the negative terminal of the charge-discharge interface is greater than a set voltage threshold, so as to make the drive module stop driving the charge-discharge module.

[0005] In an embodiment, the charge-discharge module comprises: a first switch tube, a first end of the first switch tube being connected to the negative terminal of the charge-discharge interface, a control end of the first switch tube being connected to the drive module; and a second switch tube, a first end of the second switch tube being connected to the negative terminal of the energy storage device, a second end of the second switch tube being connected to a second end of the first switch tube, a control end of the second switch tube being connected to the drive module.

[0006] In an embodiment, the energy storage management system further comprises a charge-discharge current limiting unit connected to the second end of the second switch tube, the positive end of the energy storage device, the negative end of the charge-discharge interface, and the data processing unit, and the charge-discharge current limiting unit is configured to control the current at the second end of the second switch tube according to the current between the positive end of the energy storage device and the negative end of the charge-discharge interface under the control of the data processing unit.

[0007] In an embodiment, the charge-discharge current limiting unit comprises a power supply module connected to the data processing unit, the power supply module being configured to provide a power supply signal under the control of the data processing unit; a chopper module connected to the second end of the second switch tube, the positive end of the energy storage device, and the negative end of the charge-discharge interface; a signal feedback module connected to the chopper module, the signal feedback module being configured to generate a feedback signal according to the current between the positive end of the energy storage device and the negative end of the charge-discharge interface; and a pulse width modulation module connected to the signal feedback module and the chopper module, the pulse width modulation module being configured to generate a pulse width modulation signal according to the feedback signal to control the current at the second end of the second switch tube according to the pulse width modulation signal.

[0008] In an embodiment, the anti-reverse connection module comprises a photocoupler, a first primary end of the photocoupler being connected to the negative end of the charge-discharge interface, a second primary end of the photocoupler being connected to the positive end of the energy storage device, a first secondary end of the photocoupler being configured to input a power supply signal, and a second secondary end of the photocoupler being configured to output a reverse connection control signal; and a driving module configured to control the level of a first driving enable signal to flip according to the reverse connection control signal, so that the driving module stops driving control of the charge-discharge module.

[0009] In an embodiment, the analog front end comprises a current acquisition circuit arranged between the negative end of the energy storage device and the negative end of the charge interface, and the current acquisition circuit is configured to sample the current between the negative end of the energy storage device and the negative end of the charge interface to obtain a sampled current value.

[0010] In an embodiment, the data processing unit is configured to obtain the sampled current value of the analog front end, and determine whether a preset overcurrent condition is met according to the sampled current value, and control the level of the first driving enable signal to flip when the preset overcurrent condition is met, so that the driving module stops driving control of the charge-discharge module.

[0011] In an embodiment, the driving module is configured to receive a second driving enable signal of the analog front end, and send a driving signal to the charge-discharge module for driving control according to the first driving enable signal and the second driving enable signal; and the analog front end is configured to control the level of the second driving enable signal to flip when the sampled current value is greater than a set overcurrent voltage threshold, so that the driving module stops driving control of the charge-discharge module.

[0012] In an embodiment, the energy storage management system further comprises a functional unit connected to the data processing unit, the functional unit comprising at least one of a communication circuit, an indication circuit, a dry node circuit, a dial switch circuit, a heating control circuit, a clock circuit, a data storage circuit, an anti-theft circuit, a temperature acquisition circuit, and a preventive voltage detection circuit.

[0013] Another technical solution adopted by the present application is to provide an electronic device comprising the energy storage management system as described above.

[0014] The energy storage management system provided by the present application comprises: a power supply unit connected to an energy storage device; a data processing unit connected to the power supply unit; an analog front end connected to the power supply unit, the energy storage device, and the data processing unit, the analog front end being configured to collect data from the energy storage device; and a low-side drive unit connected to the energy storage device, the data processing unit, and a charge-discharge port, the low-side drive unit being configured to control charging and discharging of the energy storage device. The low-side drive unit comprises: a charge-discharge module connected to a negative terminal of the energy storage device and a negative terminal of the charge-discharge interface; a drive module connected to the charge-discharge module and the data processing unit, the drive module being configured to receive a first drive enable signal from the data processing unit and send a drive signal to the charge-discharge module for drive control according to the first drive enable signal; and an anti-reverse connection module connected to the negative terminal of the charge-discharge interface and the drive module, the anti-reverse connection module being configured to, when detecting that a voltage of the negative terminal of the charge-discharge interface is greater than a set voltage threshold, control a level of the first drive enable signal to flip so as to stop the drive module from driving the charge-discharge module. In this way, the anti-reverse connection module is provided, which, on one hand, can stop the drive module from driving the charge-discharge module when an external charger is reversely connected by detecting that the voltage of the negative terminal of the charge-discharge interface is greater than the set voltage threshold, and on the other hand, can also stop the drive module from driving the charge-discharge module when the charge-discharge circuit is overcurrent by detecting that the voltage of the negative terminal of the charge-discharge interface is greater than the set voltage threshold. Therefore, the anti-reverse connection module simultaneously plays a role in anti-reverse connection and anti-overcurrent, thereby protecting the entire energy storage management system and improving the safety and stability of the energy storage management system. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort. Among them:

[0016] Figure 1 is a structural schematic diagram of an embodiment of the energy storage management system provided by the present application;

[0017] Figure 2a is a first circuit schematic diagram of the power supply unit 10 in an embodiment;

[0018] Figure 2b is a second circuit schematic diagram of the power supply unit 10 in an embodiment;

[0019] Figure 3 is a circuit schematic diagram of the data processing unit 20 in an embodiment;

[0020] Figure 4 is a circuit schematic diagram of the analog front end 30 in an embodiment;

[0021] Figure 5 is a structural schematic diagram of the low-side driving unit 40 in an embodiment;

[0022] Figure 6a is a circuit schematic diagram of the charge-discharge module 41 in an embodiment;

[0023] Figure 6b is a circuit schematic diagram of the driving module 42 in an embodiment;

[0024] Figure 6c is a circuit schematic diagram of the reverse connection prevention module 43 in an embodiment;

[0025] Figure 7 is a circuit schematic diagram of the charge-discharge current limiting unit 50 in an embodiment;

[0026] Figure 8a is a circuit schematic diagram of the power supply module 51 in an embodiment;

[0027] Figure 8b is a circuit schematic diagram of the chopper module 52 and the signal feedback module 53 in an embodiment;

[0028] Figure 8c is a circuit schematic diagram of the pulse width modulation module 54 in an embodiment;

[0029] Figure 9a is a circuit schematic diagram of the CAN communication circuit in an embodiment;

[0030] Figure 9b is a circuit schematic diagram of the 485 communication circuit in an embodiment;

[0031] Figure 9c is a circuit schematic diagram of the 232 communication circuit in an embodiment;

[0032] Figure 10 is a circuit schematic diagram of the indication circuit in an embodiment;

[0033] Figure 11 is a circuit schematic diagram of the dry contact circuit in an embodiment;

[0034] Figure 12 FIG. 8 is a circuit schematic diagram of a dial switch circuit in an embodiment;

[0035] Figure 13 FIG. 9 is a circuit schematic diagram of a buzzer circuit in an embodiment;

[0036] Figure 14 FIG. 10 is a circuit schematic diagram of a heating control circuit in an embodiment;

[0037] Figure 15 FIG. 11 is a circuit schematic diagram of a clock circuit in an embodiment;

[0038] Figure 16 FIG. 12 is a circuit schematic diagram of a data storage circuit in an embodiment;

[0039] Figure 17 FIG. 13 is a circuit schematic diagram of an anti-theft circuit in an embodiment;

[0040] Figure 18 FIG. 14 is a circuit schematic diagram of a temperature acquisition circuit in an embodiment;

[0041] Figure 19 FIG. 15 is a circuit schematic diagram of a voltage detection circuit in an embodiment;

[0042] Figure 20 FIG. 16 is a structural schematic diagram of an electronic device in an embodiment. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application, and not to limit the present application. In addition, it should be noted that, for the sake of description, only the parts related to the present application are shown in the drawings, and not all the structures. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of the present application.

[0044] The terms "first", "second", and the like in the present application are used to distinguish different objects, and are not used to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but optionally includes other steps or units not listed or optionally includes other steps or units inherent to the process, method, product or device.

[0045] Reference to“an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment. The appearances of the phrase“in one embodiment” in various places in the specification are not necessarily referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is expressly understood that the embodiments described herein are merely example and that one skilled in the art would readily recognize numerous other variations and modifications that have been or can be made hereto without departing from the scope of the application.

[0046] Reference is made to Figure 1 , Figure 1 is a structural schematic diagram of an embodiment of the energy storage management system provided by the present application. The energy storage management system 100 includes a power supply unit 10, a data processing unit 20, an analog front end 30, a low-side drive unit 40, a charge-discharge current limiting unit 50, and a functional unit 60.

[0047] The power supply unit 10 is configured to connect to an energy storage device (e.g., a battery). The data processing unit 20 is connected to the power supply unit 10. The analog front end 30 is connected to the power supply unit 10, the energy storage device, and the data processing unit 20, and is configured to collect data from the energy storage device. The low-side drive unit 40 is connected to the energy storage device, the data processing unit 20, and a charge-discharge port, and is configured to control the charging and discharging of the energy storage device.

[0048] The power supply unit 10, the data processing unit 20, the analog front end 30, and the low-side drive unit 40 will be described below.

[0049] Reference is made to Figure 2a and Figure 2b , Figure 2a is a first circuit schematic diagram of the power supply unit 10 in an embodiment, Figure 2b is a second circuit schematic diagram of the power supply unit 10 in an embodiment.

[0050] The power supply unit 10 includes a gas discharge tube DG1, a fuse F3, diodes D40, D91, D92, a bidirectional TVS tube D43, a common-mode inductor L5, voltage stabilizing tubes D41, D89, D90, a PMOS tube Q39, a DCDC chip U15, a transformer T2, voltage reduction modules LDO1, LDO2, LDO3, a button SW3, an optocoupler P7, transistors Q66, Q67, and other cooperating resistors, capacitors, etc.

[0051] Specifically, the first end of the fuse F3 is connected to the positive end B+ of the energy storage device; the first end (pin 1) of the gas discharge tube DG1 is connected to the positive end B+ of the energy storage device, and the second end (pin 2) of the gas discharge tube DG1 is connected to the negative end P- of the charge-discharge interface; the first end of the capacitor C61 is connected to the second end of the fuse F3, the second end of the capacitor C61 is connected to the negative end B- of the energy storage device, the first end of the bidirectional TVS tube D43 is connected to the second end of the fuse F3, and the second end of the bidirectional TVS tube D43 is connected to the negative end B- of the energy storage device; the anode of the diode D40 is connected to the second end of the fuse F3, the first end (pin 1) of the common-mode inductor L5 is connected to the cathode of the diode D40; the second end (pin 2) of the common-mode inductor L5 is connected to the negative end B- of the energy storage device, and the third end (pin 3) of the common-mode inductor L5 is grounded; the anode of the voltage stabilizing tube D41 is connected to the third end of the common-mode inductor L5, and the cathode of the voltage stabilizing tube D41 is connected to the fourth end of the common-mode inductor L5; the first end of the capacitor C60 is connected to the cathode of the voltage stabilizing tube D41, and the second end of the capacitor C60 is connected to the anode of the voltage stabilizing tube D41; the source of the PMOS tube Q39 is connected to the first end of the capacitor C60, the drain of the PMOS tube Q39 is connected to the input end Vin of the DCDC chip U15, and the gate of the PMOS tube Q39 is configured to input the control signal PWR.CTR; the first end (pin 1) of the primary side of the transformer T2 is connected to the output end Vout of the DCDC chip U15, the secondary side of the transformer T2 includes two coils, and the primary side and the secondary side of the transformer T2 together generate three power supply signals, which generate VDD12V, VDD.COM, VDD5V and VDD3V3 through the buck modules LDO1, LDO2 and LDO3 respectively.

[0052] Among them, the DCDC chip U15, the transformer T2 and the like constitute a Buck circuit, the voltage is input from the positive end B+ of the energy storage device, filtered through the capacitor C61 and then input into the DCDC chip U15, and the DCDC chip U15 outputs VDD5V, VDD5V is boosted through the transformer to output VDD12V and VDDCOM, the output VDD5V, VDD3V3 is used by the data processing unit 20 and the analog front end 30, the output VDD12V is used by the low-side driving unit 40 and the charge-discharge current limiting unit 50, and the output VDD.COM is used by the function unit 60.

[0053] Specifically, the gas discharge tube DG1 is an EMC (Electromagnetic Compatibility) protection device, the capacitor C61 is an input voltage filter capacitor, the bidirectional TVS tube D43 plays a role of rapid protection when the system is disturbed by surges and static electricity, the diode D40 plays a role of power supply anti-reverse, the common mode inductor L5 can eliminate common mode interference and reduce the conducted disturbance of the power supply unit 10, the voltage stabilizing tube D41 plays a role of input power supply clamping to prevent the chip in the subsequent stage from being damaged due to an excessively large input power supply, and the PMOS tube Q39 is a power supply switch MOS, and the main driving mode is external key activation and charging activation.

[0054] When the key is activated, that is, when the SW3 key is pressed, the resistance R304 is connected to the DGND, the B+.PTC obtains a control signal PWR.CTR through the resistances R113, R115 and R304, the control signal is input to the gate of the PMOS tube Q39, a voltage difference (GS voltage difference) is formed between the gate and the source of the PMOS tube Q39, and the PMOS tube Q39 starts to conduct.

[0055] When the charging is activated, when the energy storage management system is connected to an external charger, the triode Q66 is turned on, the optocoupler P7 is turned on, the B+.PTC obtains a control signal PWR.CTR through the resistances R113, R115 and R305, the control signal is input to the gate of the PMOS tube Q39, a voltage difference (GS voltage difference) is formed between the gate and the source of the PMOS tube Q39, and the PMOS tube Q39 starts to conduct.

[0056] In addition, when the MCU.PL signal (which can be generated by the data processing unit 20) is at a high level, the triode Q67 is turned on, the B+.PTC obtains a control signal PWR.CTR through the resistances R113 and R115, the control signal is input to the gate of the PMOS tube Q39, and at this time, the level of the control signal PWR.CTR is not enough to form a voltage difference (GS voltage difference) between the gate and the source of the PMOS tube Q39, and the PMOS tube Q39 is turned off.

[0057] Referring to Figure 3 , Figure 3 FIG. 1 is a circuit schematic diagram of the data processing unit 20 in an embodiment, and the data processing unit 20 mainly includes a CPU control processor U10 and a system minimum circuit. The data processing unit 20 is used to generate various control signals for the analog front end 30, the low-side driving unit 40, the charge and discharge current limiting unit 50 and the functional unit 60, which will be introduced in subsequent embodiments.

[0058] Referring to Figure 4 , Figure 4is a circuit schematic diagram of the analog front end 30 in an embodiment, the analog front end 30 includes the analog front end chip U16, a voltage acquisition circuit, a battery cell temperature acquisition circuit, and a current acquisition circuit. Among them, the voltage acquisition circuit has passive balancing capability, which can balance the voltage of each battery cluster (generally, energy storage equipment includes multiple battery clusters in series or parallel, and a battery cluster includes multiple battery cells in series). Among them, the battery cell temperature acquisition circuit includes resistors R181, R192, R209, R220, capacitors C83, C92, C97, C102, and T1-T4 are connected to the external temperature NTC. Among them, the current acquisition circuit mainly includes current blocking resistors R39-R55, and the analog front end 30 directly acquires the voltage value between the current blocking resistors to acquire information.

[0059] Specifically, after the analog front end 30 acquires voltage, temperature, and current data, the information is transmitted to the data processing unit 20 (chip U10), and if the information is abnormal, the data processing unit 20 stops driving the low-side drive unit 40, so that the energy storage management system 100 stops the discharging / charging process.

[0060] Referring to Figure 5 , Figure 5 is a structural schematic diagram of the low-side drive unit 40 in an embodiment, the low-side drive unit 40 includes a charge / discharge module 41, a drive module 42, and an anti-reverse connection module 43.

[0061] Among them, the charge / discharge module 41 is connected to the negative end of the energy storage equipment (in this embodiment, it is connected to the R.MOS node in the Figure 4 , and the negative end P- of the charge / discharge interface; the drive module 42 is connected to the charge / discharge module 41 and the data processing unit 20, and the drive module 42 is configured to receive the first drive enable signal EN1 of the data processing unit 20 and send a drive signal to the charge / discharge module 41 for drive control according to the first drive enable signal EN1; the anti-reverse connection module 43 is connected to the negative end P- of the charge / discharge interface and the drive module 42, and the anti-reverse connection module 43 is configured to flip the level of the first drive enable signal EN1 when it is detected that the voltage of the negative end P- of the charge / discharge interface is greater than a set voltage threshold, so that the drive module 42 stops the drive control of the charge / discharge module 41.

[0062] Specifically, when the first drive enable signal EN1 is at a high level, the drive module 42 sends a drive signal to the charge / discharge module 41 for drive control according to the first drive enable signal EN1, and the anti-reverse connection module 43 pulls down the level of the first drive enable signal EN1 to a low level when it is detected that the voltage of the negative end P- of the charge / discharge interface is greater than a set voltage threshold, so that the drive module 42 stops the drive control of the charge / discharge module 41.

[0063] Further referring to Figure 6a - Figure 6c , Figure 6ais a circuit diagram of the charge and discharge module 41 in one embodiment. Figure 6b is a circuit diagram of the driving module 42 in one embodiment. Figure 6c FIG. 4 is a circuit diagram of the anti-reverse connection module 43 in one embodiment.

[0064] The charge and discharge module includes a first switch tube Q24 and a second switch tube Q23. The first end of the first switch tube Q24 is connected to the negative end P- of the charge and discharge interface, and the control end of the first switch tube Q24 is connected to the drive module 42; the first end of the second switch tube Q23 is connected to the negative end of the energy storage device (connected in this embodiment). Figure 4 The second end of the second switch Q23 is connected to the second end of the first switch Q24, and the control end of the second switch Q23 is connected to the driver module 42. Specifically, the charge-discharge module 41 includes a discharge portion and a charge portion. The discharge portion includes an NMOS transistor Q23, a bidirectional TVS transistor D3, capacitors C115 and C116, a Schottky diode D15, and bleeder resistors R78 and R79. The bidirectional TVS transistor D3 protects the discharge MOS transistor from overvoltage breakdown, capacitors C15 and C16 provide filtering and stabilization, and resistor R79 and Schottky diode D15 form a MOS transistor shutdown acceleration circuit. The charging portion includes an NMOS transistor Q24, a bidirectional TVS transistor D4, capacitors C17 and C18, a voltage regulator D14, a Schottky diode D12, and a PMOS transistor Q25. The bidirectional TVS transistor D4 protects the discharge MOS transistor from overvoltage breakdown, and capacitors C17 and C18 provide filtering and stabilization.

[0065] Optionally, the charge and discharge module 41 also includes a pre-discharge function, which is mainly implemented by the transistor Q3, the PMOS transistor Q2, the NMOS transistor Q4, and the preventive resistors R18 and R24. The base of the transistor Q3 is connected to the data processing unit 20 to receive the control signal PDSG. The pre-discharge function is to form a path with the charging part of the charge and discharge module 41 when the energy storage management system 100 is just powered on. The purpose is to adapt to external chargers in different scenarios and avoid sparks caused by the large capacitor of the external charger when it comes into contact with the energy storage management system 100.

[0066] The driving module 42 comprises a gate drive chip U4, NMOS tubes Q7 and Q8, and Schottky diodes D6-D9. The DDSG pin and the DCHG pin (pin 2 and pin 4) of the gate drive chip U4 are connected with the analog front end 30, the DSGEN pin and the CHGEN pin (pin 1 and pin 8) of the gate drive chip U4 are connected with the drain of the NMOS tubes Q7 and Q8, the gate of the NMOS tubes Q7 and Q8 is connected with the data processing unit 20 to receive the control signals DSGEN and CHGEN, the gate drive chip U4 is powered by VDD 12V, the pin 7 outputs the discharge driving signal DSGDRV, and the pin 5 outputs the charging driving signal CHGDRV.

[0067] It is worth noting that the gate drive chip U4 must be simultaneously driven by the analog front end 30 (DDSG and SCHG) and the data processing unit 20 (DSGEN and CHGEN) to start the output, which greatly avoids the misoperation of the system and greatly improves the safety of the system.

[0068] The anti-reverse connection module 43 comprises an optical coupler P2, the first primary end of the optical coupler P2 is connected with the negative end P- of the charge-discharge interface, the second primary end of the optical coupler is connected with the positive end B+ of the energy storage device, the first secondary end of the optical coupler is configured to input a power supply signal, and the second secondary end of the optical coupler is configured to output a reverse connection control signal DCEN. The driving module 42 is configured to control the level inversion of the first driving enable signal according to the reverse connection control signal DCEN, so that the driving module 42 stops the driving control of the charge-discharge module 41.

[0069] Specifically, the anti-reverse connection module 43 comprises diodes D10 and D11 and the optical coupler P2, and mainly has two functions of anti-reverse connection and overcurrent protection.

[0070] Firstly, when the external charger is reversely connected, the voltage of the negative end P- of the charge-discharge interface rises, the optical coupler P2 is turned on, the signal DCEN becomes a 5V high-level signal, at this time, the MOS tubes Q7 and Q8 are turned on, the DSGEN and CHGEN signals (i.e. the first driving control signals) become low-level signals, the charge-discharge module 41 stops driving, and all are turned off.

[0071] Secondly, when the current of the loop between the negative end B- of the energy storage device and the negative end P- of the charge-discharge interface is too large, the current between the negative end P- of the charge-discharge interface and the positive end B+ of the energy storage device is sufficient to turn on the optical coupler P2, the signal DCEN becomes a 5V high-level signal, at this time, the MOS tubes Q7 and Q8 are turned on, the DSGEN and CHGEN signals (i.e. the first driving control signals) become low-level signals, the charge-discharge module 41 stops driving, and all are turned off.

[0072] In addition, pin 3 of the optocoupler P2 is connected to the data processing unit 20 via the diode D10. When a reverse connection fault occurs, the CHGREV.CHK signal becomes high level. At this time, the data processing unit 20 can further take early warning protection action.

[0073] See Figure 7 , Figure 7 : This is a circuit diagram of a charge and discharge current limiting unit 50 in one embodiment. The charge and discharge current limiting unit 50 is connected to the second end of the second switch tube Q23, the positive terminal B+ of the energy storage device, the negative terminal P- of the charge and discharge interface, and the data processing unit. The charge and discharge current limiting unit 50 is configured to control the current at the second end of the second switch tube Q23 according to the current between the positive terminal B+ of the energy storage device and the negative terminal P- of the charge and discharge interface under the control of the data processing unit 20.

[0074] The charge and discharge current limiting unit 50 includes a power supply module 51, a chopping module 52, a signal feedback module 53 and a pulse width modulation module 54. The power supply module 51 is connected to the data processing unit 20 and is configured to provide a power supply signal under the control of the data processing unit 20; the chopping module 52 is connected to the second end ( Figure 6a MOS.COM in), the positive terminal B+ of the energy storage device and the negative terminal P- of the charge and discharge interface; the signal feedback module 53 is connected to the chopping module 52, and the signal feedback module 53 is configured to generate a feedback signal according to the current between the positive terminal B+ of the energy storage device and the negative terminal P- of the charge and discharge interface; the pulse width modulation module 54 is connected to the signal feedback module 53 and the chopping module 52, and the pulse width modulation module 54 is configured to generate a pulse width modulation signal according to the feedback signal, so that the chopping module 52 controls the current of the second end of the second switch tube Q23 according to the pulse width modulation signal.

[0075] Further reading Figure 8a - Figure 8c , Figure 8a is a circuit diagram of the power module 51 in one embodiment. Figure 8b FIG. 5 is a circuit diagram of a chopping module 52 and a signal feedback module 53 in one embodiment. Figure 8c FIG. 5 is a circuit diagram of the pulse width modulation module 54 in one embodiment.

[0076] The power module 51 primarily provides power to the current-limiting unit 50. Specifically, it receives VDD3V3 and VDD12V from the power supply unit 10 and generates LCC.12V and LCC.5V. The power module 51 primarily includes an optocoupler P4, a PMOS transistor Q60, and an LDO chip U21. Pin 2 of the optocoupler P4 is connected to the data processing unit 20 to receive the LCC.EN signal. When the system needs to enable the current-limiting function, the data processing unit 20 issues a command, further turning on the optocoupler, the PMOS transistor Q60, and the start of outputting LCC.12V.

[0077] One end of the chopper module 52 is connected with the discharging part of the charge-discharge module 41, specifically the common terminal MOS.COM of the drain of MOS Q23 and the drain of MOS Q24, and the other end of the chopper module 52 is connected with the positive terminal B+ of the energy storage device; the chopper module 52 includes inductor L6, gate drive chip U22, NMOS Q62, Q63, Q64, PMOS Q61, Schottky diode D85, aluminum electrolytic capacitors EC9, EC10, EC11; further, the MOS Q62, Q63 are provided with an acceleration turn-off circuit, and the chopper module 52 is provided with an RC filter circuit.

[0078] The signal feedback module 53 includes current intercepting resistors R275-R278, one end of the current intercepting resistors is connected with the negative terminal P- of the charge-discharge interface, and the other end is connected with the chopper NMOS Q62, Q63 and the pulse width modulation chip U23, so as to feed back the charging current signal to the built-in comparator input end of the pulse width modulation chip U23.

[0079] The pulse width modulation module 54 includes the pulse width modulation chip U23 and the optocoupler P5, the pin 2 of the pulse width modulation chip U23 is connected with the data processing unit 20 to receive the signal LCC.SEL, the pin of the optocoupler P5 is connected with the data processing unit 20, and the pin 2 is connected with the pulse width modulation chip U23; when the pulse width modulation chip U23 fails, the optocoupler P5 is turned on, and the data processing unit 20 obtains the fault information.

[0080] Specifically, when the energy storage management system 100 needs a current limiting function, the data processing unit 20 issues an LCC.EN instruction, the power supply module 51 of the charge and discharge current limiting unit 50 provides a voltage, at the same time, the data processing unit 20 issues an instruction to control the drive module 42 to turn off the drive voltage of the charging part in the charge and discharge module 41, that is, to turn off Q24, the connection between MOS.COM and the negative end P- of the charge and discharge interface through the chopper module 52; further, after the LCC.12V voltage output, the NOMS tube Q64 is turned on, and the PMOS tube Q61 is turned on; further, the data processing unit 20 sends an LCC.SEL signal to the comparator input end of the pulse width modulation chip U23, sets the size of the limiting current, at this time the pulse width modulation chip U23 starts to output the PWM wave (LCC.PWM) to the gate drive chip U22; at this time, the gate drive chip U22 amplifies the input PWM signal (LCC.PWM) and outputs to drive the NMOS tubes Q62 and Q63, further, when the NMOS tubes Q62 and Q63 are closed, the inductor L6 stores energy, and when the NMOS tubes Q62 and Q63 are opened, the inductor L6 releases energy, because the current at both ends of the inductor L6 cannot be suddenly changed, the system will charge according to the set current. At the same time, when the NOMS tube Q64 is turned on, the PMOS tube Q61 is turned on, and the NMOS tubes Q62 and Q63 are closed, the current limiting resistor R275-R278 is equivalent to being connected to the positive end B+ of the energy storage device at one end and to the negative end P- of the charge and discharge interface at the other end, and the charging current can generate a voltage signal on the current limiting resistor, this signal ISEN is connected to the comparator input end of the pulse width modulation chip U23, and compared with the ADIM signal set by the data processing unit 20, the pulse width modulation chip U23 further adjusts the output PWM wave signal (LCC.PWM), and thus the charge and discharge current limiting unit 50 realizes negative feedback closed loop.

[0081] As shown in FIG. 1, the energy storage management system 100 includes an energy storage device 10, a charge and discharge unit 41, a charge and discharge current limiting unit 50, a data processing unit 20, and an analog front end 30. Figure 4 As shown in FIG. 1, the energy storage management system 100 includes an energy storage device 10, a charge and discharge unit 41, a charge and discharge current limiting unit 50, a data processing unit 20, and an analog front end 30.

[0082] In an embodiment, the data processing unit 20 is configured to obtain the sampling current value of the analog front end 30, and determine whether a preset overcurrent condition is met according to the sampling current value, and when the preset overcurrent condition is met, control the level of the first drive enable signal EN1 (DSGEN and CHGEN) to flip, so as to stop the drive module 42 from driving and controlling the charge and discharge module 41.

[0083] It can be understood that, in normal operation, DSGEN and CHGEN are both high, and when the data processing unit 20 determines that the sampling current value meets the preset overcurrent condition, the levels of DSGEN and CHGEN are pulled low to low, so that the driving module 42 stops driving control of the charge-discharge module 41. The data processing unit 20 determines that the sampling current value meets the preset overcurrent condition by software, which can be determined by a preset algorithm or a large data model, which is not limited here.

[0084] It can be understood that, as shown in Figure 1 and Figure 6b , the driving module 42 is configured to receive the second driving enable signal EN2 (DDSG and DCHG) of the analog front end 30, and send a driving signal to the charge-discharge module 41 according to the first driving enable signal EN1 (DSGEN and CHGEN) and the second driving enable signal EN2 (DDSG and DCHG) for driving control. That is, the driving module 42 must be enabled by the data processing unit 20 and the analog front end 30 at the same time to complete the driving.

[0085] In another embodiment, the analog front end 30 is configured to control the level of the second driving enable signal EN2 (DDSG and DCHG) to flip when the sampling current value is greater than the set overcurrent voltage threshold, so that the driving module 42 stops driving control of the charge-discharge module 41.

[0086] It can be understood that, in normal operation, DSGEN and CHGEN are both high, and when the data processing unit 20 determines that the sampling current value meets the preset overcurrent condition, the levels of DSGEN and CHGEN are pulled low to low, so that the driving module 42 stops driving control of the charge-discharge module 41. The data processing unit 20 determines that the sampling current value meets the preset overcurrent condition by software, which can be determined by a preset algorithm or a large data model, which is not limited here.

[0087] In combination with the above Figure 1 embodiment of FIG. 8, the embodiment of the present application mainly includes the following four overcurrent protection modes:

[0088] 1. Overcurrent protection of the anti-reverse connection module;

[0089] 2. Overcurrent protection of the charge-discharge current limiting unit;

[0090] 3. Software implementation of overcurrent protection by the data processing unit;

[0091] 4. Hardware implementation of overcurrent protection by the analog front end.

[0092] Among the above four types of overcurrent protection, in addition to the overcurrent protection of the anti-reverse connection module working independently, the overcurrent protection of the charge and discharge current limiting unit, the software-implemented overcurrent protection of the data processing unit, and the hardware-implemented overcurrent protection of the analog front end can be implemented in a certain order. For example, the overcurrent protection of the charge and discharge current limiting unit is first adopted. When the overcurrent protection of the charge and discharge current limiting unit fails, the software-implemented overcurrent protection of the data processing unit is adopted. When the software-implemented overcurrent protection of the data processing unit fails, the hardware-implemented overcurrent protection of the analog front end is adopted to implement mandatory protection. Therefore, through the above-mentioned multiple overcurrent protection measures, it can be achieved that when any overcurrent protection measure fails, other overcurrent protection measures can still be adopted to achieve overcurrent protection, thereby achieving lossless overcurrent protection of the energy storage management system and achieving multiple overcurrent protections without causing damage to the energy storage management system.

[0093] The functional unit 60 is introduced below. The functional unit 60 can be configured differently based on different usage environments of the energy storage management system 100. In one embodiment, the energy storage management system 100 is applied to a communication base station. The functional unit 60 is connected to the data processing unit 20. The functional unit 60 may include at least one of a communication circuit, an indicator circuit, a dry node circuit, a DIP switch circuit, a heating control circuit, a clock circuit, a data storage circuit, an anti-theft circuit, a temperature acquisition circuit, and a preventive voltage detection circuit.

[0094] The communication circuit may include a CAN communication circuit, a 485 communication circuit, and a 232 communication circuit. In one embodiment, the CAN communication circuit, the 485 communication circuit, and the 232 communication circuit all have an isolation module and an ESD protection module.

[0095] like Figure 9a As shown, Figure 9a This is a circuit diagram of a CAN communication circuit in an embodiment. The CAN communication circuit mainly includes a CAN isolation interface transceiver U1, a common-mode inductor L1, a TVS tube D1 and resistors and capacitors. One end of the CAN isolation interface transceiver U1 is connected to the data processing unit 20, and the other end is connected to the external communication interface through the common-mode inductor L1 and the TVS tube D1. The common-mode inductor L1 mainly filters out common-mode interference, and the TVS tube D1 is mainly an ESD protection device.

[0096] like Figure 9b As shown, Figure 9b This is a circuit diagram of a 485 communication circuit in an embodiment. The 485 communication circuit mainly includes a digital isolator U2, a 485 interface transceiver U3, a common-mode inductor L2, a TVS tube D2, an optocoupler P1, and a resistor and capacitor. One end of the digital isolator U2 is connected to the data processing unit 20, and the other end is connected to the 485 interface transceiver U3. The other end of the 485 interface transceiver U3 is connected to the external communication interface through the common-mode inductor L2 and the TVS tube D2.

[0097] As Figure 9c shown, Figure 9c is a circuit schematic diagram of the 232 communication circuit in an embodiment, the 232 communication circuit mainly includes a digital isolator U14, a 232 interface transceiver U13, a TVS tube D37 and a resistance-capacitance, one end of the digital isolator U14 is connected with the data processing unit 20, the other end is connected with the 232 interface transceiver U13, the other end of the U13 interface transceiver U3 is connected with the external communication interface through the TVS tube D3.

[0098] It can be understood that the above-mentioned CAN communication circuit, 485 communication circuit and 232 communication circuit mainly interact the data processed by the data processing unit 20 and the EEPROM with the external man-machine terminal to realize the information monitoring and the information storage.

[0099] Referring to Figure 10 , Figure 10 is a circuit schematic diagram of the indication circuit in an embodiment, the indication circuit mainly includes LED lamps D16, D18, D20, D22, D24, D26, TVS tubes D17, D19, D21, D23, D25, D27 and resistors R80-R85, one end of the LED indication lamp is connected with the VDD3V3 power supply voltage, the other end is connected with the data processing unit 20, wherein the TVS tubes D17, D19, D21, D23, D25, D27 mainly play an ESD protection role to prevent the LED indication lamp from being damaged by static electricity when a person touches the LED indication lamp, the resistors R80-R85 mainly play a current limiting role to prevent the LED indication lamp from being damaged by too large input current. Specifically, the LED indication lamp mainly feeds back the current SOC (state of charge) and working state of the energy storage device, when the energy storage management system 100 appears an abnormal state, the LED will flash red to alarm.

[0100] Referring to Figure 11 , Figure 11 is a circuit schematic diagram of the dry contact circuit in an embodiment, the dry contact circuit mainly includes a relay RLY1, a triode Q40 and a diode D44, the triode Q40 is connected with the data processing unit 20 through a resistor R136 to control and drive the relay RLY1; the pin 4 and the pin 5 of the relay RLY1 are connected in series to increase the load capacity of the relay. When the battery appears an alarm state, the data processing unit 20 sends a command to drive the relay RLY1 to act, which can further control the charge and discharge equipment to adjust the corresponding state.

[0101] Referring to Figure 12 , Figure 12Figure 1 is a circuit schematic diagram of a dial switch circuit in an embodiment, the dial switch circuit mainly comprises a dial switch SW2, one end of the dial switch SW2 is connected with a data processing unit 20 through a resistor, and the other end is directly connected with a system negative pole DGND. The dial switch can not only adjust the communication rate of the system through different switch states of dialing, but also can calibrate the serial number of the current system when a plurality of systems are used in parallel, so that unified management is more convenient.

[0102] Referring to Figure 13 , Figure 13 Figure 2 is a circuit schematic diagram of a buzzer circuit in an embodiment, the buzzer circuit mainly comprises a buzzer BZ1, a triode Q42 and a diode D47, the base (pin 1) of the triode Q42 is connected with the data processing unit 20 through a resistor R141, when a specified fault occurs in the system, the data processing unit 20 sends a PWM signal to drive the triode Q42 to be conductive, so that the buzzer buzzes to remind the user of the fault, and the user experience is better improved.

[0103] Referring to Figure 14 , Figure 14 Figure 3 is a circuit schematic diagram of a heating control circuit in an embodiment, the heating control circuit mainly comprises NMOS tubes Q41 and Q43, a three-terminal fuse F4, a diode D45, voltage stabilizing tubes D46 and D48, and an optical coupler P3; the gate of the NMOS tube Q41 is connected with the data processing unit 20 through the diode D45 and a resistor R138, the pin 3 of the three-terminal fuse is connected with the positive pole B+ of an energy storage device, the pin 2 is connected with a heating control positive pole HT.POS, and the pin 1 is connected with the drain of the NMOS tube Q41; the pin 2 of the optical coupler P3 is connected with the data processing unit 20, and the pin 3 is connected with the gate of the NMOS tube Q43, the source of the NMOS tube Q43 is connected with a negative pole P- of a charge-discharge interface, and the drain is connected with a heating control negative pole HT.NEG. Specifically, in order to ensure that the system can also normally operate under extremely cold conditions, the embodiment provides the heating driving circuit, when heating is needed, the data processing unit 20 sends a driving instruction, the NMOS tubes Q41 and Q43 are closed, and the positive pole B+ of the energy storage device and the negative pole P- of the charge-discharge interface provide a driving voltage for an external heating device.

[0104] Referring to Figure 15 , Figure 15Figure 1 is a circuit diagram of a clock circuit in an embodiment, which mainly comprises a clock chip U18, a crystal oscillator chip X2, a button battery holder and a button battery CN2, a Schottky diode D84, and an operational amplifier chip U17. The pin 5 and the pin 6 of the clock chip U18 are connected to the data processing unit 20, so that the clock chip U18 can obtain real-time time information. The button battery CN2 is mainly used to provide power supply for the clock chip U18 when the system is powered off and hibernated, so as to ensure that the clock chip can continuously work. The input end of the operational amplifier chip U17 is connected to the button battery, and the output end is connected to the data processing unit 20. The operational amplifier chip U17 can feedback real-time power data of the button battery to the data processing unit 20, and further feedback to the user, so as to improve the visual experience of the user.

[0105] Referring to Figure 16 , Figure 16 Figure 1 is a circuit diagram of a clock circuit in an embodiment, which mainly comprises a clock chip U18, a crystal oscillator chip X2, a button battery holder and a button battery CN2, a Schottky diode D84, and an operational amplifier chip U17. The pin 5 and the pin 6 of the clock chip U18 are connected to the data processing unit 20, so that the clock chip U18 can obtain real-time time information. The button battery CN2 is mainly used to provide power supply for the clock chip U18 when the system is powered off and hibernated, so as to ensure that the clock chip can continuously work. The input end of the operational amplifier chip U17 is connected to the button battery, and the output end is connected to the data processing unit 20. The operational amplifier chip U17 can feedback real-time power data of the button battery to the data processing unit 20, and further feedback to the user, so as to improve the visual experience of the user.

[0106] Referring to Figure 17 , Figure 17 Figure 1 is a circuit diagram of a clock circuit in an embodiment, which mainly comprises a clock chip U18, a crystal oscillator chip X2, a button battery holder and a button battery CN2, a Schottky diode D84, and an operational amplifier chip U17. The pin 5 and the pin 6 of the clock chip U18 are connected to the data processing unit 20, so that the clock chip U18 can obtain real-time time information. The button battery CN2 is mainly used to provide power supply for the clock chip U18 when the system is powered off and hibernated, so as to ensure that the clock chip can continuously work. The input end of the operational amplifier chip U17 is connected to the button battery, and the output end is connected to the data processing unit 20. The operational amplifier chip U17 can feedback real-time power data of the button battery to the data processing unit 20, and further feedback to the user, so as to improve the visual experience of the user.

[0107] Referring to Figure 18 , Figure 18 Figure 1 is a circuit diagram of a clock circuit in an embodiment, which mainly comprises a clock chip U18, a crystal oscillator chip X2, a button battery holder and a button battery CN2, a Schottky diode D84, and an operational amplifier chip U17. The pin 5 and the pin 6 of the clock chip U18 are connected to the data processing unit 20, so that the clock chip U18 can obtain real-time time information. The button battery CN2 is mainly used to provide power supply for the clock chip U18 when the system is powered off and hibernated, so as to ensure that the clock chip can continuously work. The input end of the operational amplifier chip U17 is connected to the button battery, and the output end is connected to the data processing unit 20. The operational amplifier chip U17 can feedback real-time power data of the button battery to the data processing unit 20, and further feedback to the user, so as to improve the visual experience of the user.

[0108] Referring to Figure 19 , Figure 19 Figure 1 is a circuit diagram of a clock circuit in an embodiment, which mainly comprises a clock chip U18, a crystal oscillator chip X2, a button battery holder and a button battery CN2, a Schottky diode D84, and an operational amplifier chip U17. The pin 5 and the pin 6 of the clock chip U18 are connected to the data processing unit 20, so that the clock chip U18 can obtain real-time time information. The button battery CN2 is mainly used to provide power supply for the clock chip U18 when the system is powered off and hibernated, so as to ensure that the clock chip can continuously work. The input end of the operational amplifier chip U17 is connected to the button battery, and the output end is connected to the data processing unit 20. The operational amplifier chip U17 can feedback real-time power data of the button battery to the data processing unit 20, and further feedback to the user, so as to improve the visual experience of the user.

[0109] The energy storage management system provided by the application comprises: a power supply unit connected with an energy storage device; a data processing unit connected with the power supply unit; an analog front end connected with the power supply unit, the energy storage device and the data processing unit, and configured to collect data of the energy storage device; and a low-side drive unit connected with the energy storage device, the data processing unit and a charge-discharge port, and configured to control charging and discharging of the energy storage device. The low-side drive unit comprises: a charge-discharge module connected with a negative terminal of the energy storage device and a negative terminal of the charge-discharge port; a drive module connected with the charge-discharge module and the data processing unit, and configured to receive a first drive enable signal of the data processing unit and send a drive signal to the charge-discharge module for drive control according to the first drive enable signal; and an anti-reverse connection module connected with the negative terminal of the charge-discharge port and the drive module, and configured to reverse the level of the first drive enable signal to stop the drive module from driving the charge-discharge module when it is detected that the voltage of the negative terminal of the charge-discharge port is greater than a set voltage threshold. In this way, the anti-reverse connection module can stop the drive module from driving the charge-discharge module when an external charger is reversely connected by detecting that the voltage of the negative terminal of the charge-discharge port is greater than the set voltage threshold. In addition, the anti-reverse connection module can also stop the drive module from driving the charge-discharge module when the charge-discharge circuit is overcurrent by detecting that the voltage of the negative terminal of the charge-discharge port is greater than the set voltage threshold. Therefore, the anti-reverse connection module can simultaneously prevent reverse connection and overcurrent, thereby protecting the entire energy storage management system and improving the safety and stability of the energy storage management system.

[0110] Referring to Figure 20 , Figure 20 FIG. 1 is a structural schematic diagram of an embodiment of an electronic device provided by the application. The electronic device 200 comprises an energy storage management system 100 as described in the above embodiments.

[0111] Optionally, the electronic device 200 further comprises an energy storage device, for example, a battery. Specifically, the battery can be a lithium iron phosphate battery, a ternary lithium battery or the like, which is not limited here.

[0112] In an application scenario, the electronic device 200 is a communication base station, which can be an indoor base station or an outdoor base station. For example, the energy storage management system 100 can simultaneously supply power to outdoor base stations and indoor base stations.

[0113] In several embodiments provided in the present application, it should be understood that the disclosed methods and devices can be implemented in other manners. For example, the embodiments of the device described above are merely schematic. For example, the division of the modules or units is merely logical function division. There can be another division manner for the actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In this way, the actual implementation can be divided into other forms.

[0114] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they can be located in one place, or they can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the present embodiment.

[0115] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can exist physically, or two or more units can be integrated into one unit. The integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0116] The above description is merely an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation using the content of the present application specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the present application.

Claims

1. An energy storage management system, characterized in that: The energy storage management system includes: A power supply unit, used for connecting to an energy storage device; a data processing unit connected to the power supply unit; an analog front end connected to the power supply unit, the energy storage device, and the data processing unit, the analog front end being configured to collect data from the energy storage device; the analog front end comprising a current acquisition circuit disposed between the negative terminal of the energy storage device and the negative terminal of the charging interface, the current acquisition circuit being configured to sample the current between the negative terminal of the energy storage device and the negative terminal of the charging interface to obtain a sampled current value; a low-side driver unit connected to the energy storage device, the data processing unit and the charge-discharge interface, wherein the low-side driver unit is configured to control the charge and discharge of the energy storage device; Wherein, the low-side driving unit includes: A charge and discharge module, connected to the negative terminal of the energy storage device and the negative terminal of the charge and discharge interface; a driving module connected to the charging and discharging module and the data processing unit, the charging and discharging module comprising a first switching tube and a second switching tube, the control end of the first switching tube being connected to the driving module, and the control end of the second switching tube being connected to the driving module; the driving module being configured to receive a first driving enable signal from the data processing unit and to send a driving signal to the charging and discharging module for driving control according to the first driving enable signal; An anti-reverse connection module, the anti-reverse connection module is used for anti-reverse connection and overcurrent protection, the anti-reverse connection module is connected to the negative end of the charge and discharge interface and the drive module, the anti-reverse connection module is configured to control the level of the first drive enable signal to be reversed when it detects that the voltage of the negative end of the charge and discharge interface is greater than the set voltage threshold, so that the drive module stops driving and controlling the charge and discharge module; the anti-reverse connection module includes: an optocoupler, the first end of the primary side of the optocoupler is connected to the negative end of the charge and discharge interface, the second end of the primary side of the optocoupler is connected to the positive end of the energy storage device, the first end of the secondary side of the optocoupler is configured to input a power supply signal, and the second end of the secondary side of the optocoupler is configured to output a reverse connection control signal; the drive module is configured to control the level of the first drive enable signal to be reversed according to the reverse connection control signal, so that the drive module stops driving and controlling the charge and discharge module; a charge and discharge current limiting unit connected to the second end of the second switching tube, the positive end of the energy storage device, the negative end of the charge and discharge interface, and the data processing unit, wherein the charge and discharge current limiting unit is configured to control the current at the second end of the second switching tube according to the current between the positive end of the energy storage device and the negative end of the charge and discharge interface under the control of the data processing unit; The data processing unit is configured to obtain the sampled current value of the analog front end, and determine whether a preset overcurrent condition is met according to the sampled current value; and when the preset overcurrent condition is met, control the level of the first drive enable signal to flip, so that the drive module stops driving and controlling the charge and discharge module; The driving module is configured to receive the second driving enable signal of the analog front end, and send a driving signal to the charging and discharging module for driving control according to the first driving enable signal and the second driving enable signal; The analog front end is configured to control the level of the second drive enable signal to flip when the sampled current value is greater than a set overcurrent voltage threshold, so that the drive module stops driving and controlling the charge and discharge module.

2. The energy storage management system according to claim 1, characterized in that: The first end of the first switch tube is connected to the negative end of the charge and discharge interface, the first end of the second switch tube is connected to the negative end of the energy storage device, and the second end of the second switch tube is connected to the second end of the first switch tube.

3. The energy storage management system according to claim 2, characterized in that: The charge and discharge current limiting unit includes: a power module connected to the data processing unit, wherein the power module is configured to provide a power signal under the control of the data processing unit; a chopper module connected to the second end of the second switch tube, the positive end of the energy storage device, and the negative end of the charge and discharge interface; a signal feedback module connected to the chopping module, the signal feedback module being configured to generate a feedback signal according to a current between the positive terminal of the energy storage device and the negative terminal of the charge and discharge interface; A pulse width modulation module is connected to the signal feedback module and the chopping module, and the pulse width modulation module is configured to generate a pulse width modulation signal according to the feedback signal, so that the chopping module controls the current of the second end of the second switching tube according to the pulse width modulation signal.

4. The energy storage management system according to claim 1, characterized in that: The energy storage management system also includes a functional unit connected to the data processing unit, and the functional unit includes at least one of a communication circuit, an indication circuit, a dry node circuit, a DIP switch circuit, a heating control circuit, a clock circuit, a data storage circuit, an anti-theft circuit, a temperature acquisition circuit, and a preventive voltage detection circuit.

5. An electronic device, characterized in that: The electronic device includes the energy storage management system according to any one of claims 1 to 4.

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