Miller capacitor trimming circuit and trimming method based on fuse trimming technology

Abstract

The application relates to the technical field of integrated circuits, in particular to a Miller capacitor trimming circuit and a trimming method based on a fuse trimming technology, wherein the Miller capacitor trimming circuit comprises a control circuit, an inverter, a transmission gate and a secondary trimming circuit; a primary fuse in the fuse control circuit is used to control the transmission gate to be opened so as to incorporate the secondary trimming circuit for trimming; the secondary trimming circuit comprises a plurality of groups of trimming units arranged in parallel, each trimming unit comprises a secondary capacitor and a secondary fuse arranged in series, and the capacitance values of the secondary capacitors in the trimming units are all different, so that the secondary capacitors incorporated into the circuit can be adjusted in the fuse trimming mode. By adopting the scheme, the stability and bandwidth of the chip can be ensured, the trimming risk can be reduced, the trimming effect can be improved, the stability of the chip is enhanced, and the qualified rate of the chip after tape-out can be effectively improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a Miller capacitor trimming circuit and a trimming method based on fuse trimming technology. BACKGROUND

[0002] In the field of integrated circuit design, an operational amplifier is one of the important devices for realizing signal amplification, filtering, conversion and other functions. With the development of process technology, the circuit performance requirements of the operational amplifier are becoming higher and higher, and the most basic and important requirement is the circuit stability. However, in the actual production process, due to the non-ideal factors of semiconductor manufacturing process, there will be a certain deviation between the actual output of the product and the established standard. Such random errors cannot be avoided by circuit design, nor can they be effectively predicted by simulation software, and will exist between chips at different positions on the wafer or between chips of different batches. Such errors may cause poor chip stability and oscillation of output signals, thereby reducing the yield of products.

[0003] The stability of the operational amplifier is closely related to the phase margin. The phase margin refers to the amount of phase change required for the system to go from a critical stable state to an unstable state in a closed-loop system. Under normal circumstances, in order to ensure the stability of the system, the phase margin should be controlled at about 60 degrees, and greater than 45 degrees. However, the phase margin and the bandwidth are in a trade-off relationship, that is, increasing the phase margin will lead to a decrease in bandwidth, and increasing the bandwidth will reduce the phase margin. Therefore, during the circuit design stage, the phase margin needs to be reasonably designed under the premise of meeting the stability condition and sufficient bandwidth.

[0004] At present, in order to ensure that the chip has sufficient phase margin after tape-out, a large Miller compensation capacitor is usually designed in the circuit. The Miller compensation capacitor can increase the phase margin of the system, thereby improving the stability of the system. Then, through the fuse trimming technology, the size of the Miller compensation capacitor is reduced to achieve a balance between stability and bandwidth. However, this trimming method has certain risks. First, the trimming effect may not be good, resulting in the stability and bandwidth of the chip not meeting the expected requirements; second, if the trimming amount is too large, it may lead to trimming failure, making the chip unusable.

[0005] In summary, the existing operational amplifier design method has the problems of trimming risk and poor effect while ensuring stability and bandwidth. Therefore, it is urgent to provide a Miller capacitor trimming circuit and a trimming method based on fuse trimming technology, which can not only ensure the stability and bandwidth of the chip, but also reduce the trimming risk and improve the trimming effect. SUMMARY

[0006] The application provides a Miller capacitor trimming circuit and a trimming method based on a fuse trimming technology, which can ensure the stability and bandwidth of a chip, reduce trimming risks, and improve trimming effects.

[0007] The application provides a basic scheme I:

[0008] The application provides a Miller capacitor trimming circuit based on a fuse trimming technology, which comprises a control circuit, an inverter, a transmission gate, and a secondary trimming circuit.

[0009] The control circuit comprises a positive power supply high potential, a trimming resistor, a primary fuse, and a negative power supply low potential; one end of the trimming resistor is connected with the positive power supply high potential, and the other end is connected with the primary fuse and the input end of the inverter; the other end of the primary fuse is connected with the negative power supply low potential.

[0010] The input end of the inverter is further connected with the positive control end of the transmission gate, and the output end is connected with the reverse control end of the transmission gate; the input end of the transmission gate is connected with the noninverted input end of the device to be trimmed.

[0011] One end of the secondary trimming circuit is connected with the output end of the transmission gate, and the other end is connected with the inverted input end of the device to be trimmed; the secondary trimming circuit comprises a plurality of groups of trimming units arranged in parallel, each trimming unit comprises a secondary capacitor and a secondary fuse arranged in series, and the capacitance values of the secondary capacitors in each trimming unit are different.

[0012] The principle and advantages of the basic scheme I are as follows: in the trimming circuit, the noninverted input end of the device to be trimmed is connected with the input end of the transmission gate, and the inverted input end of the device to be trimmed is connected with the secondary trimming circuit; the primary fuse in the fuse control circuit, the input end of the inverter is high potential 1, which is connected to the positive control end of the transmission gate, and the output end is low potential 0, which is connected to the reverse control end of the transmission gate, the transmission gate is turned on, and the equivalent resistance of the transmission gate and the secondary capacitor in the secondary trimming circuit are integrated into the device to be trimmed. Thus, the further adjustment of the Miller compensation capacitor can be realized through each parallel trimming unit in the secondary trimming circuit, the fine adjustment of the Miller compensation capacitor can be realized by selectively fusing part of the secondary fuses to adjust the secondary capacitors integrated into the circuit, the stability and bandwidth of the chip can be ensured, the trimming risks can be reduced, and the trimming effects can be improved.

[0013] Further, the secondary trimming circuit comprises three groups of trimming units arranged in parallel, and the capacitance values of the secondary capacitors in each trimming unit are in a ratio of 1:2:4.

[0014] Beneficial effects: Set three groups of capacitor value ratio 1:2:4 of two-level capacitors, set unit capacitance value as f, then the capacitance values of two-level capacitors in the first group, the second group and the third group are f, 2f and 4f respectively, when fusing the two-level capacitors, there are 7 combination modes. If the two-level fuses in the second group and the third group are fused, then the size of the trimming capacitor connected is f; if the two-level fuses in the first group and the third group are fused, then the size of the trimming capacitor connected is 2f; if the two-level fuse in the third group is fused, then the size of the trimming capacitor connected is 3f; if the two-level fuses in the first group and the second group are fused, then the size of the trimming capacitor connected is 4f; if the two-level fuse in the second group is fused, then the size of the trimming capacitor connected is 5f; if the two-level fuse in the first group is fused, then the size of the trimming capacitor connected is 6f; if the two-level fuses are not fused, then the size of the trimming capacitor connected is 7f. Thus, a plurality of connected capacitor size options can be provided by the least number of two-level capacitors, the area of the two-level trimming circuit in the capacitor trimming circuit is reduced, and the capacitor trimming efficiency is improved.

[0015] Further, the sheet resistance of the trimming resistor is greater than the preset resistance value.

[0016] Beneficial effects: The resistance value of the trimming resistor per unit area is greater than the preset resistance value, the sheet resistance is large, the static current added when not joining the trimming can be reduced, the layout design area is saved, and integrated design is beneficial.

[0017] The application provides a trimming method based on a fuse trimming technology, and the method uses the Miller capacitor trimming circuit.

[0018] S100, connect the inverting input end of the device to be trimmed with the input end of the transmission gate, and connect the non-inverting input end of the device to be trimmed with the two-level trimming circuit.

[0019] S200, fuse the primary fuse, and adjust the transmission gate from the off state to the on state.

[0020] S300, obtain the capacitance values of the two-level capacitors and the to-be-merged capacitance value of the device to be trimmed.

[0021] S400, according to the capacitance values of the two-level capacitors and the to-be-merged capacitance value of the device to be trimmed, analyze whether to fuse the two-level fuses in each trimming unit respectively.

[0022] The principle and advantages of the second basic scheme are that the inverse input end of the device to be trimmed is connected with the input end of the transmission gate by using the trimming circuit, and the non-inverted input end of the device to be trimmed is connected with the second trimming circuit; the first fuse in the fuse control circuit is blown, the transmission gate is adjusted from the off state to the on state, and the equivalent resistance of the transmission gate and the second capacitor in the second trimming circuit are connected into the device to be trimmed. Thus, the further adjustment of the Miller compensation capacitor can be realized by the trimming units in parallel in the second trimming circuit, and the second capacitor in the connecting circuit can be selectively blown by blowing the second fuse according to the capacitance value of each second capacitor and the capacitance value to be connected into the device to be trimmed, so as to realize the fine adjustment of the Miller compensation capacitor, ensure the stability and bandwidth of the chip, reduce the trimming risk, and improve the trimming effect.

[0023] Further, the device to be trimmed is a second-order operational amplifier.

[0024] The second-order operational amplifier comprises a first-order amplifier and a second-order amplifier arranged in series, and the second-order amplifier is connected in parallel with an original trimming circuit, wherein the original trimming circuit comprises an original Miller compensation capacitor and an original compensation resistor arranged in series.

[0025] The input end of the second-order amplifier is connected with the inverse input end, and the output end is connected with the non-inverted input end.

[0026] Further, in S200, the transmission gate is adjusted from the off state to the on state, the transmission gate and the second trimming circuit arranged in series are connected in parallel with the second-order amplifier, and the impedance Z X-Y from the inverse input end to the non-inverted input end is calculated as follows:

[0027]

[0028] In the formula, C m is the original Miller compensation capacitor, R m is the original compensation resistor, C' m is the capacitance when all the second capacitors in the second trimming circuit are connected, R TG is the equivalent resistance of the transmission gate, and s is a complex impedance.

[0029] Beneficial effects: After the transmission gate is adjusted from the off state to the on state, each second capacitor in the second trimming circuit and the original Miller compensation capacitor jointly increase the Miller compensation capacitor.

[0030] Further, in S200, the equivalent resistance R TG of the transmission gate after being turned on satisfies the following formula:

[0031]

[0032] In the formula, g mLThe output stage transconductance of the two-stage operational amplifier 01 The output resistance of the first stage amplifier. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 The circuit diagram of the traditional two-stage operational amplifier with a compensation structure.

[0034] Figure 2 The schematic diagram of the traditional two-stage operational amplifier with a compensation structure.

[0035] Figure 3 The circuit diagram of the Miller capacitor trimming circuit based on the fuse trimming technology.

[0036] Figure 4 The port setting schematic diagram of the in-phase input terminal and the anti-phase input terminal in the Miller capacitor trimming circuit based on the fuse trimming technology.

[0037] Figure 5 The structure diagram of the equivalent two-stage operational amplifier in the Miller capacitor trimming circuit based on the fuse trimming technology.

[0038] Figure 6 The flowchart of the trimming method based on the fuse trimming technology. DETAILED DESCRIPTION

[0039] The following will be further described in detail through specific embodiments:

[0040] Embodiment 1:

[0041] The circuit diagram of the traditional two-stage operational amplifier with a compensation structure. m The circuit diagram of the traditional two-stage operational amplifier with a compensation structure. m is shown in Figure 1 , the original Miller compensation capacitor C m and the original compensation resistor R m are connected in series and connected in parallel between the input terminal and the output terminal of the second stage amplifier in the traditional two-stage operational amplifier, and the transfer function of the traditional compensation structure is as follows:

[0042]

[0043] In the formula, g m1 is the transconductance of the output stage of the first stage amplifier, g mL is the transconductance of the output stage of the second stage amplifier, R o1 is the output resistance of the first stage amplifier, R L is the total output resistance of the second stage amplifier, C m is the original Miller compensation capacitor, R m is the original compensation resistor, and s is.

[0044] From the above formula, increasing the original Miller compensation capacitor C m , can reduce the main pole, improve the phase margin, so that the traditional original operational amplifier has good stability.

[0045] When simulating at different process angles, the phase margin will deviate from the expected value due to the deviation of the process angle. In order to compensate for the insufficient phase margin caused by process deviation and random error, a large Miller capacitor is usually reserved for the chip, and the chip is adjusted accordingly in the later stage.

[0046] Common adjustment methods include fuse adjustment, laser adjustment, and digital adjustment. Considering factors such as cost reduction and area saving, fuse adjustment is a relatively simple and commonly used adjustment method. The specific adjustment structure is as shown in Figure 2 : On the basis of the original Miller compensation capacitor, a plurality of small capacitors C m 1' and C m 2' are connected in parallel. In this embodiment, two small capacitors C m 1' and C m 2' are connected in series with a fuse Fuse1' and Fuse2', respectively. When adjusting the circuit using the above adjustment structure, according to the actual test situation, it is determined whether to blow the fuse and how many fuses to blow, and the size of the Miller compensation capacitor is determined by balancing the phase margin and bandwidth. However, this method has drawbacks. If the adjusted capacitor is too large, the adjusted Miller capacitor may be too small, the phase margin may not be sufficient, the chip may not be stable, and oscillation may occur. In order to ensure sufficient adjustment range, a large number of capacitors are required, which increases the chip area and the cost of adjustment.

[0047] To solve the above technical problems, the Miller capacitor adjustment circuit based on the fuse adjustment technology provided in this embodiment can select whether to adjust the Miller compensation capacitor according to the actual test situation, and can ensure the stability and bandwidth of the chip while reducing the adjustment risk and improving the adjustment effect.

[0048] As shown in Figure 3 , the Miller capacitor adjustment circuit includes a control circuit, an inverter NOT, a transmission gate TG, and a secondary adjustment circuit.

[0049] The control circuit includes a positive power supply high potential VDD, an adjustment resistor R, a primary fuse Fuse4, and a negative power supply low potential VSS. One end of the adjustment resistor R is connected to the positive power supply high potential VDD, and the other end is connected to the primary fuse Fuse4 and the input end of the inverter NOT. The other end of the primary fuse Fuse4 is connected to the negative power supply low potential VSS.

[0050] The input terminal of the inverter NOT is also connected to the positive control terminal of the transmission gate TG, and the output terminal is connected to the inverting control terminal of the transmission gate TG; the input terminal of the transmission gate TG is connected to the inverting input terminal of the device to be adjusted. In this embodiment, the device to be adjusted is a two-stage operational amplifier, such as... Figure 4 As shown, the second-stage operational amplifier has a non-inverting input terminal Y and an inverting input terminal X.

[0051] One end of the secondary adjustment circuit is connected to the output of the transmission gate TG, and the other end is connected to the non-inverting input of the device to be adjusted. The secondary adjustment circuit includes several sets of adjustment units connected in parallel. Each adjustment unit includes a secondary capacitor and a secondary fuse connected in series. The capacitance values ​​of the secondary capacitors in each adjustment unit are different. In this embodiment, the secondary adjustment circuit includes three sets of adjustment units connected in parallel. The first adjustment unit includes a secondary capacitor C connected in series. m 1 and secondary fuse Fuse1; the second adjustment unit includes a secondary capacitor C connected in series. m 2 and secondary fuse Fuse2; the third trimming unit includes a secondary capacitor C connected in series. m 3 and secondary fuse 3. The capacitance ratio of the secondary capacitors in each adjustment unit is 1:2:4. In other embodiments of this application, multiple sets of adjustment units can be used to improve the adjustable range.

[0052] In practical applications, the two-stage operational amplifier and the Miller capacitor adjustment circuit are connected via terminals X and Y. If the first-stage fuse Fuse4 is not blown, the input terminal of the inverter NOT is at a low potential (0), connected to the positive control terminal of the transmission gate TG, and the output terminal is at a high potential (1), connected to the inverting control terminal of the transmission gate TG. With the transmission gate TG not open, the equivalent impedance of the transmission gate approaches infinity, and the transmission gate is open-circuited. At this time, the compensation circuit... Figure 1 The circuit shown is the same as the traditional compensation circuit, except for the original Miller compensation capacitor C. m With the original compensation resistor R m However, there is an additional quiescent current I. s ′:

[0053]

[0054] In the formula, VDD is the high potential of the positive power supply, VSS is the low potential of the negative power supply, and R is the adjustment resistor.

[0055] To reduce the static power consumption caused by the adjustment resistor R, a resistor with a resistance value greater than 15K should be selected. In this embodiment, a resistor with a resistance value of 20K is selected. Simultaneously, to reduce the chip area, the resistance value per unit area of ​​the adjustment resistor is greater than a preset resistance value; that is, a resistor with a large sheet resistance is selected as the adjustment resistor. The preset resistance value is 2K, but in this embodiment, a doped resistor with a sheet resistance of 3K is selected to ensure that the additional static current generated by the adjustment resistor is less than five percent of the total static current value, thus reducing the impact on the total static current.

[0056] If the first-stage fuse Fuse4 blows, the input terminal of the inverter NOT will be at a high potential (1) and connected to the positive control terminal of the transmission gate TG. The output terminal will be at a low potential (0) and connected to the inverting control terminal of the transmission gate TG. The transmission gate TG will then open, and the equivalent impedance R of the transmission gate will... TG With a capacitance of 300 ohms, the transmission gate is turned on. The compensation circuit at this time includes the original Miller compensation capacitor C. m Original compensation resistor R m The parallel-connected secondary capacitor C m 1. C m 2. C m 3. The equivalent impedance R of the transmission gate TG .like Figure 4 As shown, the two-stage operational amplifier includes a first-stage amplifier and a second-stage amplifier connected in series. A primary tuning circuit is connected in parallel to the second-stage amplifier. The primary tuning circuit includes a primary Miller compensation capacitor C connected in series. m and the original compensation resistor R m The transmission gate and the second-stage tuning circuit, which are connected in series, are also connected in parallel between the input and output of the second-stage amplifier.

[0057] Figure 5 The diagram shows the equivalent circuit diagram of a two-stage operational amplifier after incorporating a Miller capacitor adjustment circuit. The impedance Z from the inverting input to the non-inverting input is shown. X-Y The calculation formula is as follows:

[0058]

[0059] In the formula, C m For the original Miller compensation capacitor, R m For the original compensation resistor, C' m R is the capacitance when all secondary capacitors are connected in the secondary adjustment circuit. TG is the equivalent resistance of the transmission gate, and s is the complex impedance.

[0060] Because of C m and C' m The order of magnitude is pF, therefore C m C' m R TG+C’ m C m R m <<C m +C’ m , the above formula is transformed into:

[0061]

[0062] Since C m and C' m are of the order of pF, and the resistance values of R m and R TG are both less than 1000 ohms, C m R m C' m R TG <<1, the following formula is obtained:

[0063]

[0064] After the Miller capacitance trimming circuit is opened, the Miller compensation circuit of the two-stage operational amplifier is equivalent to an equivalent Miller compensation capacitor C m总 =C m +C' m , in series with an equivalent compensation resistor

[0065] As can be seen from the above derivation, the total Miller compensation capacitor C m总 after trimming is increased, which realizes the increase of the Miller compensation capacitor, improves the phase margin, and improves the chip stability. To ensure that the zero point of the two-stage operational amplifier is an LHP zero point and the second pole is large enough, without affecting the bandwidth, the equivalent compensation resistor R' m should satisfy: where g mL is the transconductance of the output stage of the second stage amplifier, and R o1 is the output resistance of the first stage amplifier. Therefore, the equivalent resistance R TG after the transmission gate is turned on should satisfy:

[0066] In this embodiment, three groups of secondary capacitors with a capacitance ratio of 1:2:4 are provided, and the unit capacitance value is f, so the capacitance values of the secondary capacitors in the first group, the second group, and the third group are f, 2f, and 4f, respectively. By selecting whether to fuse the secondary fuses corresponding to the three parallel secondary capacitors, the size of the trimming capacitor added can be changed. Specifically, when fusing each secondary capacitor, there are 7 combinations. If the secondary fuses in the second group and the third group are fused, the size of the trimming capacitor added is f; if the secondary fuses in the first group and the third group are fused, the size of the trimming capacitor added is 2f; if the secondary fuse in the third group is fused, the size of the trimming capacitor added is 3f; if the secondary fuses in the first group and the second group are fused, the size of the trimming capacitor added is 4f; if the secondary fuse in the second group is fused, the size of the trimming capacitor added is 5f; if the secondary fuse in the first group is fused, the size of the trimming capacitor added is 6f; and if no secondary fuse is fused, the size of the trimming capacitor added is 7f. In this way, a variety of access capacitor sizes can be provided by using the least number of secondary capacitors, reducing the area of the secondary trimming circuit in the capacitor trimming circuit, and improving the capacitor trimming efficiency.

[0067] It should be noted that when the present application is applied to the example, two factors need to be considered. One is the selection of the unit capacitance value f in the secondary trimming circuit, and the other is the size of the equivalent resistance R TG after the transmission gate is turned on. The size of the unit capacitance value f needs to be reasonably set according to the actual situation, and this embodiment does not limit it. The size of the equivalent resistance R TG after the transmission gate is turned on needs to meet the above requirements to maximize the benefits of the Miller capacitor trimming circuit in this embodiment.

[0068] By using the Miller capacitor trimming circuit in this embodiment, the further adjustment of the Miller compensation capacitor can be realized by each parallel trimming unit in the secondary trimming circuit, and the secondary capacitor added to the circuit can be adjusted by selectively fusing part of the secondary fuses, thereby realizing the fine adjustment of the Miller compensation capacitor, ensuring the stability and bandwidth of the chip, reducing the trimming risk, and improving the trimming effect.

[0069] Embodiment 2:

[0070] A trimming method based on the fuse trimming technology uses the above-mentioned Miller capacitor trimming circuit; as Figure 6 shown, comprising the following steps:

[0071] S100, connect the inverting input terminal of the device to be adjusted to the input terminal of the transmission gate, and connect the non-inverting input terminal of the device to be adjusted to the secondary adjustment circuit; in this embodiment, the device to be adjusted is a secondary operational amplifier; the secondary operational amplifier includes a first-stage amplifier and a second-stage amplifier connected in series, and the original adjustment circuit is connected in parallel on the second-stage amplifier, the original adjustment circuit includes an original Miller compensation capacitor and an original compensation resistor connected in series; the input terminal of the second-stage amplifier is connected to the inverting input terminal, and the output terminal is connected to the non-inverting input terminal.

[0072] S200 blows the primary fuse, switching the transmission gate from the open to the on state; at this time, the compensation circuit includes the original Miller compensation capacitor C. m Original compensation resistor R m The parallel-connected secondary capacitor C m 1. C m 2. C m 3. The equivalent impedance R of the transmission gate TG .like Figure 4 As shown, the second-stage operational amplifier includes a first-stage amplifier and a second-stage amplifier connected in series. The second-stage amplifier has an original adjustment circuit connected in parallel. The original adjustment circuit includes an original Miller compensation capacitor and an original compensation resistor connected in series. The transmission gate and the second-stage adjustment circuit, which are connected in series, are also connected in parallel between the input and output terminals of the second-stage amplifier.

[0073] The impedance Z from the inverting input to the non-inverting input X-Y The calculation formula is as follows:

[0074]

[0075] In the formula, C m For the original Miller compensation capacitor, R m For the original compensation resistor, C' m R is the capacitance when all secondary capacitors are connected in the secondary adjustment circuit. TG is the equivalent resistance of the transmission gate, and s is the complex impedance.

[0076] Because of C m and C' m The order of magnitude is pF, therefore C m C' m R TG +C' m C m R m < <C m +C m The above equation can be transformed into:

[0077]

[0078] Again, since C m and C' m are of the order of pF, and R m and R TG are both less than 1000 ohms, C m R m C' m R TG <<1, we have:

[0079]

[0080] After opening the Miller capacitance trimming circuit, the Miller compensation circuit of the two-stage operational amplifier is equivalent to an equivalent Miller compensation capacitor: C m总 =C m +C' m , in series with an equivalent compensation resistor R'

[0081] As can be seen from the above derivation, the total Miller compensation capacitor C m总 after trimming is increased, which realizes the increase of the Miller compensation capacitor, improves the phase margin, and improves the stability of the chip. To ensure that the zero point of the two-stage operational amplifier is an LHP zero point and the second pole is large enough, without affecting the bandwidth, the equivalent compensation resistor R' m should satisfy: where g mL is the transconductance of the output stage of the second stage amplifier, and R o1 is the output resistance of the first stage amplifier. Thus, the equivalent resistance R TG after the transmission gate is turned on should satisfy:

[0082] S300, obtain the capacitance values of the two-stage capacitors and the to-be-merged capacitance value of the device to be trimmed; in this embodiment, three sets of two-stage capacitors with capacitance value ratios of 1:2:4 are set, and the unit capacitance value is f, so the capacitance values of the two-stage capacitors in the first group, the second group, and the third group are f, 2f, and 4f respectively; the to-be-merged capacitance value is one of f, 2f, 3f, 4f, 5f, 6f, and 7f.

[0083] S400, according to the capacitance value of each secondary capacitor and the to-be-merged capacitance value of the to-be-adjusted device, whether to blow each secondary fuse in the adjustment unit is analyzed respectively. The to-be-merged capacitance value corresponds to the size of the adjustment capacitor accessed. Specifically, if the secondary fuses in the second group and the third group are blown, the size of the adjustment capacitor accessed is f; if the secondary fuses in the first group and the third group are blown, the size of the adjustment capacitor accessed is 2f; if the secondary fuses in the third group are blown, the size of the adjustment capacitor accessed is 3f; if the secondary fuses in the first group and the second group are blown, the size of the adjustment capacitor accessed is 4f; if the secondary fuses in the second group are blown, the size of the adjustment capacitor accessed is 5f; if the secondary fuses in the first group are blown, the size of the adjustment capacitor accessed is 6f; if each secondary fuse is not blown, the size of the adjustment capacitor accessed is 7f. Thus, a plurality of access capacitor size options can be provided by the least number of secondary capacitors, the area of the secondary adjustment circuit in the capacitor adjustment circuit is reduced, and the capacitor adjustment efficiency is improved.

[0084] The above is only an embodiment of the present application, and the common knowledge of specific structures and properties in the scheme is not described in detail. The person skilled in the art knows all the common technical knowledge in the field of the application before the application date or the priority date, can know all the prior art in the field, and has the ability to apply conventional experimental means before that date. The person skilled in the art can improve and implement the present scheme based on their own ability under the guidance of the present application, and some typical known structures or known methods should not be an obstacle for the person skilled in the art to implement the present application. It should be noted that for those skilled in the art, without departing from the structure of the present application, a number of modifications and improvements can be made, which should also be considered as the protection scope of the present application, and these will not affect the effect and practicality of the present application. The protection scope of the present application should be subject to the content of its claims, and the specific implementation mode in the specification can be used to explain the content of the claims.

Claims

1. A Miller capacitor adjustment circuit based on fuse adjustment technology, characterized in that: Includes control circuitry, inverters, transmission gates, and a two-stage trimming circuit. The control circuit includes a positive power supply at a high potential, a trimming resistor, a primary fuse, and a negative power supply at a low potential; one end of the trimming resistor is connected to the positive power supply at a high potential, and the other end is connected to both the primary fuse and the input terminal of the inverter; the other end of the primary fuse is connected to the negative power supply at a low potential. The input terminal of the inverter is also connected to the positive control terminal of the transmission gate, and the output terminal is connected to the negative control terminal of the transmission gate; the input terminal of the transmission gate is connected to the inverting input terminal of the device to be adjusted. One end of the secondary adjustment circuit is connected to the output terminal of the transmission gate, and the other end is connected to the non-inverting input terminal of the device to be adjusted. The secondary adjustment circuit includes several sets of adjustment units arranged in parallel. Each adjustment unit includes a secondary capacitor and a secondary fuse arranged in series. The capacitance value of the secondary capacitor in each adjustment unit is different. The secondary adjustment circuit includes three sets of adjustment units connected in parallel, and the capacitance ratio of the secondary capacitors in each adjustment unit is 1:2:

4. The sheet resistance of the adjustment resistor is greater than a preset resistance value, which is 2K.

2. A trimming method based on fuse trimming technology, characterized in that: The Miller capacitance adjustment circuit described in claim 1 is used; the process includes the following steps: S100: Connect the inverting input terminal of the device to be adjusted to the input terminal of the transmission gate, and connect the non-inverting input terminal of the device to be adjusted to the secondary adjustment circuit. S200, blows the primary fuse, changing the transmission gate from the open state to the on state; S300, obtain the capacitance value of each secondary capacitor and the capacitance value to be connected to the device to be adjusted; S400, based on the capacitance value of each secondary capacitor and the capacitance value to be connected to the device to be repaired, analyze whether the secondary fuse in each repair unit has blown.

3. The adjustment method based on fuse adjustment technology according to claim 2, characterized in that: The device to be repaired is a two-stage operational amplifier; The second-stage operational amplifier includes a first-stage amplifier and a second-stage amplifier connected in series. The second-stage amplifier has an original adjustment circuit connected in parallel. The original adjustment circuit includes an original Miller compensation capacitor and an original compensation resistor connected in series. The input terminal of the second-stage amplifier is connected to the inverting input terminal, and the output terminal is connected to the non-inverting input terminal.

4. The adjustment method based on fuse adjustment technology according to claim 3, characterized in that: In S200, the transmission gate is adjusted from the off state to the on state. The transmission gate and the second-stage adjustment circuit, which are connected in series, are connected in parallel with the second-stage amplifier. The impedance Z from the inverting input terminal to the non-inverting input terminal is... X-Y The calculation formula is as follows: In the formula, C m For the original Miller compensation capacitor, R m For the original compensation resistor, C m 'G' is the capacitance when all secondary capacitors are connected in the secondary adjustment circuit. TG is the equivalent resistance of the transmission gate, and s is the complex impedance.

5. The adjustment method based on fuse adjustment technology according to claim 4, characterized in that: In S200, the equivalent resistance R after the transmission gate is turned on TG Satisfy the following formula: In the formula, g mL R is the output stage transconductance of the two-stage operational amplifier. 01 This is the output resistance of the first-stage amplifier.

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