Display substrate and display device

Abstract

The display substrate and the display device are provided. The display substrate comprises a substrate, the substrate comprises an IC (integrated circuit) region, the IC region comprises a first electrode arrangement region and a first transistor arrangement region; the display substrate comprises a plurality of rows and columns of first touch electrodes arranged in the first electrode arrangement region, and a plurality of first transfer transistors arranged in the first transistor arrangement region; the first touch electrodes are electrically connected to the corresponding first transfer transistors; and a normal projection of the display data access electrode on the substrate does not overlap with a normal projection of the first touch electrode on the substrate. The display substrate and the display device can reasonably arrange the touch electrodes when the number of the touch electrodes increases.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a display substrate and a display device. Background Technology

[0002] In related technologies, touch display integrated circuits (TDDI) have been widely used in display products such as mobile phones, tablets, and desktop displays. For display product performance, improvements mainly focus on resolution and touch performance. The most direct way to improve the touch performance of an IC is to increase the number of touch channels within a single IC, i.e., to increase the number of touch electrode traces. However, this results in the touch electrode traces occupying too much space and cannot be rationally laid out. Summary of the Invention

[0003] In one aspect, embodiments of this disclosure provide a display substrate, including a substrate, the substrate including an IC region, the IC region including a first electrode setting region and a first transistor setting region;

[0004] The display substrate includes multiple rows and columns of first touch electrodes disposed in the first electrode setting area, and multiple first transition transistors disposed in the first transistor setting area;

[0005] The first touch electrode is electrically connected to the corresponding first transfer transistor;

[0006] The orthographic projection of the display data access electrode on the substrate does not overlap with the orthographic projection of the first touch electrode on the substrate.

[0007] Optionally, the IC region may further include a fan-out region;

[0008] The first touch electrode is electrically connected to the first electrode of the corresponding first transition transistor via a connecting line disposed in the fan-out region, and the second electrode of the first transition transistor is electrically connected to a first voltage line for providing a common electrode voltage.

[0009] Optionally, a plurality of first transition transistor arrays are arranged in the first transistor setting area.

[0010] Optionally, the display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate.

[0011] The first touch electrode is formed on the source / drain metal layer, the gate of the first transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the first transition transistor are formed on the source / drain metal layer, and the active layer pattern of the first transition transistor is formed on the semiconductor layer.

[0012] Optionally, the display substrate further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate.

[0013] The first touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a first transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

[0014] Optionally, the first voltage line is formed in the gate metal layer;

[0015] The second electrode of the first transfer transistor is electrically connected to the first voltage line through a second transfer portion formed on the conductive layer.

[0016] Optionally, the IC region may further include a second electrode setting region;

[0017] The display substrate further includes multiple rows of electrode groups disposed in the second electrode setting area;

[0018] The electrode group in one row includes multiple second touch electrodes and multiple display data access electrodes; in the electrode group in one row, the touch electrodes and the display data access electrodes are alternately arranged.

[0019] Optionally, in one row of the electrode group, a second touch electrode and at least two display data access electrodes are alternately arranged.

[0020] Optionally, in adjacent row electrode groups, the second touch electrode is located in a different column.

[0021] Optionally, the IC region may further include a second transistor placement region;

[0022] The display substrate includes a plurality of second transition transistors disposed in the second transistor setting area;

[0023] The second touch electrode is electrically connected to the first electrode of the corresponding second transfer transistor, and the second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage.

[0024] Optionally, the plurality of second transition transistors are located in the same row.

[0025] Optionally, the display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate.

[0026] The second touch electrode is formed on the source / drain metal layer, the gate of the second transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the second transition transistor are formed on the source / drain metal layer, and the active layer pattern of the second transition transistor is formed on the semiconductor layer. The display data access electrode is formed on the gate metal layer or the source / drain metal layer.

[0027] Optionally, the display substrate further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate.

[0028] The second touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a third transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

[0029] Optionally, the display data access electrode is electrically connected to the second electrode pin of the touch display integrated circuit through a fourth adapter formed on the conductive layer, and the touch display integrated circuit is used to provide a corresponding data voltage through the second electrode pin.

[0030] Optionally, the second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage via a fifth transfer portion formed in the conductive layer.

[0031] Optionally, the gates of the plurality of first transition transistors and the gates of the plurality of second transition transistors are integrally formed.

[0032] Optionally, on the side of the first electrode setting area away from the second electrode setting area, the IC area further includes a dummy electrode setting area;

[0033] The display substrate also includes a plurality of dummy electrodes disposed in the dummy electrode setting area, and the dummy electrodes are not connected to signals.

[0034] Optionally, the display substrate includes a gate metal layer, a semiconductor layer, a source / drain metal layer, and a conductive layer arranged sequentially along a direction away from the substrate.

[0035] The dummy electrode is formed on the source / drain metal layer or the gate metal layer;

[0036] The dummy electrode is electrically connected to the sixth transition portion formed on the conductive layer, and the sixth transition portion does not receive signals.

[0037] In a second aspect, embodiments of this disclosure provide a display device including the display substrate described above. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the layout of the source and drain metal layers in the first electrode setting region B1;

[0039] Figure 2 This is a schematic diagram of the layout of the conductive layer in the first electrode setting area B1;

[0040] Figure 3 yes Figure 1 The source / drain metal layers shown are Figure 2 A schematic diagram of the layout after the conductive layers are stacked.

[0041] Figure 4 This is a schematic diagram of the first transfer transistor and the first voltage line portion disposed in the first transistor setting area W1;

[0042] Figure 5 yes Figure 4 Layout diagram of the gate metal layer in the middle;

[0043] Figure 6 yes Figure 4 Layout diagram of the source and drain metal layers in the image;

[0044] Figure 7 yes Figure 4 Layout diagram of the semiconductor layer in the diagram;

[0045] Figure 8 yes Figure 4 A schematic diagram of the superposition of source / drain metal layers and semiconductor layers in the image;

[0046] Figure 9 Is Figure 4 A layout diagram with an added conductive layer based on the existing structure;

[0047] Figure 10 yes Figure 9 Layout diagram of the conductive layer in the image;

[0048] Figure 11 This is a schematic diagram showing the connection relationship between the first touch electrode T1 in the first electrode setting area B1 and the first transfer transistor MZ1 in the first transistor setting area W1.

[0049] Figure 12 This is a schematic diagram of the second touch electrode disposed in the second electrode setting area B2;

[0050] Figure 13 yes Figure 12 Layout diagram of the gate metal layer in the middle;

[0051] Figure 14 yes Figure 12 Layout diagram of the source and drain metal layers in the image;

[0052] Figure 15Is Figure 12 A schematic diagram showing the addition of a conductive layer and vias to the existing structure;

[0053] Figure 16 yes Figure 15 Layout diagram of the conductive layer in the image;

[0054] Figure 17 This is a schematic diagram of the second transfer transistor located in the second transistor setting area W2;

[0055] Figure 18 yes Figure 17 Layout diagram of the gate metal layer in the middle;

[0056] Figure 19 yes Figure 17 Layout diagram of the semiconductor layer in the diagram;

[0057] Figure 20 yes Figure 17 Layout diagram of the source and drain metal layers in the image;

[0058] Figure 21 Is Figure 17 A schematic diagram showing the addition of a conductive layer and vias to the existing structure;

[0059] Figure 22 yes Figure 21 Layout diagram of the conductive layer in the image;

[0060] Figure 23 This is a schematic diagram showing the connection relationship between the second touch electrode in the second electrode setting area B2 and the second transfer transistor in the second transistor setting area W2.

[0061] Figure 24 This is a schematic diagram showing the positional relationship between the first transistor setting area and the second transistor setting area;

[0062] Figure 25 This is a schematic diagram showing the positional relationship between the first electrode setting area B1, the second electrode setting area B2, the fan-out area F1, the first transistor setting area W1, and the second transistor setting area W2.

[0063] Figure 26 This is a schematic diagram of the electrode set in the dummy electrode region B0;

[0064] Figure 27 yes Figure 26 Layout diagram of the gate metal layer in the middle;

[0065] Figure 28 yes Figure 26 Layout diagram of the source and drain metal layers in the image;

[0066] Figure 29 yes Figure 26 Layout diagram of the conductive layer in the image;

[0067] Figure 30 Is Figure 25 A schematic diagram showing the addition of a pseudo-electrode region B0 to the existing structure. Detailed Implementation

[0068] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0069] In all embodiments of this disclosure, the transistors used can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. In the embodiments of this disclosure, to distinguish the two terminals in the transistor structure other than the gate, one terminal is referred to as the first terminal and the other as the second terminal.

[0070] In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the first electrode can be the drain and the second electrode can be the source; or, the first electrode can be the source and the second electrode can be the drain.

[0071] The display substrate described in this embodiment includes a substrate, the substrate including an IC region, the IC region including a first electrode setting region and a first transistor setting region;

[0072] The display substrate includes multiple rows and columns of first touch electrodes disposed in the first electrode setting area, and multiple first transition transistors disposed in the first transistor setting area;

[0073] The first touch electrode is electrically connected to the corresponding first transfer transistor;

[0074] The orthographic projection of the display data access electrode on the substrate does not overlap with the orthographic projection of the first touch electrode on the substrate.

[0075] Due to the increased number of touch electrodes, the display substrate of this disclosure has a portion of the touch electrodes located in the first electrode setting area, and a first transfer transistor electrically connected to the touch electrodes located in the first electrode setting area is located in the first transistor setting area. Furthermore, the orthographic projection of the display data access electrode on the substrate does not overlap with the orthographic projection of the first touch electrode on the substrate; that is, no display data access electrode is provided in the first electrode setting area. This disclosure solves the wiring difficulty problem when the number of touch electrodes increases, and allows for a reasonable layout of the touch electrodes.

[0076] In at least one embodiment of this disclosure, the IC region is a region where a touch display integrated circuit is bonded.

[0077] In a specific implementation, the plurality of first transfer transistors disposed in the first transistor setting area and the plurality of rows and columns of first touch electrodes disposed in the first electrode setting area can correspond one-to-one, and the first touch electrodes are electrically connected to the corresponding first transfer transistors.

[0078] In at least one embodiment of this disclosure, the IC region further includes a fan-out region;

[0079] The first touch electrode is electrically connected to the first electrode of the corresponding first transition transistor via a connecting line disposed in the fan-out region, and the second electrode of the first transition transistor is electrically connected to a first voltage line for providing a common electrode voltage.

[0080] In practical implementation, during AT (Array Test) and CT (Cell Test), a common electrode voltage signal needs to be provided to the display panel through the touch electrode. Therefore, the transfer transistor needs to be electrically connected to both the touch electrode and the first voltage line that provides the common electrode voltage.

[0081] In a specific implementation, the IC region may further include a fan-out region. The first touch electrode is electrically connected to the first electrode of a corresponding first transition transistor via a connecting line located in the fan-out region. The second electrode of the first transition transistor is electrically connected to a first voltage line, which provides a common electrode voltage. Under the control of the potential of its gate, the first transition transistor can control the writing of the common electrode voltage to the corresponding first touch electrode.

[0082] Optionally, a plurality of first transition transistor arrays are arranged in the first transistor setting area.

[0083] In a specific implementation, multiple rows and columns of first transition transistors may be provided in the first transistor setting area.

[0084] In at least one embodiment of this disclosure, the display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate.

[0085] The first touch electrode is formed on the source / drain metal layer, the gate of the first transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the first transition transistor are formed on the source / drain metal layer, and the active layer pattern of the first transition transistor is formed on the semiconductor layer.

[0086] The display substrate described in at least one embodiment of this disclosure further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate.

[0087] The first touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a first transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

[0088] Optionally, the conductive layer may be made of ITO (indium tin oxide), but is not limited thereto.

[0089] Optionally, the first voltage line is formed in the gate metal layer;

[0090] The second electrode of the first transfer transistor is electrically connected to the first voltage line through a second transfer portion formed on the conductive layer.

[0091] like Figure 1 As shown, in the first electrode setting area B1, multiple rows and columns of first touch electrodes T1 are formed on the source and drain metal layer.

[0092] like Figure 2 As shown, a first transition section Z1 with multiple rows and columns is provided in the first electrode setting area B1;

[0093] like Figure 3 As shown, the first touch electrode T1 is electrically connected to the first electrode pin of the touch display integrated circuit through the first adapter Z1 formed on the conductive layer. The touch display integrated circuit is used to provide touch signals to the first touch electrode through the first electrode pin and the first adapter Z1.

[0094] The conductive layer is disposed on the side of the source / drain metal layer away from the substrate, and the touch display integrated circuit is disposed on the side of the conductive layer away from the substrate.

[0095] like Figure 4 As shown, in the first transistor setting area W1, there are three rows of first transition transistors MZ1.

[0096] Figure 5 yes Figure 4 The layout diagram of the gate metal layer.

[0097] exist Figure 5 In the diagram, G1 represents the first gate metal layer pattern, and Lb1, which is a first voltage line portion included in the first voltage line, is used to provide the common electrode voltage.

[0098] The first gate metal layer pattern G1 serves as the gate of all the first transition transistors MZ1 disposed in the first transistor setting region W1.

[0099] Figure 6 yes Figure 4 Layout diagram of the source and drain metal layers in the middle. Figure 7 yes Figure 4 The layout diagram of the semiconductor layer.

[0100] exist Figure 6 In the diagram, the electrode labeled S1 is the first electrode of the first transfer transistor MZ1, and the electrode labeled D1 is the second electrode of the first transfer transistor MZ1.

[0101] Figure 7 yes Figure 4 The layout diagram of the semiconductor layer. Figure 7 In the diagram, the one labeled A1 is the active layer diagram of MZ1.

[0102] Figure 8 yes Figure 6 The source / drain metal layers shown are Figure 7 The diagram shows a stacked semiconductor layer.

[0103] like Figure 9 As shown, in Figure 4 Based on this, a conductive layer is provided on the side of the source / drain metal layer away from the substrate, and a second transition portion is formed in the conductive layer;

[0104] like Figures 4-10 As shown, the second electrode of the first transfer transistor is electrically connected to the first voltage line section Lb1 through the second transfer section Z2.

[0105] Figure 10 yes Figure 9 The layout diagram of the conductive layer in Figure 10 In the diagram, the part labeled Z2 is the second adapter.

[0106] like Figure 11 As shown, B1 is the first electrode setting area, W1 is the first transistor setting area, and F1 is the fan-out area.

[0107] The first touch electrode T1, located in the first electrode setting area B1, is electrically connected to the first transfer transistor MZ1, located in the first transistor setting area W1, via the first connecting line L1 located in the fan-out area F1.

[0108] exist Figure 11In at least one embodiment shown, in the first transistor placement area W1, the pitch between adjacent first switch units can be, for example, 8.5 μm, but is not limited thereto. The first switch unit may include a first transition transistor.

[0109] In at least one embodiment of this disclosure, the IC region further includes a second electrode placement region;

[0110] The display substrate further includes multiple rows of electrode groups disposed in the second electrode setting area;

[0111] The electrode group in one row includes multiple second touch electrodes and multiple display data access electrodes; in the electrode group in one row, the touch electrodes and the display data access electrodes are alternately arranged.

[0112] In practical implementation, in the second electrode setting area, in a row of electrode groups, the second touch electrode and the display data access electrode are alternately set to solve the problem of wiring difficulties when the number of touch electrodes increases.

[0113] In at least one embodiment of this disclosure, a second touch electrode may be provided in each row of electrode groups in the second electrode setting area, but this is not a limitation.

[0114] Optionally, in one row of the electrode group, a second touch electrode and at least two display data access electrodes are alternately arranged.

[0115] In practice, in the area where the second electrode is set, the second touch electrode and the display data access electrode can be arranged in a regular pattern in a row of electrode groups.

[0116] Optionally, in adjacent row electrode groups, the second touch electrode can be located in different columns to facilitate wiring.

[0117] In at least one embodiment of this disclosure, the IC region further includes a second transistor placement region;

[0118] The display substrate includes a plurality of second transition transistors disposed in the second transistor setting area;

[0119] The second touch electrode is electrically connected to the first electrode of the corresponding second transfer transistor, and the second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage.

[0120] Optionally, the plurality of second transition transistors are located in the same row for easy wiring.

[0121] In at least one embodiment of this disclosure, the display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate.

[0122] The second touch electrode is formed on the source / drain metal layer, the gate of the second transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the second transition transistor are formed on the source / drain metal layer, the active layer pattern of the second transition transistor is formed on the semiconductor layer, and the display data access electrode is formed on the gate metal layer or the source / drain metal layer.

[0123] The display substrate described in at least one embodiment of this disclosure further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate.

[0124] The second touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a third transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

[0125] In at least one embodiment of this disclosure, the display data access electrode is electrically connected to the second electrode pin of the touch display integrated circuit through a fourth transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide a corresponding data voltage through the second electrode pin.

[0126] In a specific implementation, the display data access electrode is electrically connected to the second electrode pin of the touch display integrated circuit through the fourth adapter, and the touch display integrated circuit provides data voltage to the display data access electrode through the second electrode pin.

[0127] In at least one embodiment of this disclosure, the second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage via a fifth transfer portion formed in the conductive layer, so as to receive the common electrode voltage.

[0128] Optionally, the gates of the plurality of first transition transistors and the gates of the plurality of second transition transistors are integrally formed.

[0129] like Figures 12 to 14 As shown, in the second electrode setting area B2 of the IC area, the second touch electrode and the display data access electrode are alternately arranged. In a row of electrode groups, two display data access electrodes are arranged between two adjacent second touch electrodes.

[0130] Figure 13 yes Figure 12 Layout diagram of the gate metal layer in the middle. Figure 14 yes Figure 12 The layout diagram of the source and drain metal layers.

[0131] exist Figure 13 , Figure 14 In the diagram, D11 is the data access electrode in the first row and first column; D12 is the data access electrode in the first row and second column; D13 is the data access electrode in the first row and third column; D14 is the data access electrode in the first row and fourth column; D15 is the data access electrode in the first row and fifth column; D16 is the data access electrode in the first row and sixth column; D17 is the data access electrode in the first row and seventh column; D18 is the data access electrode in the first row and eighth column; and D19 is the data access electrode in the first row and ninth column.

[0132] The electrode labeled D21 is the data access electrode in the second row and first column; the electrode labeled D22 is the data access electrode in the second row and second column; the electrode labeled D23 is the data access electrode in the second row and third column; the electrode labeled D24 is the data access electrode in the second row and fourth column; the electrode labeled D25 is the data access electrode in the second row and fifth column; the electrode labeled D26 is the data access electrode in the second row and sixth column; the electrode labeled D27 is the data access electrode in the second row and seventh column; the electrode labeled D28 is the data access electrode in the second row and eighth column; and the electrode labeled D29 is the data access electrode in the second row and ninth column.

[0133] The electrode labeled D31 is the data access electrode in the first column of the third row; the electrode labeled D32 is the data access electrode in the second column of the third row; the electrode labeled D33 is the data access electrode in the third column of the third row; the electrode labeled D34 is the data access electrode in the fourth column of the third row; the electrode labeled D35 is the data access electrode in the fifth column of the third row; the electrode labeled D36 is the data access electrode in the sixth column of the third row; the electrode labeled D37 is the data access electrode in the seventh column of the third row; the electrode labeled D38 is the data access electrode in the eighth column of the third row; and the electrode labeled D39 is the data access electrode in the ninth column of the third row.

[0134] The electrode labeled D41 is the data access electrode in the first column of the fourth row; the electrode labeled D42 is the data access electrode in the second column of the fourth row; the electrode labeled D43 is the data access electrode in the third column of the fourth row; the electrode labeled D44 is the data access electrode in the fourth column of the fourth row; the electrode labeled D45 is the data access electrode in the fifth column of the fourth row; the electrode labeled D46 is the data access electrode in the sixth column of the fourth row; the electrode labeled D47 is the data access electrode in the seventh column of the fourth row; the electrode labeled D48 is the data access electrode in the eighth column of the fourth row; and the electrode labeled D49 is the data access electrode in the ninth column of the fourth row.

[0135] The electrode labeled T11 is the second touch electrode in the first row and first column; the electrode labeled T12 is the second touch electrode in the first row and second column; the electrode labeled T13 is the second touch electrode in the first row and third column; the electrode labeled T14 is the second touch electrode in the first row and fourth column; and the electrode labeled T15 is the second touch electrode in the first row and fifth column.

[0136] The electrode labeled T21 is the second touch electrode in the first column of the second row; the electrode labeled T22 is the second touch electrode in the second column of the second row; the electrode labeled T23 is the second touch electrode in the third column of the second row; and the electrode labeled T24 is the second touch electrode in the fourth column of the second row.

[0137] The electrode labeled T31 is the second touch electrode in the first column of the third row; the electrode labeled T32 is the second touch electrode in the second column of the third row; the electrode labeled T33 is the second touch electrode in the third column of the third row; and the electrode labeled T34 is the second touch electrode in the fourth column of the third row.

[0138] The electrode labeled T41 is the second touch electrode in the first column of the fourth row; the electrode labeled T42 is the second touch electrode in the second column of the fourth row; the electrode labeled T43 is the second touch electrode in the third column of the fourth row; the electrode labeled T44 is the second touch electrode in the fourth column of the fourth row; and the electrode labeled T45 is the second touch electrode in the fifth column of the fourth row.

[0139] D12 and D13 are set between T11 and T12, D14 and D15 are set between T12 and T13, D16 and D17 are set between T13 and T14, and D18 and D19 are set between T14 and T15.

[0140] D22 and D23 are set between T21 and T22, D24 and D25 are set between T22 and T23, D26 and D27 are set between T23 and T24, and D28 and D29 are set between T24 and T25.

[0141] D31 and D32 are set to the left of T31, D33 and D34 are set between T31 and T32, D35 and D36 are set between T32 and T33, D37 and D38 are set between T33 and T34, and D39 is set to the right of T34.

[0142] D41 and D42 are set between T41 and T42, D43 and D44 are set between T42 and T43, D45 and D46 are set between T43 and T44, D47 and D48 are set between T44 and T45, and D49 is set to the right of T45.

[0143] like Figures 12-14 As shown, the second touch electrode can be distributed in each of the four rows of electrodes, but is not limited to this. In specific implementation, the second touch electrode can be set in any row of the four rows of electrodes.

[0144] Figure 15 Is Figure 12 The layout diagram shown is based on the layout diagram with the addition of a conductive layer. The conductive layer is disposed on the side of the source / drain metal layer away from the gate metal layer. Along the direction away from the substrate, the gate metal layer, the source / drain metal layer and the conductive layer are arranged in sequence.

[0145] Figure 16 yes Figure 15 The layout diagram of the conductive layer in the image.

[0146] In at least one embodiment of this disclosure, the display substrate may further include a touch display integrated circuit disposed on the side of the conductive layer away from the substrate.

[0147] The second touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through the third transition portion Z3 formed on the conductive layer. The touch display integrated circuit is used to provide touch signals through the first electrode pin.

[0148] The display data access electrode is electrically connected to the second electrode pin of the touch display integrated circuit through the fourth transition portion Z4 formed on the conductive layer, and the touch display integrated circuit provides data voltage to the display data access electrode through the second electrode pin.

[0149] like Figure 17 As shown, the IC region also includes a second transistor placement region W2;

[0150] The display substrate includes a plurality of second transition transistors MZ2 disposed in the second transistor setting region W2;

[0151] Multiple second-transition transistors are arranged in the same row.

[0152] Figure 18 yes Figure 17 Layout diagram of the gate metal layer in the middle. Figure 19 yes Figure 17 Layout diagram of the semiconductor layer in the middle. Figure 20 yes Figure 17 The layout diagram of the source and drain metal layers.

[0153] In at least one embodiment of this disclosure, the first electrode S2 of the second switching transistor MZ2 is electrically connected to the second touch electrode, and the second electrode D2 of the second switching transistor MZ2 is electrically connected to the second voltage line portion Lb2.

[0154] The second voltage line portion Lb2 is included in the first voltage line, and the second voltage line portion Lb2 is used to provide a common electrode voltage.

[0155] like Figure 18As shown, the second gate metal layer pattern is labeled G2, and the second gate metal layer pattern G2 serves as the gate of all the second transition transistors MZ2 disposed in the second transistor setting area W2.

[0156] exist Figure 20 In the diagram, S2 is the first electrode of the second transfer transistor MZ2, and D2 is the second electrode of the second transfer transistor MZ2.

[0157] exist Figure 19 In the diagram, the one labeled A2 is the active layer diagram of MZ2.

[0158] Figure 21 Is Figure 17 The layout diagram shown is based on the layout diagram with an additional conductive layer, which is disposed on the side of the source / drain metal layer away from the substrate.

[0159] Figure 22 yes Figure 21 The layout diagram of the conductive layer in the image. Figure 22 In the diagram, the part labeled Z5 is the fifth adapter section;

[0160] The second electrode D2 of the second transfer transistor MZ2 is electrically connected to the second voltage line Lb2 for providing a common electrode voltage through the fifth transfer portion Z5 formed on the conductive layer, so as to receive the common electrode voltage.

[0161] like Figure 23 As shown, the area labeled B2 is the second electrode setting area, and the area labeled W2 is the second transistor setting area;

[0162] The second touch electrode, located in the second electrode setting area B2, is electrically connected to the second transfer transistor MZ2, located in the second transistor setting area W2, via the second connecting line L2.

[0163] exist Figure 23 In at least one embodiment shown, in the second transistor setting region W2, the pitch between adjacent second switch units can be, for example, 25.5 μm, and the width of a single second switch unit can be 16 μm, but is not limited thereto; therefore, in the second transistor setting region W2, the second switch units can be wired within a single row. The second switch unit may include a second transition transistor.

[0164] like Figure 24 As shown, the first gate metal layer pattern G1 and the second gate metal layer pattern G2 can be integrally formed, Lb1 and Lb2 can be integrally formed, and Lb1 and Lb2 can both be included in the first voltage line.

[0165] exist Figure 25 In the diagram, B1 is the first electrode setting area, B2 is the second electrode setting area, F1 is the fan-out area, W1 is the first transistor setting area, and W2 is the second transistor setting area.

[0166] In at least one embodiment of this disclosure, the novel touch display driving circuit that corresponds to the improved touch performance can support 1280 touch channels and 2400 display data channels, but is not limited thereto.

[0167] In at least one embodiment of this disclosure, on the side of the first electrode setting region that is away from the second electrode setting region, the IC region further includes a dummy electrode setting region;

[0168] The display substrate also includes a plurality of dummy electrodes disposed in the dummy electrode setting area, and the dummy electrodes are not connected to signals.

[0169] In practical implementation, a dummy electrode setting area can be set on the side of the first electrode setting area away from the second electrode setting area. Multiple dummy electrodes are set in the dummy electrode setting area to support the touch display integrated circuit and ensure the bonding effect of the touch display integrated circuit. The dummy electrodes are not connected to signals and are only used for support.

[0170] In at least one embodiment of this disclosure, the display substrate includes a gate metal layer, a semiconductor layer, a source / drain metal layer, and a conductive layer arranged sequentially along a direction away from the substrate.

[0171] The dummy electrode can be formed on the source / drain metal layer or the gate metal layer;

[0172] The dummy electrode is electrically connected to the sixth transition portion formed on the conductive layer. The sixth transition portion does not receive signals and is also used to support the touch display integrated circuit.

[0173] exist Figure 26 In the diagram, area labeled B0 is the region where dummy electrodes are set.

[0174] Figure 27 yes Figure 26 Layout diagram of the gate metal layer in the middle. Figure 28 yes Figure 26 Layout diagram of the source and drain metal layers in the middle. Figure 29 yes Figure 26 The layout diagram of the conductive layer in the image.

[0175] exist Figure 27 In the diagram, the electrode labeled Tw1 is the first dummy electrode. Figure 27 In the diagram, the electrode labeled Tw2 is the second dummy electrode. Figure 29In the diagram, the part labeled Z6 is the sixth adapter.

[0176] exist Figure 27 In the diagram, the electrode labeled T0 is used to observe the number of bound particles. Electrode T0, used to observe the number of bound particles, can ensure process stability during production.

[0177] The display device described in this disclosure includes the display substrate described above.

[0178] The display device provided in this disclosure can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0179] The above description represents the preferred embodiments of this disclosure. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles described herein, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A display substrate, characterized in that, The substrate includes an IC region, which includes a first electrode region and a first transistor region; the IC region also includes a second electrode region; the display substrate also includes a display data access electrode disposed in the second electrode region. The display substrate includes multiple rows and columns of first touch electrodes disposed in the first electrode setting area, and multiple first transition transistors disposed in the first transistor setting area; The first touch electrode is electrically connected to the corresponding first transfer transistor; The orthographic projection of the display data access electrode on the substrate does not overlap with the orthographic projection of the first touch electrode on the substrate; The IC region also includes a fan-out region; The first touch electrode is electrically connected to the first electrode of the corresponding first transition transistor via a connecting line disposed in the fan-out region, and the second electrode of the first transition transistor is electrically connected to a first voltage line for providing a common electrode voltage; The display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate. The first touch electrode is formed on the source / drain metal layer, the gate of the first transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the first transition transistor are formed on the source / drain metal layer, and the active layer pattern of the first transition transistor is formed on the semiconductor layer.

2. The display substrate as described in claim 1, characterized in that, Multiple first transition transistor arrays are arranged in the first transistor setting area.

3. The display substrate as described in claim 1, characterized in that, The display substrate further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate. The first touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a first transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

4. The display substrate as described in claim 3, characterized in that, The first voltage line is formed in the gate metal layer; The second electrode of the first transfer transistor is electrically connected to the first voltage line through a second transfer portion formed on the conductive layer.

5. The display substrate as described in any one of claims 1 to 4, The display substrate further includes multiple rows of electrode groups disposed in the second electrode setting area; The electrode group in one row includes a plurality of second touch electrodes and a plurality of display data access electrodes; in the electrode group in one row, the touch electrodes and the display data access electrodes are alternately arranged.

6. The display substrate as described in claim 5, characterized in that, In the electrode group described in one row, a second touch electrode and at least two display data access electrodes are alternately arranged.

7. The display substrate as described in claim 5, characterized in that, In adjacent rows of electrode groups, the second touch electrode is located in a different column.

8. The display substrate as described in claim 5, characterized in that, The IC region also includes a second transistor placement region; The display substrate includes a plurality of second transition transistors disposed in the second transistor setting area; The second touch electrode is electrically connected to the first electrode of the corresponding second transfer transistor, and the second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage.

9. The display substrate as described in claim 8, characterized in that, The plurality of second transition transistors are located in the same row.

10. The display substrate as claimed in claim 8, characterized in that, The display substrate includes a gate metal layer, a semiconductor layer, and a source / drain metal layer arranged sequentially along a direction away from the substrate. The second touch electrode is formed on the source / drain metal layer, the gate of the second transition transistor is formed on the gate metal layer, the first electrode and the second electrode of the second transition transistor are formed on the source / drain metal layer, the active layer pattern of the second transition transistor is formed on the semiconductor layer, and the display data access electrode is formed on the gate metal layer or the source / drain metal layer.

11. The display substrate as claimed in claim 10, characterized in that, The display substrate further includes a conductive layer disposed on the side of the source / drain metal layer away from the substrate, and a touch display integrated circuit disposed on the side of the conductive layer away from the substrate. The second touch electrode is electrically connected to the first electrode pin of the touch display integrated circuit through a third transition portion formed on the conductive layer, and the touch display integrated circuit is used to provide touch signals through the first electrode pin.

12. The display substrate as claimed in claim 11, characterized in that, The display data access electrode is electrically connected to the second electrode pin of the touch display integrated circuit through a fourth adapter formed on the conductive layer. The touch display integrated circuit is used to provide a corresponding data voltage through the second electrode pin.

13. The display substrate as claimed in claim 11, characterized in that, The second electrode of the second transfer transistor is electrically connected to a first voltage line for providing a common electrode voltage via a fifth transfer portion formed in the conductive layer.

14. The display substrate as claimed in claim 8, characterized in that, The gates of the plurality of first transition transistors and the gates of the plurality of second transition transistors are integrally formed.

15. The display substrate as claimed in claim 5, characterized in that, On the side of the first electrode setting area that is far from the second electrode setting area, the IC area also includes a dummy electrode setting area; The display substrate also includes a plurality of dummy electrodes disposed in the dummy electrode setting area, and the dummy electrodes are not connected to signals.

16. The display substrate as claimed in claim 15, characterized in that, The display substrate includes a gate metal layer, a semiconductor layer, a source / drain metal layer, and a conductive layer arranged sequentially along a direction away from the substrate. The dummy electrode is formed on the source / drain metal layer or the gate metal layer; The dummy electrode is electrically connected to the sixth transition portion formed on the conductive layer, and the sixth transition portion does not receive signals.

17. A display device, characterized in that, Includes the display substrate as described in any one of claims 1 to 16.

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