Digital-to-analog converter output stage circuit in RF transmitter integrated circuit

Abstract

The present application relates to a digital-to-analog converter output stage circuit in a radio frequency transmitter integrated circuit, the digital-to-analog converter output stage circuit comprising: a current steering DAC circuit, comprising two intermediate nodes and two voltage output terminals; the current steering DAC circuit is used to output a corresponding polarity analog current signal through each intermediate node according to a digital input signal, and to output a corresponding polarity analog voltage signal through each voltage output terminal according to the analog current signal; two clamping circuits are respectively connected to two output branches of the current steering DAC circuit, the output branches are branches between the intermediate nodes and the voltage output terminals of the same polarity, and each clamping circuit is used to clamp the potential of the intermediate node. The digital-to-analog converter output stage circuit of the present application has the advantages of stable output, strong anti-interference ability, high effective number of bits, and is suitable for broadband applications.

Description

Technical Field

[0001] The present application relates to the technical field of radio frequency transmitters, and in particular to a digital-to-analog converter output stage circuit in a radio frequency transmitter integrated circuit. Background Art

[0002] DAC in RF transceivers generally adopts a current steering structure. The DAC output usually needs to be directly connected to a current filter, or connected to a voltage filter after a current mirror circuit. Regardless of the above two methods, the output resistance of the DAC is not infinitely small. The output current of the DAC will be affected by the input resistance of the current filter connected to the subsequent stage, resulting in the DAC being unable to select too large LSB current, especially when the current output is large, which will cause output saturation and reduce the effective number of bits. Summary of the invention

[0003] Based on this, it is necessary to provide a digital-to-analog converter output stage circuit in a radio frequency transmitter integrated circuit with stable output.

[0004] In a first aspect, the present application provides a digital-to-analog converter output stage circuit, comprising:

[0005] A current steering DAC circuit, comprising two intermediate nodes and two voltage output terminals; the current steering DAC circuit is used to output an analog current signal of a corresponding polarity through each of the intermediate nodes according to a digital input signal, and to output an analog voltage signal of a corresponding polarity through each of the voltage output terminals according to the analog current signal;

[0006] Two clamping circuits are respectively connected to two output branches of the current steering DAC circuit, wherein the output branches are branches between an intermediate node and a voltage output terminal of the same polarity, and each clamping circuit is used to clamp the potential of the intermediate node.

[0007] In one embodiment, each of the clamping circuits includes a clamping unit and a bias unit, wherein the clamping unit is respectively connected to an output branch of the current-steering DAC circuit and the bias unit, wherein the bias unit is used to provide a bias voltage for the clamping unit, and the clamping unit is used to clamp the potential of the intermediate node based on the bias voltage.

[0008] In one embodiment, each of the clamping units includes: a first transistor and a second transistor;

[0009] The first electrode of the first transistor is connected to one of the output branches and the bias unit respectively, and the second electrode of the first transistor is connected to the first electrode of the second transistor;

[0010] The second electrode of the second transistor is connected to the ground line, and the third electrode of the second transistor is connected to the intermediate node.

[0011] In one embodiment, each of the clamping units further includes a compensation capacitor, a first end of the compensation capacitor is connected to the first electrode of the first transistor, and a second end of the compensation capacitor is connected to the second electrode of the second transistor.

[0012] In one embodiment, each of the bias units includes: a third transistor, a fourth transistor and a first tail current source;

[0013] The first electrode of the third transistor is respectively connected to the VDD terminal and the first electrode of the fourth transistor, the second electrode of the third transistor is connected to the clamping unit, and the third electrode of the third transistor is respectively connected to the second electrode and the third electrode of the fourth transistor; the third transistor and the fourth transistor are used to provide the bias voltage for the first transistor and the second transistor;

[0014] The first end of the first tail current source is connected to the second electrode of the fourth transistor, and the two ends of the first tail current source are connected to the clamping unit; the first tail current source is used to provide a bias current for the clamping unit.

[0015] In one embodiment, the current steering DAC circuit includes a current output unit and two voltage output units; wherein,

[0016] The current output unit is used to output the analog current signal of corresponding polarity to the corresponding voltage output unit through each intermediate node according to the digital input signal;

[0017] Each of the voltage output units is used for outputting the analog voltage signal of corresponding polarity through a voltage output terminal according to the received analog current signal.

[0018] In one embodiment, each of the voltage output units comprises: a fifth transistor and a resistor; wherein,

[0019] The first electrode of the fifth transistor is connected to the intermediate node, the second electrode of the fifth transistor is connected to the voltage output terminal and the first end of the resistor, the third electrode of the fifth transistor is connected to the clamping circuit; the second end of the resistor is connected to the VDD terminal.

[0020] In one embodiment, the current output unit includes a second tail current source, a third tail current source and a plurality of switch sub-units; wherein,

[0021] The first end of each of the switch sub-units is respectively connected to the VDD end, the second end of each of the switch sub-units is respectively connected to one of the intermediate nodes and the first end of the second tail current source, the third end of each of the switch sub-units is respectively connected to another of the intermediate nodes and the first end of the third tail current source; the second end of the second tail current is respectively connected to the ground line and the second end of the third tail current source;

[0022] The analog current signal is obtained by subtracting the sum of the current signals outputted from the second ends of the multiple switch sub-units from the current signal outputted from the second tail current source, or by subtracting the sum of the current signals outputted from the third ends of the multiple switch sub-units from the current signal outputted from the third tail current source.

[0023] In one embodiment, each of the switch subunits comprises: a first switch, a second switch, and a current source; wherein,

[0024] The first end of the current source is connected to the VDD end, and the second end of the current source is connected to the first end of the first switch and the first end of the second switch respectively;

[0025] The second end of the first switch is connected to the intermediate node;

[0026] The second end of the second switch is connected to another intermediate node.

[0027] In a second aspect, the present application provides a radio frequency transmitter integrated circuit, comprising:

[0028] A digital input circuit, used for outputting a digital input signal;

[0029] A digital-to-analog converter, comprising a core circuit and a digital-to-analog converter output stage circuit provided by any one of the above embodiments, wherein the core circuit is connected to the digital input circuit and the digital-to-analog converter output stage circuit respectively; the core circuit is used to convert the digital input signal into an analog output signal, and the digital-to-analog converter output stage circuit is used to output an analog voltage signal according to the analog output signal;

[0030] A voltage type filter circuit, connected to the output stage circuit of the digital-to-analog converter, for filtering the analog voltage signal;

[0031] The mixing circuit is connected to the voltage-type filtering circuit and is used to mix the filtered analog voltage signal and then output a radio frequency signal.

[0032] In the above-mentioned digital-to-analog converter output stage circuit and radio frequency transmitter integrated circuit, the digital-to-analog converter output stage circuit includes a current steering DAC circuit and two clamping circuits, the current steering DAC circuit has two intermediate nodes and two voltage output terminals, the current steering DAC circuit is used to output an analog current signal of corresponding polarity through each intermediate node according to the digital input signal, and output an analog voltage signal of corresponding polarity through each voltage output terminal according to the analog current signal; the two clamping circuits are respectively connected to the two output branches of the current steering DAC circuit, the output branch is a branch between the intermediate node and the voltage output terminal of the same polarity, and each clamping circuit is used to clamp the potential of the intermediate node. It can be understood that by setting the clamping circuit to clamp the potential of the intermediate node, the voltage spike caused by the switching of each switch in the current steering DAC circuit can be reduced, thereby limiting the voltage fluctuation of the point within a certain range, improving the stability of the analog current signal, and thereby improving the effective number of bits of the digital-to-analog converter. In addition, the digital input signal is converted into a corresponding analog voltage signal output through the current steering DAC circuit. Compared with the traditional current output, the influence of the input impedance of the subsequent circuit on the output stage circuit of the digital-to-analog converter can be reduced, the anti-interference ability of the digital-to-analog converter is improved, and the digital-to-analog converter can select a larger LSB current, further improving the effective number of bits of the digital-to-analog converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 A schematic structural diagram of a digital-to-analog converter output stage circuit according to an embodiment;

[0035] Figure 2 is a schematic structural diagram of a digital-to-analog converter output stage circuit according to another embodiment;

[0036] Figure 3 for Figure 2 A structural diagram of a clamping circuit;

[0037] Figure 4 for Figure 2 Another structural diagram of the middle clamp circuit;

[0038] Figure 5 is a structural schematic diagram of a current steering DAC circuit according to an embodiment;

[0039] Figure 6 is a structural schematic diagram of a current steering DAC circuit according to another embodiment;

[0040] Figure 7 is a schematic structural diagram of a switch subunit according to an embodiment;

[0041] Figure 8 It is a structural schematic diagram of a digital-to-analog converter output stage circuit of a specific embodiment;

[0042] Fig. 9 The figure is a schematic diagram of the structure of a radio frequency transmitter integrated circuit according to an embodiment.

[0043] Description of reference numerals:

[0044] 10-digital input circuit, 20-digital-to-analog converter, 21-core circuit, 22-digital-to-analog converter output stage circuit, 30-voltage type filter circuit, 40-mixing circuit, 100-current steering DAC circuit, 110-current output unit, 111-switch subunit, 120-voltage output unit, 200-clamping circuit, 210-clamping unit, 220-bias unit. DETAILED DESCRIPTION

[0045] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0047] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first transistor may be referred to as a second transistor, and similarly, a second transistor may be referred to as a first transistor. Both the first transistor and the second transistor are transistors, but they are not the same transistor.

[0048] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0049] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.

[0050] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0051] In one embodiment, Figure 1 As shown, the present application provides a digital-to-analog converter output stage circuit, including a current steering DAC circuit 100 and two clamping circuits 200. Among them, the current steering DAC circuit 100 includes two intermediate nodes and two voltage output terminals. The two clamping circuits 200 are respectively connected to the two output branches of the current steering DAC circuit 100. The output branch refers to the branch between the intermediate node and the voltage output terminal of the same polarity.

[0052] The current-steering DAC circuit 100 is used to output an analog current signal of a corresponding polarity through each intermediate node according to a digital input signal, and to output an analog voltage signal of a corresponding polarity through each voltage output terminal according to the analog current signal.

[0053] It can be understood that the current steering DAC circuit 100 can output two analog voltage signals with different analog polarities according to the digital input signal. Specifically, the current steering DAC circuit 100 can output a positive polarity analog current signal through an intermediate node and a negative polarity analog current signal through another intermediate node according to the digital input signal. Further, the positive polarity analog current signal is processed by, for example, current-to-voltage conversion, and a positive polarity analog voltage signal is output through a voltage output terminal; the negative polarity analog current signal is processed by, for example, current-to-voltage conversion, and a negative polarity analog voltage signal is output through another voltage output terminal.

[0054] Each clamping circuit 200 is used to clamp the potential of an intermediate node.

[0055] It can be understood that each clamping circuit 200 is respectively connected to an output branch, and can clamp the potential of the intermediate node by feedback regulation, thereby limiting the analog current signal within a certain range.

[0056] In this embodiment, the output stage circuit of the digital-to-analog converter includes a current steering DAC circuit 100 and two clamping circuits 200. The current steering DAC circuit 100 has two intermediate nodes and two voltage output terminals. The current steering DAC circuit 100 is used to output an analog current signal of a corresponding polarity through each intermediate node according to a digital input signal, and to output an analog voltage signal of a corresponding polarity through each voltage output terminal according to the analog current signal. The two clamping circuits 200 are respectively connected to two output branches of the current steering DAC circuit 100. The output branches are branches between the intermediate nodes and the voltage output terminals of the same polarity. Each clamping circuit 200 is used to clamp the potential of the intermediate node. It can be understood that by setting the clamping circuit 200 to clamp the potential of the intermediate node, the voltage spike caused by the switching of each switch in the current steering DAC circuit 100 can be reduced, thereby limiting the analog current signal to a certain range, improving the stability of the analog current signal, and thereby improving the effective number of bits of the digital-to-analog converter. In addition, by converting the digital input signal into a corresponding analog voltage signal output through the current steering DAC circuit 100, compared with the traditional current output, the influence of the input impedance of the subsequent circuit on the output stage circuit of the digital-to-analog converter can be reduced, and the anti-interference ability of the output stage circuit of the digital-to-analog converter is improved, so that the digital-to-analog converter can select a larger LSB current, further improving the effective number of bits of the digital-to-analog converter.

[0057] In one embodiment, Figure 2 As shown, each clamping circuit 200 includes a clamping unit 210 and a biasing unit 220. The clamping unit 210 is respectively connected to an output branch of the current steering DAC circuit 100 and the biasing unit 220. The biasing unit 220 is used to provide a bias voltage for the clamping unit 210. The clamping unit 210 is used to clamp the potential of the intermediate node based on the bias voltage.

[0058] It can be understood that the bias unit 220 can provide the bias voltage required for normal operation of each component in the clamp unit 210. The clamp unit 210 can clamp the potential of the intermediate node to keep it stable.

[0059] Furthermore, if Figure 3 As shown, each clamping unit 210 includes a first transistor M1 and a second transistor M2 .

[0060] The first electrode of the first transistor M1 is respectively connected to an output branch and the bias unit 220, the second electrode of the first transistor M1 is connected to the first electrode of the second transistor M2, the second electrode of the second transistor M2 is connected to the ground line, and the third electrode of the second transistor M2 is connected to an intermediate node.

[0061] It can be understood that the first transistor M1, the second transistor M2 and some components on the output branch form a loop. When the switch switching causes voltage spikes and current impacts on the line, the potential of the intermediate node will increase, which will cause the voltage or current on the third electrode of the second transistor M2 to increase, thereby reducing the current or voltage on the first electrode of the first transistor M1, realizing feedback regulation of the potential of the intermediate node and the analog current signal flowing through the intermediate node, so that the analog current signal remains stable.

[0062] It should be noted that each transistor used in the present application may be a triode or a field effect transistor. If a triode is used, the first electrode may be an emitter or a collector, the second electrode may be an emitter or a collector, and the third electrode may be a base; if a field effect transistor is used, the first electrode may be a source or a drain, the second electrode may be a source or a drain, and the third electrode may be a gate.

[0063] Please continue reading Figure 3 , each bias unit 220 includes a third transistor M3, a fourth transistor M4 and a first tail current source S1.

[0064] The first electrode of the third transistor M3 is connected to the VDD terminal and the first electrode of the fourth transistor M4 respectively, the second electrode of the third transistor M3 is connected to the clamping unit 210, and the third electrode of the third transistor M3 is connected to the second electrode and the third electrode of the fourth transistor M4 respectively. The third transistor M3 and the fourth transistor M4 are used to provide bias voltage for the first transistor M1 and the second transistor M2.

[0065] A first end of the first tail current source S1 is connected to the second electrode of the fourth transistor M4, and a second end of the first tail current source S1 is connected to the clamping unit 210. The first tail current source S1 is used to provide a bias current for the clamping unit 210.

[0066] Alternatively, if Figure 4 As shown, each clamping unit 210 also includes a compensation capacitor. The first end of the compensation capacitor is connected to the first electrode of the first transistor M1, and the second end of the compensation capacitor is connected to the second electrode of the second transistor M2. The purpose of setting the compensation capacitor is to compensate the phase of the analog current signal when the clamping unit is in action, so as to further improve the stability of the analog current signal flowing through the output branch.

[0067] In one embodiment, Figure 5 As shown, the current-steering DAC circuit 100 includes a current output unit 110 and two voltage output units 120 .

[0068] The current output unit 110 is used to output an analog current signal of corresponding polarity through each intermediate node to the corresponding voltage output unit 120 according to the digital input signal. Each voltage output unit 120 is used to output an analog voltage signal of corresponding polarity through a voltage output terminal according to the received analog current signal.

[0069] It can be understood that the current output unit 110 can output two analog current signals to the two voltage output units 120 according to the digital input signal. Afterwards, each voltage output unit 120 outputs a corresponding analog voltage signal according to the received analog current signal.

[0070] For further information, please refer to Figure 5 Each voltage output unit 120 includes a fifth transistor M5 and a resistor. The first electrode of the fifth transistor M5 is connected to an intermediate node, the second electrode of the fifth transistor M5 is connected to a voltage output terminal and a first end of the resistor, the third electrode of the fifth transistor M5 is connected to a clamping circuit 200, and the second end of the resistor is connected to the VDD terminal.

[0071] like Figure 6 As shown, the current output unit 110 includes a second tail current source S2, a third tail current source S3 and a plurality of switch subunits 111. The first end of each switch subunit 111 is respectively connected to the VDD end, the second end of each switch subunit 111 is respectively connected to an intermediate node and the first end of the second tail current source S2, and the third end of each switch subunit 111 is respectively connected to another intermediate node and the first end of the third tail current source S3. The second end of the second tail current is respectively connected to the ground line and the second end of the third tail current source S3.

[0072] The analog current signal is obtained by subtracting the sum of the current signals output from the second ends of the multiple switch sub-units 111 from the current signal output from the second tail current source S2, or by subtracting the sum of the current signals output from the third ends of the multiple switch sub-units 111 from the current signal output from the third tail current source S3.

[0073] It can be understood that the current signals outputted by the second tail current source S2 and the second ends of the plurality of switch subunits 111 all flow into the same intermediate node, and flow to the output branch after being subtracted at the intermediate node. The current signals outputted by the third tail current source S3 and the third ends of the plurality of switch subunits 111 all flow into another intermediate node, and flow to the output branch after being subtracted at the intermediate node.

[0074] In one embodiment, Figure 7As shown, each switch subunit 111 includes a first switch K1, a second switch K2, and a current source S4. The first end of the current source S4 is connected to the VDD end, the second end of the current source S4 is connected to the first end of the first switch K1 and the first end of the second switch K2 respectively, the second end of the first switch K1 is connected to an intermediate node, and the second end of the second switch K2 is connected to another intermediate node.

[0075] It can be understood that each first switch K1 and each second switch K2 can be controlled to be turned on or off according to the digital input signal, so as to obtain a corresponding analog current signal.

[0076] For better understanding, Figure 8 As shown, a more specific embodiment is used to illustrate the output stage circuit of the digital-to-analog converter of the present application. Among them, the first transistor (M1 and M6), the second transistor (M2 and M7) and the fifth transistor (M5 and M10) are all PMOS transistors, and the third transistor (M3 and M8) and the fourth transistor (M4 and M9) are all NMOS transistors. The connection relationship of each component is not repeated here.

[0077] Since the circuit is a symmetrical structure, the left half of the circuit is taken as an example to explain the clamping principle of the clamping unit on the analog current signal. When the output stage circuit of the digital-to-analog converter works normally, each MOS tube works in the saturation region.

[0078] During the operation of the output stage circuit of the digital-to-analog converter, when the analog current signal Iout increases due to a current impact, that is, when there is a voltage spike causing the potential of the intermediate node to increase, the gate voltage of the second transistor M2 will increase, causing the drain current of the second transistor M2 to decrease, resulting in a decrease in the drain potential of the first transistors M1 and M2, that is, the gate voltage of the fifth transistor M5 is reduced, thereby reducing the potential of the intermediate node and the analog current signal Iout. After the analog current signal flows through the resistor R1, an analog voltage signal VRES is generated at the voltage output end.

[0079] In the embodiment of the present application, the potential of the intermediate node is clamped by the clamping unit, the analog current signal is limited to a certain range, the impact of the impact current during the switch switching on the output stage circuit of the digital-to-analog converter is reduced, and the stability of the output stage circuit of the digital-to-analog converter is improved. In addition, the final voltage output method can also reduce the impact of the input impedance of the subsequent circuit on the output stage circuit of the digital-to-analog converter, and further improve the stability of the output stage circuit of the digital-to-analog converter.

[0080] In one embodiment, Fig. 9As shown, the present application also provides a radio frequency transmitter integrated circuit, including a digital input circuit 10, a digital-to-analog converter 20, a voltage-type filter circuit 30 and a mixing circuit 40. The digital-to-analog converter 20 includes a core circuit 21 and a digital-to-analog converter output stage circuit 22. The core circuit 21 is respectively connected to the digital input circuit 10 and the digital-to-analog converter output stage circuit 22, and the voltage-type filter circuit 30 is respectively connected to the digital-to-analog converter output stage circuit 22 and the mixing circuit 40.

[0081] The digital input circuit 10 is used to output a digital input signal.

[0082] The core circuit 21 is used to convert a digital input signal into an analog output signal.

[0083] The digital-to-analog converter output stage circuit 22 includes a current steering DAC circuit and two clamping circuits. The current steering DAC circuit includes two intermediate nodes and two voltage output terminals. The two clamping circuits are respectively connected to the two output branches of the current steering DAC circuit. The output branch refers to the branch between the intermediate node and the voltage output terminal of the same polarity. The current steering DAC circuit is used to output an analog current signal of corresponding polarity through each intermediate node according to the analog output signal, and to output an analog voltage signal of corresponding polarity through each voltage output terminal according to the analog current signal. Each clamping circuit is used to control the conduction or disconnection of the output branch and clamp the potential of the intermediate node.

[0084] The voltage filter circuit 30 is used to filter the analog voltage signal.

[0085] The mixing circuit 40 is used to mix the filtered analog voltage signal and output a radio frequency signal.

[0086] In this embodiment, the radio frequency transmitter integrated circuit includes a digital input circuit 10, a digital-to-analog converter 20, a voltage-type filter circuit 30 and a mixing circuit 40. The digital-to-analog converter 20 includes a core circuit 21 and a digital-to-analog converter output stage circuit 22. The core circuit 21 is respectively connected to the digital input circuit 10 and the digital-to-analog converter output stage circuit 22, and the voltage-type filter circuit 30 is respectively connected to the digital-to-analog converter output stage circuit 22 and the mixing circuit 40. The digital input circuit 10 is used to output a digital input signal; the digital-to-analog converter 20 is used to output an analog voltage signal according to the digital input signal; the voltage-type filter circuit 30 is used to filter the analog voltage signal; and the mixing circuit 40 is used to mix the filtered analog voltage signal and then output a radio frequency signal. Since the voltage analog signal output by the digital-to-analog converter output stage circuit has strong stability and strong anti-interference ability, it can be applied to broadband applications, thereby improving the stability of the radio frequency signal output by the transmitter device.

[0087] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0088] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A digital-to-analog converter output stage circuit, characterized in that: include: A current steering DAC circuit includes two intermediate nodes and two voltage output terminals; The current steering DAC circuit is used to output an analog current signal of a corresponding polarity through each of the intermediate nodes according to the digital input signal, and to output an analog voltage signal of a corresponding polarity through each of the voltage output terminals according to the analog current signal; Two clamping circuits are respectively connected to two output branches of the current steering DAC circuit, the output branches are branches between an intermediate node and a voltage output terminal of the same polarity, and each of the clamping circuits is used to clamp the potential of the intermediate node; wherein each of the clamping circuits includes a clamping unit and a bias unit, the clamping unit is respectively connected to an output branch of the current steering DAC circuit and the bias unit, the bias unit is used to provide a bias voltage for the clamping unit, and the clamping unit is used to clamp the potential of the intermediate node based on the bias voltage.

2. The digital-to-analog converter output stage circuit according to claim 1, characterized in that: Each of the clamping units comprises: a first transistor and a second transistor; The first electrode of the first transistor is connected to one of the output branches and the bias unit respectively, and the second electrode of the first transistor is connected to the first electrode of the second transistor; The second electrode of the second transistor is connected to the ground line, and the third electrode of the second transistor is connected to the intermediate node.

3. The digital-to-analog converter output stage circuit according to claim 2, characterized in that: Each of the clamping units further includes a compensation capacitor, a first end of the compensation capacitor is connected to the first electrode of the first transistor, and a second end of the compensation capacitor is connected to the second electrode of the second transistor.

4. The digital-to-analog converter output stage circuit according to claim 2, characterized in that: Each of the bias units comprises: a third transistor, a fourth transistor and a first tail current source; The first electrode of the third transistor is respectively connected to the VDD terminal and the first electrode of the fourth transistor, the second electrode of the third transistor is connected to the clamping unit, and the third electrode of the third transistor is respectively connected to the second electrode and the third electrode of the fourth transistor; the third transistor and the fourth transistor are used to provide the bias voltage for the first transistor and the second transistor; The first end of the first tail current source is connected to the second electrode of the fourth transistor, and the two ends of the first tail current source are connected to the clamping unit; the first tail current source is used to provide a bias current for the clamping unit.

5. The digital-to-analog converter output stage circuit according to claim 4, characterized in that: The first transistor and the second transistor are PMOS transistors, and the third transistor and the fourth transistor are NMOS transistors.

6. The digital-to-analog converter output stage circuit according to claim 1, characterized in that: The current steering DAC circuit includes a current output unit and two voltage output units; wherein, The current output unit is used to output the analog current signal of corresponding polarity to the corresponding voltage output unit through each intermediate node according to the digital input signal; Each of the voltage output units is used for outputting the analog voltage signal of corresponding polarity through a voltage output terminal according to the received analog current signal.

7. The digital-to-analog converter output stage circuit according to claim 6, characterized in that: Each of the voltage output units comprises: a fifth transistor and a resistor; wherein, The first electrode of the fifth transistor is connected to the intermediate node, the second electrode of the fifth transistor is connected to the voltage output terminal and the first end of the resistor, the third electrode of the fifth transistor is connected to the clamping circuit; the second end of the resistor is connected to the VDD terminal.

8. The digital-to-analog converter output stage circuit according to claim 6, characterized in that: The current output unit includes a second tail current source, a third tail current source and a plurality of switch sub-units; wherein, The first end of each of the switch sub-units is respectively connected to the VDD end, the second end of each of the switch sub-units is respectively connected to one of the intermediate nodes and the first end of the second tail current source, the third end of each of the switch sub-units is respectively connected to another of the intermediate nodes and the first end of the third tail current source; the second end of the second tail current is respectively connected to the ground line and the second end of the third tail current source; The analog current signal is obtained by subtracting the sum of the current signals output from the second ends of the multiple switch sub-units from the current signal output from the second tail current source, or by subtracting the sum of the current signals output from the third ends of the multiple switch sub-units from the current signal output from the third tail current source.

9. The digital-to-analog converter output stage circuit according to claim 8, characterized in that: Each of the switch subunits comprises: a first switch, a second switch, and a current source; wherein, The first end of the current source is connected to the VDD end, and the second end of the current source is connected to the first end of the first switch and the first end of the second switch respectively; The second end of the first switch is connected to the intermediate node; The second end of the second switch is connected to another intermediate node.

10. A radio frequency transmitter integrated circuit, characterized in that: include: A digital input circuit, used for outputting a digital input signal; A digital-to-analog converter, comprising a core circuit and a digital-to-analog converter output stage circuit according to any one of claims 1 to 9, wherein the core circuit is connected to the digital input circuit and the digital-to-analog converter output stage circuit respectively; the core circuit is used to convert the digital input signal into an analog output signal, and the digital-to-analog converter output stage circuit is used to output an analog voltage signal according to the analog output signal; A voltage type filter circuit, connected to the output stage circuit of the digital-to-analog converter, and used for filtering the analog voltage signal; The mixing circuit is connected to the voltage-type filtering circuit and is used to mix the filtered analog voltage signal and then output a radio frequency signal.

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