Current-to-voltage circuits and digital isolators

Abstract

The present application provides a current-to-voltage circuit, which includes an input terminal for receiving an input current, an output terminal for outputting a power supply voltage, a voltage generating circuit, and a current-voltage circuit. The input terminal of the voltage generating circuit receives an input current and generates a power supply voltage according to the input current. The current-voltage circuit includes an operational amplifier and a voltage-stabilizing switch device, wherein the control terminal of the voltage-stabilizing switch device is coupled to the output terminal of the operational amplifier. When the input current is less than a regulating threshold, the voltage-stabilizing switch device is turned off, and when the input current is greater than the regulating threshold, the voltage-stabilizing switch device is turned on. The present application can solve the problem that the output voltage changes greatly when the input current changes.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a current-to-voltage circuit and a digital isolator. Background Art

[0002] Digital isolators based on OOK (on-off keying) modulation usually include a current-to-voltage circuit. The working principle of the digital isolator is: when there is input current at the input end, the current-to-voltage circuit generates a supply voltage based on the current to power the transmitting circuit. The transmitting circuit works and sends a high-frequency carrier signal. After attenuation through the isolation barrier, the receiving circuit receives and processes the high-frequency carrier signal and outputs the corresponding output voltage VO to achieve isolated signal transmission. However, since the supply voltage is closely related to the frequency of the high-frequency carrier signal, changes in the supply voltage will cause changes in the frequency of the high-frequency carrier signal, affecting the normal operation of the digital isolator.

[0003] Therefore, it is necessary to design a current-to-voltage circuit whose power supply voltage generated is relatively stable and whose frequency variation range of the high-frequency carrier signal generated according to the power supply voltage is smaller, so as to ensure the normal operation of the digital isolator. Summary of the invention

[0004] The present application provides a current-to-voltage circuit and a digital isolator to solve the problem of how to output a stable voltage, thereby solving the problem of a large carrier frequency variation range in the digital isolator.

[0005] A current-to-voltage circuit provided in the present application includes: an input end for receiving an input current; an output end for outputting a supply voltage; a voltage generating circuit having an input end and an output end, wherein the input end of the voltage generating circuit is coupled to the input end of the current-to-voltage circuit to receive the input current and generate a supply voltage according to the input current; and a current-voltage circuit, including an operational amplifier and a voltage-stabilizing switch device coupled to the output end of the operational amplifier; wherein when the input current is less than a regulation threshold, the voltage-stabilizing switch device is turned off, and when the input current is greater than the regulation threshold, the voltage-stabilizing switch device is turned on.

[0006] The present application provides a digital isolator, including a current-to-voltage circuit, a transmitting circuit, generating a transmitting signal according to a power supply voltage; an isolation circuit, generating a receiving signal according to the transmitting signal; and a receiving circuit, generating an output voltage according to the receiving signal; wherein the frequency of the transmitting signal is equal to the frequency of the receiving signal. The current-to-voltage circuit includes an input terminal, receiving an input current; an output terminal, outputting a power supply voltage; a voltage generating circuit, having an input terminal and an output terminal, the input terminal of the voltage generating circuit is coupled to the input terminal of the current-voltage circuit to receive the input current and generate a power supply voltage according to the input current; and the current-voltage circuit includes an operational amplifier and a voltage-stabilizing switch device coupled to the output terminal of the operational amplifier; wherein when the input current is less than a regulation threshold, the voltage-stabilizing switch device is turned off, and when the input current is greater than the regulation threshold, the voltage-stabilizing switch device is turned on. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions in the present application or the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0008] Figure 1 A schematic diagram of the circuit structure of a typical existing digital isolator 100 is provided;

[0009] Figure 2 Given Figure 1 The waveform diagram of each signal during the operation of the digital isolator 100 is shown;

[0010] Figure 3 A schematic diagram of the normal adjustment frequency range and abnormal demodulation frequency range of the digital isolator is given;

[0011] Figure 4 A circuit diagram of a current-to-voltage circuit 400 according to an embodiment of the present invention is provided;

[0012] Figure 5 Given Figure 4 The waveform diagram of the supply voltage Vreg in the current-to-voltage circuit 400 is shown;

[0013] Figure 6 A circuit structure diagram of a current-to-voltage circuit 600 according to another embodiment of the present invention is provided;

[0014] Figure 7 They were given Figure 4 The current-to-voltage circuit 400 and Figure 6 The waveform diagram of each supply voltage Vreg in the current-to-voltage circuit 600 shown;

[0015] Figure 8 A circuit diagram of a current-to-voltage circuit 800 according to another embodiment of the present invention is provided.

[0016] Fig. 9 A circuit diagram of a current-to-voltage circuit 900 according to yet another embodiment of the present invention is provided. DETAILED DESCRIPTION

[0017] The technical scheme in the embodiment of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiment of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0018] In the description of the present invention, it should be noted that throughout the specification and claims, the "coupling" used is defined as being directly or indirectly connected in an electrical or non-electrical manner. When an element is described as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or one or more intermediate elements may be present. In contrast, when an element is described as being "directly connected" or "directly coupled" to another element, there is no intermediate element. Throughout the specification, reference to "one embodiment", "embodiment", "one example" or "example" means that the specific features, structures or characteristics described in conjunction with the embodiment or example are included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment", "in an embodiment", "one example" or "example" appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. In addition, specific features, structures or characteristics may be combined in one or more embodiments or examples in any appropriate combination and / or sub-combination. In addition, it should be understood by those of ordinary skill in the art that the drawings provided herein are for illustrative purposes, and the drawings are not necessarily drawn to scale. The same reference numerals indicate the same device. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0019] Figure 1A circuit structure diagram of a typical existing digital isolator 100 is given. The digital isolator 100 includes a current-to-voltage circuit, a transmitting circuit, an isolation circuit, and a receiving circuit. The current-to-voltage circuit receives an input current IIN, and generates a power supply voltage Vreg according to the input current IIN to power the transmitting circuit. The transmitting circuit generates a transmitting signal TX according to the power supply voltage Vreg, and the transmitting signal TX generally includes a first transmitting signal TX+ and a second transmitting signal TX-. The first transmitting signal TX+ and the second transmitting signal TX- are passed through the isolation circuit to generate a first receiving signal RX+ and a second receiving signal RX-, wherein the first receiving signal RX+ and the first transmitting signal TX+ have the same frequency, and the amplitude of the first receiving signal RX+ is smaller than the first transmitting signal TX+. The receiving circuit receives the first receiving signal RX+ and the second receiving signal RX-, and generates an output voltage VO according to the first receiving signal RX+ and the second receiving signal RX-. For the transmitting circuit, the change of the power supply voltage Vreg will affect the frequency of the first transmitting signal TX+ and the second transmitting signal TX-, wherein the lower the power supply voltage Vreg, the lower the frequency of the first transmitting signal TX+ and the second transmitting signal TX-, and the higher the power supply voltage Vreg, the higher the frequency of the first transmitting signal TX+ and the second transmitting signal TX-. That is, the frequencies of the first transmission signal TX+ and the second transmission signal TX- are determined by the power supply voltage Vreg. The digital isolator 100 operates in the first operating mode or the second operating mode according to the input current (IIN), and its operating principle is as follows:

[0020] The first working mode: when the input current IIN is less than the preset working value, the supply voltage Vreg is zero. At this time, the transmitting circuit outputs the first transmission signal TX+ and the second transmission signal TX- as logic low, and the output voltage VO of the receiving circuit is at a logic high potential.

[0021] The second working mode: when the input current IIN is greater than the working preset value, the supply voltage Vreg is equal to the output preset value Vset, and the transmitting circuit is powered. The transmitting signal TX is a pulse width modulated signal. The transmitting signal TX passes through the isolation circuit, is amplified and demodulated by the receiving circuit, and then outputs the output voltage VO. At this time, the output voltage VO is a logic low potential.

[0022] Figure 2 Given Figure 1 The waveform diagram of each signal during the operation of the digital isolator 100 is shown. Figure 1 100 pairs of digital isolators Figure 2 The waveforms of the signals in Figure 2It can be seen that at time t1, the input current IIN jumps from 0A to a certain current value (greater than the working preset value), the power supply voltage Vreg rises rapidly, and rises to the output preset value Vset at time t2. From time t2 to time t3, the transmission signal TX is a pulse width modulated signal. The receiving signal RX is also a pulse width modulated signal, wherein the amplitude of the receiving signal RX is less than the amplitude of the transmitting signal TX. From time t2 to time t3, the output voltage VO is in a logic low state. At time t3, the input current IIN jumps from a certain current value (greater than the working preset value) to 0A, therefore, the power supply voltage Vreg starts to decrease from time t3, and decreases to zero at time t4. From time t4 to time t5, the transmission signal TX and the receiving signal RX are 0V, and are no longer pulse width modulated signals. From time t4 to time t5, the output voltage VO is in a logic high state.

[0023] Figure 3 A schematic diagram of the frequency range of normal adjustment and the frequency range of abnormal demodulation of the digital isolator is given. In order to ensure the anti-noise interference capability of the digital isolator, the receiving circuit usually has a bandpass demodulation characteristic. When the receiving signal RX is near the bandpass frequency f0, the receiving circuit can demodulate the receiving signal RX. When the frequency of the receiving signal RX is not near the bandpass frequency f0, the receiving circuit cannot demodulate the receiving signal RX, resulting in abnormal demodulation. That is, Figure 3 As shown in the figure, when the frequency of the received signal RX is between f0-△f and f0+△f, the receiving circuit can demodulate the received carrier signal normally. When the frequency of the received signal RX is less than f0-△f, or greater than f0+△f, the receiving circuit cannot demodulate the received signal RX normally. When the power supply voltage Vreg varies greatly, the frequency range of the received signal RX received by the receiving circuit will also be large. A received signal with too high or too low frequency may cause abnormal demodulation, which will eventually affect the accuracy of the output level of the digital isolator and lead to erroneous output. Usually, the passband frequency is 250MHZ-300MHZ.

[0024] Therefore, in actual circuit design, in order to ensure the normal operation of the digital isolator, the power supply voltage Vreg needs to be kept constant to ensure the stability of the frequency of the transmitting signal TX and the receiving signal RX. That is, a current-to-voltage circuit is required. When the input current IIN changes within a certain range, such as 2 to 20mA, and the temperature changes within a certain range, such as -40 to 150°C for automotive grade requirements and -40 to 125°C for industrial grade requirements, the power supply voltage Vreg can be kept relatively constant.

[0025] Figure 4A circuit diagram of a current-to-voltage circuit 400 according to an embodiment of the present invention is given. The current-to-voltage circuit 400 includes an input terminal, an output terminal, a voltage generating circuit 401 and a current-voltage circuit 402, wherein the input terminal receives an input current IIN, and the output terminal provides a power supply voltage Vreg. The voltage generating circuit 401 has an input terminal and an output terminal, wherein the input terminal of the voltage generating circuit 401 receives an input current IIN, and the voltage generating circuit 401 generates a power supply voltage Vreg according to the input current IIN and outputs it at the output terminal. The current-voltage circuit 402 includes an operational amplifier EA and a voltage-stabilizing switch device Ms, wherein the output terminal of the operational amplifier EA outputs an error signal Vea to the control terminal of the voltage-stabilizing switch device MS. When the input current IIN is less than the adjustment threshold value Ith, the voltage-stabilizing switch device MS is turned off. When the input current IIN is greater than the adjustment threshold value Ith, the voltage-stabilizing switch device MS is turned on, and the current flowing through the voltage-stabilizing switch device MS is the voltage-stabilizing current IS, and the voltage-stabilizing current IS is not zero.

[0026] exist Figure 4 In the illustrated embodiment, the voltage generating circuit 401 includes a first resistor R1X, a second resistor R1Y, a first transistor M1, a second transistor M2, a third resistor R3X, a fourth resistor R3Y and a fifth resistor R2. The first resistor R1X has a first end and a second end, wherein the first end of the first resistor R1X is coupled to the input end of the voltage generating circuit 401 to receive the input current IIN. The second resistor R1Y has a first end and a second end, wherein the first end is coupled to the input end of the voltage generating circuit 401 to receive the input current IIN. The first end of the third resistor R3X is connected to the second end of the first resistor R1X, and the second end thereof is coupled to the reference ground GND1. The first end of the fourth resistor R3Y is coupled to the second end of the second resistor R1Y, and the second end thereof is coupled to the reference ground GND1. The second end of the fifth resistor R2 is coupled to the reference ground GND1. The drain end of the first transistor M1 is coupled to the second end of the second resistor R1Y, and the source end of the first transistor M1 is coupled to the first end of the fifth resistor R2. The gate terminal of the second transistor M2 is coupled to the gate terminal of the first transistor M1, the drain terminal of the second transistor M2 is coupled to the gate terminal of the second transistor M2 and the second terminal of the first resistor R1X, and the source terminal of the second transistor M2 is coupled to the reference ground GND1. In one embodiment, the resistance of the first resistor R1X is equal to the resistance of the second resistor R1Y. In one embodiment, the resistance of the first resistor R1X is between 5KΩ and 20KΩ. Figure 4 In the illustrated embodiment, the adjustment threshold Ith is related to the resistance of the first resistor R1X. In one embodiment, the adjustment threshold Ith is between 100uA and 300uA.

[0027] Figure 4 The current-to-voltage circuit 400 shown in the figure has the following working process when it is started:

[0028] In the first stage, when the power supply voltage Vreg is less than the operating voltage of the operational amplifier EA, for example, when the power supply voltage is less than 1 V, the operational amplifier EA does not work, the voltage regulating switch device Ms is in the off state, and the power supply voltage Vreg increases over time.

[0029] In the second stage, when the power supply voltage Vreg is greater than the operating voltage of the operational amplifier EA, the power supply voltage Vreg is lower than the output preset value Vset, the current flowing through the first transistor M1 is greater than the current flowing through the second transistor M2, the first voltage VX is greater than the second voltage VY, and theoretically the error output signal of the operational amplifier EA is high. However, due to the limited slew rate of the operational amplifier EA and the fact that there is usually a large parasitic capacitance at the gate terminal of the voltage regulator switching device Ms, the gate terminal potential of the voltage regulator switching device Ms is less than the power supply voltage Vreg, and the gate terminal voltage of the voltage regulator switching device Ms is always lower than the source terminal voltage, that is, the output of the operational amplifier EA is always lower than the power supply voltage Vreg, the voltage regulator switching device Ms is turned on, the voltage regulator current IS is not zero, and the charging speed of the power supply voltage Vreg slows down.

[0030] In the third stage, the operational amplifier EA adjusts the supply voltage Vreg to maintain it at the output preset value Vset. In the third stage, when the input current IIN is greater than the adjustment threshold, the operational amplifier controls the voltage regulating switch device Ms to turn on and adjusts the magnitude of the voltage regulating current IS.

[0031] By using the virtual short characteristic of the operational amplifier EA, the first voltage VX is equal to the second voltage VY, where VX=VY=VGS2 (VGS2 is the gate-source voltage of the second transistor M2), in this way the currents flowing through the first transistor M1 and the second transistor M2 are equal. The supply voltage Vreg is determined by the following formula (1).

[0032] The supply voltage Vreg is:

[0033]

[0034] It should be noted that, in the above formula, R1X represents the resistance of the first resistor R1X, and R1Y represents the resistance of the second resistor R1Y. Similarly, R3X represents the resistance of the third resistor R3X, and R3Y represents the resistance of the fourth resistor R3Y. N is the size ratio of the second switch device M2 to the first switch device M1, VT is the thermal voltage, VGS2 is the gate-source voltage of the second switch device M2, and VGS1 is the gate-source voltage of the first switch device M1.

[0035] When the second switch device M2 is in the subthreshold region, its gate-source voltage VGS2 decreases as the temperature increases. The thermal voltage VT is a positive temperature system, that is, the thermal voltage VT increases as the temperature increases. Therefore, the ratio between the first resistor R1X, the second resistor R2Y, the third resistor R3X, and the fourth resistor R3Y, and the proportional coefficient N can be adjusted to achieve that the power supply voltage Vreg remains basically unchanged as the temperature changes. For example, by reasonably setting the ratio of the resistors and the proportional system, it is relatively easy to reduce the temperature characteristics of the power supply voltage Vreg to 0.3 millivolts per degree Celsius (0.3mV / ℃).

[0036] Therefore, according to Figure 4 The circuit design shown in , this current-to-voltage circuit can generate a high-precision supply voltage Vreg, which has little response to changes in input current, temperature and process. Figure 4 The current-to-voltage circuit shown can maintain the stability and accuracy of the supply voltage Vreg under the conditions of input current, temperature and process variations.

[0037] Figure 5 Given Figure 4 The waveform diagram of the power supply voltage Vreg in the current-to-voltage circuit 400 is shown. Assuming the power supply voltage Vreg has a preset value Vset, the power supply voltage Vreg will go through the first stage, the second stage and the third stage from the start-up.

[0038] In the first stage, the power supply voltage Vreg increases rapidly until the power supply voltage Vreg increases to, for example, 1V, the operational amplifier starts to work, the voltage regulator switch device Ms is turned on, and the current-to-voltage circuit enters the second stage. In the second stage, since the voltage regulator switch device MS is turned on, the voltage regulator current IS is not zero, and the rate of increase of the power supply voltage Vreg decreases. The power supply voltage Vreg increases until the power supply voltage Vreg is equal to the output preset value Vset, and the current-to-voltage circuit enters the third stage. In the third stage, the power supply voltage Vreg is maintained at the output preset value Vset.

[0039] Figure 6 A circuit structure diagram of a current-to-voltage circuit 600 according to another embodiment of the present invention is provided. Figure 4Compared to the current-to-voltage circuit 400 shown in the figure, the current-to-voltage circuit 600 also includes a power monitoring circuit 405 and a monitoring switch device Mp. The first end of the power monitoring circuit 405 is coupled to the output end OUT of the current-to-voltage circuit 700 to receive the power supply voltage Vreg, and the second end of the power monitoring circuit 405 outputs a reset signal Rset. The monitoring switch device Mp has a first end, a second end and a third end, wherein the first end receives the reset signal Rset, the second end is coupled to the output end of the current-to-voltage circuit 700, and the third end is coupled to the output end of the operational amplifier. Figure 6 In the illustrated embodiment, the monitoring switch device Mp is a P-type field effect transistor, the drain terminal of the monitoring switch device Mp is coupled to the output terminal of the operational amplifier EA to receive the error signal Vea, and the source terminal of the monitoring switch device Mp is coupled to the output terminal of the current-to-voltage circuit 700. The power monitoring circuit 405 detects the supply voltage Vreg, and generates a reset signal Rset according to the supply voltage Vreg to control the on or off of the monitoring switch device Mp. More specifically, when the supply voltage Vreg is lower than the comparison threshold Vcom, the reset signal Reset is at a logic low, the monitoring switch device Mp is turned on, the error signal Vea is pulled up to the supply voltage Vreg, the voltage stabilizing switch device Ms is turned off, the voltage stabilizing current Is is zero, and the supply voltage Vreg is quickly established. When the supply voltage Vreg is higher than the comparison threshold Vcom, the reset signal Reset is at a logic high, the monitoring switch device Mp is turned off, the error signal Vea controls the voltage stabilizing switch device Ms to turn on, and the voltage stabilizing current Is is not zero. The feedback loop starts to work normally, and the supply voltage Vreg is adjusted to a stable value. In one embodiment, the comparison threshold Vcom can be set to 80%×Vset to 95%×Vset. This can greatly reduce Figure 5 By setting the comparison threshold Vcom close to the output preset value Vset, the supply voltage Vreg can be adjusted to a stable state more quickly, thereby improving the establishment speed of the supply voltage Vreg.

[0040] In summary, by using the power monitoring circuit 405 to monitor the power supply voltage Vreg and controlling the on and off of the monitoring switch device Mp according to the power supply voltage Vreg, stable control of the power supply voltage Vreg can be achieved. By adjusting the comparison threshold, the establishment speed of the power supply voltage Vreg can be optimized so that it can reach a stable state faster.

[0041] Figure 7 They were given Figure 4 The current-to-voltage circuit 400 and Figure 6The startup waveform diagram of each supply voltage Vreg in the current-to-voltage circuit 600 shown. For the current-to-voltage circuit 400, starting from time t1, the voltage-stabilizing switch device Ms is turned on, the voltage-stabilizing current Is is not zero, and the supply voltage Vreg needs a longer time (from time t1 to time t2) to reach the output preset value Vset. For the current-to-voltage circuit 600, by setting the comparison threshold Vcom to 90%×Vset, that is, at time t1, the voltage-stabilizing switch device Ms in the current-to-voltage circuit 600 is not turned on, the voltage-stabilizing current Is is zero, and the supply voltage Vreg still keeps rising rapidly until time t1', the supply voltage rises to 90%×Vset, the voltage-stabilizing switch device Ms in the current-to-voltage circuit 600 is turned on, the voltage-stabilizing current Is is not zero, and the supply voltage Vreg rises to the output preset value Vset at time t2'. Figure 7 It can be seen that the time required for starting the supply voltage Vreg in the current-to-voltage circuit 600 is smaller.

[0042] Figure 8 A circuit diagram of a current-to-voltage circuit 800 according to another embodiment of the present invention is provided. Figure 4 Compared to the current-to-voltage circuit 400 shown in the figure, the current-to-voltage circuit 800 also includes a current management circuit 404. The current management circuit 404 includes a current detection circuit 4041, a current control transistor Mdis and a current control resistor Rdis. The current management circuit 404 has an input end for receiving a front-end current IF, and an output end for providing an input current IIN. The current detection circuit 4041 has an input end, a first output end and a second output end, wherein the input end of the current detection circuit 4041 is coupled to the input end of the current management circuit 404, the first output end is coupled to the output end of the current-to-voltage circuit 800 to provide the input current IIN, and the second output end outputs a current detection signal Isen, wherein the current detection signal Isen represents the magnitude of the current flowing through the current detection circuit. Figure 8 In the illustrated embodiment, the current detection circuit 4041 includes a detection resistor Rsen and a voltage-to-current circuit, wherein a first end of the detection resistor Rsen is coupled to an input end of the current management circuit 404, a second end of the detection resistor Rsen is coupled to an output end of the current management circuit 404, and a voltage across the detection resistor Rsen is a detection voltage Vsen. The voltage-to-current circuit receives the detection voltage Vsen and generates a current detection signal Isen according to the detection voltage Vsen. A first end of the current control resistor Rdis receives the current detection signal Isen, and a second end of the current control resistor Rdis is coupled to a reference ground GND1. A drain end of the current control transistor Mdis is coupled to an input end of the current management circuit 404, a source end of the current control transistor Mdis is coupled to a reference ground GND1, and a gate end of the current control transistor Mdis is coupled to a first end of the current control resistor Rdis.

[0043] When the front-end current IF is less than the front-end threshold Fth, the detection voltage Vsen across the detection resistor Rsen is small, and the current detection signal Isen generated according to the detection voltage Vsen is small. The discharge voltage Vdis generated by the current detection signal Isen flowing through the current control resistor Rdis is low, and the discharge voltage Vdis is less than the voltage threshold required for the current control transistor Mdis to turn on. Therefore, the current control transistor Mdis is in the off state, that is, the input current IIN can be obtained to be equal to the front-end input current IF. When the front-end current IF is greater than the front-end threshold Fth, when the discharge voltage Vdis reaches the turn-on threshold of the current control transistor Mdis, the current control transistor Mdis is turned on, and the current flowing through the current control transistor Mdis is the regulating current Idis, so IIN = IF-Idis. Since the input current IIN is only a part of the front-end current IF, the voltage regulating switch device Ms only needs a smaller size to adjust the power supply voltage Vreg to maintain the preset output value Vset. Figure 8 In the illustrated embodiment, the front-end threshold Fth is related to the resistance value of the current control resistor Rdis.

[0044] Fig. 9 A circuit diagram of a current-to-voltage circuit 900 according to another embodiment of the present invention is provided. Figure 4 Compared with the current-to-voltage circuit 400 shown in FIG. 1 , the current-to-voltage circuit 900 further includes a current management circuit 404, a power monitoring circuit 405, and a monitoring switch device Mp. Figure 8 The battery management circuit structure in the current-to-voltage circuit 800 embodiment is the same and the functions implemented are the same. The power detection circuit 405 and the detection switch MP and Figure 6 The power detection circuit 405 and the detection switch MP in the illustrated embodiment of the current-to-voltage circuit 600 have the same structure and implement the same functions.

[0045] In summary, the current-to-voltage circuit described in the present application can utilize MOS tubes (such as M1 and M2) working in the subthreshold region to generate high-precision voltage, and this voltage is relatively insensitive to temperature and process changes. A MOS tube working in the subthreshold region refers to a MOS tube whose working state is in a low-voltage state, close to or slightly lower than its threshold voltage. In this state, the characteristics of the MOS tube become more stable and the response is more linear, thereby achieving higher precision. By utilizing the MOS tube structure working in the subthreshold region, the designed current-to-voltage circuit can generate a high-precision voltage output. Since this circuit is less affected by temperature and process changes, it can maintain stable performance under different working environments. This high-precision voltage output is very important for many applications that require stable voltage.

[0046] Secondly, the current-to-voltage circuit has high precision, is less affected by temperature, process and input current, and has enhanced stability and reliability, thereby improving the transmission reliability of a digital isolator using the current-to-voltage circuit.

[0047] Furthermore, the power supply voltage Vreg of the current-to-voltage circuit has a faster establishment speed, which can improve the transmission speed of the digital isolator. Since part of the transmission delay comes from the establishment delay of the power supply of the TX circuit of the digital isolator, the transmission speed of the digital isolator using the current-to-voltage circuit can be improved by using a current-to-voltage circuit with a faster establishment speed.

[0048] Specifically, the current-to-voltage circuit is integrated inside the electronic device to ensure that the device can obtain a stable voltage supply under various working conditions.

[0049] Therefore, in order to meet the requirements of stability and accuracy, it is necessary to design a high-precision current-to-voltage circuit whose output voltage is little affected by input current, temperature and process. The current-to-voltage circuit can convert the input current into a stable output voltage for use by the transmitting circuit.

[0050] Although the present invention has been described with reference to several typical embodiments, it should be understood that the terms used are illustrative and exemplary, rather than restrictive. Since the present invention can be embodied in a variety of forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims, so all changes and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A current-to-voltage circuit, comprising: An input terminal, receiving an input current; Output terminal, output supply voltage; A voltage generating circuit has an input terminal and an output terminal, wherein the input terminal of the voltage generating circuit is coupled to the input terminal of the current-to-voltage circuit to receive an input current and generate a supply voltage according to the input current; as well as A current-voltage circuit includes an operational amplifier and a voltage-stabilizing switch device, wherein a control end of the voltage-stabilizing switch device is coupled to an output end of the operational amplifier; When the input current is less than the regulation threshold, the voltage stabilizing switch device is turned off; when the input current is greater than the regulation threshold, the voltage stabilizing switch device is turned on; The voltage generating circuit comprises: A first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the input end of the voltage generating circuit to receive an input current; A second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the input end of the voltage generating circuit to receive an input current; A third resistor has a first end and a second end, the first end of the third resistor is coupled to the second end of the first resistor, and the second end of the third resistor is coupled to a reference ground; A fourth resistor has a first end and a second end, the first end of the fourth resistor is coupled to the second end of the second resistor, and the second end of the fourth resistor is coupled to a reference ground; A fifth resistor having a first end and a second end, wherein the second end of the fifth resistor is coupled to a reference ground; a first transistor, wherein a drain terminal of the first transistor is coupled to the second terminal of the second resistor, and a source terminal of the first transistor is coupled to the first terminal of the fifth resistor; and The second transistor has a gate terminal coupled to the gate terminal of the first transistor, a drain terminal of the second transistor coupled to the gate terminal of the second transistor and the second terminal of the first resistor, and a source terminal of the second transistor coupled to the reference ground.

2. The current-to-voltage circuit according to claim 1, wherein the adjustment threshold is related to the resistance value of the first resistor.

3. The current-to-voltage circuit according to claim 1, wherein the supply voltage is between 1.2V and 2V.

4. The current-to-voltage circuit according to claim 1, further comprising: A power monitoring circuit receives a power supply voltage and generates a reset signal according to the power supply voltage and a comparison threshold; as well as A monitoring switch device, a first terminal of which receives a reset signal, a second terminal of which is coupled to the output terminal of the current-to-voltage circuit, and a third terminal of which is coupled to the output terminal of the operational amplifier. When the supply voltage is less than the comparison threshold, the monitoring switch device is turned on and the voltage stabilizing switch device is turned off; When the power supply voltage is greater than the comparison threshold, the monitoring switch device is disconnected and the voltage stabilizing switch device is turned on.

5. The current-to-voltage circuit according to claim 1, wherein the supply voltage has an output preset value, and the comparison threshold is 80%*Vset-95%*Vset, wherein Vset is the output preset value.

6. The current-to-voltage circuit according to claim 1 further comprises a current management circuit, wherein the current management circuit comprises: Input terminal, receiving the front-end current; Output terminal, providing input current; A current detection circuit having an input terminal, a first output terminal and a second output terminal, wherein the input terminal of the current detection circuit is coupled to the input terminal of the current management circuit, the first output terminal is coupled to the output terminal of the current-to-voltage circuit to provide an input current, and the second output terminal outputs a current detection signal, wherein the current detection signal represents the magnitude of the current flowing through the current detection circuit; A current control transistor, whose drain terminal is coupled to the input terminal of the power management circuit, whose gate terminal receives the current detection signal, and whose source terminal is coupled to the reference ground; A current control resistor, coupled between the second output terminal of the current detection circuit and a reference ground; Wherein, when the front-end current is less than the front-end threshold, the current control transistor is turned off; When the front-end current is greater than the front-end threshold, the current control transistor is turned on.

7. The current-to-voltage circuit according to claim 6, wherein the current detection circuit comprises a detection resistor and a voltage-to-current circuit, wherein a voltage detection signal is generated according to the current flowing through the detection resistor, and the voltage-to-current circuit generates a current detection signal according to the voltage detection signal.

8. The current-to-voltage circuit according to claim 6, wherein the front-end threshold is related to the resistance value of the current control resistor.

9. A digital isolator comprising: The current-to-voltage circuit according to any one of claims 1 to 8; A transmitting circuit generates a transmitting signal according to a supply voltage; an isolation circuit for generating a receiving signal based on the transmitting signal; as well as a receiving circuit, generating an output voltage according to a received signal; The frequency of the transmitted signal is equal to the frequency of the received signal.

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