Power device and preparation method, power module, power conversion circuit and vehicle

Abstract

The present invention discloses a power device and a preparation method, a power module, a power conversion circuit, and a vehicle. The power device includes: providing a silicon carbide substrate; forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate; growing at least one silicon film layer on the side of the silicon carbide epitaxial layer away from the silicon carbide substrate; forming a gate trench on the side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer; forming a trench-type gate structure in the gate trench; and forming a drain on the side of the silicon carbide substrate away from the silicon carbide epitaxial layer. The technical solution provided by the embodiment of the present invention improves the electron mobility of a single-trench power device and reduces the on-resistance of the single-trench power device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a power device and a preparation method thereof, a power module, a power conversion circuit and a vehicle. Background Art

[0002] Compared with silicon power devices, single-trench silicon carbide metal-oxide field-effect transistor (SiC MOSFET) power devices have advantages such as large bandgap, high critical breakdown electric field, and high temperature resistance.

[0003] However, the process of single-trench silicon carbide metal-oxide field-effect transistor power devices is still unstable, resulting in excessively large on-resistance of the power devices. Summary of the Invention

[0004] The present invention provides a power device and a preparation method thereof, a power module, a power conversion circuit and a vehicle, so as to reduce the on-resistance of a single-trench power device.

[0005] According to one aspect of the present invention, there is provided a method for preparing a power device, comprising:

[0006] Providing silicon carbide substrates;

[0007] forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate;

[0008] growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate;

[0009] forming a gate trench on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer;

[0010] forming a trench gate structure in the gate trench;

[0011] forming a planar source structure on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer;

[0012] A drain is formed on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer.

[0013] According to another aspect of the present invention, there is provided a power device, comprising:

[0014] Silicon carbide substrate;

[0015] a silicon carbide epitaxial layer, wherein the silicon carbide epitaxial layer is located on one side of the silicon carbide substrate;

[0016] At least one silicon film layer, wherein the at least one silicon film layer is grown on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate;

[0017] a gate trench, the gate trench being located on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer;

[0018] a trench gate structure, wherein the trench gate structure is located in the gate trench;

[0019] a planar source structure, the planar source structure being located on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer;

[0020] A drain electrode is located on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer.

[0021] According to another aspect of the present invention, a power module is provided, which adopts the power device described in any one of the embodiments of the present invention, and the substrate is used to support the power device.

[0022] According to another aspect of the present invention, there is provided a power conversion circuit, the power conversion circuit being used for one or more of current conversion, voltage conversion, and power factor correction;

[0023] The power conversion circuit includes a circuit board and at least one power device as described in any one of the embodiments of the present invention, and the power device is electrically connected to the circuit board.

[0024] According to another aspect of the present invention, a vehicle is provided, comprising a load and a power conversion circuit according to any one of the embodiments of the present invention, wherein the power conversion circuit is configured to convert alternating current and / or direct current into alternating current and / or direct current and then input the converted alternating current and / or direct current into the load.

[0025] In the preparation process of the single-trench silicon carbide metal-oxide field-effect transistor power device provided by an embodiment of the present invention, a silicon film layer is grown directly on the side of the silicon carbide epitaxial layer away from the silicon carbide substrate to form a Si / SiC heterojunction composed of the silicon carbide epitaxial layer and the silicon film layer. This process does not require wafer bonding, thus simplifying the preparation process of the Si / SiC heterojunction and reducing the preparation cost. Furthermore, the Si / SiC heterojunction can have ideal diode rectification characteristics and space charge modulation effects, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0026] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 This is a flow chart of a method for preparing a power device provided by an embodiment of the present invention;

[0029] Figure 2-Figure 6 yes Figure 1 Schematic diagram of the structure corresponding to each step of the preparation method of the medium power device;

[0030] Figure 7 is a flow chart of another method for preparing a power device provided by an embodiment of the present invention;

[0031] Figure 8 This is a flow chart of another method for preparing a power device provided by an embodiment of the present invention;

[0032] Figure 9 is a flow chart of another method for preparing a power device provided by an embodiment of the present invention;

[0033] Figure 10 yes Figure 9 Schematic diagram of the structure corresponding to S1303 and S1304;

[0034] Figure 11 This is a flow chart of another method for preparing a power device provided by an embodiment of the present invention;

[0035] Figure 12-17 yes Figure 11 Schematic diagram of the structures corresponding to each step of the preparation method of medium-power devices. DETAILED DESCRIPTION

[0036] To help those skilled in the art better understand the present invention, the following will provide a clear and complete description of the technical solutions in the embodiments of the present invention, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments derived by those skilled in the art based on the embodiments of the present invention without creative effort should fall within the scope of protection of the present invention.

[0037] It should be noted that the terms "first," "second," and the like in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or precedence. It should be understood that the numbers used in this manner are interchangeable where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or devices is not necessarily limited to those steps or devices explicitly listed, but may include other steps or devices that are not explicitly listed or that are inherent to these processes, methods, products, or apparatuses.

[0038] As described in the background art above, the process for single-trench SiC metal-oxide field-effect transistor (MOSFET) power devices is still unstable, resulting in excessive on-resistance in the MOSFETs. After careful research, the inventors discovered that by bonding a silicon wafer to the surface of the SiC epitaxial layer of the MOSFETs, a Si / SiC heterojunction is formed. This Si / SiC heterojunction can improve the carrier mobility of the MOSFETs, resulting in better on-state characteristics and lower on-resistance. However, bonding a silicon wafer to the surface of the silicon carbide epitaxial layer of a single-trench silicon carbide metal-oxide field-effect transistor power device through a bonding process requires the preparation of the silicon wafer in advance. After forming the Si / SiC heterojunction through the wafer bonding process, high-temperature annealing and cutting of the silicon wafer are required. Finally, chemical polishing and other processes are required to reduce surface damage on the surface of the Si / SiC heterojunction. The above process is cumbersome and time-consuming.

[0039] In order to solve the above technical problems, the present invention provides a novel method for preparing a power device. Figure 1 As shown, Figure 1 1 is a flow chart of a method for manufacturing a power device provided by an embodiment of the present invention, the method for manufacturing a power device comprising the following steps:

[0040] S110 , providing a silicon carbide substrate.

[0041] like Figure 2 As shown, a silicon carbide substrate 100 is provided.

[0042] S120 , forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate.

[0043] like Figure 2As shown, a silicon carbide epitaxial layer 101 is formed on one side of a silicon carbide substrate 100 by an epitaxial process. The preparation method of the silicon carbide epitaxial layer 101 mainly includes at least one of evaporation growth, liquid phase epitaxy (LPE), molecular beam epitaxy (MBE) and chemical vapor deposition (CVD).

[0044] S130 , growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0045] like Figure 2 As shown, at least one silicon film layer 102 is grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. In this embodiment, the silicon film layer 102 is grown directly on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 to form a Si / SiC heterojunction consisting of the silicon carbide epitaxial layer 101 and the silicon film layer 102. This does not require a wafer bonding process, thus simplifying the preparation process of the Si / SiC heterojunction and reducing the preparation cost. In addition, the Si / SiC heterojunction can have ideal diode rectification characteristics and space charge modulation effects, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0046] Alternatively, as Figure 3 As shown, a body region 103 and an active region 104 are formed in a single-trench SiC metal-oxide field effect transistor power device by an ion implantation process. The single-trench power device also includes a drift region 105. Exemplarily, the active region 104 includes a first conductivity type active region 106 and a second conductivity type active region 107.

[0047] Optionally, a silicon oxide layer can be formed on the surface of the silicon film layer 102 through an oxidation process, and then the silicon oxide layer can be removed to remove defects in the silicon film layer 102 and form a silicon film layer 102 with better conductive properties, which helps to further improve the carrier efficiency of the power device.

[0048] S140 , forming a gate trench on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer.

[0049] like Figure 4 As shown, a gate trench T1 is formed on a side of at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101 by a trenching process, wherein the gate trench T1 penetrates at least one silicon film layer 102. For example, Figure 4 In the embodiment, the gate trench T1 penetrates at least one silicon film layer 102 and a portion of the silicon carbide epitaxial layer 101. It should be noted that the depth of the gate trench T1 can be set according to actual needs.

[0050] S150 , forming a trench gate structure in the gate trench.

[0051] like Figure 5 As shown, a trench gate structure 108 is formed in the gate trench T1, and the trench gate structure 108 includes a gate dielectric layer 109 and a polysilicon gate 110. The gate dielectric layer 109 can be formed by an atomic layer deposition (ALD) process, and the polysilicon gate 110 can be formed by a low-pressure chemical vapor deposition (LPCVD) process.

[0052] S160 , forming a planar source structure on a side of at least one silicon film layer away from the silicon carbide epitaxial layer.

[0053] like Figure 6 As shown, a planar source structure 111 is formed on a side of at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101. The planar source structure 111 is composed of a source metal electrode connected to the active area 104. The source metal electrode can be formed by a sputtering process.

[0054] S170 , forming a drain on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer.

[0055] like Figure 6 As shown, a drain electrode 112 is formed on a side of the silicon carbide substrate 100 away from the silicon carbide epitaxial layer 101 by a sputtering process. Exemplarily, the drain electrode 112 comprises a stack of Ti / Ni / Ag. Optionally, the silicon carbide substrate 100 may be thinned before forming the drain electrode 112 to improve the heat dissipation performance of the power device.

[0056] In the preparation process of the single-trench silicon carbide metal-oxide field-effect transistor power device provided by an embodiment of the present invention, before forming the trench gate structure 108, the planar source structure 111, and the drain 112, the silicon film layer 102 is directly grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 to form a Si / SiC heterojunction composed of the silicon carbide epitaxial layer 101 and the silicon film layer 102. This does not require a wafer bonding process, thus simplifying the preparation process of the Si / SiC heterojunction and reducing the preparation cost. In addition, the Si / SiC heterojunction can have ideal diode rectification characteristics and space charge modulation effects, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0057] It should be noted that the single-trench silicon carbide metal-oxide field effect transistor power device provided in the embodiments of the present invention includes an N-channel single-trench silicon carbide metal-oxide field effect transistor power device or a P-channel single-trench silicon carbide metal-oxide field effect transistor power device. For the N-channel single-trench silicon carbide metal-oxide field effect transistor power device, the Si / SiC heterojunction improves the electron mobility of the single-trench silicon carbide metal-oxide field effect transistor power device and reduces the on-resistance of the single-trench power device. For the P-channel single-trench silicon carbide metal-oxide field effect transistor power device, the Si / SiC heterojunction improves the hole mobility of the single-trench silicon carbide metal-oxide field effect transistor power device and reduces the on-resistance of the single-trench power device. For example, for an N-channel single-trench silicon carbide metal-oxide field-effect transistor power device, the silicon carbide substrate 100 is an N+ silicon carbide substrate, the silicon carbide epitaxial layer 101 is an N-silicon carbide epitaxial layer, the drift region 105 is an N-drift region, the body region 103 is a P-type body region, the first conductivity type active region 106 in the active region 104 is an N+ active region or an N++ active region, and the second conductivity type active region 107 is a P+ active region or a P++ active region. It should be noted that in other embodiments, the active region 104 may include only the first conductivity type active region 106.

[0058] Optionally, based on the above technical solution, Figure 7 As shown, Figure 7 is a flow chart of another method for preparing a power device provided by an embodiment of the present invention, wherein Figure 1 Based on the preparation method of the power device shown, Figure 7 Will Figure 1 The step S130 is further defined. Specifically, S130 growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate includes:

[0059] S1301. Performing a heat treatment on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate so that silicon atoms in the silicon carbide epitaxial layer sublime and re-condense to grow at least one silicon film layer on a surface of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0060] See also Figure 2The side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 is subjected to a heat treatment, causing silicon atoms in the silicon carbide epitaxial layer 101 to sublime and re-condense and grow at least one silicon film layer 102 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. Optionally, the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 is heated to a high temperature of 1000°C-1600°C to complete the heat treatment. Within the high temperature range of 1000°C-1600°C, silicon atoms in the silicon carbide epitaxial layer 101 sublime and re-condense and grow at least one silicon film layer 102 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. By adjusting the heating temperature and heating time, the thickness of the silicon film layer 102 deposited on the silicon carbide epitaxial layer 101 can be controlled, thereby meeting the needs of single-trench silicon carbide metal-oxide field-effect transistor power devices.

[0061] Specifically, a heat treatment is performed on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, causing silicon atoms in the silicon carbide epitaxial layer 101 to sublime and re-condense and grow at least one silicon film layer 102 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, thereby forming a Si / SiC heterojunction consisting of the silicon film layer 102 and the silicon carbide epitaxial layer 101 in the single-trench silicon carbide metal-oxide field-effect transistor power device. This formation eliminates the need for a wafer bonding process, simplifies the Si / SiC heterojunction fabrication process, and reduces fabrication costs. Furthermore, the Si / SiC heterojunction can exhibit ideal diode rectification characteristics and space charge modulation, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0062] Optionally, based on the above technical solution, Figure 8 As shown, Figure 8 This is a flow chart of another method for preparing a power device provided by an embodiment of the present invention. Figure 1 Based on the preparation method of the power device shown, Figure 8 Will Figure 1 The step S130 is further defined. Specifically, S130 growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate includes:

[0063] S1302. Grow at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate through a film forming process, wherein the film forming process includes at least one of atomic layer deposition process, plasma enhanced chemical vapor deposition and low pressure chemical vapor deposition.

[0064] See also Figure 2At least one silicon film layer 102 is grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through a film formation process. The film formation process includes at least one of atomic layer deposition, plasma-enhanced chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition (LPCVD). Atomic layer deposition is a thin film fabrication technology that grows thin films layer by layer at the atomic level. The number of layers or thickness of the silicon film layer 102 can be simply determined by setting the number of consecutive pulses to form a Si / SiC heterojunction consisting of the silicon film layer 102 and the silicon carbide epitaxial layer 101 in a single-trench silicon carbide metal-oxide field-effect transistor power device. This formation process does not require wafer bonding, simplifying the Si / SiC heterojunction fabrication process and reducing fabrication costs. Furthermore, the Si / SiC heterojunction can exhibit ideal diode rectification characteristics and space charge modulation, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0065] Optionally, based on the above technical solution, Figure 9 As shown, Figure 9 This is a flow chart of another method for preparing a power device provided by an embodiment of the present invention. Figure 1 Based on the preparation method of the power device shown, Figure 9 Will Figure 1 The step S130 is further defined. Specifically, S130 growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate includes:

[0066] S1303 , performing a heat treatment on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate, so that silicon atoms in the silicon carbide epitaxial layer sublime and re-condense to grow a first silicon film layer on the surface of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0067] See also Figure 10 , a heat treatment is performed on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, so that the silicon atoms in the silicon carbide epitaxial layer 101 sublime and re-condense to grow the first silicon film layer 113 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. Optionally, the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 is heated to a high temperature of 1000°C-1600°C to complete the heat treatment. In the high temperature range of 1000°C-1600°C, the silicon atoms in the silicon carbide epitaxial layer 101 sublime and re-condense to grow the first silicon film layer 113 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. The number of layers of the first silicon film layer 113 includes one or more layers.

[0068] S1304. Grow a second silicon film layer on a surface of the first silicon film layer away from the silicon carbide epitaxial layer through a film forming process, wherein the film forming process includes at least one of an atomic layer deposition process, a plasma enhanced chemical vapor deposition process, and a low pressure chemical vapor deposition process.

[0069] See also Figure 10 The formation of the first silicon film layer 113 helps to improve the quality of the second silicon film layer 114 grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through the film forming process. The film forming process includes at least one of the atomic layer deposition process, plasma enhanced chemical vapor deposition and low pressure chemical vapor deposition. Atomic layer deposition technology is a thin film preparation technology that grows thin films layer by layer at the atomic level. The number of layers or thickness of the second silicon film layer 114 can be simply determined by setting the number of continuous pulses. The formation of the first silicon film layer 113 and the second silicon film layer 114 can form a Si / SiC heterojunction consisting of the silicon film layer 102 and the silicon carbide epitaxial layer 101 in the silicon carbide metal-oxide field effect transistor power device, without the need for a wafer bonding process to form it, thereby simplifying the preparation process of the Si / SiC heterojunction and reducing the preparation cost. Moreover, the Si / SiC heterojunction can have ideal diode rectification characteristics and space charge modulation effect, which improves the carrier mobility of single-trench silicon carbide metal-oxide field-effect transistor power devices and reduces the on-resistance of single-trench power devices.

[0070] The above technical solution illustrates that the silicon film layer 102 can be prepared by growing the silicon carbide epitaxial layer 101 through a film formation process and / or by heating the silicon carbide epitaxial layer 101. The heating of the silicon carbide epitaxial layer 101 can cause silicon atoms in the silicon carbide epitaxial layer 101 to sublime and recondense and grow on a surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100.

[0071] It should be noted that the heat treatment causes the silicon atoms in the silicon carbide epitaxial layer 101 to sublime and recondense to grow at least one silicon film layer 102 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. That is, the conductivity type of the silicon film layer 102 is the same as the conductivity type of the region where the silicon atoms precipitated. The silicon film layer 102 grown by the film formation process is an undoped silicon film layer.

[0072] Optionally, based on the above technical solution, after growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate in S130, and before forming a gate trench on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer in S140, the method further includes:

[0073] An active region and a body region are formed at least in the silicon film layer by an ion implantation process.

[0074] by Figure 3For example, an active region 104 and a body region 103 are formed in at least one silicon film layer 102 by an ion implantation process.

[0075] For example, for an N-channel single-trench silicon carbide metal-oxide field-effect transistor power device, the silicon carbide substrate 100 is an N+ silicon carbide substrate, the silicon carbide epitaxial layer 101 is an N-silicon carbide epitaxial layer, the drift region 105 is an N-drift region, the body region 103 is a P-type body region, the first conductivity type active region 106 in the active region 104 is an N+ active region or an N++ active region, and the second conductivity type active region 107 is a P+ active region or a P++ active region. It should be noted that in other embodiments, the active region 104 may include only the first conductivity type active region 106.

[0076] In the technical solution provided by an embodiment of the present invention, after at least one silicon film layer 102 is grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, and before the gate trench T1 is formed on the side of the at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101, an active region 104 and a body region 103 are formed on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through an ion implantation process.

[0077] like Figure 11 As shown, Figure 11 This is a flow chart of another method for preparing a power device provided by an embodiment of the present invention. Figure 1 Based on the preparation method of the power device shown, Figure 11 It is further defined that before growing at least one silicon film layer 102 on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, an active region 104 and a body region 103 are formed on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 by an ion implantation process. The method for preparing the power device includes the following steps:

[0078] S210 , providing a silicon carbide substrate.

[0079] See also Figure 12 , a silicon carbide substrate 100 is provided.

[0080] S220 , forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate.

[0081] See also Figure 12 A silicon carbide epitaxial layer 101 is formed on one side of the silicon carbide substrate 100 through an epitaxial process. The preparation method of the silicon carbide epitaxial layer 101 mainly includes at least one of evaporation growth, liquid phase epitaxy (LPE), molecular beam epitaxy (MBE), and chemical vapor deposition (CVD).

[0082] S230 , forming an active region and a body region on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate through an ion implantation process.

[0083] See also Figure 12 An active region 104 and a body region 103 are formed on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through an ion implantation process. For example, for an N-channel single-trench silicon carbide metal-oxide field-effect transistor power device, the silicon carbide substrate 100 is an N+ silicon carbide substrate, the silicon carbide epitaxial layer 101 is an N- silicon carbide epitaxial layer, the drift region 105 is an N- drift region, the body region 103 is a P-type body region, the first conductivity type active region 106 in the active region 104 is an N+ active region or an N++ active region, and the second conductivity type active region 107 is a P+ active region or a P++ active region. It should be noted that in other embodiments, the active region 104 may include only the first conductivity type active region 106.

[0084] S240 , forming a gate trench on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0085] See also Figure 13 A gate trench T1 is formed on a side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. Exemplarily, the gate trench T1 penetrates at least one silicon film layer 102 and a portion of the silicon carbide epitaxial layer 101. It should be noted that the depth of the gate trench T1 can be set according to actual needs.

[0086] S250 , growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0087] See also Figure 14 At least one silicon film layer 102 is grown on a side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 .

[0088] Alternatively, the silicon film layer 102 may be formed by growing the silicon carbide epitaxial layer 101 through a film formation process and / or by heating the silicon carbide epitaxial layer 101. The heating of the silicon carbide epitaxial layer 101 may cause silicon atoms in the silicon carbide epitaxial layer 101 to sublime and recondense and grow on a surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100.

[0089] Herein, a heat treatment is performed on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, so that the silicon atoms in the silicon carbide epitaxial layer 101 sublime and re-condense to grow at least one silicon film layer 102 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, which can be referred to S1301.

[0090] At least one silicon film layer 102 is grown on a side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through a film forming process, which may be referred to as S1302 .

[0091] A heat treatment is performed on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, causing silicon atoms in the silicon carbide epitaxial layer 101 to sublime and recondense on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 to grow a first silicon film layer 113, which can be referred to as S1303. Then, a second silicon film layer 114 is grown on the surface of the first silicon film layer 113 away from the silicon carbide epitaxial layer 101 through a film formation process, which can be referred to as S1304. The formation of the first silicon film layer 113 helps to improve the quality of the second silicon film layer 114 grown through the film formation process on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100.

[0092] It should be noted that in this embodiment, when the silicon atoms in the silicon carbide epitaxial layer 101 are sublimated by heat treatment and re-condensed to grow a silicon film layer on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, the conductivity type of the silicon film layer is the same as the conductivity type of the silicon atom precipitation region.

[0093] S260. Perform patterning on at least one silicon film layer to retain at least one silicon film layer covering the sidewall of the gate trench and at least one silicon film layer on the side of the silicon carbide epitaxial layer on both sides of the gate trench away from the silicon carbide substrate, so as to grow at least one silicon film layer on the side of the silicon carbide epitaxial layer away from the silicon carbide substrate.

[0094] See also Figure 15 The at least one silicon film layer 102 is patterned, leaving at least one silicon film layer 102 covering the sidewalls of the gate trench T1 and at least one silicon film layer 102 on both sides of the gate trench T1 and on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100. The sidewalls of the gate trench T1 covered by the silicon film layer 102 serve as channels.

[0095] S270 , forming a trench gate structure in the gate trench.

[0096] See also Figure 16 A trench gate structure 108 is formed in the gate trench T1 , and serves as a gate structure, which includes a gate dielectric layer 109 and a polysilicon gate 110 .

[0097] S280 , forming a planar source structure on a side of at least one silicon film layer away from the silicon carbide epitaxial layer.

[0098] See also Figure 17 A planar source structure is formed on a side of at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101 , and the planar source structure 111 serves as the source structure.

[0099] S290, forming a drain on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer.

[0100] See also Figure 17 A drain 112 is formed on a side of the silicon carbide substrate 100 away from the silicon carbide epitaxial layer 101 by a sputtering process.

[0101] In the technical solution provided by the embodiment of the present invention, before growing at least one silicon film layer 102 on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, an active region 104 and a body region 103 are formed on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through an ion implantation process.

[0102] The embodiment of the present invention also provides a power device, such as Figure 6 and Figure 17 As shown, the power device includes: a silicon carbide substrate 100; a silicon carbide epitaxial layer 101, the silicon carbide epitaxial layer 101 is located on one side of the silicon carbide substrate 100; at least one silicon film layer 102, the at least one silicon film layer 102 is grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100; a gate trench, the gate trench is located on the side of the at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101, wherein the gate trench passes through the at least one silicon film layer 102; a trench gate structure 108, the trench gate structure 108 is located in the gate trench; a planar source structure 111, the planar source structure 111 is located on the side of the at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101; and a drain 112, the drain 112 is located on the side of the silicon carbide substrate 100 away from the silicon carbide epitaxial layer 101.

[0103] In the preparation process of the single-trench silicon carbide metal-oxide field-effect transistor power device provided by an embodiment of the present invention, before forming the trench gate structure 108, the planar source structure 111, and the drain 112, the silicon film layer 102 is directly grown on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 to form a Si / SiC heterojunction composed of the silicon carbide epitaxial layer 101 and the silicon film layer 102. This does not require a wafer bonding process, thus simplifying the preparation process of the Si / SiC heterojunction and reducing the preparation cost. In addition, the Si / SiC heterojunction can have ideal diode rectification characteristics and space charge modulation effects, thereby improving the carrier mobility of the single-trench silicon carbide metal-oxide field-effect transistor power device and reducing the on-resistance of the single-trench power device.

[0104] Optionally, based on the above technical solution, Figure 6 As shown, an active region 104 and a body region 103 are provided in the silicon film layer 102 .

[0105] Specifically, after growing at least one silicon film layer 102 on the side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100, and before forming the gate trench T1 on the side of the at least one silicon film layer 102 away from the silicon carbide epitaxial layer 101, the above structure forms an active region 104 and a body region 103 on the surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 through an ion implantation process.

[0106] Optionally, based on the above technical solution, Figure 17 As shown, the silicon carbide epitaxial layer 101 is provided with an active region 104 and a body region 103 away from the surface of the silicon carbide substrate 100 .

[0107] Specifically, before growing at least one silicon film layer 102 on a side of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 , an active region 104 and a body region 103 are formed on a surface of the silicon carbide epitaxial layer 101 away from the silicon carbide substrate 100 by an ion implantation process.

[0108] An embodiment of the present invention provides a power module comprising a substrate and at least one power device as described in any embodiment of the present invention, wherein the substrate is configured to support the power device. Therefore, the beneficial effects of the power module including the power device as described in any embodiment of the present invention are not further elaborated here.

[0109] An embodiment of the present invention provides a power conversion circuit, which is used for one or more of current conversion, voltage conversion, and power factor correction; the power conversion circuit includes a circuit board and at least one power device described in any embodiment of the present invention, and the power device is electrically connected to the circuit board.

[0110] Therefore, the power conversion circuit includes the beneficial effects of any power device described in any embodiment of the present invention, which will not be repeated here.

[0111] An embodiment of the present invention further provides a vehicle, comprising a load and the power conversion circuit described in any embodiment of the present invention, wherein the power conversion circuit is used to convert AC and / or DC power into AC and / or DC power and then input the converted power into the load.

[0112] Therefore, the vehicle includes the power conversion circuit of any embodiment of the present invention. Therefore, the beneficial effects of the vehicle including the power conversion circuit described in any embodiment of the present invention are not repeated here.

[0113] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0114] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A method for preparing a power device, characterized in that: include: Providing silicon carbide substrates; forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate; growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate; forming a gate trench on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer; forming a trench gate structure in the gate trench; forming a planar source structure on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer; forming a drain electrode on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer; Growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate comprises: A heat treatment is performed on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate, so that silicon atoms in the silicon carbide epitaxial layer sublime and re-condense to grow at least one silicon film layer on a surface of the silicon carbide epitaxial layer away from the silicon carbide substrate.

2. The method for preparing a power device according to claim 1, wherein: Growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate comprises: performing a heating treatment on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate, so that silicon atoms in the silicon carbide epitaxial layer sublime and re-condense to grow a first silicon film layer on a surface of the silicon carbide epitaxial layer away from the silicon carbide substrate; A second silicon film layer is grown on a surface of the first silicon film layer away from the silicon carbide epitaxial layer through a film forming process, wherein the film forming process includes at least one of atomic layer deposition, plasma enhanced chemical vapor deposition and low pressure chemical vapor deposition.

3. The method for preparing a power device according to claim 1 or 2, wherein: After growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate, and before forming a gate trench on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, the method further includes: An active region and a body region are formed in at least one silicon film layer by an ion implantation process.

4. The method for preparing a power device according to claim 1 or 2, wherein: Growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate comprises: forming an active region and a body region on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate by an ion implantation process; forming a gate trench on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate; growing at least one silicon film layer on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate; The at least one silicon film layer is patterned to retain the at least one silicon film layer covering the sidewall of the gate trench and the at least one silicon film layer on the side of the silicon carbide epitaxial layer on both sides of the gate trench away from the silicon carbide substrate, so as to grow at least one silicon film layer on the side of the silicon carbide epitaxial layer away from the silicon carbide substrate.

5. A power device, characterized in that: include: Silicon carbide substrate; a silicon carbide epitaxial layer, wherein the silicon carbide epitaxial layer is located on one side of the silicon carbide substrate; At least one silicon film layer, the at least one silicon film layer being grown on a side of the silicon carbide epitaxial layer away from the silicon carbide substrate; the silicon film layer being a film layer formed by heating the side of the silicon carbide epitaxial layer away from the silicon carbide substrate so that silicon atoms in the silicon carbide epitaxial layer sublime and re-condense and grow on a surface of the silicon carbide epitaxial layer away from the silicon carbide substrate; a gate trench, the gate trench being located on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer, wherein the gate trench penetrates the at least one silicon film layer; a trench gate structure, wherein the trench gate structure is located in the gate trench; a planar source structure, the planar source structure being located on a side of the at least one silicon film layer away from the silicon carbide epitaxial layer; A drain electrode is located on a side of the silicon carbide substrate away from the silicon carbide epitaxial layer.

6. The power device according to claim 5, characterized in that An active region and a body region are provided in the silicon film layer.

7. The power device according to claim 5, characterized in that The surface of the silicon carbide epitaxial layer away from the silicon carbide substrate is provided with an active region and a body region.

8. A power module, characterized in that: It comprises a substrate and at least one power device according to any one of claims 5 to 7, wherein the substrate is used to support the power device.

9. A power conversion circuit, characterized in that: The power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction; The power conversion circuit includes a circuit board and at least one power device according to any one of claims 5 to 7, wherein the power device is electrically connected to the circuit board.

10. A vehicle, characterized in that: The device comprises a load and the power conversion circuit according to claim 9, wherein the power conversion circuit is used to convert alternating current and / or direct current into alternating current and / or direct current, and then input the converted alternating current and / or direct current into the load.

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